JP2003008023A - Thin-film transistor, array substrate using the same, display element, and organic electroluminescence display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a polysilicon thin-film transistor which has stable element characteristics and can be mass-produced at low cost and a liquid-crystal display device which uses it. SOLUTION: The thin-film transistor formed on a substrate is composed of only a P type and the highest processing temperature in the manufacturing process for the thin-film transistor is <=450 deg..

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a polysilicon thin film transistor and a liquid crystal display device using the same.

[0002]

2. Description of the Related Art In recent years, liquid crystal display devices have been used in various fields, not limited to OA and AV, as a display friendly to the global environment, because they are thin, lightweight and have low power consumption. In particular, since a liquid crystal display device using a thin film transistor is excellent in gradation display and has a high response speed, it has achieved a performance close to that of a CRT as a moving image compatible color display.

Further, from a conventional liquid crystal display device in which thin film transistors are arranged in a switching matrix in an image display section, a liquid crystal display device has been developed in which thin film transistors are also used in peripheral driving circuits, that is, peripheral circuits are integrated on the same glass substrate. There is. However, the performance required for a thin film transistor that constitutes a drive circuit is not sufficient as the performance of a normal amorphous silicon transistor that has been conventionally used as a switching element of a pixel display unit, and at least polysilicon (polycrystalline silicon) ) The above performance is required.

Conventionally, a high temperature of 900 ° C. or higher is required to obtain polysilicon, and heat-resistant quartz has been used for the substrate. However, in order to reduce the cost and increase the screen size,
It is required to use ordinary glass other than quartz for the substrate. When ordinary glass is used for the substrate, it is necessary to manufacture polysilicon at a low temperature (about 600 ° C. or less) at which ordinary glass can withstand heat.

A conventional polysilicon thin film transistor and its manufacturing method will be described below.

As shown in FIG. 4, a conventional polysilicon thin film transistor includes a glass substrate 1, an insulating film 2 (hatching is omitted) laminated on the glass substrate 1, and a channel region 3 made of polysilicon. a source region 4 and a drain region 5 made of n-type polysilicon, a source electrode 4a, a drain electrode 5a, a gate insulating film 6, and
The gate electrode 7, the interlayer insulating film 8 and the pixel electrode film 9 are provided.

Next, with reference to FIG. 5, a method of manufacturing the conventional polysilicon thin film transistor will be described.
First, as shown in FIG. 5A, an insulating film 2 made of, for example, SiO2 or SiN is formed on a glass substrate 1, and a polysilicon thin film 3a is further formed on this insulating film 2. The polysilicon thin film 3a is obtained by forming an amorphous silicon thin film on the insulating film 2 and then polycrystallizing the amorphous silicon thin film by annealing with an excimer laser or the like.

After that, as shown in FIG. 5B, an unnecessary portion of the polysilicon thin film 3a is removed by a photolithography process and an etching process. After that, as shown in FIG. 5C, the gate insulating film 6 (for example, SiO2) and the gate electrode 7 (for example, metal or alloy such as molybdenum-tungsten) are formed on the polysilicon thin film 3a.
And are formed in order.

Then, the ion-doping method is used to ionize the phosphorus hydride (PH3) gas by plasma or arc discharge and accelerate the high-voltage ions to form a portion of the polysilicon thin film 3a where the gate electrode 7 is not formed. Dope into. And usually, 400 ℃ ~
Annealing is performed at a temperature of 600 ° C. to electrically activate phosphorus in polysilicon. As a result, as shown in FIG. 5D, the channel region 3 and the source region 4 and the drain region 5 made of n-type polysilicon and sandwiching the channel region 3 are formed. After that, the interlayer insulating film 8, the source electrode 4a, the drain electrode 5a and the pixel electrode film 9 are formed. In this way, an n-channel thin film transistor is manufactured.

In the above conventional manufacturing method, in order to stabilize the device characteristics, the doped ions are electrically activated sufficiently and the crystalline damage caused by the ion implantation into the polysilicon thin film is sufficiently suppressed. Need to recover. Therefore, it is necessary to perform annealing at a temperature as high as possible (500 ° C. or higher) after performing ion doping with phosphorus or the like.

Further, in the above manufacturing method, an ion implantation apparatus is used when doping impurities such as phosphorus and boron, but in order to manufacture a large-screen liquid crystal display apparatus and to manufacture a liquid crystal display apparatus at low cost. For this purpose, it is necessary to use an ion implantation device that performs ion implantation without mass separation of ion species. The reason for this is that the ion implantation apparatus that performs ion implantation with mass separation has only a small area, and has a problem that it has extremely low processing capacity and is expensive. For this reason, conventionally, an ion doping apparatus for doping ions (a mixture of various ions) in which ion species have not been subjected to mass separation has been used for ion doping. Impurities are injected into the polysilicon thin film 3a.

[0012]

However, in the above-mentioned conventional polysilicon thin film transistor in which the ion doping is followed by annealing at a temperature of 500 ° C. or more, the drain current-gate voltage characteristic becomes negative with time due to the gate bias temperature stress application. There was a problem of shifting to the voltage side. FIG. 6 shows changes in drain current-gate voltage characteristics when the gate bias voltage stress is applied to the conventional polysilicon thin film transistor.

The reason for the change over time as shown in FIG. 6 is not clear at present, but it is presumed as follows.

That is, since ions that have not been subjected to mass separation are used during the ion doping, not only phosphorus ions but also hydrogen ions or ions of a compound of hydrogen and phosphorus are doped. Also, ions of light atoms such as hydrogen become faster at the same acceleration energy, and the gate electrode 7, the gate insulating film 6, and the polysilicon thin film 3 are accelerated.
It will be injected up to a.

By the way, when such hydrogen ions are present and an oxide gate insulating film such as silicon oxide is used as the gate insulating film 6, or when the gate insulating film 6 contains excessive water. At high temperature (50
When annealed at 0 ° C. or higher), a complicated redox reaction may occur between the gate electrode 7 and the gate insulating film 6, and an unstable ionic substance may be generated near the interface between them. It is said.

In particular, when a metal having various oxidation states (from -1 valence to 6 valences) such as molybdenum or tungsten is used for the gate electrode 7, the interface between the gate electrode 7 and the gate insulating film 6 is formed. It is considered that unstable ionic substances are likely to be generated.

When the thin film transistor continues to operate at a high temperature (for example, a positive voltage is applied to the gate electrode at 150 ° C.) when the vicinity of the interface between the gate electrode 7 and the gate insulating film 6 is in such a state, hydrogen ions are generated. It is considered that the gate voltage moves to the polysilicon side which is the channel region 3, and a positive voltage higher than the gate voltage is superimposed on the polysilicon. As a result, the drain current-gate voltage characteristic may shift in the negative direction as shown in FIG.

To solve the above problems, it is possible to select another material such as aluminum, tantalum or chromium as the gate electrode (metal) material. However, for aluminum, 500
There is a problem that it cannot withstand heat treatment at a temperature of ℃ or more, and thus it may not be adopted.

In the case of n-type TFT, the hot carr in the LDD layer
In some cases, the resistance increased due to the breakage of Si-H bonds during passage of ier. This means that the electric field mobility of holes is smaller than that of electrons (electron 1500 [cm2 / vs], ha at maximum).
It can be understood from ll 500 [cm2 / vs]) that there is a difference in energy when carriers are accelerated by an electric field even if the mobility is the same.

In order to solve the above problems, it is an object of the present invention to provide a polysilicon thin film transistor which has stable device characteristics and can be mass-produced at low cost, and a liquid crystal display device using the same.

[0021]

In order to achieve the above object, the first polysilicon thin film transistor of the present invention comprises:
A polysilicon thin film transistor comprising a polysilicon thin film functioning as a channel region, a gate electrode, and a gate insulating film arranged between the polysilicon thin film and the gate electrode, all of which are manufactured at 450 degrees or less. The thin film transistors on the substrate are all P-type,
The thin film transistor integrated circuit is characterized in that the active layer is a polycrystalline thin film.

According to the first polysilicon thin film transistor, it is possible to prevent the element in the gate insulating film and the gate electrode from reacting with the impurities by performing the low temperature treatment. Therefore, the polysilicon thin film transistor having high characteristics and high reliability is obtained. Is obtained. Further, since the first polysilicon thin film transistor can be manufactured using an ion doping apparatus that does not perform mass separation of ion species, it can be mass-produced at low cost. When mass separation of ionic species is not performed, unnecessary elements are present as impurities. With the above first polysilicon thin film transistor, a polysilicon thin film transistor having particularly high characteristics and reliability can be obtained by the above configuration.

A second polysilicon thin film transistor of the present invention comprises a polysilicon thin film functioning as a channel region, a gate electrode, and a gate insulating film arranged between the polysilicon thin film and the gate electrode. A silicon thin film transistor, which is characterized in that it can be processed at a low temperature by using a non-annealed substrate. According to the second polysilicon thin film transistor, an effect for producing the first polysilicon thin film transistor can be obtained.

In the first and second polysilicon thin film transistors, it is preferable that the gate electrode is made of a metal containing at least one selected from molybdenum, tungsten and tantalum.

With the above structure, a low resistance electrode is provided,
It is possible to obtain a polysilicon thin film transistor having high characteristics (which can be annealed at a low temperature in the manufacturing process to activate the dopant).

In the first and second polysilicon thin film transistors, it is preferable that the polysilicon thin film is made of polysilicon formed by irradiating an amorphous silicon film with light.

The liquid crystal display device of the present invention is a liquid crystal display device or an electroluminescence display device including a polysilicon thin film transistor, wherein the polysilicon thin film transistor is at least one element selected from a switching element and a circuit driving element, Further, it is characterized by being the above-mentioned first or second polysilicon thin film transistor.

[0028]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) In Embodiment 1, an example of a polysilicon thin film transistor of the present invention will be described. FIG. 1 shows a cross-sectional view of a polysilicon thin film transistor (hereinafter also referred to as a polysilicon TFT) 10 of the first embodiment.

Referring to FIG. 1, polysilicon TFT 10
Is a glass substrate 11, an insulating film 12 (hatching is omitted), a channel region 13, a source region 14, a source electrode 14a, a drain region 15, a drain electrode 15a, a gate insulating film 16, and a gate. An electrode 18, an interlayer insulating film 19, and a pixel electrode film 20 are provided. here,
Channel region 13, gate insulating film 16, gate electrode 18
Are laminated on the insulating film 12 in this order. That is, the gate insulating film 16 is arranged between the channel region 13 and the gate electrode 18.

As the glass substrate 11, for example, a non-alkali glass substrate 1737 (made by Corning) is used. The insulating film 12 is formed on the glass substrate 11. As the insulating film 12, for example, SiO2 is used.

The channel region 13 is formed on a part of the insulating film 12. Polysilicon is used for the channel region 13.

Source region 14 and drain region 15
Are formed on a part of the insulating film 12 so as to sandwich the channel region 13. As the source region 14 and the drain region 15, p-type polysilicon is used. The source electrode 14a and the drain electrode 15a are formed so as to be connected to the source region 14 and the drain region 15, respectively. As the source electrode 14a and the drain electrode 15a, for example, a metal such as aluminum is used.

The gate insulating film 16 is formed on the channel region 13. As the gate insulating film 16, for example, SiO2 is used.

The TFT device structure is all p-type, and the glass substrate 11 is made of only non-annealed glass.

The gate electrode 18 is made of metal. The gate electrode 18 is made of, for example, a metal containing at least one selected from molybdenum, tungsten, and tantalum (molybdenum, tungsten, tantalum, molybdenum-tungsten alloy, etc.), and the material of the gate electrode 18 is 450 ° C. or lower. It is preferable that the material is stable if heat-treated at a temperature.

Further, it is preferable that the electric resistance is small, and therefore the gate electrode 18 is preferably made of molybdenum or the like.

The interlayer insulating film 19 is formed so as to cover the gate electrode 18. For the interlayer insulating film 19, for example, SiO2 is used.

The pixel electrode film 20 is formed so as to be connected to the drain electrode 15a. In the pixel electrode film 20,
For example, ITO is used.

The channel region 13 and the source region 14
As the polysilicon thin film forming the drain region 15, a polysilicon thin film formed by irradiating an amorphous silicon thin film with excimer laser light or the like can be used. The highest process temperature of the thin film semiconductor device described above is 400 to 450 ° C. for annealing for dehydrogenation and activation.

Next, an example of a method of manufacturing the n-channel polysilicon TFT 10 will be described with reference to FIG.

First, as shown in FIG. 2A, an insulating film 12 (having a film thickness of 400 nm, for example) is formed on a glass substrate 11, and an amorphous silicon film 21 (having a film thickness of, for example, 400 nm) is formed on the insulating film 12. 500 nm) is formed. The insulating film 12 and the amorphous silicon film 21 can be formed by, for example, the CVD method.

Thereafter, as shown in FIG. 2B, the amorphous silicon film 21 is polycrystallized by irradiating an excimer laser beam to form a polysilicon thin film 22. Then, an unnecessary portion of the polysilicon thin film 22 is removed by a photolithography process and an etching process. The etching process is usually performed by plasma dry etching using a fluorine-based gas.

After that, as shown in FIG. 2C, a gate insulating film 16 (having a film thickness of, for example, 100 nm) and a gate electrode 18 (made of molybdenum, tungsten, tantalum, or the like and having a film thickness of, for example, 300 nm) are sequentially formed. Stack.
The gate insulating film 16 can be formed by, for example, a CVD method. In this case, TEOS (tetraethoxysilane, te
traethoxysilane: Si (OC2H5)
The plasma CVD method using 4) can be used.
Note that N2O-silane-based plasma CVD method, low-pressure CVD method using silane-based gas, or atmospheric pressure CVD method may be used. The gate electrode 18 may be formed of a silicide thin film or the like by the CVD method, or can be formed by forming a metal thin film by the sputtering method and then removing an unnecessary portion by a photolithography process and an etching process. In this etching step, wet etching with a chemical solution or dry etching with plasma can be used.

Thereafter, as shown in FIG. 2D, a source region 14, a drain region 15 and a channel region 13 are formed by doping part of the polysilicon thin film 22 with borohydride (B2H6) ions. . For the boron ion doping, for example, B2H6 is made into plasma and various ionizations are performed, and the ions are injected at several tens of kV to 10 kV.
It can be performed by electrically accelerating under the condition of 0 kV.

At this time, an ion doping apparatus which does not perform mass separation of ion species is used. By the ion doping, ions mainly composed of boron ions are implanted into the polysilicon thin film 22 in the portion where the gate electrode 18 is not formed. Further, after the ion implantation, heat treatment is performed in a nitrogen gas atmosphere at a temperature of 450 ° C. or less for about 10 hours or less to activate the dopant and recover the damage of the polysilicon thin film due to the ion implantation. Note that lamp annealing such as RTA (Rapid Thermal Annealing) may be used for this annealing. In this way, the channel region 13 made of polysilicon and the channel region 1
A source region 14 and a drain region 15 made of p-type polysilicon are formed so as to sandwich 3 between them.

After that, as shown in FIG. 2E, the interlayer insulating film 19 (having a film thickness of 400 nm) is formed, for example, by C.
It is formed by the VD method.

After that, as shown in FIG. 2F, after forming through holes for taking out electrodes in the interlayer insulating film 19 and the like, the source electrode 14a, the drain electrode 15a, and the pixel electrode film 20 are formed. The through hole can be formed by a photolithography process and an etching process. Also,
The source electrode 14a, the drain electrode 15a, and the pixel electrode film 20 can be formed by forming a metal film by a sputtering method and then removing unnecessary portions by a photolithography process and an etching process.
In this way, a p-type polysilicon TFT can be manufactured.

An amorphous silicon thin film is formed, and a gate electrode made of molybdenum or the like is further formed.
A method of forming a TFT device by low temperature treatment is also effective.

FIG. 3 shows the measurement results of the drain current-gate voltage characteristics when a bias temperature stress test was conducted using the polysilicon TFT 10 of the first embodiment. The gate voltage Vg = 30V and the drain voltage Vd = 0 were measured.
V, source voltage Vs = 0 V, and 150 ° C. (ambient temperature), and drain current I with respect to gate voltage for the initial, 10 minutes, and 30 minutes after application.
The change in d (Vd = 5V) was measured. The results shown in FIG. 3 are the measurement results of the polysilicon TFT 10 using the molybdenum-tungsten alloy as the gate electrode 18.

As shown in FIG. 3, a conventional polysilicon T
Unlike FT (see FIG. 6), the polysilicon T of the present invention
In FT10, it was found that there was almost no change before and after stress.

As described above, in the polysilicon TFT 10 according to the first embodiment, the dopant is electrically sufficiently activated by the heat treatment at a temperature of 450 ° C. or less after the dopant is doped, and the polysilicon TFT A polysilicon TFT having sufficient crystallinity, that is, a polysilicon TFT having excellent characteristics can be obtained.

Further, since the polysilicon TFT 10 can be manufactured by using an ion doping apparatus which does not perform mass separation of ion species, a polysilicon TFT which can be mass-produced at low cost can be obtained.

(Embodiment 2) In Embodiment 2, an example of the liquid crystal display device of the present invention will be described.

The liquid crystal display device of the present invention includes the polysilicon TFT 10 described in the first embodiment. Polysilicon T
The FT 10 is used as at least one element selected from a switching element and a drive circuit element.

The liquid crystal display device of Embodiment 2 is manufactured by a normal process. That is, the liquid crystal display device according to the second embodiment is manufactured by forming a polysilicon TFT on a glass substrate, and then laminating it with a counter color filter, filling liquid crystal, laminating a polarizing plate, and taking out mounting electrodes. .

The liquid crystal display device of Embodiment 2 is the same as that of Embodiment 1.
Since this polysilicon TFT is used, it has high characteristics and reliability, and can be manufactured at low cost.

Although the embodiments of the present invention have been described above with reference to examples, the present invention is not limited to the above-mentioned embodiments and can be applied to other embodiments based on the technical idea of the present invention.

For example, the polysilicon thin film transistor described in the above embodiment is an example, and other structures can be arbitrarily changed as long as it is a polysilicon thin film transistor using non-annealed glass for the substrate. For example, in the above embodiment, the polysilicon thin film transistor in which the channel region, the gate insulating film and the gate electrode are formed from the glass substrate side is shown, but the gate electrode, the gate insulating film and the channel region are formed from the glass substrate side. Even if there is.

[0060]

As described above, the p-type polysilicon TFT of the present invention has no problem in the TFT characteristics even if it is annealed at a low temperature of 450 ° C. or lower to activate the dopant.
Moreover, reliability is guaranteed.

Therefore, the polysilicon TFT of the present invention
According to the above, variations in the characteristics of the polysilicon TFT can be reduced. Furthermore, when this polysilicon TFT is used in a liquid crystal display device, it is easy to assemble into a circuit configuration and design, and therefore peripheral circuits can be easily incorporated. Therefore, a narrow frame liquid crystal display device having a small embedded circuit area can be obtained. Further, since there is little variation in the characteristics of the polysilicon TFTs in the display screen, a liquid crystal display device of high display quality with little display unevenness can be obtained.

This display element may be applied to electroluminescence.

Further, according to the polysilicon TFT of the present invention, a reliable and stable quality polysilicon TFT can be obtained. By using this polysilicon TFT, a reliable and stable quality liquid crystal display device is obtained. Is obtained.

Further, the polysilicon TFT of the present invention is
Since an inexpensive doping apparatus can be used and a large-area glass substrate can be used, mass production can be performed at low cost. Therefore, the liquid crystal display device using the polysilicon TFT of the present invention can be mass-produced at low cost.

[Brief description of drawings]

FIG. 1 is a sectional view showing an example of a polysilicon thin film transistor of the present invention.

FIG. 2 is a process chart showing an example of a manufacturing method for a polysilicon thin film transistor of the present invention.

FIG. 3 is a diagram showing an example of measurement results of a bias temperature stress test for a polysilicon thin film transistor of the present invention.

FIG. 4 is a sectional view showing an example of a conventional polysilicon thin film transistor.

FIG. 5 is a process drawing showing an example of a manufacturing method for a conventional polysilicon thin film transistor.

FIG. 6 is a diagram showing an example of measurement results of a bias temperature stress test for a conventional polysilicon thin film transistor.

[Explanation of symbols]

10 Polysilicon thin film transistor 11 glass substrate 12 Insulating film 13 channel region (polysilicon thin film) 14 Source area 15 drain region 16 Gate insulating film 18 Gate electrode 19 Interlayer insulation film 20 Pixel electrode film

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) G09F 9/30 365 G09F 9/35 5F110 9/35 H01L 21/20 5G435 H01L 21/20 H05B 33/14 A 21/336 H01L 29/78 616V H05B 33/14 627F F term (reference) 2H090 JB02 JC08 LA04 2H092 KA04 MA25 MA26 MA30 NA24 NA27 NA29 3K007 AB11 AB18 BB07 CA01 DA01 DB03 EB00 FA01 GA04 5C094 AA43 AA44 BAA46 BA43 AA46 BA43 AA46 BA43 AA46 BA43 AA46 FB14 5F052 AA02 BB07 DA02 DB01 JA01 5F110 AA17 BB02 CC02 DD02 DD13 EE04 EE05 EE06 EE44 EE45 FF02 FF29 FF30 FF32 GG02 GG13 GG24 GG44 HJ01 HJ12 HJ23 HL23 NN02 NN23 NN35 NN72 PP03 PP35 QQ11 5G435 AA01 BB05 BB12 CC09 KK05 KK09 KK10

Claims (8)

[Claims] 1. A thin film transistor having a semiconductor layer formed on a substrate, wherein the thin film transistor is composed only of P type, and a maximum processing temperature in a manufacturing process of the thin film transistor is 450 ° C. or less. And a thin film transistor. 2. The thin film transistor according to claim 1, wherein the semiconductor layer of the thin film transistor is a polycrystalline thin film. 3. An array substrate using a plurality of thin film transistors according to claim 1. 4. A display device using the thin film transistor according to claim 1. 5. An organic electroluminescence (EL) display device using the thin film transistor according to claim 1. 6. A thin film transistor, wherein the substrate according to claim 1 or 2 is made of glass. 7. An active matrix circuit in which a plurality of P-type pixel thin film transistors are arranged in a matrix, a signal line drive circuit including a plurality of P-type thin film transistors, and a scanning line drive including a plurality of P-type thin film transistors. An active matrix thin film transistor integrated circuit having circuits on the same substrate, the substrate being glass which is not subjected to heat treatment. 8. A thin film transistor integrated circuit characterized in that the polycrystalline silicon film is obtained by crystallizing an amorphous silicon film by laser annealing.