JP3323838B2 - Polysilicon thin film transistor, method of manufacturing the same, and liquid crystal display device using the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a polysilicon thin film transistor and a liquid crystal display device using the same.

[0002]

2. Description of the Related Art In recent years, liquid crystal display devices, which are characterized by being thin, lightweight, and have low power consumption, have been used in various fields as displays that are friendly to the global environment, not only for OA and AV. In particular, a liquid crystal display device using a thin film transistor is excellent in gradation display and has a high response speed, and thus achieves a performance close to that of a CRT as a moving image color display.

Further, from a conventional liquid crystal display device in which a thin film transistor is arranged in a switching matrix in an image display portion, a liquid crystal display device in which a thin film transistor is used for a peripheral driving circuit, that is, a peripheral circuit is integrated on the same glass substrate has been developed. I have. However, the performance required of the thin film transistor constituting the drive circuit is not sufficient with the performance of a conventional amorphous silicon transistor conventionally used as a switching element of a pixel display unit, and at least polysilicon (polycrystalline silicon) is used. ) The above performance is required.

Conventionally, to obtain polysilicon, a high temperature of 900 ° C. or higher has been required, and heat-resistant quartz has been used for the substrate. It is required to use ordinary glass which is not quartz. When using ordinary glass for the substrate, it is necessary to produce polysilicon at a low temperature (about 600 ° C. or less) at which even ordinary glass can withstand heat.

Hereinafter, a conventional polysilicon thin film transistor and a method for manufacturing the same will be described.

As shown in FIG. 4, a conventional polysilicon thin film transistor comprises a glass substrate 1, an insulating film 2 laminated on the glass substrate 1 (hatching is omitted), a channel region 3 made of polysilicon, and a source region 4 and a drain region 5 made of n-type polysilicon, a source electrode 4a, a drain electrode 5a, a gate insulating film 6,
A gate electrode 7, an interlayer insulating film 8, and a pixel electrode film 9 are provided.

Next, a method of manufacturing the above-mentioned conventional polysilicon thin film transistor will be described with reference to FIG.
First, as shown in FIG. 5A, an insulating film 2 made of, for example, SiO ₂ or SiN is formed on a glass substrate 1, and a polysilicon thin film 3a is formed on the insulating film 2. The polysilicon thin film 3a is obtained by forming an amorphous silicon thin film on the insulating film 2 and then annealing the film with an excimer laser or the like to polycrystallize the amorphous silicon thin film. Thereafter, as shown in FIG. 5B, unnecessary portions of the polysilicon thin film 3a are removed by a photolithography process and an etching process. Thereafter, as shown in FIG. 5C, a gate insulating film 6 (for example, SiO ₂ ) and a gate electrode 7 (for example, metal or alloy such as molybdenum-tungsten) are formed on the polysilicon thin film 3a.
Are formed in order.

Then, the gate electrode 7 of the polysilicon thin film 3a is not formed by ionizing the phosphorus hydride (PH ₃ ) gas by plasma or arc discharge or the like by ion doping and accelerating with high voltage ions. Doping parts. And usually, 400 ° C ~
Anneal at a temperature of 600 ° C. to electrically activate phosphorus in the polysilicon. As a result, as shown in FIG. 5D, a channel region 3 and a source region 4 and a drain region 5 made of n-type polysilicon disposed so as to sandwich the channel region 3 are formed. After that, an interlayer insulating film 8, a source electrode 4a, a drain electrode 5a, and a pixel electrode film 9 are formed. Thus, an n-channel thin film transistor is manufactured.

In the above-mentioned conventional manufacturing method, in order to stabilize the device characteristics, the doped ions are sufficiently activated electrically and the crystalline damage caused by the ion implantation into the polysilicon thin film is sufficiently reduced. Need to be recovered. Therefore, it is necessary to perform annealing at a temperature as high as possible (500 ° C. or higher) after ion doping of phosphorus or the like.

In the above manufacturing method, an ion implantation apparatus is used for doping impurities such as phosphorus and boron. However, in order to manufacture a large-screen liquid crystal display, and to manufacture a liquid crystal display at low cost. It is necessary to use an ion implantation apparatus for performing ion implantation without mass separation of ion species. The reason for this is that an ion implanter for performing ion implantation by mass separation has a problem that it has only a small area, and has extremely low processing capability and is expensive. For this reason, ion doping apparatuses that dope ions that have not undergone mass separation of ion species (ions in which various kinds of ions are mixed) are conventionally used for ion doping. Is implanted into the polysilicon thin film 3a.

[0011]

However, in the above-mentioned conventional polysilicon thin film transistor in which annealing is performed at a temperature of 500 ° C. or more after ion doping, the drain current-gate voltage characteristic becomes negative with time due to the application of gate bias temperature stress. There was a problem of shifting to the voltage side. FIG. 6 shows a change in the drain current-gate voltage characteristic when the gate bias voltage stress is applied to the conventional polysilicon thin film transistor.

The reason for the change with time as shown in FIG. 6 is not clear at present, but is presumed as follows.

That is, at the time of the above-mentioned ion doping, ions which are not mass-separated are used, so that not only phosphorus ions but also hydrogen ions or ions of a compound of hydrogen and phosphorus are doped. In addition, ions of light atoms such as hydrogen are accelerated at the same acceleration energy, and the gate electrode 7, the gate insulating film 6, and the polysilicon thin film 3
It will be injected up to a.

By the way, when such hydrogen ions are present, and when an oxide gate insulating film such as silicon oxide is used as the gate insulating film 6, or when the gate insulating film 6 contains excessive moisture, Has a high temperature (50
When annealing is performed at 0 ° C. or more, a complicated oxidation-reduction reaction occurs between the gate electrode 7 and the gate insulating film 6, and an unstable ionic substance may be generated in the vicinity of these interfaces. It is said.

In particular, when a metal having various oxidation states (from -1 valence to 6 valence) such as molybdenum or tungsten is used for the gate electrode 7, the interface between the gate electrode 7 and the gate insulating film 6 is formed. It is considered that unstable ionic substances are likely to be generated.

When the vicinity of the interface between the gate electrode 7 and the gate insulating film 6 is in such a state, when the thin film transistor is continuously operated at a high temperature (for example, a positive voltage is applied to the gate electrode at 150 ° C.), hydrogen ions are generated. It is considered that the gate voltage shifts to the polysilicon side, which is the channel region 3, and a positive voltage is superimposed on the polysilicon more than the gate voltage. As a result, it is considered that the drain current-gate voltage characteristic shifts in the negative direction as shown in FIG.

To solve the above problem, it is conceivable to select another material, for example, aluminum, tantalum or chromium, as the gate electrode (metal) material. However, for aluminum, 500
There is a problem that it cannot withstand a heat treatment at a temperature of not less than ℃, and it may not be adopted in some cases. Also, considering that the gate electrode is also used for wiring for forming an electric circuit, tantalum and chromium have too high an electric resistance value and are difficult to use.

In order to solve the above problems, an object of the present invention is to provide a polysilicon thin film transistor which has stable element characteristics and can be mass-produced at low cost, and a liquid crystal display device using the same.

[0019]

In order to achieve the above object, a first polysilicon thin film transistor of the present invention comprises:
A glass thin film transistor, a polysilicon thin film functioning as a channel region, a gate electrode, a polysilicon thin film transistor including a gate insulating film disposed between the polysilicon thin film and the gate electrode, wherein the gate electrode, A reaction preventing film for preventing the gate electrode from reacting with an element in the gate insulating film between the polysilicon thin film and the gate insulating film;
And the reaction prevention film and the gate electrode are the glass substrate
Are arranged in this order from the side, and the gate insulating film is
Made of SiO ₂ , and the thickness of the reaction prevention film is 10 nm or less.
It is characterized by being 50 nm or less above . According to the first polysilicon thin film transistor, it is possible to prevent the element in the gate insulating film from reacting with the gate electrode, so that a polysilicon thin film transistor having high characteristics and high reliability can be obtained. In addition, the first polysilicon thin film transistor can be manufactured using an ion doping apparatus that does not perform mass separation of ion species, and thus can be mass-produced at low cost.

In the first polysilicon thin film transistor, it is preferable that the reaction preventing film is formed of a silicide film. According to the above configuration, a polysilicon thin film transistor having particularly high characteristics and high reliability can be obtained.

[0021]

In the first and second polysilicon thin film transistors, the gate electrode is made of a metal containing at least one selected from molybdenum and tungsten, and the silicide film is made of at least one selected from molybdenum and tungsten. It is preferable to be composed of silicide containing. According to the above configuration, a polysilicon thin film transistor including a low-resistance electrode and having high characteristics (can be annealed at a high temperature in a manufacturing process to activate a dopant) can be obtained.

In the first and second polysilicon thin film transistors, it is preferable that the polysilicon thin film is made of polysilicon formed by irradiating the amorphous silicon film with light.

The polysilicon thin film transistor of the present invention
The manufacturing method includes forming a polysilicon thin film on a glass substrate.
And a step of forming SiO ₂ on the polysilicon thin film.
Gate insulating film, reaction prevention film, and gate electrode
And then a part of the polysilicon thin film
Using ion doping equipment without mass separation of ON species
Source region by doping phosphorus ions
And a drain region, and then 500 ° C. to 600 ° C.
Activates dopants by performing heat treatment at different temperatures
The reaction preventing film is made of silicide.
The film thickness is 10 nm or more and 50 nm or less.
I do. The liquid crystal display device of the present invention is a liquid crystal display device comprising a polysilicon thin film transistor, wherein the polysilicon thin film transistor is at least one element selected from a switching element and a circuit driving element, and the first polysilicon It is a thin film transistor.

[0025]

Embodiments of the present invention will be described below with reference to the drawings.

Embodiment 1 In Embodiment 1, an example of a polysilicon thin film transistor of the present invention will be described.

The polysilicon thin film transistor of the first embodiment (hereinafter sometimes referred to as a polysilicon TFT) 10
1 is shown in FIG.

Referring to FIG. 1, a polysilicon TFT 10
Is a reaction between a glass substrate 11, an insulating film 12 (hatching is omitted), a channel region 13, a source region 14, a source electrode 14a, a drain region 15, a drain electrode 15a, and a gate insulating film 16. It includes a prevention film 17, a gate electrode 18, an interlayer insulating film 19, and a pixel electrode film 20. Here, the channel region 13 and the gate insulating film 1
6, the reaction preventing film 17 and the gate electrode 18 are laminated on the insulating film 12 in this order. That is, the gate insulating film 16 is disposed between the channel region 13 and the gate electrode 18, and the reaction prevention film 17 is
6 and the gate electrode 18.

As the glass substrate 11, for example, a non-alkali glass substrate 1737 (manufactured by Corning) is used.

The insulating film 12 is formed on the glass substrate 11. As the insulating film 12, for example, SiO ₂ is used.

The channel region 13 is formed on a part of the insulating film 12. Polysilicon is used for the channel region 13.

Source region 14 and drain region 15
Are formed on a part of the insulating film 12 so as to sandwich the channel region 13. As source region 14 and drain region 15, for example, n-type or p-type polysilicon is used.

Source electrode 14a and drain electrode 15
a is the source region 14 and the drain region 1
5 is formed. Source electrode 14
As the a and the drain electrode 15a, for example, a metal such as aluminum is used.

The gate insulating film 16 is formed on the channel region 13. As the gate insulating film 16, for example, SiO ₂ is used.

The reaction preventing film 17 is formed on a part of the gate insulating film 16 at a position corresponding to the channel region 13. The reaction preventing film 17 is formed of the elements in the gate insulating film 16 (including ions, atoms, and atoms in molecules in the gate insulating film 16), particularly, for example, oxygen ions and hydrogen ions in the gate insulating film 16, and Is a film that prevents the reaction of As the reaction prevention film 17, for example, a silicide film can be used. As the silicide film, for example, it is preferable to use a silicide containing at least one selected from molybdenum and tungsten (molybdenum silicide, tungsten silicide, molybdenum-tungsten silicide, or the like). The thickness of the reaction preventing film 17 is 10 nm or more and 50 nm or more.
nm or less. By setting the thickness of the reaction preventing film 17 to 10 nm or more, it is possible to suppress the occurrence of pinholes and the like in the reaction preventing film 17 and to sufficiently prevent the element in the gate insulating film 16 from reacting with the gate electrode 18. Can be prevented. Further, the thickness of the reaction prevention film 17 is set to 10 n.
By setting the length to m or more and 50 nm or less, an undercut state can be prevented during etching in the manufacturing process.

The gate electrode 18 is formed on the reaction preventing film 17. The gate electrode 18 is made of a metal. The gate electrode 18 is made of, for example, a metal containing at least one selected from molybdenum and tungsten (molybdenum, tungsten, molybdenum-tungsten alloy, etc.). In addition, as a material of the gate electrode 18,
It is preferable that the composition is stable even when heat-treated at a temperature of 500 ° C. or higher, and that the electric resistance is small. Therefore, the gate electrode 18 is preferably made of molybdenum or the like.

The interlayer insulating film 19 is formed so as to cover the gate electrode 18. For the interlayer insulating film 19, for example, SiO ₂ is used.

The pixel electrode film 20 is formed so as to be connected to the drain electrode 15a. The pixel electrode film 20 includes
For example, ITO is used.

The channel region 13 and the source region 14
As the polysilicon thin film forming the drain region 15, a polysilicon thin film formed by irradiating an amorphous silicon thin film with excimer laser light or the like at a substrate temperature of 600 ° C. or less can be used.

Next, an example of a method for manufacturing an n-channel polysilicon TFT 10 will be described with reference to FIG.

First, as shown in FIG. 2A, an insulating film 12 (having a thickness of, for example, 400 nm) is formed on a glass substrate 11, and an amorphous silicon film 21 (having a thickness of, for example, 400 nm) is formed on the insulating film 12. (500 nm). The insulating film 12 and the amorphous silicon film 21 can be formed by, for example, a CVD method.

Thereafter, as shown in FIG. 2B, the amorphous silicon film 21 is polycrystallized by irradiating an excimer laser beam to form a polysilicon thin film 22. Then, unnecessary portions of the polysilicon thin film 22 are removed by a photolithography process and an etching process. The etching step is usually performed by plasma dry etching using a fluorine-based gas.

Thereafter, as shown in FIG. 2C, the gate insulating film 16 (having a thickness of, for example, 100 nm) and the reaction preventing film 17 (including molybdenum silicide or tungsten silicide) having a thickness of, for example, 10 nm to 50 nm.
) And a gate electrode 18 (made of molybdenum, tungsten, or the like, and having a thickness of, for example, 300 nm). The gate insulating film 16 can be formed by, for example, a CVD method. In this case, TEOS (tetraethoxysilane, Si)
A plasma CVD method using (OC ₂ H ₅ ) ₄ ) can be used. Note that the N ₂ O-silane systems plasma CV
D method, low pressure CVD method using silane-based gas, or normal pressure C
The VD method may be used. The reaction preventing film 17 and the gate electrode 18 are formed by forming a silicide thin film or the like by a CVD method and forming a metal thin film by a sputtering method.
It can be formed by removing unnecessary portions by a photolithography step and an etching step. In the etching process at this time, wet etching using a chemical solution or dry etching using plasma can be used.

Thereafter, as shown in FIG. 2D, a source region 14, a drain region 15 and a channel region 13 are formed by doping a part of the polysilicon thin film 22 with phosphorus ions. Phosphorus ion doping can be performed, for example, by converting PH ₃ into plasma, performing various ionizations, and electrically accelerating the ions under conditions in the range of several tens to 100 kV. At this time, an ion doping apparatus that does not perform mass separation of ion species is used. The gate electrode 18 is formed by ion doping.
In the portion of the polysilicon thin film 22 where no is formed,
Ions mainly containing phosphorus ions are implanted. further,
After ion implantation, under a nitrogen gas atmosphere, 500 ° C. to 600 ° C.
By performing the heat treatment at a temperature of about 2 ° C. for about 2 hours, the dopant is activated and the damage of the polysilicon thin film due to the ion implantation is recovered. Thus, channel region 13 made of polysilicon and channel region 1 are formed.
The source region 14 and the drain region 15 made of n-type polysilicon arranged so as to sandwich 3 are formed.

Thereafter, as shown in FIG. 2E, the interlayer insulating film 19 (having a thickness of 400 nm, for example) is
It is formed by the VD method.

Thereafter, as shown in FIG. 2F, after a through hole for taking out an electrode is formed in the interlayer insulating film 19 and the like, a source electrode 14a, a drain electrode 15a, and a pixel electrode film 20 are formed. The through hole can be formed by a photolithography process and an etching process. Also,
The source electrode 14a, the drain electrode 15a, and the pixel electrode film 20 can be formed by forming a metal film by a sputtering method and then removing unnecessary portions by a photolithography process and an etching process.
Thus, an n-channel polysilicon TFT can be manufactured.

In the above manufacturing method, the reaction preventing film 17
Is formed by the CVD method, but another thin film forming method, for example, a sputtering method may be used. It is also effective to form a silicide film by forming an amorphous silicon thin film, forming a gate electrode of molybdenum or the like, and then performing high-temperature treatment.

If a p-channel TFT is required for the circuit configuration, masking is performed by a resist formed by photolithography or the like after phosphorus doping, and then a dopant such as borohydride (B ₂ H ₆ ) gas is used. Ion doping may be performed. At this time, since the n-channel portion is covered with a resist or the like, ion doping of boron or the like can be prevented.

FIG. 3 shows the measurement results of the drain current-gate voltage characteristics when a bias temperature stress test was performed using the polysilicon TFT 10 of the first embodiment. The measurement was performed with a gate voltage Vg = 30 V and a drain voltage Vd = 0.
V, source voltage Vs = 0 V, 150 ° C. (ambient temperature), and the drain current I with respect to the gate voltage was initially measured after application for 10 minutes and after application for 30 minutes.
The change in d (Vd = 5V) was measured. Note that the result shown in FIG. 3 is a measurement result of the polysilicon TFT 10 using tungsten silicide as the reaction prevention film 17 and using a molybdenum-tungsten alloy as the gate electrode 18.

As shown in FIG. 3, a conventional polysilicon T
Unlike the FT (see FIG. 6), the polysilicon T
In FT10, it was found that there was almost no change before and after the stress.

As described above, in the polysilicon TFT 10 of the first embodiment, the dopant is sufficiently activated electrically by performing a heat treatment at a temperature of 500 ° C. or more after doping the dopant. A polysilicon TFT with sufficient crystallinity, that is, a polysilicon TFT with good characteristics can be obtained.

Further, since the polysilicon TFT 10 can be manufactured by using an ion doping apparatus which does not perform mass separation of ion species, a polysilicon TFT which can be mass-produced at low cost can be obtained.

Further, since the polysilicon TFT 10 is provided with the reaction preventing film 10, it is possible to prevent the gate electrode 18 from being deteriorated by the reaction, and to obtain a highly reliable polysilicon TFT.

Embodiment 2 In Embodiment 2, an example of the liquid crystal display device of the present invention will be described.

The liquid crystal display of the present invention includes the polysilicon TFT 10 described in the first embodiment. Polysilicon T
The FT 10 is used as at least one element selected from a switching element and a drive circuit element.

The liquid crystal display device according to the second embodiment is manufactured by a normal process. That is, the liquid crystal display device according to the second embodiment is manufactured through a process of forming a polysilicon TFT on a glass substrate, pasting with a counter color filter, packing liquid crystal, attaching a polarizing plate, and taking out mounting electrodes. .

The liquid crystal display device according to the second embodiment is similar to the liquid crystal display device according to the first embodiment.
Since the polysilicon TFT is used, characteristics and reliability are high, and the TFT can be manufactured at low cost.

As described above, the embodiments of the present invention have been described by way of examples. However, the present invention is not limited to the above embodiments, and can be applied to other embodiments based on the technical idea of the present invention.

For example, the polysilicon thin film transistor described in the above embodiment is an example, and other structures can be arbitrarily changed as long as the polysilicon thin film transistor has a reaction prevention film between a gate insulating film and a gate electrode. For example, in the above embodiment, the polysilicon thin film transistor in which the channel region, the gate insulating film, the reaction preventing film and the gate electrode are formed from the glass substrate side is shown, but the gate electrode, the reaction preventing film and the gate insulating film are formed from the glass substrate side. A case where a film and a channel region are formed may be used.

[0060]

As described above, the polysilicon TFT of the present invention is provided with a reaction preventing film between the gate insulating film and the gate electrode, so that the polysilicon TFT has a thickness of 500 to activate the dopant.
Even if annealing is performed at a high temperature of not less than ° C., it is possible to prevent the gate electrode from reacting with elements in the gate insulating film. Therefore, according to the polysilicon TFT of the present invention, variations in the characteristics of the polysilicon TFT can be reduced. Furthermore, when this polysilicon TFT is used for a liquid crystal display device, it is easy to assemble and design into a circuit configuration.
Peripheral circuits can be easily incorporated. Therefore, a narrow frame liquid crystal display device having a small built-in circuit area can be obtained. Also,
Since there is little variation in the characteristics of the polysilicon TFTs in the display screen, a liquid crystal display device with high display quality and little display unevenness can be obtained.

According to the polysilicon TFT of the present invention, a highly reliable and stable quality polysilicon TFT can be obtained. By using this polysilicon TFT, a highly reliable and stable quality liquid crystal display device can be obtained. Is obtained.

Further, the polysilicon TFT of the present invention
Since an inexpensive doping apparatus can be used and a glass substrate having a large area can be used, mass production can be performed at low cost. Therefore, the liquid crystal display device using the polysilicon TFT of the present invention can be mass-produced at low cost.

[Brief description of the drawings]

FIG. 1 is a sectional view showing an example of a polysilicon thin film transistor of the present invention.

FIG. 2 is a process chart showing an example of a method for manufacturing a polysilicon thin film transistor of the present invention.

FIG. 3 is a graph showing an example of measurement results of a bias temperature stress test for a polysilicon thin film transistor of the present invention.

FIG. 4 is a sectional view showing an example of a conventional polysilicon thin film transistor.

FIG. 5 is a process chart showing an example of a method for manufacturing a conventional polysilicon thin film transistor.

FIG. 6 is a graph showing an example of measurement results of a bias temperature stress test for a conventional polysilicon thin film transistor.

[Explanation of symbols]

 Reference Signs List 10 polysilicon thin film transistor 11 glass substrate 12 insulating film 13 channel region (polysilicon thin film) 14 source region 15 drain region 16 gate insulating film 17 reaction preventing film 18 gate electrode 19 interlayer insulating film 20 pixel electrode film

Continuation of the front page (56) References JP-A-10-98194 (JP, A) JP-A-63-140580 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 29 / 78 H01L 29/786 H01L 21/28 H01L 21/336 G02F 1/1368

Claims (6)

(57) [Claims] 1. A polysilicon thin film transistor comprising: a glass substrate ; a polysilicon thin film functioning as a channel region; a gate electrode; and a gate insulating film disposed between the polysilicon thin film and the gate electrode. A reaction preventing film between the gate electrode and the gate insulating film for preventing the gate electrode from reacting with an element in the gate insulating film , wherein the polysilicon thin film and the gate insulating film react with each other. Prevention
The stop film and the gate electrode are arranged in this order from the glass substrate side.
The gate insulating film is made of SiO ₂ , and the thickness of the reaction prevention film is 10 nm or more and 50 nm or less.
Polysilicon thin-film transistor, characterized in that that. 2. The polysilicon thin film transistor according to claim 1, wherein said reaction preventing film comprises a silicide film. 3. The method according to claim 1, wherein said gate electrode comprises molybdenum and
From metals containing at least one selected from Ngustene
Becomes, the silicide film, or molybdenum and tungsten
A contract made of silicide containing at least one selected from
The polysilicon thin film transistor according to claim 2. 4. The method according to claim 1, wherein said polysilicon thin film is made of amorphous silicon.
Polysilicon formed by irradiating light to film
The policy according to any one of claims 1 to 3, comprising:
Recon thin film transistor. 5. Forming a polysilicon thin film on a glass substrate
And forming a gate insulating layer made of SiO ₂ on the polysilicon thin film.
Step of sequentially laminating an edge film, a reaction prevention film, and a gate electrode
And then the mass of the ionic species in a portion of the polysilicon thin film
Phosphorus ion using ion doping equipment without separation
Source and drain regions by doping
After forming a zone, heat treatment is performed at a temperature of 500 ° C to 600 ° C.
The step of activating the dopant by performing
The reaction preventing film is made of silicide and has a film thickness of 10 nm or less.
Polysilicon thin film having a thickness of 50 nm or less
Manufacturing method of membrane transistor. 6. A liquid crystal display device comprising a polysilicon thin film transistor, wherein said polysilicon thin film transistor is at least one element selected from a switching element and a circuit driving element, and is any one of claims 1 to 4 . A liquid crystal display device, which is the polysilicon thin film transistor according to item 1.