JP2002544587A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2002544587A5 JP2002544587A5 JP2000616500A JP2000616500A JP2002544587A5 JP 2002544587 A5 JP2002544587 A5 JP 2002544587A5 JP 2000616500 A JP2000616500 A JP 2000616500A JP 2000616500 A JP2000616500 A JP 2000616500A JP 2002544587 A5 JP2002544587 A5 JP 2002544587A5
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13376699P | 1999-05-12 | 1999-05-12 | |
| US60/133,766 | 1999-05-12 | ||
| PCT/US2000/013232 WO2000068783A2 (en) | 1999-05-12 | 2000-05-12 | Digital signal processor computation core |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2002544587A JP2002544587A (ja) | 2002-12-24 |
| JP2002544587A5 true JP2002544587A5 (enExample) | 2007-07-05 |
Family
ID=22460216
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000616500A Pending JP2002544587A (ja) | 1999-05-12 | 2000-05-12 | デジタル信号プロセッサ計算コア |
Country Status (3)
| Country | Link |
|---|---|
| EP (4) | EP1188112A2 (enExample) |
| JP (1) | JP2002544587A (enExample) |
| WO (1) | WO2000068783A2 (enExample) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| AU2001269394A1 (en) * | 2000-07-28 | 2002-02-13 | Delvalley Limited | A method of processing data |
| JP4338514B2 (ja) | 2001-08-29 | 2009-10-07 | メディアテック インコーポレーテッド | プロセッサ性能を改善するためのフラッシュバーストモードを利用する方法および装置 |
| JP4502662B2 (ja) * | 2004-02-20 | 2010-07-14 | アルテラ コーポレイション | 乗算器−累算器ブロックモード分割 |
| JP2008530642A (ja) * | 2005-02-07 | 2008-08-07 | ペーアーツェーテー イクスペーペー テクノロジーズ アクチエンゲゼルシャフト | 低レイテンシーの大量並列データ処理装置 |
| CN100559905C (zh) | 2005-07-20 | 2009-11-11 | 大唐移动通信设备有限公司 | 基带芯片 |
| US7555514B2 (en) | 2006-02-13 | 2009-06-30 | Atmel Corportation | Packed add-subtract operation in a microprocessor |
| JP5481793B2 (ja) | 2008-03-21 | 2014-04-23 | 富士通株式会社 | 演算処理装置および同装置の制御方法 |
| CA2751388A1 (en) * | 2011-09-01 | 2013-03-01 | Secodix Corporation | Method and system for mutli-mode instruction-level streaming |
| FR3021428B1 (fr) * | 2014-05-23 | 2017-10-13 | Kalray | Multiplication de matrices de bits utilisant des registres explicites |
| US10275391B2 (en) * | 2017-01-23 | 2019-04-30 | International Business Machines Corporation | Combining of several execution units to compute a single wide scalar result |
| CN108334337B (zh) * | 2018-01-30 | 2022-02-01 | 江苏华存电子科技有限公司 | 含自动管理功能的低延迟指令调度器及过滤猜测访问方法 |
| CN113157636B (zh) * | 2021-04-01 | 2023-07-18 | 西安邮电大学 | 协处理器、近数据处理装置和方法 |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61255433A (ja) * | 1985-05-07 | 1986-11-13 | Mitsubishi Electric Corp | 演算装置 |
| JPH077356B2 (ja) * | 1989-05-19 | 1995-01-30 | 株式会社東芝 | パイプライン方式のマイクロプロセッサ |
| US5175863A (en) * | 1989-10-23 | 1992-12-29 | International Business Machines Corporation | Signal data processing system having independently, simultaneously operable alu and macu |
| US5926644A (en) * | 1991-10-24 | 1999-07-20 | Intel Corporation | Instruction formats/instruction encoding |
| DE69327504T2 (de) * | 1992-10-19 | 2000-08-10 | Koninklijke Philips Electronics N.V., Eindhoven | Datenprozessor mit Operationseinheiten, die gemeinsam Gruppen von Registerspeichern benutzen |
| JPH0876977A (ja) * | 1994-09-06 | 1996-03-22 | Matsushita Electric Ind Co Ltd | 固定小数点演算装置 |
| JPH11500547A (ja) * | 1994-12-01 | 1999-01-12 | インテル・コーポレーション | 乗算を有するマイクロプロセッサ |
| TW424192B (en) * | 1995-05-02 | 2001-03-01 | Hitachi Ltd | Microcomputer |
| US5867726A (en) * | 1995-05-02 | 1999-02-02 | Hitachi, Ltd. | Microcomputer |
| EP0847552B1 (en) * | 1995-08-31 | 2002-10-30 | Intel Corporation | An apparatus for performing multiply-add operations on packed data |
| CN1264085C (zh) * | 1995-08-31 | 2006-07-12 | 英特尔公司 | 一种用于执行多媒体应用的操作的装置、系统和方法 |
| WO1997009679A1 (en) * | 1995-09-01 | 1997-03-13 | Philips Electronics North America Corporation | Method and apparatus for custom processor operations |
| US5710914A (en) * | 1995-12-29 | 1998-01-20 | Atmel Corporation | Digital signal processing method and system implementing pipelined read and write operations |
| US5822606A (en) * | 1996-01-11 | 1998-10-13 | Morton; Steven G. | DSP having a plurality of like processors controlled in parallel by an instruction word, and a control processor also controlled by the instruction word |
| US5954811A (en) | 1996-01-25 | 1999-09-21 | Analog Devices, Inc. | Digital signal processor architecture |
| JP3658072B2 (ja) * | 1996-02-07 | 2005-06-08 | 株式会社ルネサステクノロジ | データ処理装置およびデータ処理方法 |
| GB2317466B (en) * | 1996-09-23 | 2000-11-08 | Advanced Risc Mach Ltd | Data processing condition code flags |
| US6530014B2 (en) * | 1997-09-08 | 2003-03-04 | Agere Systems Inc. | Near-orthogonal dual-MAC instruction set architecture with minimal encoding bits |
| US6260137B1 (en) | 1997-09-12 | 2001-07-10 | Siemens Aktiengesellschaft | Data processing unit with digital signal processing capabilities |
-
2000
- 2000-05-12 EP EP00930720A patent/EP1188112A2/en not_active Withdrawn
- 2000-05-12 JP JP2000616500A patent/JP2002544587A/ja active Pending
- 2000-05-12 WO PCT/US2000/013232 patent/WO2000068783A2/en not_active Ceased
- 2000-05-12 EP EP10184733A patent/EP2267896A3/en not_active Withdrawn
- 2000-05-12 EP EP10183715.1A patent/EP2267596B1/en not_active Expired - Lifetime
- 2000-05-12 EP EP10184831A patent/EP2267597A3/en not_active Withdrawn