JP2002536712A - 第２のアーキテクチャのコンピュータにおける第１のコンピュータアーキテクチャ用プログラムの実行 - Google Patents

第２のアーキテクチャのコンピュータにおける第１のコンピュータアーキテクチャ用プログラムの実行

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Publication number
JP2002536712A
JP2002536712A JP2000596448A JP2000596448A JP2002536712A JP 2002536712 A JP2002536712 A JP 2002536712A JP 2000596448 A JP2000596448 A JP 2000596448A JP 2000596448 A JP2000596448 A JP 2000596448A JP 2002536712 A JP2002536712 A JP 2002536712A
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JP
Japan
Prior art keywords
computer
instruction
execution
memory
context
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000596448A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002536712A5 (enExample
Inventor
イエッツ，ジョン，エス．，ジュニア
リース，デイビッド，エル．
ホーエンシー，ポール，エイチ．
アドラー，マイケル，シー．
ヴァン，ダイク，コービン，エス．
ラメッシュ，ティー．，アール．
サスー，シャレッシュ
サウンド，ガージート，シング
パーセル，ステファン，シー．
パットカー，ナイティーン，アラビンド
ナイジャワン，サンディープ
ストーク，マシュー，エフ．
ジャリッチ，デイル，アール．
キャンベル，ポール
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ATI International SRL
Original Assignee
ATI International SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/239,194 external-priority patent/US7275246B1/en
Priority claimed from US09/332,263 external-priority patent/US6978462B1/en
Priority claimed from US09/334,530 external-priority patent/US7013456B1/en
Priority claimed from US09/385,394 external-priority patent/US8074055B1/en
Application filed by ATI International SRL filed Critical ATI International SRL
Publication of JP2002536712A publication Critical patent/JP2002536712A/ja
Publication of JP2002536712A5 publication Critical patent/JP2002536712A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30189—Instruction operation extension or modification according to execution mode, e.g. mode flag
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/3017—Runtime instruction translation, e.g. macros
    • G06F9/30174—Runtime instruction translation, e.g. macros for non-native instruction set, e.g. Javabyte, legacy code
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3808—Instruction prefetching for instruction reuse, e.g. trace cache, branch target cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Debugging And Monitoring (AREA)
  • Devices For Executing Special Programs (AREA)
  • Storage Device Security (AREA)
JP2000596448A 1999-01-28 2000-01-28 第２のアーキテクチャのコンピュータにおける第１のコンピュータアーキテクチャ用プログラムの実行 Pending JP2002536712A (ja)

Applications Claiming Priority (11)

Application Number Priority Date Filing Date Title
US09/239,194 US7275246B1 (en) 1999-01-28 1999-01-28 Executing programs for a first computer architecture on a computer of a second architecture
US09/239,194 1999-01-28
US09/322,443 US6941545B1 (en) 1999-01-28 1999-05-28 Profiling of computer programs executing in virtual memory systems
US09/322,443 1999-05-28
US09/332,263 1999-06-11
US09/332,263 US6978462B1 (en) 1999-01-28 1999-06-11 Profiling execution of a sequence of events occuring during a profiled execution interval that matches time-independent selection criteria of events to be profiled
US09/334,530 1999-06-16
US09/334,530 US7013456B1 (en) 1999-01-28 1999-06-16 Profiling execution of computer programs
US09/385,394 1999-08-30
US09/385,394 US8074055B1 (en) 1999-01-28 1999-08-30 Altering data storage conventions of a processor when execution flows from first architecture code to second architecture code
PCT/US2000/002239 WO2000045257A2 (en) 1999-01-28 2000-01-28 Executing programs for a first computer architecture on a computer of a second architecture

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2010211102A Division JP5427742B2 (ja) 1999-01-28 2010-09-21 コンピュータのメモリを参照する方法およびコンピュータ

Publications (2)

Publication Number Publication Date
JP2002536712A true JP2002536712A (ja) 2002-10-29
JP2002536712A5 JP2002536712A5 (enExample) 2007-03-15

Family

ID=27540115

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2000596448A Pending JP2002536712A (ja) 1999-01-28 2000-01-28 第２のアーキテクチャのコンピュータにおける第１のコンピュータアーキテクチャ用プログラムの実行
JP2010211102A Expired - Fee Related JP5427742B2 (ja) 1999-01-28 2010-09-21 コンピュータのメモリを参照する方法およびコンピュータ

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2010211102A Expired - Fee Related JP5427742B2 (ja) 1999-01-28 2010-09-21 コンピュータのメモリを参照する方法およびコンピュータ

Country Status (4)

Country Link
EP (3) EP2275930B1 (enExample)
JP (2) JP2002536712A (enExample)
AU (1) AU2743600A (enExample)
WO (1) WO2000045257A2 (enExample)

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JP2009282774A (ja) * 2008-05-22 2009-12-03 Fujitsu Ltd エミュレーションプログラム、エミュレーション装置およびエミュレーション方法
US7707392B2 (en) 2007-05-31 2010-04-27 Kabushiki Kaisha Toshiba Accessing data in inaccessible memory while emulating memory access instruction by executing translated instructions including call to transfer data to accessible memory
JP2011515750A (ja) * 2008-03-17 2011-05-19 中国科学院▲計▼算技▲術▼研究所 Ｘ８６の仮想機をサポートするｒｉｓｃプロセッサ装置及び方法
JP2011134315A (ja) * 2009-12-23 2011-07-07 Intel Corp 部分的なエミュレーション環境におけるソース命令セットアーキテクチャ（ｉｓａ）コードから、変換済みコードへの遷移
JP2011181049A (ja) * 2010-03-04 2011-09-15 Dainippon Printing Co Ltd Ｉｃチップ、ｉｃカード、制御方法及び制御プログラム
KR101247259B1 (ko) 2009-12-17 2013-04-01 한국전자통신연구원 가상화 장치 및 그 처리 방법
JP2017079078A (ja) * 2011-04-01 2017-04-27 インテル コーポレイション ベクトルフレンドリ命令フォーマット及びその実行
KR20170097617A (ko) * 2014-12-23 2017-08-28 인텔 코포레이션 명령어 흐름을 최적화하기 위한 체크를 수행하는 장치 및 방법
US9891936B2 (en) 2013-09-27 2018-02-13 Intel Corporation Method and apparatus for page-level monitoring
US10157061B2 (en) 2011-12-22 2018-12-18 Intel Corporation Instructions for storing in general purpose registers one of two scalar constants based on the contents of vector write masks
US10621092B2 (en) 2008-11-24 2020-04-14 Intel Corporation Merging level cache and data cache units having indicator bits related to speculative execution
US10649746B2 (en) 2011-09-30 2020-05-12 Intel Corporation Instruction and logic to perform dynamic binary translation
KR102111886B1 (ko) * 2019-08-12 2020-05-15 한국과학기술원 Arm 아키텍쳐 상의 동적 프로그램 수정 탐지 기술
US10725755B2 (en) 2008-11-24 2020-07-28 Intel Corporation Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program to multiple parallel threads
US20220405013A1 (en) * 2021-06-18 2022-12-22 Micron Technology, Inc. Asynchronous interrupt event handling in multi-plane memory devices

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US7017030B2 (en) 2002-02-20 2006-03-21 Arm Limited Prediction of instructions in a data processing apparatus
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WO2013095518A1 (en) * 2011-12-22 2013-06-27 Intel Corporation Accessing data stored in a command/address register device
CN103294406B (zh) * 2012-03-05 2016-08-17 联想(北京)有限公司 控制方法、控制装置、存储设备和电子设备
JP2013232097A (ja) 2012-04-27 2013-11-14 Toshiba Corp 半導体記憶装置
JP2014010739A (ja) * 2012-07-02 2014-01-20 Fujitsu Ltd システムの状態の復元についての情報処理方法、情報処理プログラム及び情報処理装置
JP6103541B2 (ja) 2014-03-18 2017-03-29 インターナショナル・ビジネス・マシーンズ・コーポレーションＩｎｔｅｒｎａｔｉｏｎａｌ Ｂｕｓｉｎｅｓｓ Ｍａｃｈｉｎｅｓ Ｃｏｒｐｏｒａｔｉｏｎ バイナリコードの実行を制御する装置及び方法
US9946538B2 (en) * 2014-05-12 2018-04-17 Intel Corporation Method and apparatus for providing hardware support for self-modifying code
RU2580016C1 (ru) * 2014-10-17 2016-04-10 Закрытое акционерное общество "Лаборатория Касперского" Способ передачи управления между областями памяти
US10719321B2 (en) 2015-09-19 2020-07-21 Microsoft Technology Licensing, Llc Prefetching instruction blocks
WO2017116827A1 (en) * 2015-12-30 2017-07-06 Siege Technologies LLC Memory fractionation software protection
RU2623883C1 (ru) * 2016-02-18 2017-06-29 Акционерное общество "Лаборатория Касперского" Способ выполнения инструкций в системной памяти
US20170344364A1 (en) * 2016-05-25 2017-11-30 Honeywell International Inc. System and method for data compatibility across heterogeneous machine architectures
RU2634172C1 (ru) * 2016-06-02 2017-10-24 Акционерное общество "Лаборатория Касперского" Способ передачи управления между адресными пространствами
US10698724B2 (en) * 2018-04-10 2020-06-30 Osisoft, Llc Managing shared resources in a distributed computing system
EP3722957A1 (en) * 2019-04-10 2020-10-14 Ultrasoc Technologies Ltd. Performance profiling
CN111258557B (zh) * 2020-01-16 2023-08-18 Oppo（重庆）智能科技有限公司 代码处理方法、装置、电子设备及计算机可读介质
CN114691208B (zh) * 2020-12-29 2025-10-31 上海兆芯集成电路股份有限公司 执行新增指令的系统及执行新增指令的方法
CN114691202A (zh) * 2020-12-29 2022-07-01 上海兆芯集成电路有限公司 转换指令的方法及系统
CN114691206A (zh) * 2020-12-29 2022-07-01 上海兆芯集成电路有限公司 执行新增指令的方法及系统
CN114691204A (zh) * 2020-12-29 2022-07-01 上海兆芯集成电路有限公司 执行新增指令的系统及执行新增指令的方法
CN114691203A (zh) * 2020-12-29 2022-07-01 上海兆芯集成电路有限公司 执行新增指令的方法及系统
US11816487B2 (en) 2020-12-29 2023-11-14 Shanghai Zhaoxin Semiconductor Co., Ltd. Method of converting extended instructions based on an emulation flag and retirement of corresponding microinstructions, device and system using the same
CN114691207A (zh) * 2020-12-29 2022-07-01 上海兆芯集成电路有限公司 执行新增指令的方法及系统
CN114691201A (zh) * 2020-12-29 2022-07-01 上海兆芯集成电路有限公司 执行新增指令的方法及系统
CN114691205A (zh) * 2020-12-29 2022-07-01 上海兆芯集成电路有限公司 执行新增指令的系统及执行新增指令的方法
CN114691199A (zh) * 2020-12-29 2022-07-01 上海兆芯集成电路有限公司 指令转换装置及其转换方法和系统以及处理器
CN112947995B (zh) * 2021-03-03 2022-07-26 北京航空航天大学 一种Java项目的体系结构策略定位方法及系统
CN115421876B (zh) * 2022-10-27 2023-01-10 飞腾信息技术有限公司 二进制翻译方法及装置
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CN116776788B (zh) * 2023-08-22 2024-03-19 摩尔线程智能科技(北京)有限责任公司 上下文切换验证方法及装置
CN119718424B (zh) * 2025-02-24 2025-06-20 上海芯力基半导体有限公司 基于模式匹配与融合的跨架构指令处理方法及处理器

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Cited By (23)

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US7707392B2 (en) 2007-05-31 2010-04-27 Kabushiki Kaisha Toshiba Accessing data in inaccessible memory while emulating memory access instruction by executing translated instructions including call to transfer data to accessible memory
JP2011515750A (ja) * 2008-03-17 2011-05-19 中国科学院▲計▼算技▲術▼研究所 Ｘ８６の仮想機をサポートするｒｉｓｃプロセッサ装置及び方法
US8543371B2 (en) 2008-05-22 2013-09-24 Fujitsu Limited Write-protected storage medium, write-protected apparatus, and write-protected environment
JP2009282774A (ja) * 2008-05-22 2009-12-03 Fujitsu Ltd エミュレーションプログラム、エミュレーション装置およびエミュレーション方法
US10725755B2 (en) 2008-11-24 2020-07-28 Intel Corporation Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program to multiple parallel threads
US10621092B2 (en) 2008-11-24 2020-04-14 Intel Corporation Merging level cache and data cache units having indicator bits related to speculative execution
KR101247259B1 (ko) 2009-12-17 2013-04-01 한국전자통신연구원 가상화 장치 및 그 처리 방법
US8589143B2 (en) 2009-12-17 2013-11-19 Electronics And Telecommunications Research Institute Virtualization apparatus and processing method thereof
JP2011134315A (ja) * 2009-12-23 2011-07-07 Intel Corp 部分的なエミュレーション環境におけるソース命令セットアーキテクチャ（ｉｓａ）コードから、変換済みコードへの遷移
JP2011181049A (ja) * 2010-03-04 2011-09-15 Dainippon Printing Co Ltd Ｉｃチップ、ｉｃカード、制御方法及び制御プログラム
US10795680B2 (en) 2011-04-01 2020-10-06 Intel Corporation Vector friendly instruction format and execution thereof
JP2017079078A (ja) * 2011-04-01 2017-04-27 インテル コーポレイション ベクトルフレンドリ命令フォーマット及びその実行
US12086594B2 (en) 2011-04-01 2024-09-10 Intel Corporation Vector friendly instruction format and execution thereof
US11740904B2 (en) 2011-04-01 2023-08-29 Intel Corporation Vector friendly instruction format and execution thereof
US11210096B2 (en) 2011-04-01 2021-12-28 Intel Corporation Vector friendly instruction format and execution thereof
US10649746B2 (en) 2011-09-30 2020-05-12 Intel Corporation Instruction and logic to perform dynamic binary translation
US10157061B2 (en) 2011-12-22 2018-12-18 Intel Corporation Instructions for storing in general purpose registers one of two scalar constants based on the contents of vector write masks
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AU2743600A (en) 2000-08-18
JP5427742B2 (ja) 2014-02-26
EP2275930A1 (en) 2011-01-19
WO2000045257B1 (en) 2001-06-14
EP2275930B1 (en) 2017-06-14
EP1151374A2 (en) 2001-11-07
EP2320318A1 (en) 2011-05-11
JP2011040087A (ja) 2011-02-24
WO2000045257A3 (en) 2001-03-08
WO2000045257A2 (en) 2000-08-03

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