JP2002529868A5 - - Google Patents

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Publication number
JP2002529868A5
JP2002529868A5 JP2000581595A JP2000581595A JP2002529868A5 JP 2002529868 A5 JP2002529868 A5 JP 2002529868A5 JP 2000581595 A JP2000581595 A JP 2000581595A JP 2000581595 A JP2000581595 A JP 2000581595A JP 2002529868 A5 JP2002529868 A5 JP 2002529868A5
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JP
Japan
Prior art keywords
edge
mask
polygon
data
pixel
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Application number
JP2000581595A
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English (en)
Japanese (ja)
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JP2002529868A (ja
JP4576050B2 (ja
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Priority claimed from GB9824412A external-priority patent/GB2343602B/en
Application filed filed Critical
Publication of JP2002529868A publication Critical patent/JP2002529868A/ja
Publication of JP2002529868A5 publication Critical patent/JP2002529868A5/ja
Application granted granted Critical
Publication of JP4576050B2 publication Critical patent/JP4576050B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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JP2000581595A 1998-11-06 1999-11-08 ３次元コンピュータ生成画像のシェーディング Expired - Lifetime JP4576050B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB9824412A GB2343602B (en) 1998-11-06 1998-11-06 Shading 3-dimensional computer generated images
GB9824412.2 1998-11-06
PCT/GB1999/003704 WO2000028480A1 (en) 1998-11-06 1999-11-08 Shading 3-dimensional computer generated images

Publications (3)

Publication Number Publication Date
JP2002529868A JP2002529868A (ja) 2002-09-10
JP2002529868A5 true JP2002529868A5 (https=) 2006-12-28
JP4576050B2 JP4576050B2 (ja) 2010-11-04

Family

ID=10842016

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000581595A Expired - Lifetime JP4576050B2 (ja) 1998-11-06 1999-11-08 ３次元コンピュータ生成画像のシェーディング

Country Status (7)

Country Link
US (1) US6741247B1 (https=)
EP (1) EP1127337B2 (https=)
JP (1) JP4576050B2 (https=)
AT (1) ATE243345T1 (https=)
DE (1) DE69908966T3 (https=)
GB (1) GB2343602B (https=)
WO (1) WO2000028480A1 (https=)

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US8775997B2 (en) * 2003-09-15 2014-07-08 Nvidia Corporation System and method for testing and configuring semiconductor functional circuits
US8768642B2 (en) 2003-09-15 2014-07-01 Nvidia Corporation System and method for remotely configuring semiconductor functional circuits
US8732644B1 (en) 2003-09-15 2014-05-20 Nvidia Corporation Micro electro mechanical switch system and method for testing and configuring semiconductor functional circuits
US8711161B1 (en) 2003-12-18 2014-04-29 Nvidia Corporation Functional component compensation reconfiguration system and method
US7567248B1 (en) * 2004-04-28 2009-07-28 Mark William R System and method for computing intersections between rays and surfaces
WO2005116930A1 (en) 2004-05-24 2005-12-08 Koninklijke Philips Electronics N.V. Tile based graphics rendering
US8723231B1 (en) 2004-09-15 2014-05-13 Nvidia Corporation Semiconductor die micro electro-mechanical switch management system and method
US8711156B1 (en) 2004-09-30 2014-04-29 Nvidia Corporation Method and system for remapping processing elements in a pipeline of a graphics processing unit
US8427496B1 (en) 2005-05-13 2013-04-23 Nvidia Corporation Method and system for implementing compression across a graphics bus interconnect
US8698811B1 (en) 2005-12-15 2014-04-15 Nvidia Corporation Nested boustrophedonic patterns for rasterization
US8390645B1 (en) 2005-12-19 2013-03-05 Nvidia Corporation Method and system for rendering connecting antialiased line segments
US9117309B1 (en) 2005-12-19 2015-08-25 Nvidia Corporation Method and system for rendering polygons with a bounding box in a graphics processor unit
US8928676B2 (en) * 2006-06-23 2015-01-06 Nvidia Corporation Method for parallel fine rasterization in a raster stage of a graphics pipeline
US8477134B1 (en) 2006-06-30 2013-07-02 Nvidia Corporation Conservative triage of polygon status using low precision edge evaluation and high precision edge evaluation
US7737986B2 (en) * 2006-08-29 2010-06-15 Texas Instruments Incorporated Methods and systems for tiling video or still image data
US8427487B1 (en) 2006-11-02 2013-04-23 Nvidia Corporation Multiple tile output using interface compression in a raster stage
US8482567B1 (en) 2006-11-03 2013-07-09 Nvidia Corporation Line rasterization techniques
GB2461821B (en) * 2007-09-12 2010-06-30 Imagination Tech Ltd Methods and systems for generating 3-dimensional computer images
US8724483B2 (en) 2007-10-22 2014-05-13 Nvidia Corporation Loopback configuration for bi-directional interfaces
US8063903B2 (en) * 2007-11-09 2011-11-22 Nvidia Corporation Edge evaluation techniques for graphics hardware
US8780123B2 (en) 2007-12-17 2014-07-15 Nvidia Corporation Interrupt handling techniques in the rasterizer of a GPU
US9064333B2 (en) 2007-12-17 2015-06-23 Nvidia Corporation Interrupt handling techniques in the rasterizer of a GPU
US8923385B2 (en) 2008-05-01 2014-12-30 Nvidia Corporation Rewind-enabled hardware encoder
US8681861B2 (en) 2008-05-01 2014-03-25 Nvidia Corporation Multistandard hardware video encoder
GB0823468D0 (en) 2008-12-23 2009-01-28 Imagination Tech Ltd Display list control stream grouping in tile based 3D computer graphics systems
US20110063305A1 (en) 2009-09-16 2011-03-17 Nvidia Corporation Co-processing techniques on heterogeneous graphics processing units
US9530189B2 (en) 2009-12-31 2016-12-27 Nvidia Corporation Alternate reduction ratios and threshold mechanisms for framebuffer compression
US9331869B2 (en) 2010-03-04 2016-05-03 Nvidia Corporation Input/output request packet handling techniques by a device specific kernel mode driver
US9171350B2 (en) 2010-10-28 2015-10-27 Nvidia Corporation Adaptive resolution DGPU rendering to provide constant framerate with free IGPU scale up
US9591309B2 (en) 2012-12-31 2017-03-07 Nvidia Corporation Progressive lossy memory compression
US9607407B2 (en) 2012-12-31 2017-03-28 Nvidia Corporation Variable-width differential memory compression
US9710894B2 (en) 2013-06-04 2017-07-18 Nvidia Corporation System and method for enhanced multi-sample anti-aliasing
US9832388B2 (en) 2014-08-04 2017-11-28 Nvidia Corporation Deinterleaving interleaved high dynamic range image by using YUV interpolation
US10249092B2 (en) * 2016-11-23 2019-04-02 Simbionix Ltd. System and method for rendering complex data in a virtual reality or augmented reality environment
US10430983B2 (en) 2017-06-05 2019-10-01 Microsoft Technology Licensing, Llc Vertex pixel buffer
GB202217213D0 (en) * 2022-11-17 2023-01-04 Advanced Risc Mach Ltd Graphics processing

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JPH0821085B2 (ja) * 1989-06-05 1996-03-04 松下電器産業株式会社 クリッピング回路
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