JP2002507789A5 - - Google Patents

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Publication number
JP2002507789A5
JP2002507789A5 JP2000537132A JP2000537132A JP2002507789A5 JP 2002507789 A5 JP2002507789 A5 JP 2002507789A5 JP 2000537132 A JP2000537132 A JP 2000537132A JP 2000537132 A JP2000537132 A JP 2000537132A JP 2002507789 A5 JP2002507789 A5 JP 2002507789A5
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JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2000537132A
Other versions
JP2002507789A (ja
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Publication date
Priority claimed from US09/044,086 external-priority patent/US6425070B1/en
Priority claimed from US09/044,088 external-priority patent/US6496920B1/en
Application filed filed Critical
Priority claimed from PCT/US1999/004887 external-priority patent/WO1999047999A1/en
Publication of JP2002507789A publication Critical patent/JP2002507789A/ja
Publication of JP2002507789A5 publication Critical patent/JP2002507789A5/ja
Withdrawn legal-status Critical Current

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JP2000537132A 1998-03-18 1999-03-04 デジタル信号プロセッサ Withdrawn JP2002507789A (ja)

Applications Claiming Priority (13)

Application Number Priority Date Filing Date Title
US4408798A 1998-03-18 1998-03-18
US4410498A 1998-03-18 1998-03-18
US4408998A 1998-03-18 1998-03-18
US4410898A 1998-03-18 1998-03-18
US09/044,086 US6425070B1 (en) 1998-03-18 1998-03-18 Variable length instruction decoder
US09/044,086 1998-03-18
US09/044,087 1998-03-18
US09/044,089 1998-03-18
US09/044,088 1998-03-18
US09/044,108 1998-03-18
US09/044,088 US6496920B1 (en) 1998-03-18 1998-03-18 Digital signal processor having multiple access registers
US09/044,104 1998-03-18
PCT/US1999/004887 WO1999047999A1 (en) 1998-03-18 1999-03-04 A digital signal processor

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2010157075A Division JP5677774B2 (ja) 1998-03-18 2010-07-09 デジタル信号プロセッサ

Publications (2)

Publication Number Publication Date
JP2002507789A JP2002507789A (ja) 2002-03-12
JP2002507789A5 true JP2002507789A5 (ja) 2008-07-03

Family

ID=27556460

Family Applications (4)

Application Number Title Priority Date Filing Date
JP2000537132A Withdrawn JP2002507789A (ja) 1998-03-18 1999-03-04 デジタル信号プロセッサ
JP2010157075A Expired - Lifetime JP5677774B2 (ja) 1998-03-18 2010-07-09 デジタル信号プロセッサ
JP2014181387A Expired - Lifetime JP6152558B2 (ja) 1998-03-18 2014-09-05 デジタル信号プロセッサ
JP2016040960A Expired - Lifetime JP6300284B2 (ja) 1998-03-18 2016-03-03 デジタル信号プロセッサ

Family Applications After (3)

Application Number Title Priority Date Filing Date
JP2010157075A Expired - Lifetime JP5677774B2 (ja) 1998-03-18 2010-07-09 デジタル信号プロセッサ
JP2014181387A Expired - Lifetime JP6152558B2 (ja) 1998-03-18 2014-09-05 デジタル信号プロセッサ
JP2016040960A Expired - Lifetime JP6300284B2 (ja) 1998-03-18 2016-03-03 デジタル信号プロセッサ

Country Status (12)

Country Link
EP (2) EP1457876B1 (ja)
JP (4) JP2002507789A (ja)
KR (3) KR100835148B1 (ja)
CN (2) CN1279435C (ja)
AR (5) AR026080A2 (ja)
AT (1) ATE297567T1 (ja)
AU (1) AU2986099A (ja)
CA (1) CA2324219C (ja)
DE (1) DE69925720T2 (ja)
DK (1) DK1066559T3 (ja)
HK (2) HK1094608A1 (ja)
WO (1) WO1999047999A1 (ja)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1457876B1 (en) * 1998-03-18 2017-10-04 Qualcomm Incorporated Systems for and method of controlling a digital signal processor using a variable length instruction set, method of generating and storing said instructions and memory comprising said instructions
JP4100300B2 (ja) 2003-09-02 2008-06-11 セイコーエプソン株式会社 信号出力調整回路及び表示ドライバ
JP4661169B2 (ja) * 2003-11-14 2011-03-30 ヤマハ株式会社 ディジタルシグナルプロセッサ
JP4300151B2 (ja) * 2004-04-19 2009-07-22 Ｏｋｉセミコンダクタ株式会社 演算処理装置
US7246218B2 (en) * 2004-11-01 2007-07-17 Via Technologies, Inc. Systems for increasing register addressing space in instruction-width limited processors
US7337272B2 (en) * 2006-05-01 2008-02-26 Qualcomm Incorporated Method and apparatus for caching variable length instructions
US11768689B2 (en) 2013-08-08 2023-09-26 Movidius Limited Apparatus, systems, and methods for low power computational imaging
US10001993B2 (en) 2013-08-08 2018-06-19 Linear Algebra Technologies Limited Variable-length instruction buffer management
FR3021427B1 (fr) * 2014-05-22 2016-06-24 Kalray Structure de paquet d'instructions de type vliw et processeur adapte pour traiter un tel paquet d'instructions
EP3175320B1 (en) * 2014-07-30 2019-03-06 Linear Algebra Technologies Limited Low power computational imaging
BR112017001981B1 (pt) * 2014-07-30 2023-05-02 Movidius Limited Método para gerenciar buffer de instruções, sistema e memória legível por computador relacionados
CN109496306B (zh) 2016-07-13 2023-08-29 莫鲁米有限公司 多功能运算装置及快速傅里叶变换运算装置
JP7384374B2 (ja) * 2019-02-27 2023-11-21 株式会社ウーノラボ 中央演算処理装置
US11204768B2 (en) 2019-11-06 2021-12-21 Onnivation Llc Instruction length based parallel instruction demarcator

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4099229A (en) * 1977-02-14 1978-07-04 The United States Of America As Represented By The Secretary Of The Navy Variable architecture digital computer
US5293611A (en) * 1988-09-20 1994-03-08 Hitachi, Ltd. Digital signal processor utilizing a multiply-and-add function for digital filter realization
JP2791086B2 (ja) * 1989-03-15 1998-08-27 富士通株式会社 命令プリフェッチ装置
EP0436341B1 (en) * 1990-01-02 1997-05-07 Motorola, Inc. Sequential prefetch method for 1, 2 or 3 word instructions
US5295249A (en) * 1990-05-04 1994-03-15 International Business Machines Corporation Compounding preprocessor for cache for identifying multiple instructions which may be executed in parallel
JP2560889B2 (ja) * 1990-05-22 1996-12-04 日本電気株式会社 マイクロプロセッサ
JP2682761B2 (ja) * 1991-06-18 1997-11-26 松下電器産業株式会社 命令プリフェッチ装置
US5438668A (en) * 1992-03-31 1995-08-01 Seiko Epson Corporation System and method for extraction, alignment and decoding of CISC instructions into a nano-instruction bucket for execution by a RISC computer
JPH06103068A (ja) * 1992-09-18 1994-04-15 Toyota Motor Corp データ処理装置
JPH06250854A (ja) * 1993-02-24 1994-09-09 Matsushita Electric Ind Co Ltd 命令プリフェッチ装置
JP3168845B2 (ja) * 1994-10-13 2001-05-21 ヤマハ株式会社 ディジタル信号処理装置
US5819056A (en) * 1995-10-06 1998-10-06 Advanced Micro Devices, Inc. Instruction buffer organization method and system
JP3655403B2 (ja) * 1995-10-09 2005-06-02 株式会社ルネサステクノロジ データ処理装置
US5710914A (en) * 1995-12-29 1998-01-20 Atmel Corporation Digital signal processing method and system implementing pipelined read and write operations
JP2806359B2 (ja) * 1996-04-30 1998-09-30 日本電気株式会社 命令処理方法及び命令処理装置
EP1457876B1 (en) * 1998-03-18 2017-10-04 Qualcomm Incorporated Systems for and method of controlling a digital signal processor using a variable length instruction set, method of generating and storing said instructions and memory comprising said instructions

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