JP2002365342A - Testing method and device for semiconductor integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a testing method for semiconductor integrated circuit device, capable of reducing the cost for testing or simplifying the function of a semiconductor testing device. SOLUTION: In this semiconductor testing method for a semiconductor integrated circuit 1 containing a D/A conversion circuit, a D/A test digital input signal is transmitted from the semiconductor testing device 1 to the measuring semiconductor integrated circuit 2, and this D/A test digital input signal is inputted synchronously to decision D/A conversion circuits 3 and 4, prepared separately from the measuring semiconductor integrated circuit. The outputs of the deciding D/A converting circuits 3 and 4 are given as reference potentials of comparison circuits 7 and 8, and the outputs of the D/A conversion circuits of the semiconductor integrated circuit 1 are given to the comparison circuits 7 and 8, to decide the quality of the D/A conversion circuit of the semiconductor integrated circuit to be tested.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and an apparatus for performing an operation test on a semiconductor integrated circuit having a digital-to-analog conversion circuit (hereinafter, referred to as a D / A conversion circuit).

[0002]

2. Description of the Related Art In a test of a semiconductor integrated circuit having a built-in D / A conversion circuit, a digital signal is input to the D / A conversion circuit, and an analog signal output from the D / A conversion circuit falls within a predetermined standard. In general, it is determined whether or not it is included.

[0003] In a general test of a semiconductor integrated circuit, a semiconductor test device is used. A digital signal required for the test is generated by the semiconductor test device, and the digital signal is input to a D / A conversion circuit. Then, by measuring the voltage of the analog signal output from the D / A conversion circuit using a tester, it is determined whether the D / A conversion circuit under test is operating normally.

However, in this method, it takes time to measure the voltage of the analog output signal of the D / A conversion circuit.

On the other hand, there is a method for testing a D / A conversion circuit using a comparator. In this test method, a determination voltage of a comparator is changed according to an output voltage of a D / A conversion circuit, and it is determined whether or not the D / A conversion circuit under test is operating normally based on an output of the comparator. ing.

A test method using such a comparator is disclosed in
No. 0-78008. This publication discloses an upper limit reference of a D / A conversion circuit according to a change in a test pattern such that an output voltage in a normal state according to an input test pattern becomes an upper limit value and a lower limit value of two comparators. A predetermined voltage is applied to the power supply and the lower-limit reference power supply, and the output voltage of the D / A conversion circuit is determined by two comparators.

[0007]

In the test method described in the above publication, it is necessary to apply a predetermined voltage to the upper reference power supply and the lower reference power supply in accordance with the change of the test pattern. And a work for generating the circuit is required every time the test pattern is changed, and there is a problem that the circuit configuration and workability are deteriorated.

In testing a semiconductor integrated circuit, a semiconductor test device is used. In this semiconductor test apparatus, as a means for connecting the apparatus and the semiconductor integrated circuit under test,
A test board is used.

According to the present invention, by providing a special circuit on the test board, the D / D of the semiconductor integrated circuit under test is provided.
An object of the present invention is to test a D / A converter circuit at high speed without measuring the output voltage of the A converter circuit with a semiconductor test device.

Another object of the present invention is to provide a test method for a semiconductor integrated circuit device in which the test cost is reduced or the function of the semiconductor test device is simplified.

[0011]

SUMMARY OF THE INVENTION The present invention relates to a semiconductor test method for a semiconductor integrated circuit having a built-in D / A conversion circuit. Synchronous input to a D / A conversion circuit for judgment prepared separately from the integrated circuit, an output of the D / A conversion circuit for judgment is given as a reference potential of a comparison circuit, and D / A conversion of the semiconductor integrated circuit is supplied to the comparison circuit. It is characterized in that the output of the circuit is given and the non-defective / defective product of the D / A conversion circuit of the semiconductor integrated circuit to be measured is determined.

It is preferable that the D / A test digital signal is converted into a desired digital signal by a counter circuit, and then input to a determination D / A conversion circuit.

It is preferable that the reference voltage of the determination D / A conversion circuit is shifted to an arbitrary value to generate a reference potential of the comparison circuit.

Further, according to the present invention, two D / A conversion circuits for determination and two comparison circuits are prepared, and the logical product of the output results of the comparison circuits is obtained to obtain the D / A of the semiconductor integrated circuit to be measured.
It can be configured to test the A conversion output result by 1/0 logic judgment.

According to another aspect of the present invention, there is provided a test apparatus for performing a semiconductor test of a semiconductor integrated circuit having a built-in D / A conversion circuit, wherein a device for outputting a D / A test digital input signal is connected to the semiconductor integrated circuit to be measured. D on the test board
/ A test digital input signal is input in synchronization with a determination D / A conversion circuit, and an output of the determination D / A conversion circuit is input as a reference potential and an output of the D / A conversion circuit of the semiconductor integrated circuit is provided. And two comparators, each of which is provided with a comparator, and a circuit for calculating the logical product of the output results of the comparators.

According to the above configuration, the D / A conversion circuit built in the semiconductor integrated circuit to be measured has a D / A converter.
Instead of testing by measuring the analog voltage output from the A conversion circuit, the D / A of the semiconductor integrated circuit to be measured is not tested.
By comparing with a determination voltage generated by using a digital input given as an input, a high-speed and inexpensive semiconductor test environment can be provided.

[0017]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a configuration diagram at the time of testing a semiconductor integrated circuit according to an embodiment of the present invention.

A semiconductor integrated circuit under test 1 containing a D / A conversion circuit is set on a test board (not shown). A digital signal as a test pattern is given from the semiconductor test device 2 to the semiconductor integrated circuit 1 installed on the test board, and the digital signal 2a is applied to a D / A conversion circuit built in the semiconductor integrated circuit 1.

A down counter circuit 5 and an up counter circuit 6 are provided on the test board.
The outputs from the counter circuits 5 and 6 are used as the D / A for determination.
It is provided to the conversion circuits 3 and 4, respectively. Further, the digital signal 2a from the semiconductor test apparatus 2 is simultaneously input to the counter circuits 5 and 6.

An output from the D / A conversion circuit of the semiconductor integrated circuit 1 is supplied to comparators 7 and 8. Outputs from the D / A conversion circuits 3 and 4 for determination are given to the reference voltages for determination of the comparators 7 and 8. The comparator 7 determines the minus side of the magnitude comparison voltage of the output from the D / A conversion circuit of the semiconductor integrated circuit 1.
The plus side of the magnitude comparison voltage of the output from the D / A conversion circuit is determined. The output of these comparators 7 and 8 is
Given to.

Based on the output from the AND circuit 9, the test result of the semiconductor integrated circuit 1 is determined. In this embodiment, when the output of the AND circuit 9 is "1", it can be determined that it is normal, and when it is "0", it can be determined that it is abnormal.

Next, the operation of this embodiment will be described. The test of the semiconductor integrated circuit 1 is determined based on whether or not the output from the D / A conversion circuit falls within a predetermined voltage. For example, if the error is ± 2 LSB, if the output from the D / A conversion circuit falls within the range of the voltage corresponding to ± 2 LSB with respect to the output voltage corresponding to the input digital signal, it is determined to be good.

In this embodiment, by inputting a clock to the two counter circuits 5 and 6 corresponding to the error allowed by the semiconductor test circuit 1, the values of the respective counters are ± 1, ± 2, ± 3. ,. . . Thus, the counter circuits 5 and 6 can be set to desired digital values.

For example, if a test of the D / A conversion circuit is to be performed with an accuracy of ± 2 bits, the digital input value (ex.
10100B), two clocks are applied to the counters 5 and 6, so that the down counter circuit 5 has -2 bits (ex. 10010B) and the up counter circuit 6
Can be set to +2 bits (ex. 10110B).

The digital output values 5a and 6a of the counter circuits 5 and 6 are input to the D / A conversion circuits 3 and 4 for judgment, which are also provided on the test board. The D / A conversion circuits 3 and 4 determine the comparator 7,
8 are output as reference voltages 3a and 4a, respectively. As a result, the comparators 7 and 8 are supplied with the reference potential according to the tester pattern signal.

On the other hand, according to the digital signal 2a given from the semiconductor test apparatus 2, the analog signal 1a output from the semiconductor integrated circuit 1 to be measured is input to the comparators 7 and 8, and compared with the reference voltages 3a and 4a, respectively. Is done.

A comparator 7 to which the reference voltage generated via the down counter circuit 5 and the D / A conversion circuit 3 for determination is applied
Outputs a logical value "1" if the analog signal 1a from the semiconductor integrated circuit 1 is higher than the reference value 3a.

A comparator 8 to which a reference voltage generated through an up counter 6 and a D / A conversion circuit 3 for determination is applied.
Outputs a logical value "1" if the analog signal 1a from the semiconductor integrated circuit 1 is lower than the reference value 4a.

By taking the logical product of the comparison results of the two comparators 7 and 8 by the AND circuit 9, it is determined whether the output result of the D / A conversion circuit of the semiconductor integrated circuit under test 1 falls within a desired accuracy range. And the AND circuit 9 without measuring the voltage.
Can be determined by the logic of 1/0.

As another means for generating the reference voltages 3a, 4a to be compared, the D / A conversion circuits 3b, 4b
By shifting the power supply voltage / GND potential by the desired voltage accuracy, the test method without using a counter can be provided. FIG. 2 shows another embodiment of the present invention which does not use this counter.

As shown in FIG. 2, for example, when the test of the semiconductor integrated circuit 1 to be measured is performed with an accuracy of ± 2 bits, the power supply voltage value of the negative D / A conversion circuit 3b and the GND voltage The value is shifted by a potential corresponding to -2 bits. Conversely, the power supply voltage value and the GND value of the D / A conversion circuit 4b for the positive side are shifted by a potential corresponding to +2 bits. For example, assuming that the power supply voltage applied to the semiconductor integrated circuit 1 is 3.0 V, if the signal supplied from the semiconductor test apparatus 1 is 8-bit data, the power supply voltage applied to the D / A conversion circuit 3b for determination is 11.7 mV. Should be shifted. That is, the D / A conversion circuit 3b for determination
In this case, a potential of 2.9766 V and a GND value of −23.4 mV may be applied. The D / A conversion circuit 4b for determination
In this case, a potential of 3.0234 V and a GND value of +23.4 mV may be applied.

As described above, when the digital signal 2a of “00000010” is supplied from the semiconductor test apparatus 1 to the D / A conversion circuits for determination 3b and 4b in which the power supply voltage value and the GND value are set, for example, the minus side is provided. D for judgment
The reference potential 3a of 0V is output from the comparator 7 from the / A conversion circuit 3b.
Given to. Further, the reference potential 4a of 46.8 mV is supplied to the comparator from the D / A conversion circuit 4b for determination on the plus side. If the analog value 1a of the semiconductor integrated circuit 1 is a normal value, the output of 23.4 mV is output from the comparator 7,
8 will be given.

According to the configuration of the other embodiment described above, the power supply voltage / GND potential of the D / A conversion circuits for determination 3b, 4b is shifted by a desired voltage accuracy, so that a counter circuit becomes unnecessary. Also, clock control for shifting the value of the counter circuit becomes unnecessary.

[0034]

As described above, according to the present invention, in measuring a D / A conversion circuit built in a semiconductor integrated circuit to be measured, an analog voltage output from the D / A conversion circuit is measured. Providing a high-speed and inexpensive semiconductor test environment by comparing with a judgment voltage generated by using a digital input given as a D / A input of a semiconductor integrated circuit to be measured, instead of using a test Can be.

Also, by using the logical product for the judgment result, D
The output result of the / A conversion circuit can be logically determined.

[Brief description of the drawings]

FIG. 1 is a configuration diagram during a test of a semiconductor integrated circuit according to an embodiment of the present invention.

FIG. 2 is a configuration diagram during a test of a semiconductor integrated circuit according to another embodiment of the present invention.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 semiconductor integrated circuit under test 2 semiconductor integrated circuit 3, 4 D / A conversion circuit for determination 5 down counter circuit 6 up counter circuit

Continuing from the front page (72) Inventor Kazuho Sakamoto 1-3-6 Nakamagome, Ota-ku, Tokyo Ricoh Co., Ltd. (72) Inventor Yuzo Yamaguchi 1-3-6 Nakamagome, Ota-ku, Tokyo Ricoh Co., Ltd. (72) Inventor Jun Tanaka 1-3-6 Nakamagome, Ota-ku, Tokyo F-term in Ricoh Co., Ltd. (reference) 2G132 AA11 AC03 AD01 AJ02 AL09 AL33 5J022 AB01 AC05 BA05 CB01 CD02 CE06 CF01 CG01

Claims (7)

[Claims] In a semiconductor test method for a semiconductor integrated circuit having a built-in D / A conversion circuit, a D / A test digital input signal input to the semiconductor integrated circuit to be measured is prepared separately from the semiconductor integrated circuit to be measured. Synchronously input to the D / A conversion circuit for determination, apply the output of the D / A conversion circuit for determination as the reference potential of the comparison circuit, and apply the output of the D / A conversion circuit of the semiconductor integrated circuit to be measured to the comparison circuit; A method for testing a semiconductor integrated circuit, comprising determining a non-defective / defective product of a D / A conversion circuit of the semiconductor integrated circuit to be measured. 2. After the D / A test digital signal is converted into a desired digital signal by a counter circuit,
2. The test method for a semiconductor integrated circuit according to claim 1, wherein the test is input to a D / A conversion circuit for determination. 3. The method for testing a semiconductor integrated circuit according to claim 1, wherein a reference voltage of said comparison D / A conversion circuit is shifted to an arbitrary value to generate a reference potential of a comparison circuit. . 4. The D / A conversion output circuit of the semiconductor integrated circuit under test is prepared by preparing two D / A conversion circuits for determination and two comparison circuits, and calculating the logical product of the output results of the comparison circuits. 2. The test according to claim 1, wherein the test is performed by a logic 0/0 decision.
4. The test method for a semiconductor integrated circuit according to any one of items 3 to 3. 5. A test apparatus for performing a semiconductor test of a semiconductor integrated circuit having a built-in D / A conversion circuit, comprising: a test board for connecting a device for outputting a D / A test digital input signal and a semiconductor integrated circuit to be measured; A D / A conversion circuit for determination to which a D / A test digital input signal is synchronously input, and an output of the D / A conversion circuit for determination as a reference potential and a D / A conversion of the semiconductor integrated circuit to be measured A test apparatus for a semiconductor integrated circuit, comprising: two comparison circuits for inputting an output of a circuit; and a circuit for calculating a logical product of the output results of the comparison circuits. 6. A D / A test digital input signal is provided to a counter circuit, and the D / A test digital signal is converted into a desired digital signal by a counter circuit and then input to a determination D / A conversion circuit. The apparatus for testing a semiconductor integrated circuit according to claim 5, wherein: 7. The test apparatus for a semiconductor integrated circuit according to claim 5, wherein a reference voltage of said determination D / A conversion circuit is shifted to an arbitrary value to generate a reference potential of a comparison circuit. .