JP3374087B2 - Test method for semiconductor integrated circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of performing an operation test of a digital-analog converter (hereinafter referred to as "DA converter"), which is carried out during manufacturing of a semiconductor integrated circuit.

[0002]

2. Description of the Related Art As a conventional method, first, a fixed voltage is connected from a tester to a reference power supply terminal of a digital-analog converter, and the output analog voltage value is measured by a voltmeter according to the operation of a DA converter (for example, a voltmeter). JP-A-5-12
There is a method. FIG. 5 is a diagram for explaining a test using the above-described voltmeter. As shown in FIG.
First, the data generated by the data generating means 51 is input to the DA converter 52, the output of the DA converter 52 is input to the high precision voltmeter 53, and the output of the high precision voltmeter 53 is held in the measured voltage value memory 54. The DA converter is tested by obtaining differential linearity and integral linearity by the arithmetic unit 55 based on the output of the high precision voltmeter 53 and the data generated by the data generating means 51.

Further, in a test method using a comparator (hereinafter referred to as "converter"), the judgment voltage of the comparator is changed according to the output voltage of the DA converter to perform the test, or a plurality of comparators having different judgment voltages are used. Is connected to the output of the DA converter to perform a test (Japanese Patent Laid-Open No. 6-235).
No. 754).

FIG. 6 is a diagram for explaining a test using the above-mentioned comparator. As shown in FIG. 6, first, the data generated by the data generating means 61 is converted into the DA converter 62.
To the comparator 64a to which the upper limit reference voltage 63 is input and to the comparator 64b to which the lower limit reference voltage 65 is input, and the DA converter is tested by the arithmetic unit.

[0005]

However, in the conventional test using the voltmeter, in order to inspect the operation of the DA converter and the accuracy of the voltage value, the high-accuracy voltage for accurately measuring the output voltage of the DA converter is used. It requires a meter, a memory for storing the measured voltage value, and an arithmetic unit for numerically analyzing the voltage value.

Further, measurement using these devices requires a great deal of time, and it is difficult to perform a combination test of all output voltages.

Further, when a plurality of DA converters are built in a semiconductor integrated circuit, a plurality of high-precision voltmeters, memories, and arithmetic processing units are required to simultaneously test a plurality of DA converters. However, the device becomes very expensive. Therefore, when testing a plurality of DA converters, one high-precision voltmeter, a memory, and an arithmetic processing unit are switched and tested, which further increases the test time.

Furthermore, since a high-precision voltmeter is connected to only one DA converter for testing, other DA converters not connected to the voltmeter are not tested at the same time, and adjacent DA converters and DA converters are not tested at the same time. Interfering defects, etc. are not screened.

On the other hand, in the test method using the comparator, it is necessary to change the judgment voltage of the comparator according to the output voltage of the DA converter for the test.
It takes a lot of time because the judgment voltage of the comparator is changed every time the operation of the converter changes and the output voltage changes. That is, in the current tester structure, when changing the judgment voltage of the comparator, it is necessary to change the DC power supply of the tester. Therefore, a waiting time is required each time the voltage value is changed, which increases the test time.

Further, the test method using a plurality of comparators with different judgment voltages requires a number of comparators corresponding to the output voltage value of the DA converter, resulting in an increase in the number of comparators and an increase in the cost of the device.

The present invention has been made for the purpose of solving these problems, and it is possible to perform the operation of the DA converter and the voltage accuracy test and any combination test of the output voltages without increasing the cost of the inspection apparatus. The present invention provides a semiconductor test apparatus and a test method therefor that can be realized in a short time with a minimum number of comparators.

[0012]

According to a first aspect of the present invention, there is provided a method for testing a semiconductor integrated circuit according to the present invention, wherein a semiconductor integrated circuit having a digital-analog converter including a selection circuit and an output circuit is input. According to the change of the test pattern, the upper limit reference power supply and the lower limit reference of the digital-analog converter are set so that the output voltage at normal time according to the test pattern is between the fixed upper limit value and the fixed lower limit value of the comparator. Applying a predetermined voltage to each power supply
And a step of determining the output voltage of the digital-analog converter with a comparator.

A semiconductor integrated circuit testing method according to the present invention is characterized in that a predetermined voltage is applied to the upper limit reference power supply and the lower limit reference power supply by using an arbitrary voltage generator. A method for testing a semiconductor integrated circuit according to claim 1.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, based on one embodiment,
The present invention will be described in detail.

FIG. 1 is a block diagram of a semiconductor integrated circuit according to an embodiment of the present invention during a test. In FIG. 1, 1a and 1b
Is an arbitrary voltage generator, 2a and 2b are reference power sources, 3 is a voltage dividing circuit, 4 is a DA converter setting port, 5 is an output circuit, 6 is a selection circuit, 7 is a DA converter, 8 is an output terminal, and 9a is fixed. The upper limit determination voltage (VH), 9b are fixed lower limit determination voltages (VL), 10a, 10b are comparators, and 11 is a determination device having an expected output value memory.

In order to test the operation and voltage value accuracy of the DA converter, as shown in FIG. 1, arbitrary voltage generators 1a, 1b capable of externally controlling the voltage value are applied to both ends 2a, 2b of the reference power source of the DA converter 7. 2 units are connected. Further, comparators 10a and 10b having the determination voltages 9a and 9b fixed in advance are connected to the DA converter output. The arbitrary voltage generators 1a and 1b are analog signal generators having a 20 MHz clock as a source clock. It is used when inputting an analog signal to a digital analog LSI that has a built-in AD converter, filter, etc. The analog signal to input is
By combining and combining waveform parameters, complex signals such as video signals and VTR signals can be easily used. Further, since this generator can generate a signal (voltage) in synchronization with a test pattern used for a function test, an efficient test can be performed.
In this state, the DA converter outputs 2 depending on the input data.
Selects the voltage obtained by dividing the potentials of two arbitrary voltage generators and outputs it to the output terminal.

The output voltage enters comparators 10a and 10b having fixed decision voltages for comparison and decision. At this time, a comparator having a fixed output voltage which is supposed to be outputted if a normal DA converter is always provided. The output voltages of the two arbitrary voltage generators 1a and 1b are changed according to the voltage selected by the DA converter 7 so as to be within the judgment voltage of.

As a result, if normal, DA
The output voltage of the converter 7 can be made constant, and the functional test of the DA converter 7 can be performed without changing the determination voltages of the comparators 10a and 10b. In order to simply represent the DA converter 7, only the voltage dividing circuit 5, the selecting circuit 6 and the output circuit 8 are shown in FIG. DA
A pattern-synchronous arbitrary voltage generation power supply is connected to the reference power supply of the converter 7, and comparators 10a and 10b are connected to the output of the DA converter 7.

2 to 4 are diagrams for explaining a method for testing a semiconductor integrated circuit according to the present invention. These figures show the positional relationship between the voltages of the arbitrary voltage generators 1a and 1b, the voltages selectively output in the DA converter 7, and the magnitude comparison voltages of the comparators 10a and 10b, and then the output voltage of the DA converter 7. It is a figure with which explanation of a test method is offered.

Arbitrary voltage generators 1a and 1b are connected to the reference power supplies 2a and 2b at both ends of the voltage dividing resistor forming the voltage dividing circuit 3.
Connect. The voltage divided by the voltage dividing circuit 3 is
It is input to the selection circuit 6.

Then, a voltage corresponding to the data of the function test pattern input from the DA converter setting port 4 is selected and output to the output terminal 8 via the output circuit 5. The selected voltage is the comparator 10
a and 10b, the magnitude comparison results of the comparators 10a and 10b are compared with the output expected value memory of the determination device 11, and a determination is made.

The DA converter 7 outputs a voltage in the range of the upper limit voltage 27 to the lower limit voltage 28. Further, the comparators 10a and 10b receiving the output voltage are set so as to determine the center voltage 29 between the upper limit voltage 27 and the lower limit voltage 28.

FIG. 2 shows a case where the selection circuit 6 of the DA converter selects the selection switch 35 so as to output the lower limit voltage 28. At this time, the upper limit voltage 27 and the lower limit voltage 2
The output voltage 31 of the arbitrary voltage generator is adjusted to the center value 29 of 8 and the output voltage 30 of the arbitrary voltage generator is adjusted to the upper limit voltage 27.

If the DA converter 7 is normal, the output voltage 32 becomes equal to or less than the comparator comparison voltage (high side) 33 (hereinafter, referred to as "judgment voltage (high side)") 33, and also the comparator magnitude. Comparison voltage (low side)
(Hereinafter, referred to as "determination voltage (low side)") 34 or more. That is, if the output voltage 32 falls within these two magnitude comparison voltages, the selection circuit 6 causes the lower limit voltage selection switch 3 to operate.
It turns out that 5 is turned on.

FIG. 3 shows a case where the selection circuit 6 of the DA converter 7 selects the selection switch 36. At this time, the arbitrary voltage generator output voltage 30 and the arbitrary voltage generator output voltage 31 are set so as to output the center value 29 of the upper limit voltage 27 and the lower limit voltage 28. As a result, if the DA converter 7 is normal, the output voltage 32 becomes equal to or lower than the comparator judgment voltage (high side) 33, and becomes equal to or higher than the comparator judgment voltage (low side) 34. That is, if the output voltage 32 falls within these two determination voltages, it is understood that the selection circuit 6 turns on the selection switch 36.

FIG. 4 shows the case where the selection circuit 6 of the DA converter selects the selection switch 37 so as to output the upper limit voltage. At this time, the output voltage 30 of the arbitrary voltage generator is adjusted to the center value 29 of the upper limit voltage 27 and the lower limit voltage 28,
The output voltage 31 of the arbitrary voltage generator is adjusted to the lower limit voltage 28. Output voltage 32 is the comparator judgment voltage (high side)
33 or less, and the comparator judgment voltage (low side) 34 or more. If the output voltage 32 falls within these two determination voltages, the selection circuit 6 causes the selection switch 3 of the upper limit voltage.
It turns out that 7 is turned on.

When a voltage is applied from the outside using a conventional DC power supply, after running a test pattern, the voltage is applied to the reference power supply of the DA converter, and subsequently the DA converter is set to another state. Run the pattern,
The test method was repeated by applying another voltage to the reference power source of the DA converter again. On the other hand, using the present invention,
Since the arbitrary voltage generator can apply a signal (voltage) to the LSI in synchronization with the test pattern, various voltages can be used as the reference voltage of the DA converter while running the test pattern as when inputting the driver waveform of the tester. You can enter. That is, by running the test pattern once, all the voltages to be applied can be input to the DA converter. As a result, the operation time for running the test pattern, the waiting time for setting the DC voltage, etc. can be omitted, and the test time can be shortened.

[0028]

As described above in detail, by using the present invention, the output voltage of the DA converter can be measured quickly because a comparator is used without using a voltmeter. This is because it is not necessary to temporarily store the voltage value measured by the voltmeter and to perform arithmetic processing on the stored content to bring it to the judgment.

Further, in the present invention, the output voltage test of the DA converter is conducted by using the comparator.
By not changing the judgment voltage of the comparator according to the output voltage of the A converter, the test can be performed faster, and the number of comparators is not increased according to the type of the output voltage of the DA converter. It also leads to cost reduction.

Also, when a plurality of DA converters are built in, simultaneous measurement can be easily performed by installing comparators by the number of DA converters, and interference failure between DA converters can be easily screened. You can

[Brief description of drawings]

FIG. 1 is a configuration diagram at the time of testing a semiconductor integrated circuit according to an embodiment of the present invention.

FIG. 2 is a first diagram provided for explaining a method for testing a semiconductor integrated circuit according to an embodiment of the present invention.

FIG. 3 is a second diagram provided for explaining a method for testing a semiconductor integrated circuit according to an embodiment of the present invention.

FIG. 4 is a third diagram provided for explaining the method for testing the semiconductor integrated circuit according to the embodiment of the present invention.

FIG. 5 is a diagram for explaining a first conventional technique.

FIG. 6 is a diagram provided for explaining a second conventional technique.

[Explanation of symbols]

1a, 1b arbitrary voltage generator 2a, 2b Reference power supply 3 voltage division circuit 4 DA converter setting port 5 output circuits 6 selection circuit 7 DA converter 8 output terminals 9a Fixed upper limit judgment voltage (VH) 9b Fixed lower limit judgment voltage (VL) 10a, 10b comparator 11 Judgment device with expected output value memory 27 Power supply voltage upper limit 28 Power supply voltage lower limit 29 median 30 arbitrary voltage generation power supply (high side) output voltage 31 Arbitrary voltage generation power supply (low side) output voltage 32 DA converter output voltage 33 Comparator size comparison voltage (high side) 34 Comparator size comparison voltage (low side) 35, 36, 37 selection switch

Claims (2)

(57) [Claims] 1. A test method for a semiconductor integrated circuit having a digital-analog converter having a selection circuit and an output circuit, wherein a normal output voltage according to an input test pattern is a fixed upper limit value and a fixed lower limit value of a comparator. To be between the values
A step of applying a predetermined voltage to the upper limit reference power supply and the lower limit reference power supply of the digital-analog converter according to the change of the test pattern, and the comparator determines the output voltage of the digital-analog converter.
A method for testing a semiconductor integrated circuit, comprising the steps of : 2. The method for testing a semiconductor integrated circuit according to claim 1, wherein a predetermined voltage is applied to the upper limit reference power supply and the lower limit reference power supply using an arbitrary voltage generator.