JP2002358237A - プロセッサのメモリ装置に対する権限のないアクセスを防止する保護回路 - Google Patents

プロセッサのメモリ装置に対する権限のないアクセスを防止する保護回路

Info

Publication number
JP2002358237A
JP2002358237A JP2002105364A JP2002105364A JP2002358237A JP 2002358237 A JP2002358237 A JP 2002358237A JP 2002105364 A JP2002105364 A JP 2002105364A JP 2002105364 A JP2002105364 A JP 2002105364A JP 2002358237 A JP2002358237 A JP 2002358237A
Authority
JP
Japan
Prior art keywords
memory
access
signal
area
protection circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002105364A
Other languages
English (en)
Japanese (ja)
Inventor
Dietmar Koschella
ディエトマー・コーシェラ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Micronas GmbH
Original Assignee
TDK Micronas GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TDK Micronas GmbH filed Critical TDK Micronas GmbH
Publication of JP2002358237A publication Critical patent/JP2002358237A/ja
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1416Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/1425Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block
    • G06F12/1433Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block for a module or a part of a module

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)
JP2002105364A 2001-04-06 2002-04-08 プロセッサのメモリ装置に対する権限のないアクセスを防止する保護回路 Pending JP2002358237A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP01108711.1 2001-04-06
EP01108711A EP1248200A1 (fr) 2001-04-06 2001-04-06 Circuit de blocage pour empêcher un accès non autorisé à la mémoire d'un processeur

Publications (1)

Publication Number Publication Date
JP2002358237A true JP2002358237A (ja) 2002-12-13

Family

ID=8177073

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002105364A Pending JP2002358237A (ja) 2001-04-06 2002-04-08 プロセッサのメモリ装置に対する権限のないアクセスを防止する保護回路

Country Status (3)

Country Link
US (1) US7054121B2 (fr)
EP (1) EP1248200A1 (fr)
JP (1) JP2002358237A (fr)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7185249B2 (en) * 2002-04-30 2007-02-27 Freescale Semiconductor, Inc. Method and apparatus for secure scan testing
US7320642B2 (en) * 2002-09-06 2008-01-22 Wms Gaming Inc. Security of gaming software
DE10347259B4 (de) * 2003-10-08 2013-10-31 Entropic Communications, Inc. Verfahren zum Synchronisieren einer Schaltungsanordnung beim Empfang eines modulierten Signals
US7386774B1 (en) * 2004-02-26 2008-06-10 Integrated Device Technology, Inc. Memory unit with controller managing memory access through JTAG and CPU interfaces
GB2442023B (en) * 2006-09-13 2011-03-02 Advanced Risc Mach Ltd Memory access security management
JP5081761B2 (ja) * 2008-08-05 2012-11-28 富士通株式会社 アーカイブ装置,不正アクセス検出方法及び不正アクセス検出プログラム
TWI443518B (zh) 2011-10-19 2014-07-01 Hon Hai Prec Ind Co Ltd 電子設備
CN103064798B (zh) * 2011-10-19 2016-02-03 国基电子(上海)有限公司 电子设备
US10540524B2 (en) * 2014-12-31 2020-01-21 Mcafee, Llc Memory access protection using processor transactional memory support
CN110754068A (zh) * 2017-06-14 2020-02-04 住友电气工业株式会社 车外通信装置、通信控制方法和通信控制程序
US20240086556A1 (en) * 2022-09-12 2024-03-14 Idaho Scientific Llc Computing data and instructions at immutable points

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4523271A (en) * 1982-06-22 1985-06-11 Levien Raphael L Software protection method and apparatus
US4796235A (en) * 1987-07-22 1989-01-03 Motorola, Inc. Write protect mechanism for non-volatile memory
US5557743A (en) * 1994-04-05 1996-09-17 Motorola, Inc. Protection circuit for a microprocessor
US5657444A (en) * 1995-08-03 1997-08-12 National Semiconductor Corporation Microprocessor with secure programmable read only memory circuit
US5974500A (en) * 1997-11-14 1999-10-26 Atmel Corporation Memory device having programmable access protection and method of operating the same
US6397301B1 (en) * 1999-12-29 2002-05-28 Intel Corporation Preventing access to secure area of a cache
US6665782B2 (en) * 2001-08-16 2003-12-16 International Business Machines Corporation Method and apparatus for preventing unauthorized access of memory devices

Also Published As

Publication number Publication date
EP1248200A1 (fr) 2002-10-09
US7054121B2 (en) 2006-05-30
US20020166034A1 (en) 2002-11-07

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