JP2002335420A - Field discrimination device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a field discrimination device that can discriminate odd number and even number fields even when number of scanning lines of one frame indicates an even number interlace signals. SOLUTION: A line counter 4 counts number of scanning lines of 1050 interlace signals and a comparator 5 compares the count with a value 1048, and when the comparison indicates 1048, the comparator 5 provides an output of '0'. An AND gate circuit 6 loses the 1048th horizontal synchronizing signal (HD 2 pulse) to provide an output of an HD2' pulse. A field discrimination circuit 120 uses the HD2' pulse and a vertical synchronizing signal (VD pulse) to discriminate an odd number field or an even number field depending on whether or not number of horizontal synchronizing pulses included in one field is an odd number or an even number.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a field discriminating apparatus capable of discriminating between odd and even fields even if the number of scanning lines in one frame is an even interlaced television signal.

[0002]

2. Description of the Related Art At present, interlace systems are mainly used for television signals such as NTSC and HDTV. Recently,
These interlaced signals are converted into a non-interlaced signal by signal processing or displayed on a matrix type display device such as a liquid crystal display device (LCD) or a plasma display device (PDP) to be displayed with high image quality or enlarged. And the technology to shrink is needed.

[0003] When signal processing is performed on an interlaced television signal in this way, a field discriminating circuit for discriminating between an odd field and an even field is often required. The field discriminating circuit generally discriminates an odd field and an even field from a relationship between a horizontal synchronizing signal (horizontal synchronizing pulse) and a vertical synchronizing signal (vertical synchronizing pulse).

FIG. 4 is a block diagram showing a general field discriminating circuit, and FIG. 5 is a waveform chart for explaining its operation. 4 includes a 1-bit counter 11 and a flip-flop 12. Here, the television signal to be subjected to field discrimination includes 525 scanning lines per frame (262.5 lines per field) shown in FIG. 5C.
Will be described below.

In FIG. 4, a clock terminal (CK) of the 1-bit counter 11 has a frequency 1 shown in FIG.
A 5.75 kHz horizontal synchronization pulse (HD pulse) is input, and a clear terminal (CLR) receives a vertical synchronization pulse (VD pulse) having a frequency of 60 Hz shown in FIG. The 1-bit counter 11 counts at the rising edge of the HD pulse with the VD pulse synchronously cleared.
(D). Output Q. The count value CNT. Q
Is input to the flip-flop 12. The clock terminal (CK) of the flip-flop 12 receives a VD pulse.

The flip-flop 12 has a count value CN
T. Q is latched by the rising edge of the VD pulse.
Count value CN output from 1-bit counter 11
T. For Q, the number of HD pulses to be counted is odd (263) or even (262) for each VD pulse. Therefore, from the flip-flop 12, the field index signal FI shown in FIG.
Is output. Thereby, the field discriminating circuit 1 shown in FIG. 4 can discriminate between the odd field and the even field.

[0007]

In the conventional field discriminating circuit 1, the number of scanning lines in one frame is odd (525 in the example).
In the case of (book), field discrimination is possible. However, the number of scanning lines in one frame is an even number (for example, 10
In the case of (50 lines), there is a problem that the field cannot be determined by the same method.

The present invention has been made in view of such a problem, and a field discriminating apparatus capable of discriminating between odd and even fields even when the number of scanning lines in one frame is an even interlaced signal. The purpose is to provide.

[0009]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems of the prior art, the present invention has an even number of scanning lines in one frame composed of an odd field and an even field, and outputs an interlaced television signal. In a field discriminating device for discriminating a field, the number of horizontal sync pulses in the odd field and the number of horizontal sync pulses in the even field are determined based on a first horizontal sync signal which is a horizontal sync signal of the television signal. Generating means for generating a second horizontal synchronizing signal in which at least one horizontal synchronizing pulse in the odd field or the even field has disappeared so that an odd number of differences occur in the horizontal field.
Field discriminating means for discriminating a field based on whether the number of horizontal sync pulses included in one field is odd or even using the second horizontal sync signal and the vertical sync signal of the television signal (1 ₂₀ ) A field discriminating apparatus characterized by comprising:

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A field discriminating apparatus according to the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a block diagram showing an embodiment of a field discriminating apparatus of the present invention.
FIG. 2 is a waveform chart for explaining the operation of one embodiment shown in FIG. 1, and FIG. 3 is a waveform chart for explaining the operation of another embodiment.

The embodiment shown in FIG. 1 is a video processing circuit 10 for converting an interlace signal having 525 scanning lines into an interlace signal having 1050 scanning lines at a double speed, and a signal processing circuit for processing an interlace signal having 1050 scanning lines. A field discriminating apparatus according to the present invention is provided in a configuration in which the image processing circuit 20 is combined with the video processing circuit 20. The field determination device of the present invention is not limited to the configuration shown in FIG.

In FIG. 1, a video signal which is an interlace signal having 525 scanning lines is input to a double speed processing circuit 2 in a video processing circuit 10. The double speed processing circuit 2 includes an HD pulse (see FIG. 5B) and a VD pulse (see FIG. 1) of a video signal which is an interlace signal having 525 scanning lines.
(See (A)). The frequency multiplier 3 has a frequency 1
The 5.75 kHz HD pulse is doubled in frequency 3
It is converted into a 1.5 kHz pulse (HD2 pulse). This HD2 pulse is output from the double speed processing circuit 2 and the line counter 4
Is input to the AND gate circuit 6.

[0013] The video processing circuit field discriminating circuit 1 ₁₀ in 10 is the same structure as the field determination circuit 1 described in FIG. 4, to determine the odd and even fields by using the HD pulse and VD pulse And outputs a field index signal FI (see FIG. 5E).
Field determination circuit 1 _10, since the signal of interest in the field determination is interlace signal having 525 scanning lines, it is possible to determine the field without any problems. The field index signal FI is input to the double speed processing circuit 2 and the line counter 4.

The double-speed processing circuit 2 converts the interlaced signal having 525 scanning lines into an interlaced signal having 1050 scanning lines by using a well-known circuit configuration such as a double-speed memory by using the above-mentioned input signals. Convert. FIG.
The video signal converted into an interlace signal having 1050 scanning lines shown in (C) is input to the signal processing circuit 7 in the video processing circuit 20.

The line counter 4 counts HD2 pulses and supplies a line number (scanning line number) to the comparator 5. The comparator 5 outputs 1 if the input line number is not 1048, and outputs 0 if the input line number is 1048. Note that 1048 is merely an example, and the present invention is not limited to this. The output of the comparator 5 is input to an AND gate circuit 6. Therefore, AND
From the gate circuit 6, as shown in FIG.
HD where the 1048th pulse disappeared as shown by the broken line
A 2 'pulse will be output. Line counter 4
And the comparator 5 and the AND gate circuit 6 serve as generating means for generating the second horizontal synchronizing signal (HD2 'pulse) by eliminating the 1048th line of the first horizontal synchronizing signal (HD2 pulse).

[0016] Also the field determination circuit 1 ₂₀ in the video processing circuit 20 is exactly the same configuration as the field determination circuit 1 described in FIG. The field discrimination circuit 1 _20, AN
The HD2 'pulse output from the D gate circuit 6 and the VD
The pulse is input, the odd field and the even field are discriminated using the HD2 'pulse and the VD pulse, and the field index signal FI shown in FIG. 1E is output. Count value CNT output from the 1-bit counter 11 of the field determination circuit 1 _20. Q is shown in FIG.
(D).

The video processing circuit field determination circuit 1 ₂₀ in 20, which signals are subject to the field determination is interlace signal having 1050 scanning lines, the horizontal synchronizing signal to be input is, FIG. 1 (B ), HD2
Since the 1048th pulse is the HD2 'pulse that has disappeared, the field can be determined without any problem just as in the case of the interlace signal having 525 scanning lines. Specifically, the number of scanning lines in the odd field is counted as 525, and the 1-bit counter 11
Is odd, and the number of scanning lines in the even field is 524.
Since only the actual number is counted, an even-number determination is performed. Therefore, field discrimination is possible.

[0018] The signal processing circuit 7, in addition to the video signal output from the double speed processing circuit 2, HD2 'and pulse outputted from the AND gate circuit 6, and the VD pulse, outputted from the field discrimination circuit 1 ₂₀ Field The index signal FI is input. The signal processing circuit 7 performs predetermined signal processing on the input video signal using these signals, and outputs the processed video signal. The signal processing in the signal processing circuit 7 is optional. The signal processing in the signal processing circuit 7 includes pixel number conversion, further double speed processing, double field processing, and the like.

In the embodiment shown in FIGS. 1 and 2, as shown in FIG. 2B, the HD2 pulse is output as it is in the odd field, and the 1048th HD2 pulse is eliminated in the even field, and the HD2 'pulse is removed. However, the position and the number of pulses to be eliminated are not limited to the embodiment of FIGS.

FIG. 3 shows that, in the odd field, the HD2 pulse is erased for two lines from the 524th to 525th lines, and in the even field, the HD2 pulse is changed from 1048 to 1050.
An example is shown in which three lines have been erased. FIG.
As shown in (B), a horizontal synchronizing signal in which pulses are eliminated as shown by broken lines for two lines in an odd field and three lines in an even field is referred to as an HD2 ″ pulse.

The circuit configuration for generating the HD2 ″ pulse shown in FIG. 3B is almost the same as that of FIG. 1, and in the comparator 5, the input line numbers are 524 and 52.
In the case of 5, 1048, 1049, and 1050, 0 may be output. The change in the comparator 5 is very simple. Therefore, it is easy to change the position and the number of pulses to be eliminated. In the example of FIG. 3, even-numbered pulses are eliminated in odd-numbered fields and odd-numbered pulses are eliminated in even-numbered fields.

In short, when the number of scanning lines in one frame (the sum of the odd field and the even field) is even,
If the number of lines in the odd field and the even field is equal, the HD pulse (H
(Including D2 pulse), an odd number of differences may be generated as the number of pulses. It is preferable that the timing of erasing the HD pulse be outside the effective scanning period (blanking period).

The field discriminating circuit 1 (1 ₁₀ , 1 ₁₀ ) shown in FIG.
In including) 1 _20, when the 525 scanning lines of the interlaced signal, high in the odd field, and outputs a low in the even field. If the number of pulses in the odd field is an odd number and the number of pulses in the even field is an even number, the signal output from the field discriminating circuit 1 is high.
Since the relationship between the row and the odd field / even field does not change, it is preferable that the number of pulses in the odd field is odd and the number of pulses in the even field is even. If the number of pulses in the odd field is an even number and the number of pulses in the even field is an odd number, the high and the low are reversed.

At first glance, in the configuration shown in FIG. 1, it seems that the field index signal FI obtained by the field discriminating circuit 110 in the video processing circuit ₁₀ may be supplied to the video processing circuit 20 as it is. However, the video processing circuit 20 is often configured as an integrated circuit, and can input only a component video signal such as RGB or YUV, an HD pulse (including an HD2 pulse), and a VD pulse to the video processing circuit 20.

According to the present invention, a field of an interlace signal having an even number of scanning lines in one frame can be determined without changing the video processing circuit 20 formed as an integrated circuit. Using the existing field discriminating circuit 1 for discriminating fields depending on whether the number of scanning lines is an odd number or an even number, it becomes possible to discriminate a field of an interlace signal having an even number of scanning lines in one frame. There is no need to provide a special configuration for field-determining an interlaced signal having an even number of scanning lines in a frame, and the cost of the signal processing device is not increased.

[0026]

As described above in detail, the field discriminating apparatus according to the present invention uses the first horizontal synchronizing signal which is the horizontal synchronizing signal of the television signal and the number of horizontal synchronizing pulses of the odd field and the number of even synchronizing pulses. Generating means for generating a second horizontal synchronizing signal in which at least one horizontal synchronizing pulse in an odd field or an even field has disappeared so that an odd number of differences from the number of horizontal synchronizing pulses in the field occur; And a field discriminating means for discriminating a field according to whether the number of horizontal sync pulses included in one field is an odd number or an even number using the horizontal synchronizing signal and the vertical synchronizing signal of the television signal. Therefore, even if the number of scanning lines in one frame is an even-numbered interlace signal, it is possible to distinguish between an odd-numbered field and an even-numbered field. That.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention.

FIG. 2 is a waveform chart for explaining the operation of the embodiment shown in FIG. 1;

FIG. 3 is a waveform chart for explaining the operation of another embodiment.

FIG. 4 is a block diagram showing a general field discrimination circuit.

FIG. 5 is a waveform chart for explaining the operation of FIG.

[Explanation of symbols]

1, 1 ₁₀ , 1 ₂₀ field discriminating circuit (field discriminating means) 2 double speed processing circuit 3 multiplier circuit 4 line counter (generating means) 5 comparator (generating means) 6 AND gate circuit (generating means) 7 signal processing circuit 10, 20 Video processing circuit

Claims (2)

[Claims] 1. A field discriminating apparatus for discriminating a field of an interlaced television signal in which the number of scanning lines of one frame including an odd field and an even field is even, and wherein a first synchronizing signal of the television signal is used. 1 horizontal synchronizing signal, so that an odd number of differences between the number of horizontal synchronizing pulses of the odd field and the number of horizontal synchronizing pulses of the even field occur. Generating means for generating a second horizontal synchronizing signal in which at least one pulse has disappeared; and using the second horizontal synchronizing signal and a vertical synchronizing signal of the television signal, a horizontal synchronizing signal included in one field. Field discriminating means for discriminating a field depending on whether the number of pulses is odd or even. Field determination apparatus characterized by being configured Ete. 2. The field discriminating apparatus according to claim 1, wherein the timing at which the horizontal synchronizing pulse disappears is set outside the effective scanning period.