JP2002333868A - Drive method of electro-optical device, and electro- optical device and electronic equipment using the method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To fully write in analog image signals, even in a high precision made and to maintain reliability in a liquid crystal display device, in which analog image signals are supplied to pixel electrodes while the polarities are varied. SOLUTION: An analog switch ASWn selectively connects signal lines 30, to which analog image signals Vid are supplied, and data lines ϕDn that constitute an image display section 60. Data line selection signals ΦHn control the switch ASWn to conductive and/or conductive states. When the signals Vid have positive polarities, H level potential and L level potential of the signals ΦHn are both made to be higher for same potential than the case of negative polarities. Since the potential of the signals ΦHn applied to a gate electrode of the switch ASWn is raised, the resistance of the switch ASWn is becomes small, and the write time for the lines ϕDn can be shortened. Moreover since, the voltage which acts on the switch ASWn does not change, its reliability is maintained.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of driving an electro-optical device of an active matrix drive system using a thin film transistor (hereinafter referred to as TFT), an electro-optical device using the same, and an electro-optical device using the same. Electronic devices.

[0002]

2. Description of the Related Art Conventionally, as an electro-optical device, for example, a liquid crystal display device as shown in FIG. 11 has been proposed. The image display unit 60 constituting the liquid crystal panel includes scanning lines φGm (m = 1 to M) arranged in the row direction, data lines φDn (n = 1 to N) arranged in the column direction, and intersections of these two. A pixel TFT (not shown) driven by the pixel TFT 65, and a liquid crystal LC sandwiched between the pixel electrode and a counter electrode (not shown). Of the scanning line selection signal ΦVm (m = 1 to
M) is supplied, and a data line selection signal ΦHn from the data line drive circuit 20 is supplied to the source electrode of the pixel TFT 65.
(N = 1 to N) are supplied.

The scanning line driving circuit 10 sequentially selects each of the scanning lines φG1, φG2,.
T65 is selected, and the shift register forming the data line driving circuit 20 sequentially selects the analog switches ASWn (n = 1 to N) forming the sampling circuit 70, whereby each data line φDn is selected one by one. Is done. As a result, the analog image signal Vi of the signal line 30 is applied to the data line φDn selected by the data line driving circuit 20.
d is written, the potential of the data line φDn is written to a pixel electrode (not shown) via the pixel TFT 65 connected to the scanning line φGm selected by the scanning line driving circuit 10, and the potential of the pixel electrode and the counter electrode (not shown) Vid is applied to the value of the analog image signal to the liquid crystal LC sandwiched therebetween.

FIG. 12 is a timing chart for explaining a driving method of the liquid crystal display device shown in FIG.
A so-called 1H inversion driving method is used in which a potential Vid of an analog image signal that is AC-inverted every horizontal scanning period with respect to the image signal center potential Vc is applied to the signal line 30. 12A shows the potential Vg of the gate electrode of the pixel TFT 65 and the potential Vg of the pixel electrode (not shown).
6 is a timing chart showing a potential p of the analog image signal Vid. In the figure, Vc is an analog image signal Vid.
Image signal center voltage of, Vcom is the potential of the counter electrode, not shown, also, T ₁ is a period in which the pixel TFT 65 is selected, that is, the gate electrode of the pixel TFT 65, the scanning line selection signal ΦVm that this conductive state Is applied, and T ₂ indicates its non-selection period.

[0005] On the other hand, (b) shows a potential Vgs applied to the gate electrode of a transistor constituting the analog switch ASWn (n = 1 to N) in the data line drive circuit 20, a potential Vdl of the data line φDn, and an analog image. The potential of the signal Vid, the image signal central potential Vc, and the potential Vcom of the counter electrode
FIG. Further, T ₃ is a selection period of the analog switch ASWn (n = 1 to N), that is, a data line selection signal ΦHn (n = 1 to N) for making the gate electrode of the analog switch ASWn conductive.
There indicates how long applied, T ₄ denotes the non-selection period. Vdd represents a positive power supply potential of the power supply voltage supplied to the data line drive circuit 20, and Vss represents a negative power supply potential.

As shown in FIG. 12, a data line selection signal Φ
The potential of the data line φDn become a data line φDn and a signal line 30 corresponding thereto with conductive state by selecting the period analog switch ASWn of T ₃ becomes equal to the potential of the analog image signal Vid by hn, whereas, period pixel of T ₁ by a scanning line selection signal FaiVm TFT 65
Is selected, the potential of the data line φDn is supplied to the pixel electrode, and the potential Vp becomes equal to the potential of the data line φDn. The potential of the analog image signal Vid is written to the pixel electrode through the above path.

[0007]

However, the above-mentioned conventional liquid crystal display has the following problems. In other words, one point is that, with the higher definition of pixels,
In the selection period T ₃ of the analog switches ASWn, is that not written sufficiently analog image signal Vid to the data line FaiDn. As a result, there is a problem that the contrast ratio decreases.

Another point is that by operating the analog switch ASWn at a high speed in accordance with the high definition of the pixel,
This means that reliability cannot be ensured. As a result, for example, the TF configuring the analog switch ASWn
The ON current of T decreases, and the timing of the data line selection signal ΦHn shifts, causing a ghost. Further, the TF
As T deteriorates, the data line drive circuit 20 itself does not operate.

[0009] Cause no longer written sufficiently potential of the analog image signal Vid to the data line φDn within the selection period T ₃ of the analog switches ASWn with the higher definition of the aforementioned pixel is considered as follows. That is, in order to write the potential of the analog image signal Vid to the data line φDn,
A write time sufficiently longer than the time constant of the data line φDn is required. On the other hand, as the high definition of pixels progresses, the sampling rate of the analog switch ASWn is faster, since the selection period T ₃ of the analog switches ASWn decreases, can not be secured sufficiently long write time than the time constant of the data line FaiDn. In general, a TFT channel has more defect levels than a single-crystal silicon MOSFET. Therefore, the S value defined as the amount of change in the gate voltage used to increase the drain current by one digit is defined as the single-crystal silicon. The TFT is several times as large as the MOSFET, and the mobility is as small as several times smaller.

For this reason, the positive analog image signal Vid having a higher potential than the image signal center potential Vc.
Is written to the data line φDn, the ON current of the analog switch TFT becomes insufficient because a sufficient gate-source voltage is not secured. Therefore, the potential Vid of the analog image signal cannot be sufficiently written to the data line φDn with the increase in the definition of the pixel, and the expected analog image signal Vid cannot be applied to the liquid crystal, causing a problem such as a decrease in the contrast ratio. ing.

On the other hand, it is considered that the reliability of the analog switch cannot be ensured due to the high-speed operation in accordance with the high definition of the pixel, as follows. As is well known, the liquid crystal needs to be driven by an alternating current. FIG. 13 is a diagram showing the relationship between the applied voltage [V] and the transmittance [%] of the liquid crystal display device. From this figure, it can be seen that in order to ensure a sufficient contrast ratio, a voltage of ± 5 [V] or more must be applied to the liquid crystal. Therefore, each driving circuit of the above-described liquid crystal display device has five positive and negative sides with respect to the image center potential Vc.
[V] A pixel T that requires an AC voltage of at least
A voltage of 10 [V] or more is applied to the FT 65.

On the other hand, as the definition of pixels increases, the number of stages of the shift register 50 increases and the operating frequency of the TFT constituting the analog switch ASWn also increases.
Therefore, the TF constituting the analog switch ASWn
T must operate at a high speed at a voltage of 10 [V] or more. Generally, in a TFT, MOSFE on a Si substrate is used.
Since the defect density of the channel is higher than T, high-speed operation at such a high voltage tends to cause deterioration such as a decrease in on-current and an increase in off-current due to self-heating and the like. As a result, when the on-current of the TFT is reduced due to deterioration, for example, the sampling timing of the analog image signal is shifted, which is affected by adjacent image signals, and causes problems such as a decrease in horizontal resolution and contrast ratio and generation of ghost. .

Since the reliability of the TFT greatly depends on the applied bias, as one of means for securing the reliability of the TFT, the power supply voltage supplied to the data line driving circuit 20 is reduced, and the driving voltage of the TFT is reduced. There is a way. FIG.
Represents the positive power supply potential of the power supply voltage supplied to the data line drive circuit 20 by the positive power supply potential Vd in FIG.
13 is a timing chart of the potential Vdl of the data line φDn of the liquid crystal display device when Vdd _L (Vdd> Vdd _L ) having a potential lower than d. In the data line drive circuit 20, the positive power supply potential V
dd, because when the nonconductive outputs a negative power supply potential Vss, and the positive power supply potential as shown in FIG. 12 is compared with the timing chart in case of Vdd, the selection period T ₃ of the analog switches ASWn, analog switches AS
In FIG. 12, the gate potential Vgs of Wn is the positive power supply potential Vdd.
In FIG. 14, it is equal to Vdd _L. FIG.
In, in a period in which the analog image signal Vid is the positive electrode, can be written sufficiently into the data line φDn an analog image signal Vid in the selection period T ₃ of the analog switches ASWn, analog image signal Vid and the data line φDn
Are equal potentials. However, in FIG. 14, can not be written sufficiently analog image signals Vid in the selection period T ₃ of the analog switches ASWn, the potential of the data line FaiDn Vdl analog image signal V
low for id. This is because the positive power supply potential supplied to the data line φDn is reduced from Vdd to Vdd _L during the period when the analog image signal Vid is positive.
This is because the voltage between the gate and the source of the TFT constituting the analog switch ASWn decreases. That is, a decrease in the voltage between the gate and the source of the analog switch ASWn, that is, a decrease in the ON current of the TFT. Therefore, the deterioration of the TFT can be suppressed by lowering the power supply voltage supplied to the data line driving circuit 20, but the time constant of the data line φDn becomes large and the analog switch ASW
In the selection period T3, the analog image signal Vid cannot be sufficiently written. This causes problems such as a decrease in contrast ratio.

As one of means for securing the sampling period of the analog switch ASWn, a plurality of signal lines 30 for supplying the analog image signal Vid are provided, and the phase-developed analog image signal is supplied to the plurality of signal lines. There is a way to supply. However, since the number of signal lines increases, the number of image processing circuits provided outside the TFT array substrate connected to these signal lines also increases. Therefore, since the external circuit becomes complicated, the size of the liquid crystal display device cannot be reduced.

Accordingly, the present invention has been made in view of the above-mentioned conventional unsolved problems, and is capable of sufficiently writing an analog image signal even when the definition is increased, and is reliable even when the device is operated at a high speed. It is an object of the present invention to provide a method of driving an electro-optical device, which does not reduce the temperature, an electro-optical device and an electronic apparatus using the same.

[0016]

According to another aspect of the present invention, there is provided a method of driving an electro-optical device, comprising: a data line; a scanning line intersecting the data line; And an analog switch for controlling the supply of a data signal to the electro-optical device, comprising:
A control power supply potential for performing conduction control of the analog switch is switched according to a potential of the data signal.

According to the first aspect of the present invention, in the analog switch for controlling the supply of the data signal to the data line, the control power supply potential for controlling the conduction is switched according to the potential of the data signal. Can be Here, for example, when the analog switch is configured by an N-channel transistor or the like, the potential of the data signal applied to the source electrode and the conduction of the analog switch applied to the gate electrode are controlled. When the difference from the control power supply potential is small, the resistance of the analog switch is increased, so that the time for writing the data signal to the data line becomes longer. However, by switching the control power supply potential in accordance with the potential of the data signal and by switching the control power supply potential so that the voltage between the gate and the source of the transistor constituting the analog switch increases, the data signal is written to the data line. Ratio can be improved, and the contrast ratio is improved.

According to a second aspect of the present invention, in the method for driving an electro-optical device, after switching the control power supply potential, the potential of a control line for applying the control power supply potential to the analog switch is stabilized. Therefore, the conduction of the analog switch is switched. This claim 2
In the invention according to the invention, after the control power supply potential is switched, the control line for applying the control power supply potential to the analog switch is stabilized and then the analog switch is switched to be conductive. It is possible to prevent a data signal from being supplied to the data line in a state where noise or the like is present on the control power supply potential due to the switching.

In the driving method of an electro-optical device according to a third aspect, before supplying a data signal having a higher potential than the data line to the data line, the potential of the data line is increased in advance to the data line. It is characterized in that a precharge signal for causing the precharge signal is supplied. According to the third aspect of the present invention, before supplying a data signal having a higher potential than the current potential of the data line to the data line, the data line is precharged to raise the potential of the data line in advance. A signal is provided. Therefore, when supplying a data signal to the data line, the charging and discharging of the data line is performed within the range of the difference between the precharge potential and the potential of the data signal, and the time for writing the data signal to the data line is reduced. Is done.

According to a fourth aspect of the present invention, in the electro-optical device driving method, the analog switch is controlled to be off before the data line is supplied with a data signal having a higher potential than the data line. The off-control current flowing through the analog switch is used to raise the potential of the data line in advance. According to this invention, before the data line is supplied with a data signal having a higher potential than the current potential of the data line, the analog signal flows through the analog switch even though the analog switch is turned off. The potential of the data line is increased in advance by using the off control current. Therefore, when supplying a data signal to the data line, the charging and discharging of the data line
This is performed within the range of the difference between the precharge potential and the potential of the data signal, and the time for writing the data signal to the data line is reduced.

In the driving method of an electro-optical device according to a fifth aspect, the pre-charge signal is supplied to the data line before a data signal having a higher potential than the data line is supplied to the data line. Previously, when the analog switch is controlled to be turned off, the potential of the data line is increased in advance using an off-control current flowing through the analog switch.

According to the fifth aspect of the present invention, before the data line is supplied with a data signal having a higher potential than the current potential of the data line and before the precharge signal is supplied to the data line. The potential of the data line is raised in advance by using an off-control current flowing through the analog switch even though the analog switch is off-controlled. Therefore, when the precharge signal is supplied to the data line, the charge and discharge of the data line are performed within the range of the difference between the potential of the precharge signal and the potential of the data signal. , It is possible to reduce the amount of electric charge required for setting the potential.

According to a sixth aspect of the present invention, in the electro-optical device driving method, the precharge signal is supplied to the data line via a precharge analog switch, and the data line has a higher potential than the data line. Before the data signal is supplied, and before the precharge signal is supplied to the data line after the scanning signal is supplied to the scanning line, the analog switch is turned off while the analog switch is controlled to be off. The potential of the data line is raised in advance using at least one of the flowing off control current and the off control current flowing through the precharge analog switch in a state where the precharge analog switch is controlled to be off. It is characterized by that.

According to the present invention, the precharge signal is supplied to the data line via the precharge analog switch, and the data line is supplied with a data signal having a higher potential than the data line at this time. In this state, the analog switch for supplying the data signal to the data line is turned off before the scan signal is supplied to the scan line and before the precharge signal is supplied to the data line. Using at least one of an off control current flowing through the analog switch and an off control current flowing through the precharge analog switch when the precharge analog switch is controlled to be off, the data line is used. Is raised in advance.

Therefore, when the precharge signal is supplied to the data line, the charging and discharging of the data line is performed within the range of the difference between the potential of the precharge signal and the potential of the data signal. It is possible to reduce the amount of electric charge required for setting the potential of the precharge signal. The driving method of the electro-optical device according to claim 7, wherein before the data signal having a higher potential than the data line is supplied to the data line and the scanning signal is supplied to the scanning line, Until the precharge signal is supplied to the data line, the potential of the supply line for supplying the data signal to the data line via the analog switch is maintained at a higher potential than the data line. And In the invention according to claim 7, before the data signal having a higher potential than the data line at this time is supplied to the data line, and from the time when the scanning signal is supplied to the scanning line, the data line is supplied to the data line. Until the precharge signal is supplied, the potential of the supply line for supplying the data signal to the data line via the analog switch is kept higher than the potential of the data line.

Therefore, a current is supplied to the data line from the supply line for supplying the data signal via the analog switch, and the potential of the data line can be increased in advance. Further, in the driving method of the electro-optical device according to the present invention, a data signal is supplied to the data line via the analog switch before a data signal having a higher potential than the data line is supplied to the data line. A period in which the potential of the supply line is maintained at a higher potential than the data line.

According to the eighth aspect of the present invention, the data signal is applied to the data line via the analog switch for a predetermined period before the data signal having a higher potential than the current potential of the data line is supplied to the data line. The potential of the supply line for supplying is kept higher than the potential of the data line. Therefore,
Before a data signal having a higher potential than the data line is supplied to the data line, a current is supplied to the data line from a supply line side for supplying the data signal via an analog switch. It is possible to raise.

According to a ninth aspect of the present invention, in the method for driving an electro-optical device, the precharge signal is supplied to the data line via a precharge analog switch, and the data line has a higher potential than the data line. Before supplying the data signal, and before supplying the precharge signal to the data line after the supply of the scanning signal to the scanning line, a precharge signal for supplying the precharge signal to the data line is provided. A period in which the potential of the charge signal supply line is maintained at a higher potential than the data line is provided.

According to the ninth aspect of the present invention, the data line is not supplied with a data signal having a potential higher than the potential of the data line at this time, and after the supply of the scan signal to the scan line is started. Before the precharge signal is supplied to the line, the potential of the precharge signal supply line for supplying the precharge signal to the data line is maintained at a higher potential than the data line.

Therefore, before the data signal is supplied to the data line and before the precharge signal is supplied to the data line after the scan signal is supplied to the scan line, the precharge is performed via the precharge analog switch. Since a current is supplied to the data line from the signal supply line side, the potential of the data line can be increased in advance before the precharge signal is supplied.

According to a tenth aspect of the present invention, in the method for driving an electro-optical device, the precharge signal is supplied to the data line via a precharge analog switch, and the data line has a higher potential than the data line. A data signal is supplied to the data line via the analog switch before a data signal is supplied and before the scan signal is supplied to the scan line and before the precharge signal is supplied to the data line. A period in which at least one of the potential of the supply line for supplying the precharge signal to the data line and the potential of the supply line for supplying the precharge signal to the data line is kept higher than the potential of the data line. .

According to the tenth aspect of the present invention, the precharge signal is supplied to the data line via the precharge analog switch, and the data line is supplied with a data signal having a higher potential than the data line at this time. Before it is
A predetermined period from when the scan signal is supplied to the scan line to when the precharge signal is supplied to the data line,
The potential of a supply line for supplying a data signal to a data line via an analog switch or the potential of a supply line for supplying a precharge signal to a data line, or both,
The potential is maintained higher than the potential of the data line.

Therefore, a current is supplied from the supply line for supplying the data signal and the supply line for supplying the precharge signal to the data line via the analog switch or the precharge analog switch. Before the precharge signal is supplied to the data line, the potential of the data line can be increased in advance. Further, in the driving method of the electro-optical device according to claim 11, before supplying the data signal to the data line, a supply line for supplying a data signal to the data line via the analog switch includes: It is characterized in that a signal for preventing a current from flowing from the data line in the direction of the supply line is supplied.

According to the eleventh aspect of the present invention, before the data signal is supplied to the data line, a current is supplied from the data line to the supply line for supplying the data signal to the data line via the analog switch. Is supplied to prevent the flow of the data. Therefore, it is possible to prevent a current from flowing from the data line to the supply line.

Further, the electro-optical device according to claim 12 is
In an electro-optical device including a data line, a scanning line intersecting the data line, and an analog switch for controlling supply of a data signal to the data line, a control power supply potential used for controlling conduction of the analog switch. Power supply switching means for switching the power supply according to the potential of the data signal.

According to the twelfth aspect, the control power supply potential used for controlling the conduction of the analog switch is switched according to the potential of the data signal. Here, for example, when the analog switch is formed of an N-channel transistor or the like, the potential of the data signal applied to the source electrode and the control for conducting the analog switch applied to the gate electrode are controlled. When the difference from the power supply potential is small, the resistance of the analog switch becomes large, so that the time for writing the data signal to the data line becomes long. However, when writing a data signal to a data line,
Since the control power supply potential is switched, if the switching between the gate and the source of the transistor forming the analog switch is switched so as to increase, the writing rate of the data signal to the data line can be improved, and the contrast can be improved. The ratio improves.

The electro-optical device according to claim 13 is
Control means for controlling the conduction of the analog switch, the control means comprising: a control line for supplying the control power supply potential to the analog switch after the control power supply potential is switched; The analog switch is configured to perform conduction switching after a stabilization time required to stabilize the analog switch has elapsed.

In the invention according to the thirteenth aspect, after the control power supply potential is switched, a stable period elapses until the potential of the control line for supplying the control power supply potential to the analog switch becomes stable. Since the conduction of the analog switch is performed after the potential is stabilized, the data signal is applied to the data line in a state where noise or the like is placed on the control power supply potential due to the switching of the control power supply potential. Supply is avoided.

The electro-optical device according to claim 14 is
Before supplying a data signal having a higher potential than the data line to the data line, a precharge means for applying a precharge potential for increasing the potential of the data line is provided. 16. The electro-optical device according to claim 15, wherein the precharge means includes a precharge signal generation means for generating the precharge signal, a supply line for supplying the precharge signal to the data line, and the data line. A precharge analog switch interposed between lines, and precharge control means for controlling conduction of the precharge analog switch in accordance with the potential of the data signal.

According to the fourteenth and fifteenth aspects of the present invention, for example, a precharge signal generating means for generating a precharge signal and an intervening line between the supply line for supplying the precharge signal to the data line and the data line are provided. Precharge means is formed from the inserted precharge analog switch and precharge control means for controlling the precharge analog switch. Then, before supplying a data signal having a potential higher than the potential of the data line at this time to the data line, the potential of the data line is increased by the precharge means. Therefore, when a data signal is supplied to the data line, charging and discharging of the data line is performed within the range of the difference between the precharge potential and the potential of the data signal, and the potential of the data line is used as the potential of the data signal. Therefore, it is possible to reduce the amount of charge required.

Further, the electro-optical device according to claim 16 is:
Power supply switching means for precharging for switching a control power supply potential for performing conduction control of the analog switch for precharge in accordance with the potential of the precharge signal;
It is characterized by having. According to the sixteenth aspect, the control power supply potential for performing conduction control of the precharge analog switch is switched according to the potential of the precharge signal.

Therefore, when the precharge analog switch is composed of, for example, an N-channel transistor, the potential of the precharge signal applied to the source electrode and the precharge analog switch applied to the gate electrode are turned on. When the difference from the control power supply potential for controlling the precharge signal is small, the resistance of the precharge analog switch becomes large, so that the time for writing the precharge signal to the data line becomes long. By switching the control power supply potential so as to increase the difference between the control power supply potential and the control power supply potential, the read time can be reduced, and the precharge signal can be reliably written to the data line.

Further, the electro-optical device according to claim 17 is
It is characterized in that it is applied to an organic electroluminescence display device. The electro-optical device according to claim 18 is applied to a liquid crystal display device. Further, an electro-optical device according to a nineteenth aspect is provided with the electro-optical device according to any one of the twelfth to sixteenth aspects.

[0044]

Embodiments of the present invention will be described below with reference to the drawings. First, a first embodiment of the present invention will be described. In the first embodiment, the present invention is applied to a liquid crystal display device, and FIG. 1 is a block diagram showing a schematic configuration thereof.

This liquid crystal display device, as shown in FIG.
Signal source 100, image processing circuit 110, data line drive circuit timing control circuit 120, scan line drive circuit timing control circuit 130, power supply 75, power supply selection circuit 80, scan line drive circuit 10, data line drive circuit 20, liquid crystal A panel 150 is provided. The signal source 100 includes a ROM (Re
ad Only Memory), RAM (Random Access Memory),
A memory such as an optical disc device, a tuning circuit that tunes and outputs a television signal, and a clock generation circuit that controls synchronization of all circuits used. Display information such as an image signal in a predetermined format is transmitted to the image processing circuit 11.
Output to 0.

The image processing circuit 110 includes various known processing circuits such as an amplification / polarity inversion circuit, a phase expansion circuit, a rotation circuit, a gamma correction circuit, and a clamp circuit, and also receives display information from the signal source 100. At the same time, an analog image signal in a predetermined format is generated and output to the data line drive circuit 20. From the display information, well-known timing information for selecting a scanning line and a data line of the liquid crystal panel 150 is generated. It is generated and output to the data line drive circuit timing control circuit 120. In addition,
In this liquid crystal display device, display control is performed using a so-called 1H inversion driving method, and the image processing circuit 110 generates an analog image signal Vid that is AC-inverted every horizontal scanning period based on the image signal center potential Vc. I do.

The data line driving circuit timing control circuit 120 is a horizontal line for sequentially selecting the data lines of the liquid crystal panel 150 every one horizontal scanning period based on the timing information inputted from the image processing circuit 110. A start signal HST and a horizontal clock signal HCK are generated and output to the data line drive circuit 20. At this time, the horizontal start signal HST is from the detection of the start of one horizontal scanning of the analog image signal, the waiting time T ₅ which is set in advance
Is output at the time when has elapsed.

The data line driving circuit timing control circuit 120 generates scanning line timing information for sequentially selecting the scanning lines in synchronization with the driving state of the data lines of the liquid crystal panel 150, and generates the scanning line driving circuit. Output to the timing control circuit 130. The timing control circuit 130 for the scanning line driving circuit, based on the scanning line timing information from the timing control circuit 120 for the data line driving circuit, synchronizes the driving of the data lines of the liquid crystal panel 150 with the scanning lines of the liquid crystal panel 150. , And a vertical clock signal VCK and a vertical start signal VST for sequentially selecting the same, and output them to the scanning line drive circuit 10.

[0049] The power supply 75, and the low power supply voltage and a positive power supply potential Vdd _L and the negative power supply potential Vss _L, the Vdd
High only potential ΔV than _L a positive power supply potential Vdd _H and the Vss _L negative power source potential higher by a potential ΔV than Vss
And a high power supply voltage of _H. These two power supply voltages are connected to a power supply selection circuit 80.
It is supplied to.

The power supply selection circuit 80 outputs one of the two sets of power supply voltages to the data line drive circuit 20 and the data line drive circuit timing control circuit 120. The low power supply voltage and the high power supply voltage are alternately switched and output in synchronization with the vertical clock signal VCK from the drive circuit timing control circuit 130. At this time, when the analog image signal Vid, which is an AC signal, is at a positive electrode that is higher than the image signal central potential Vc, a high power supply voltage is supplied, and is at a negative electrode that is lower than the image signal central potential Vc. Sometimes, a low power supply voltage is supplied.

A low power supply voltage is supplied from the power supply 75 to each unit except the data line drive circuit 20 and the data line drive circuit timing control circuit 120. FIG.
Shows a specific circuit configuration of the data line driving circuit 20 and the liquid crystal panel 150. The scanning line driving circuit 10, the data line driving circuit 20, and the liquid crystal panel 150
Are integrally formed on the same insulating substrate. A high power supply voltage and a low power supply voltage are selectively supplied from the power supply selection circuit 80 to the data line drive circuit 20.

Since these units have the same functional configuration as the conventional scanning line driving circuit 10, data line driving circuit 20, and image display unit 60 shown in FIG. 11, detailed description will be omitted. In the data line driving circuit 20, the shift register 50 receives the input horizontal clock signal HCK.
Based on the horizontal start signal HST and a horizontal start signal HST, a data line selection signal ΦHn for sequentially turning on each analog switch ASWn included in the sampling circuit 70 is generated and supplied to the analog switch ASWn. In the sampling circuit 70, when the analog switch ASWn is turned on, the positive power supply potential Vddx (x = H or L) supplied to the data line driving circuit 20 is obtained. When the analog switch ASWn is turned off, the negative power supply potential Vssx ( x = H or L) is generated. The analog switch ASWn is composed of, for example, an N-channel TFT, and is controlled according to the data line selection signal ΦHn.

At the timing when the shift register 50 receives the horizontal start signal HST, each analog switch ASWn is synchronized with the horizontal clock signal HST.
, The analog switches ASWn are sequentially driven in a dot-sequential manner and sequentially turned on, and the analog image signal Vid of the signal line 30 is sequentially supplied to the data line φDn corresponding to the analog switch ASWn. It is supposed to be.

Further, the scanning line drive circuit 10 controls an analog switch (not shown) by a vertical clock signal VCK and a vertical start signal V, like the data line drive circuit 20, for example.
The scanning line ΦVm to be driven is switched sequentially according to ST. Next, the operation of the first embodiment will be described with reference to FIG. FIG. 3 is a timing chart focusing on the analog switch ASW1 that is controlled to be conductive at first after the start of one horizontal scan of the image display unit 60 shown in FIG. The potential Vp of a pixel electrode (not shown) connected to the pixel TFT 65a connected to the connected data line φD1 and the scanning line, eg, φG1, the potential Vg of the gate electrode of the pixel TFT 65a, and the data line drive circuit 20. 6 is a timing chart showing the correspondence between the analog image signal Vid and the potential. Vc is the image signal center potential of the analog image signal, and Vcom is the pixel TFT 6.
5a is a potential of a not-shown counter electrode facing a not-shown pixel electrode connected to 5a. In addition, similar to the above-mentioned conventional,
T ₁ is a selection period of the gate of the pixel TFT 65 a, that is,
The potential of the scanning line selection signal φVm, that is, the pixel TFT 65
period in which the potential Vg of the gate electrode of a is the potential for controlling the pixel TFT65a the conductive state, T ₂ is the non-selection period, the sum of T ₁ and T ₂ is equivalent to one field.

(B) shows the potential Vdl of the data line φD1 of the image display unit 60 and the potential Vgs of the gate electrode of the analog switch ASW1, that is, the data line selection signal ΦHn.
6 is a timing chart showing the correspondence between the potential of the analog image signal Vid and the potential of the analog image signal Vid. Incidentally, Vc is the image signal center voltage, Vcom is the counter electrode corresponding to the pixel TFT65a potential, T ₃ is the selection period of the analog switch ASW1, T ₄ is the non-selection period, the sum of T ₃ and T ₄ This is one horizontal scanning period. Further, T starting point of ₅ 1 horizontal scanning, that is, from the scanning line φG1 is selected, the analog switches AS is driven first in one horizontal scanning period
This shows the waiting time until the sampling of W1 is started.

(C) shows the positive power supply potential Vddx and the negative power supply potential Vssx supplied to the data line drive circuit 20.
Is shown. As shown in FIG. 3, the data line driving circuit 20 is supplied with an analog image signal Vid that is AC-inverted every horizontal scanning period.
With the positive value image signal central potential Vc as the center, the potential changes to a positive electrode having a higher potential than the image signal central potential Vc and a negative electrode having a lower potential than the image signal central potential Vc within a positive value range. In the timing control circuit 130 for the scanning line driving circuit, the timing control circuit 1 for the data line driving circuit is used.
A vertical start signal VST is generated based on the start point of one field based on the scanning line timing information from 20, and a vertical clock signal VCK and a vertical clock signal VCK are output to the scanning line driving circuit 10. As a result, the scanning line driving circuit 10 sequentially switches the scanning lines φGm in synchronization with the vertical clock signal VCK, and sequentially supplies a potential that can conduct the pixel TFT 65 to each scanning line φGm. As a result, as shown in FIG.
Only during a predetermined time period T ₁ of the in field, the scanning line selection signal ΦVm of the positive power supply potential Vddy is supplied to the gate electrode, the period of the T _1, the pixel transistor TFT65a
Means to write the potential of the data line φD1 to the pixel electrode.

On the other hand, the data line drive circuit timing control circuit 120 generates scanning line timing information based on the timing information from the image processing circuit 110, and outputs this to the scanning line drive circuit timing control circuit 130. with, 1 to detect the start of the horizontal scanning, at the timing of elapse of a predetermined waiting time T ₅ from this point, and outputs the horizontal start signal HST.

In response to this, the scanning line driving circuit 10
The analog switches ASWn are sequentially switched in synchronization with the horizontal clock signal HCK at the timing of the horizontal start signal HST.
Is written to. Therefore, the pixel TFT 65 connected to the scanning line φGm selected by the scanning line selection signal φVm writes the potential of the data line φDn to the pixel electrode, so that the potential of the analog image signal Vid is written to the pixel electrode. become.

[0059] For example, as shown in FIG. 3 (b), the time t ₁
1 horizontal scanning period of time t ₄ from the positive electrode of the analog image signals Vid, one horizontal scanning period of time t ₇ from the time point t _4, when it is assumed that the negative analog image signal Vid is being output, the power supply selection circuit At 80, the high power supply voltage is supplied when the analog image signal Vid is positive, and the low power supply voltage is supplied when the analog image signal Vid is negative.
As shown in FIG. 3C, the high power supply voltages Vdd _H and Vss _H are supplied to the 0 and data line drive circuit timing control circuit 120 from time t ₁ to t ₄ , and from time t _4. between t _7, the low power supply voltage Vdd _L and Vss _L
Is supplied.

Then, when one horizontal scanning period starts at time t ₁ , at this time, the analog image signal Vid has a positive polarity, and the data is generated by the leak current (off control current) of the analog switch ASW 1 from the signal line 30 side. Line φD1
Of the data line φDn similarly rises. Then, the data line drive circuit for the timing control circuit 120, because outputs the horizontal start signal HST in time t ₂ the waiting time T ₅ has elapsed, the t
_From the point of time ₂ , analog switches ASW1, ASW2, ...
The analog switches ASWn are switched in the order of..., And first, the analog switch ASW1 is turned on. As a result, the analog image signal Vid of the signal line 30 is supplied to the data line φD1 via the analog switch ASW1, and the potential Vd of the data line φD1 as shown in FIG.
1 matches the analog image signal Vid. Then, advance at a set time point t ₃ when the selection period T ₃ of the analog switch has passed the, down the analog switch ASW1 falling potential Vgs of the gate electrode of the analog switch ASW1 the falls data line selection signal ΦHn is rendered non-conductive The potential Vdl of the data line φD1 is reduced by an amount corresponding to the breakthrough voltage of the analog switch ASW1 caused by the switching of the analog switch ASW1 to the non-conductive state, and this potential is maintained.

At this time, when, for example, the scanning line φG1 is selected by the scanning line driving circuit 10, the pixel TFT 65a connected to the scanning line φG1 and the data line φD1 is in a conductive state, and the source electrode is newly written. Since the potential Vdl of the data line φD1 is applied, the potential of the data line φD1, that is, the potential of the analog image signal Vid is applied to a pixel electrode (not shown), and the analog image signal Vid is written to the pixel electrode. become.

[0062] Then, at time t _3, the writing of the analog image signal Vid to the data line φD1 is completed, although not shown, the following analog switches ASW2 analog switch ASW1 is selected, whereby the data line φD
2 coincides with the analog image signal potential Vid. Thereafter, by sequentially switching the analog switches ASWn, the potential of the data line φDn sequentially becomes the potential of the analog image signal Vid.

Then, when the next one horizontal scan starts at time t ₄ , the negative analog image signal Vid is supplied this time. Vertical start signal VS
At the timing of T, the power supply voltage supplied to the data line drive circuit 20 and the data line drive timing control circuit 120 is switched to the low power supply voltage (Vdd _L , Vss _L ).

[0064] Then, similarly to the above, at the time t ₅ the waiting time T ₅ has elapsed from the time t _4, the analog switches AS
W1 is controlled to be conductive, and the analog image signal Vid is written to the data line φD1. In this case, in one horizontal scanning period t ₇ from the time point t _4, since the negative analog image signal Vid is supplied, the analog switch ASW1 is turned at t _4, the potential of the data line φD1 Figure 3 ( The analog image signal Vid is reduced as shown in b).
Matches.

Then, at the time point t ₆ when the selection period T ₃ has elapsed.
When the analog switch ASW1 is turned off, the potential Vdl of the data line φD1 decreases by the amount of the punch-through voltage, and this potential is maintained. At this time, since the pixel TFT 65 connected to the driven scanning line φGm is in a conductive state, the data line φD1 and the scanning line φGm
In the pixel TFT 65 connected to the intersection with the pixel TFT 65, the analog image signal Vid is written to the pixel electrode via the pixel TFT 65.

Here, the analog switch ASWn is TF
T, and a drain current flows according to the voltage between the gate and the source.
The source electrode of SWn is connected to the signal line 30 to which the potential of the analog image signal Vid is applied, and the potential of the analog image signal Vid changes. Therefore, even when an ON potential for turning on the analog switch ASWn and an OFF potential for turning it off are applied to the gate electrode, the potential on the source electrode side, that is, the analog image signal TFT by the potential of Vid
Since the voltage between the gate and the source of the TFT changes, the resistance of the TFT changes.

Therefore, for example, the analog switch AS
The ON voltage of the TFT constituting Wn is represented by v_ON(For example, 15
V), the off-state voltage is v_OFF (For example, 0 V), and
The potential of the analog image signal Vid is represented by v_idL (Eg 2-5
V), the potential of the positive analog image signal Vid is represented by v_idH 
(For example, 9 to 12 V), and these are v_OFF <V_idL 
<V _idH <V_ONAnd the gate electrode
OFF voltage v_OFF When applying
There is no problem because the inter-segment voltage becomes a negative value.
ON voltage v_ONIs applied to the signal line 30
The potential v of the positive electrode as the image signal Vid_idH Is applied
The potential v of the negative analog image signal Vid.
_idL Gate and saw compared to when
Since the voltage between the electrodes becomes small, the resistance of the TFT increases.
The analog image signal V of the signal line 30 is connected to the data line φDn.
It takes time to write the potential of id.

However, as shown in FIG.
In the state where the positive analog image signal Vid is applied to the signal line 30, the high power supply voltage is supplied to the data line driving circuit 20 and the data line driving circuit timing control circuit 120. The data line selection signal ΦHn supplied to ASWn, that is, the potential of the gate electrode becomes Vdd _H higher than Vdd _L. Therefore, the voltage between the gate and the source is ΔV (= Vd
d _H -Vdd _L) only increases, since the resistance of the correspondingly TFT is reduced, the potential of the data line of the signal line 30 FaiDn
Easier to write to. Thus, for example, at time t ₂
To convert the analog image signal Vid of the signal line 30 to the data line φ.
When writing to D1, since it is possible to secure a sufficient gate and source voltages, in the selection period T ₃ of the analog switches ASWn, it can be written.

Conversely, at time t_Five The negative electrode of the signal line 30 is
When writing the analog image signal Vid,
Data line drive circuit 20 and timing for data line drive circuit
Since a low power supply voltage is supplied to the switching control circuit 120,
Supplied from analog register ASWn
Data line selection signal ΦHn is Vdd_H V lower than
dd_L In this case, the analog image signal Vid is
Sufficient gate and source voltage is secured because it is a negative electrode
And the selection period T of the analog switch ASWn _Three Written in
Injection can be performed. And time t₆ With data
When the line selection signal ΦHn falls, the negative power supply
Place is Vss_L Gate and saw
Voltage between the switches is sufficient and the analog switch ASWn
No leakage current occurs and the potential of the data line φDn
Is retained.

As described above, a rectangular wave as shown in FIG. 3C is applied to the data line drive circuit 20 and the data line drive circuit timing control circuit. That is, the positive power supply potential Vddx Vdd _L and Vdd _H (Vdd _L <Vdd
_H), Vss _L and Vss _H as negative power source potential Vssx
Two potential of (Vss _L <Vss _H) is applied alternately for each horizontal scanning period. Thus, during the scanning period in which the analog image signal Vid is positive, T
_In the period of ₃ , Vdd _H is applied to the gate electrode of the analog switch ASWn, that is, while the voltage between the gate and the source is reduced because the positive analog image signal Vid is supplied, the gate electrode of the analog switch ASWn is because the potential to increase by "Vdd _H -Vdd _L", it is possible to secure sufficient oN current, it is possible to ensure the write to the data line φDn analog image signals Vid.

Therefore, even if the analog switch selection period T ₃ is reduced with higher definition, sufficient writing of the analog image signal Vid to the data line φDn can be performed, and a high contrast ratio and uniformity without unevenness can be achieved. Image display. At this time, during the scanning period in which the analog image signal Vid is positive, the analog switch A
During the non-selection period T ₄ is the SWn, the analog switches AS
A high negative power supply potential Vss _H is applied to the gate electrode of Wn. Therefore, the voltage range applied to the analog switch ASWn is the voltage range of Vdd _H from Vss _H. Therefore, the positive power supply potential Vdd becomes “Vdd _H −Vdd”.
_Since the negative power supply potential Vss increases by “Vss _H −Vss _L ” in synchronization with the period that increases by “ _L ”, the power supply voltage applied to the TFT and the data line drive circuit 20 constituting the analog switch ASWn becomes “Vdd _H ”. If the value of “−Vdd _L ” is equal to “Vss _H −Vss _L ”, it is equivalent to a state where the power supply voltage is not changed.

Here, generally, the reliability of a TFT largely depends on the power supply voltage of a circuit, and the reliability deteriorates rapidly when the power supply voltage is increased. In this embodiment, although the positive and negative power supply potentials change as described above, the power supply voltage applied to the TFT is not changed, so that the write performance is improved and the reliability is also ensured. Can be.

In general, when the power supply of the circuit is swung by a rectangular wave, noise is input to the power supply for a while after the fluctuation of the power supply. In the case of the data line driving circuit 20 of the liquid crystal display device, it depends on the number of pixels and the screen size, but about 1 μsec.
c), the influence of noise may remain. However, after switching the power for each horizontal scanning period as shown in FIG. 3, the analog switch is first sampled after one horizontal scanning started after securing the T ₅ standby time ASWn1
Because of that so as to start sampling, a T ₅ this waiting time, is set to be sufficiently longer than the period that may remain the influence of the above-mentioned noise, the influence of noise on the analog image signal is sampled There is no. As a result, an image displayed on the screen is not affected by noise, and a uniform and good image can be realized.

The scanning line driving circuit 10 and the data line driving circuit
A peripheral drive circuit such as the circuit 20 is built on an insulating substrate.
To reduce the size, weight and cost of liquid crystal displays.
Can be planned. Note that, in the first embodiment,
The analog switch by shaking the power supply voltage.
The voltage between the gate and the source of ASWn is set to “Vdd_H -Vd
d_L ”Will be explained.
However, this means that "Vdd _H -Vdd_L It's a minute
Even if the power supply potential is lowered,
To ensure the same write performance as before
And the data line drive circuit 20 and the analog switch AS
Dramatically improve the reliability of the TFTs constituting Wn
Can be.

In particular, the reliability of an active matrix type liquid crystal display device having a built-in peripheral drive circuit is the most strict. The improvement also improves the reliability of the liquid crystal display device itself. Further, in the first embodiment, the improvement of the writing and the improvement of the reliability have been described separately, but it is also possible to achieve both. That is, by optimizing the power supply voltage, it is possible to lower the power supply voltage of the data line drive circuit 20 while increasing the voltage between the gate and the source of the analog switch ASWn.

In the first embodiment, “V
dd_H -Vdd_L Is "Vss _H -Vss_L Same as
Need not be the same, but as independent design conditions
Can be optimized. Also equivalent to conventional driving method
When trying to obtain the writing performance to the
The power supply voltage applied to the data line driving circuit 20 is the same as the conventional driving voltage.
Method, the reliability of the data drive circuit 20 can be reduced.
Nature can be secured. In addition, conventional equipment
Power supply selection circuit to switch the power supply to each circuit.
Road 80 can be easily realized because it only needs to be newly added.
can do. Note that the power supply selection circuit 80 turns off the power supply.
Timing control for data line drive circuit
The circuit 120 corresponds to the control means, and the power supply selection circuit 80
The shift register 50 of the data line drive circuit 20 has positive and negative
Power supply for supplying the power supply potentials Vddx and Vssx of the
Supplies the control power supply potential to the analog switch
Corresponding to the control line.

Next, a second embodiment of the present invention will be described. The second embodiment is different from the first embodiment in that the potential of the precharge signal is applied to all the data lines φDn in advance every horizontal scanning period when the polarity of the analog image signal Vid changes. As shown in FIG. 4, a precharge signal drive circuit 40 and a precharge signal drive circuit timing control circuit 140 are added to the configuration diagram of the liquid crystal display device shown in FIG.

The precharge signal driving circuit 40 is formed integrally with the image display section 60, the data line driving circuit 20, and the scanning line driving circuit 10 on the same insulating substrate.
A precharge signal switch PSW1 for controlling conduction between a precharge signal line 90 to which a precharge signal NRS is supplied from the precharge signal drive circuit timing control circuit 140 and each data line φDn of the image display unit 60. , PSW2... PSWN are provided, and the precharge signal switches PSWn (n = 1 to N)
Is a timing control circuit 1 for a precharge signal drive circuit.
Opening / closing is controlled by a precharge start signal NRG from 40.

The precharge signal drive circuit timing control circuit 140 outputs a precharge start signal NRG every one horizontal scanning period. At this time, predetermined at the time as the precharge start signal NRG, a predetermined waiting time T ₆ from the start of synchronization with one horizontal scanning start timing of one horizontal scanning from the data line drive circuit for the timing control circuit 120 has elapsed positive power supply potential Vdd of during the precharge period T _7, the power supply voltage supplied from the power supply selection circuit 80
outputs x, while excluding the precharge period T ₇ outputs a negative power supply potential Vssx supply voltage.

The precharge signal switch PSWn
Is made conductive, for example, when an electric potential equal to or higher than a positive power supply potential Vdd _L of a low power supply voltage is applied to its gate electrode, and a potential equal to or lower than the low power supply potential Vss _L of a high power supply voltage is applied to the gate electrode. When it is done, it becomes non-conductive. The precharge period T _7, said a sufficient time to write the potential of the precharge signal NRS to the data line FaiDn, also said waiting time T ₆ from the beginning of one horizontal scan, one horizontal scanning start After that, the precharge signal NRS to the data line φDn before the sampling start time of the analog switch ASW1 which is first controlled to be conductive.
And writing is complete, and, after the precharge period T ₇ has passed, capable of ensuring a time period to allow a displacement of the sampling start time of the analog switches ASW1 initiated after first conduction control of the horizontal scanning Set to value. Further, the precharge signal drive circuit timing control circuit 140 inputs a precharge power supply voltage for generating a precharge signal from the power supply 75, for example, a MOSFE.
In the constant voltage circuit composed of T and the like, the image center potential V
The positive side precharge signal which is a potential about the middle value between c and the potential of the positive analog image signal Vid, and the potential about the middle value between the image center potential Vc and the potential which the negative analog image signal Vid can take. And a negative side precharge signal. Then, the precharge start signal N
At the rise of RG, the positive side precharge signal and the negative side precharge signal are switched. That is, when a high power supply voltage is supplied to the data line driving circuit 20 or the like at the rise of the precharge start signal NRG, a positive side precharge signal is supplied, and conversely, a low power supply voltage is supplied. If so, a negative precharge signal is supplied.

The power supply selection circuit 80 is provided with the first
The vertical start signal VST from the scanning line driving circuit timing control circuit 130 shown in FIG.
At this timing, a high power supply voltage or a low power supply voltage is supplied to the data line drive circuit 20, the precharge signal drive circuit 40, and the precharge signal drive circuit timing control circuit 140. The other circuits include
A low power supply voltage is supplied from the power supply 75.

Next, the operation of the second embodiment will be described with reference to the timing chart shown in FIG. 5A shows the rising and falling timings of the precharge start signal NRG from the precharge signal drive circuit 40, FIG. 5B shows the analog image signal Vid applied to the signal line 30, and FIG. , Precharge signal NR
The potential of S and (d) are the precharge signal drive circuit 40 and the precharge signal drive circuit timing control circuit 14.
0 positive power supply voltage Vddx and negative power supply voltage Vs
sx and (e) are the potential of the analog image signal Vid applied to the signal line 30 and connected to the analog switch ASW1 of the image display unit 60 shown in FIG. Potential Vd of data line φD1
6 is a timing chart showing 1, a potential of a precharge signal NRS, a potential of a precharge start signal NRG, and a potential Vgs of a data line selection signal ΦHn applied to a gate electrode of a TFT constituting the analog switch ASW1. Moreover, Vc is the image signal center voltage, Vcom is the potential of the counter electrode, T ₃ is the selection period of the analog switch ASWn, T ₄ is the non-selection period, T ₅ are scanning lines every horizontal scanning period is selected This is a period from when the sampling of the analog switch ASWn in the data line driving circuit 20 is started.

In the second embodiment, as in the first embodiment, the data line drive circuit 20, the data line drive circuit timing control circuit 120, the precharge signal drive circuit 40, and the precharge signal drive A rectangular wave is applied from the power supply selection circuit 80 to the circuit timing control circuit 140 as the positive power supply potential Vddx and the negative power supply potential Vssx. That is, the positive power supply potential Vddx, Vdd _L or Vdd _H (Vdd
_L <Vdd _H), provided to alternately two potentials for each horizontal scanning period of the negative power source potential Vssx as Vss _L or _{Vss H (Vss L <Vss H} ). In the power supply selection circuit 80, the switching between the high power supply voltage and the low power supply voltage is performed in synchronization with the vertical start signal VST from the scanning line driving circuit 10, as in the first embodiment.
A high power supply voltage is supplied when the analog image signal Vid has a positive polarity.

The power supply 75 according to the second embodiment
Outputs a precharge power supply voltage for generating a precharge signal, together with the high power supply voltage and the low power supply voltage, to a timing control circuit 140 for a precharge signal drive circuit.
Then, the precharge signal NRS on the positive electrode side and the negative electrode side is generated, and the positive and negative polarities of the precharge signal NRS are switched and output to the precharge signal drive circuit 40 at the rising timing of the precharge start signal NRG.

Then, similarly to the first embodiment,
In the scanning line driving circuit 10, the scanning line φGm is synchronized with the vertical clock signal VCK at the timing of the vertical start signal VST from the scanning line driving circuit timing control circuit 130.
Are sequentially switched. Similarly the data line drive circuit for the timing control circuit 120 also, at a timing when the standby time T ₅ has elapsed from the start of one horizontal scanning, the horizontal start signal HS
T, and at this timing, the scanning line driving circuit 10
The analog switch ASWn is sequentially switched, and the analog image signal Vid of the signal line 30 is written to the data line φDn via the turned-on analog switch ASWn. At this time, the pixel T connected to the selected scanning line φGm
Since a predetermined voltage is applied to the gate electrode of the FT 65, the pixel TFT 65 becomes conductive, and the analog image signal Vid is written to the pixel electrode of the image TFT 65.

At this time, as shown in FIG. 5, one horizontal scanning period from time t ₁₁ to time t ₁₆ is a positive analog image signal Vid, and one horizontal scanning period from time t ₁₆ to time t ₂₁ is
Assuming that the negative analog image signal Vid is output, the data line drive circuit 20, the data line drive circuit timing control circuit 120, and the precharge signal drive circuit 4
0, timing control circuit 1 for precharge signal drive circuit
The 40, the power supply selection circuit 80, as shown in FIG. 5 (d), between the time t ₁₁ of t _16, the high power supply voltage Vdd _H and Vss _H is supplied between the time t ₁₆ of t ₂₁ Are supplied with low power supply voltages Vdd _L and Vss _L. Further, the precharge signal drive circuit 40 includes a precharge signal NR
S is supplied while being switched between the positive electrode side and the negative electrode side in synchronization with the precharge start signal NRG. by this,
The rising edge of the precharge start signal NRG time t _12, since the high power supply voltage is supplied as a power supply voltage, the precharge signal of positive polarity is supplied, at the rising edge of the precharge start signal NRG time t ₁₇ is , A negative precharge signal is supplied.

[0087] Then, at time t _11, when one horizontal scan starts, during the time t ₁₁ of t _12, the analog switch ASW
Although the data line selection signal ΦH1 to 1 is a negative power supply potential Vss _H, this time, the analog image signal Vid applied to the signal line 30 is positive, also the data lines φD1 is
Since the voltage is the analog image signal voltage Vid on the negative electrode side, a leak current flows through the analog switch ASW1, whereby the potential Vdl of the data line φD1 gradually increases. Note that a leak current similarly flows through the other analog switches ASWn, and the potential of the data line φDn gradually increases.

[0088] Then, at time t _12, when the waiting time T ₆ from the start of one horizontal scanning has elapsed, it rises precharge start signal NRG. At this time, since the high power supply voltage is supplied to the precharge signal drive circuit 40, the precharge start signal NRG is applied to each of the gate electrodes of the TFTs constituting the precharge signal switch PSWn.
, The positive power supply potential Vdd _H is applied.

As a result, all the precharge signal switches PSWn are turned on. At this time, the positive precharge signal is supplied as the precharge signal NRS.
Is supplied to all the data lines φDn via the precharge signal switch PSWn, and the potentials of all the data lines φDn rise to the positive side precharge signal voltage NRS.

[0090] When the precharge start signal NRG falls at the time t ₁₃ to a predetermined precharge period T ₇ has elapsed, the precharge signal switch PSWn the punch-through voltage in this case becomes a non-conductive state, the data line φD
The potential of n slightly decreases and maintains its value. And 1
Time t the waiting time T ₅ from the start of the horizontal scan has passed
_14, since the timing control circuit 120 for the data line driving circuit outputs the horizontal start signal HST, the time t ₁₄
, The analog switches ASWn are switched in the order of the analog switches ASW1, ASW2,..., And the analog switch ASW1 is first turned on. Accordingly, the analog image signal Vid of the signal line 30 is supplied to the data line φD1 via the analog switch ASW1, and at this time, the potential of the data line φD1 is already the potential of the positive side precharge signal. Switch A
In SW1 selection period T _3, rises from the potential of the precharge signal NRS of positive polarity to the analog image signal Vid.

When the selection period T ₃ elapses at time t ₁₅ , the analog switch ASW 1 is controlled to be in a non-conductive state, and the potential of the data line φD 1 slightly decreases due to the punch-through voltage, and this potential is maintained. . Then, similarly to the first embodiment, the potential of the data line φD1, that is, the analog image signal Vid is supplied to a pixel electrode (not shown), and the analog image signal Vid is applied to the pixel electrode.
Is written.

[0092] Then, at time t _15, the writing of the analog image signal Vid to the data line φD1 is completed, although not shown, the following analog switches ASW2 analog switch ASW1 is selected. At this time, the data line φD
The 2, precharge signal on the positive electrode side at a time point t ₁₂ N
Since RS is supplied, by writing an analog image signal Vid at time t _15, the data line .phi.D2,
From the potential of the precharge signal NRS, the analog image signal V
It will rise to the potential of id. Thereafter, by sequentially switching the analog switches ASWn, the potential of the data line φDn sequentially increases from the potential of the precharge signal NRS to the potential of the analog image signal Vid.

Then, when the next one horizontal scan starts at time t ₁₆ , the negative analog image signal Vid is supplied this time, so that the power supply selection circuit 80 receives the signal from the timing control circuit 130 for the scanning line drive circuit. Vertical start signal VS
At the timing of T, the power supplied to the data line drive circuit 20, the data line drive timing control circuit 120, the precharge signal drive circuit 40, and the precharge signal drive circuit timing control circuit 140 is changed to a low power supply voltage (Vdd _L ,
Vss _L ).

[0094] Then, until the waiting time T ₆ from the time t ₁₆ has elapsed, this state is maintained, elapsed waiting period T ₆ at time t ₁₇ when the rise of the precharge start signal NRG, time t ₁₇ , The precharge signal NRS supplied from the power supply selection circuit 80 is switched to the negative precharge signal. Therefore, when each precharge signal switch PSWn is turned on, the potential of each data line φDn becomes the negative precharge signal NRS. The potential of Time Then, when the precharge start signal NRG falls at the time t ₁₈ to precharge period T ₇ has elapsed, the data line φDn by penetration voltage is slightly decreased, the waiting time elapses T ₅ from the start of one horizontal scanning in t _19, the analog switch ASW1 is controlled to a conducting state, the data line φD1
Is equal to the analog image signal Vid from the potential of the negative precharge signal NRS. Then, the analog switch A at time t ₂₀ a selection period T ₃ of the analog switch has elapsed
When SW1 is turned off, the potential of data line φD1 is slightly reduced due to the punch-through voltage, and this state is maintained.

[0095] Then, at time t _21, when the analog image signal Vid starts next horizontal scan is switched to the potential of the positive electrode side, the potential of each data line φDn with the fact that the leakage current generated in the analog switch ASWn rise After that,
It will be repeated as described above. Therefore, in this case, the same operation and effect as those of the first embodiment can be obtained, and in the second embodiment, all the analog image signals Vid are supplied in advance to the data line φDn before being supplied. A precharge signal NRS corresponding to the polarity of the analog image signal Vid to be written next is supplied to the data line φDn, and the potential of the data line φDn is changed to the potential of the precharge signal NRS. Accordingly, from the state where the analog image signal Vid in the immediately preceding horizontal scanning period is written to the data line φDn,
When the precharge voltage NRS is supplied to the data line φDn, the potential Vdl of each data line φDn changes to the opposite polarity side to the analog image signal Vid in the previous horizontal scanning period, and the analog switch ASWn is selected from this state. Then, the analog image signal Vid is applied to the data line φDn.
Is written. Therefore, data line φD
When the analog image signal Vid is written to n,
Since the potential Vdl of the data line φDn has already changed to the polarity side of the analog image signal Vid to be written next,
The change in the charge amount is smaller than when the analog image signal Vid of the opposite polarity is written to the data line φDn in the state of the analog image signal Vid in the previous horizontal scanning period.

Thus, by resetting the potentials of all the data lines φDn to the potential of the precharge signal NRS and then writing the potential of the analog image signal Vid, new data is written to the previously written pixel electrode. Can be suppressed, and vertical crosstalk, which is a problem in image quality, can be suppressed.

Further, charging and discharging when sampling the analog image signal Vid can be performed only by the difference between the potential of the precharge signal NRS and the potential of the analog image signal Vid. If the potential of the signal Vid is set near the average value, the time for writing the analog image signal Vid to the data line φDn can be reduced. Therefore, even if the sampling frequency increases and the selection time of the analog switch ASWn decreases as the resolution of the image increases, appropriate writing of the analog image signal Vid to the data line φDn can be more reliably ensured. , The contrast ratio can be improved.

The precharge signal drive circuit 40 and the precharge signal drive circuit timing control circuit 140
By switching the power supply voltage to the high power supply voltage and the low power supply voltage, the voltage of the precharge start signal NRG also becomes
Since the switching is performed in accordance with the polarity of the analog image signal Vid, the precharge signal NRS can be reliably written to each data line φDn.

In one horizontal scanning period in which the potential Vid of the analog image signal is positive, the potential of the analog image signal Vid is maintained at the potential of the image signal until the potential of the data line φDn is fixed at the potential of the precharge signal NRS. Since the potential is kept higher than the central potential Vc, the potential of the signal line 30 is supplied to the data line φDn as a leak current of the analog switch ASWn, and the potential of all the data lines φDn Since the potential approaches the potential, the amount of charge required to rewrite the potential of the data line φDn with the potential of the precharge signal NRS can be reduced. Therefore, before the potential of the data line φDn is rewritten with the potential of the precharge signal NRS, the potential of the signal line 30 is changed by the leakage current to the potential of the data line φDn.
n, the voltage between the gate and the source of the analog switch ASWn at the time when the potential of the data line φDn starts to be fixed at the precharge potential NRS can be reduced. In general, the analog switch ASWn, that is, the reliability of the TFT is improved by reducing the voltage between the gate and the source.
Reliability can be improved.

Note that, in the second embodiment,
The case where the precharge voltage is supplied to all the data lines φDn at the same time has been described. However, the present invention is not limited to this. It may be. In addition,
The precharge signal switch PSWn corresponds to a precharge analog switch, and the process of generating a precharge signal NRS in the precharge signal drive circuit timing control circuit 140 corresponds to precharge signal generation means. In the circuit timing control circuit 140, the precharge signal switch PSW
n corresponds to the precharge control means, the precharge signal switch PSWn and the precharge signal drive timing control circuit 140 correspond to the precharge means, and the precharge signal drive circuit timing control circuit 140 A precharge signal NRS for the positive electrode side and a negative electrode side is generated, and this is
The process of switching at the rising edge of G corresponds to a precharge power supply switching unit.

Next, a third embodiment of the present invention will be described. The third embodiment has the same configuration as the second embodiment, but differs in the output timing of each signal. That is, in the image processing circuit 110 shown in FIG. 1, the timing information and the analog image signal Vid are generated based on the display information. In the third embodiment, the switching timing of the polarity of the analog image signal Vid is changed. such that said delayed from the falling time of the precharge start signal NRG by the delay time T _8, that is, from the start of one horizontal scanning, the sum of the waiting time T ₆ and the pre-charge period T ₇ and the delay time T ₈ The timing information and the analog image signal Vid are generated so as to be delayed by the time.

The delay time T ₈ is within the time from the fall of the precharge start signal NRG to the rise of the data line selection signal ΦH1 for the analog switch ASW1 whose conduction is controlled first after the start of one horizontal scan. In addition, the time is set to a time during which the polarity of the analog image signal Vid is reliably switched before the rise of the data line selection signal ΦH1.

The precharge signal drive circuit timing control circuit 140 switches the positive and negative precharge signals NRS to switch the precharge signal drive circuit 40.
At this time, the precharge start signal N
When RG predetermined standby time from the falling time of T ₉ has elapsed, I have switched to opposite polarity of the precharge signal NRS to the polarity of the analog image signals Vid at this point.

The standby time T ₉ starts from the falling timing of the precharge start signal NRG and starts from the falling edge of the precharge start signal NRG.
Is set within the time up to the time of rising. Accordingly, in the third embodiment, the horizontal scanning at t ₃₁ is started, one horizontal scanning period every power supply voltage switches to, in one horizontal scanning period of t ₃₇ from the time t ₃₁ the high power supply voltage , in one horizontal scanning period of t ₄₀ from the time point t ₃₇ low power is supplied. The waiting time T ₆ from the start of one horizontal scanning time t _31, becomes switched polarity, for example positive electrode of the analog image signal Vid at time t ₃₄ the precharge period T ₇ and the delay time T ₈ has elapsed, time t analog image signals Vid from the start of one horizontal scanning of ₃₇ at the time point t ₃₈ where the predetermined time has elapsed becomes negative.

Further, the start time t of one horizontal scan₃₁From place
Fixed waiting time T₉ Time t has elapsed ₃₅And precharge
The polarity of the analog image signal Vid at this time when the signal NRS is
Is switched to the negative electrode opposite to₃₉At the positive
Switch to precharge signal. Therefore, one horizontal run
When the survey starts₃₁And the power supply voltage to each circuit is high
When the voltage is switched, the precharge start signal NRG becomes low.
Power supply potential Vss_L Is Vss_H At this time,
A negative analog image signal Vid is applied to each data line φDn.
Since it is written, the precharge signal switch
The voltage between the gate and the source of the TFT constituting PSWn is
Increases, and is applied to all the precharge signal switches PSWn.
Leakage current from recharge signal NRS side (off control voltage
Flow), which is supplied to each data line φDn.
The potential Vdl of each data line φDn gradually increases. Soshi
At time t₃₂And the precharge start signal NRG rises
Then, the precharge signal NRS is transmitted from the signal line 90 to the data.
Is supplied to the line .phi.D1 and its potential is
It matches the potential of S. And time t₃₃Precharge with
When the start signal NRG falls, the start signal NRG falls with the penetration voltage.
As a result, the potential of the data line φD1 slightly decreases, and the potential is maintained.
Be held.

[0106] Then, the polarity of the analog image signal Vid switched at t ₃₄ the delay time T ₈ from the fall of the precharge start signal NRG has elapsed waiting time elapses T ₉ from the fall of the precharge start signal NRG Once t _35, switches the pre-charge signal NRS, further, when the analog switch ASW1 is selected at the time ₃₆ the waiting time T ₅ has elapsed, since the analog image signal Vid to the data line φD1 is supplied, the potential , And the potential of the analog image signal Vid. Thereafter, the operation is the same as that of the second embodiment.

Therefore, in the third embodiment, a leakage current from the precharge signal NRS side occurs in the precharge signal switch PSWn.
In this case, the same operation and effect as those of the second embodiment can be obtained. Next, a fourth embodiment of the present invention will be described. The fourth embodiment has the same configuration as the second embodiment, but differs in the output timing of each signal.

[0108] That is, in the fourth embodiment, when the precharge signal NRS, as in the third embodiment, a lapse of waiting time T ₉ from the falling time of the precharge start signal NRG In this case, the polarity of the analog image signal Vid at this time is switched to a precharge signal having a polarity opposite to that of the analog image signal Vid. The analog image signal Vid is switched in synchronization with the start of one horizontal scan.

That is, as shown in FIG. 7, at time t ₄₁ ,
When one horizontal scan starts, the power supply voltages Vddx and Vss
and x, the polarity of the analog image signal Vid is switched every horizontal scanning period, the precharge signal NRS the time t ₄₃
Precharge start of the supply voltage signal time t ₄₄ to fall waits from time period T ₉ has passed the NRG switches to the precharge voltage of opposite polarity of the negative electrode, similarly, the precharge voltage of the positive electrode at the time t ₄₆ in Switch to NRS.

[0110] Thus, 1 when the horizontal scanning is started at t _41, the analog image signal Vid becomes positive example switched polarity of the analog image signal Vid At this point, the precharge signal NRS is positive, the data lines φDn
Is a state in which the negative analog image signal Vid is written, so that in each analog switch ASWn and each precharge signal switch PSWn, a leakage current flows from the analog image signal Vid side and the precharge signal NRS side to each data line φDn. As a result, the potential of each data line φDn rises. When the precharge start signal NRG rises at time t _42, all of the precharge signal switch PSWn becomes conductive, the precharge voltage NRS is supplied to the data lines FaiDn, the data line FaiDn potential precharge voltage NRS Matches. Then, falling precharge start signal NRG at time t _43, when t ₄₄ switches to the pre-charge signal NRS is negative, the time t ₄₅ is the analog switch ASW1 is selected, the analog image signal Vi to the data line φD1
d is supplied. Thereafter, the operation is the same as that of the second embodiment.

Therefore, also in this case, the same operation and effect as those of the second embodiment can be obtained, and in the fourth embodiment, the data line φDn is connected to the analog switch ASWn as a leak current as analog current. The potential of the image signal Vid and the precharge signal switch PSWn
And the potential of the precharge signal NRS is supplied as a leakage current, and any leakage current is applied to all data lines φDn.
Acts so as to approach the image center potential Vc. As a result, the amount of charge required to rewrite the potential of the data line φDn with the precharge signal potential NRS can be reduced.

Note that in the fourth embodiment,
The analog image signal Vid is switched in synchronization with the start of one horizontal scan, and the analog image signal Vi is switched to the data line φDn.
The case where the leakage current is supplied from the d side has been described, but the analog image signal Vi
Even if the potential of the signal line 30 for supplying the analog image signal Vid is maintained at a higher potential than the potential of the data line φDn before writing d, the same operation and effect can be obtained.

In each of the above embodiments, the case where the present invention is applied to a liquid crystal display device has been described.
Not limited to this, electroluminescence,
It can be used for other electro-optical display devices such as electrophoretic displays. Further, as an electronic apparatus having the electro-optical display device according to the present invention, for example, a liquid crystal projector,
Multimedia compatible personal computer (PC)
And Engineering Workstation (EW)
S) or mobile phone, word processor, television,
Examples include a viewfinder type or a monitor direct view type video table recorder, an electronic organizer, an electronic desk calculator, a car navigation device, a POS terminal, and a device having a touch panel.

FIG. 8 is a schematic diagram showing a case where the electro-optical display device is applied to a liquid crystal projector. In FIG. 8, a liquid crystal projector 11 as an example of an electronic device is shown.
Reference numeral 00 denotes a projection type liquid crystal projector.
0, dichroic mirrors 1113, 1114, reflection mirrors 1115, 1116, 1117, an input lens 1118, a relay lens 1119, and an output lens 1120.
And liquid crystal light valves 1122, 1123, 1124
, A cross dichroic prism 1125, and a projection lens 1126. The liquid crystal light valves 1122, 1123, and 1124 are prepared by using three liquid crystal modules each including a liquid crystal panel in which each of the driving circuits of the above-described liquid crystal display device is mounted on a TFT array substrate, and each of them is used as a liquid crystal light valve. The light source 11
10 is a lamp 1111 such as a metal halide and a lamp 11
And a reflector 1112 for reflecting 11 light.

In the liquid crystal projector 1100 configured as described above, the dichroic mirror 1113 that reflects blue light and green light transmits red light of the white light flux from the light source 1110, and transmits blue light and green light. Is reflected. The transmitted red light is reflected by the reflection mirror 1117 and is incident on the liquid crystal light valve 1122 for red light. On the other hand, green light among the color lights reflected by the dichroic mirror 1113 is reflected by the dichroic mirror 1114 that reflects green light, and is incident on the liquid crystal light valve 1123 for green light. The blue light also passes through the second dichroic mirror 1114. For blue light, the incident lens 11 is used to prevent light loss due to a long optical path.
18, a light guiding means 1121 comprising a relay lens system including a relay lens 1119 and an exit lens 1120, through which blue light is supplied to the liquid crystal light valve 1 for blue light.
It is incident on. The three color lights modulated by the respective light valves enter the cross dichroic prism 1125. This prism is formed by bonding four right-angle prisms, and a dielectric multilayer film that reflects red light and a dielectric multilayer film that reflects blue light are formed in a cross shape on the inner surface.
The three color lights are combined by these dielectric multilayer films to form light representing a color image. The combined light is projected on a screen 1127 by a projection lens 1126 which is a projection optical system, and an image is enlarged and displayed.

FIG. 9 is a schematic diagram showing a case where the electro-optical display device is applied to a personal computer. In FIG. 9, a laptop personal computer 1200 as another example of the electronic apparatus includes a liquid crystal display 1206 in which the above-described liquid crystal display device is provided in a top cover case, a CPU, a memory, a modem, and the like. Main unit 1 incorporating 1202
204.

As shown in FIG. 10, a liquid crystal is sealed between two transparent substrates 1304a and 1304b, and each driving circuit and the liquid crystal panel of the liquid crystal display device described above are mounted on a TFT array substrate. A liquid crystal device substrate 1304 is provided. One of two transparent substrates 1304a and 1304b constituting the liquid crystal device substrate 1304 is attached to a polyimide tape 1322 on which a metal conductive film is formed.
TCP (Tape Carrier Package) 13 with 324 implemented
20 can be connected to produce, sell, and use a liquid crystal device as a component of an electronic device.

In addition to the above-described electronic devices, a liquid crystal television, a viewfinder type or a monitor direct-view type video tape recorder, a car navigation device, an electronic organizer,
Examples of the electronic device include a calculator, a word processor, a workstation, a mobile phone, a video phone, a POS terminal, a device having a touch panel, and the like. Such an electronic device includes the above-described electro-optical display device, and supplies the data line driving circuit even if the sampling frequency increases and the selection time of the analog switch decreases as the definition of an image increases. By switching the power supply voltage, the number of phase expansions of the analog image signal can be reduced.
As a result, even if the number of phase expansions of the analog image signal is reduced, sufficient writing to the data lines can be ensured, so that the number of external peripheral circuits required for the number of phase expansions is reduced. Therefore, the size and weight of the electronic device can be reduced. Further, by reducing unnecessary voltage between the gate and the source of the analog switch, the reliability of the data line driving circuit can be improved. The reliability of an active matrix type liquid crystal display device with a built-in peripheral drive circuit is the strictest in the reliability of the data line drive circuit with the fastest operating speed. Will also improve reliability. Therefore, the reliability of the electronic device itself including the display device can be improved.

In each of the above embodiments, the case where the polarity of the analog image signal Vid is changed every horizontal scanning period is described. However, the present invention is not limited to this. For example, the polarity may be changed every field. Even if it does, it can be applied. Also, a case has been described in which the analog image signal Vid whose polarity is switched is used. However, the present invention is not limited to this case. It can be performed.

In each of the above embodiments, the case where the power supply voltage to each circuit is switched in the power supply selection circuit 80 has been described. However, the present invention is not limited to this.
The switching may be performed on each circuit side. In each of the above embodiments, the analog switch ASWn and the precharge signal switch PSWn are connected to the n-channel TSW.
Although the description has been given of the case of the configuration using the FT, the configuration is not limited to this, and the configuration can also be made with a p-channel TFT. In this case, the positive analog image signal Vid is connected to the data line φ.
When writing to Dn, the power supply potential may be further reduced, and in this case, the same operation and effect as described above can be obtained.

In each of the above embodiments, the case where the present invention is applied to an active matrix type liquid crystal display device has been described. However, the present invention can be applied to a passive matrix type liquid crystal display device.

[0122]

As described above, according to the first to nineteenth aspects of the present invention, the conduction of the analog switch provided between the data signal supply line and the data line is switched. The control power supply potential is switched according to the potential of the data signal, and further, a precharge signal is supplied before the data signal is supplied to the data line, or the data signal is supplied before the precharge signal is supplied. By supplying a current to the data line from a supply line for supplying a data line or a supply line for supplying a precharge signal to the data line to raise the potential of the data line in advance, the data of the data signal is increased. Since the writing ratio to lines is improved, the contrast ratio can be improved, and the power supply voltage can be reduced while maintaining the contrast ratio. Since it is possible to, it is possible to improve the reliability of the circuit such as an analog switch.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a schematic configuration of a liquid crystal display device according to the present invention.

FIG. 2 is a block diagram showing details of a main part of FIG. 1 according to the first embodiment of the present invention.

FIG. 3 is a timing chart for explaining the operation of the first embodiment;

FIG. 4 is a block diagram showing details of a main part of FIG. 1 in a second embodiment.

FIG. 5 is a timing chart for explaining the operation of the second embodiment;

FIG. 6 is a timing chart for explaining the operation of the third embodiment;

FIG. 7 is a timing chart for explaining the operation of the fourth embodiment;

FIG. 8 is a configuration diagram illustrating a schematic configuration of a liquid crystal projector.

FIG. 9 is a front view showing a schematic configuration of a personal computer.

FIG. 10 is a perspective view showing a liquid crystal device using a TCP (Tape Carrier Package).

FIG. 11 is a block diagram illustrating a schematic configuration of a conventional liquid crystal display device.

FIG. 12 is a timing chart for explaining the operation of a conventional liquid crystal display device.

FIG. 13 is a characteristic diagram showing the dependency of the transmittance of the liquid crystal display device on the applied voltage.

FIG. 14 is a timing chart for explaining the operation of the liquid crystal display device when the positive power supply potential supplied to the data line driving circuit is lowered.

[Explanation of symbols]

REFERENCE SIGNS LIST 10 scan line drive circuit 20 data line drive circuit 30 signal line 40 precharge signal drive circuit 50 shift register 60 image display unit 70 sampling circuit 75 power supply 80 power supply selection circuit 100 signal source 110 image processing circuit 120 timing control for data line drive circuit Circuit 130 Timing control circuit for scanning line drive circuit 140 Timing control circuit for precharge signal drive circuit 150 Liquid crystal panel

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H05B 33/14 H05B 33/14 A F term (Reference) 2H093 NA16 NC11 NC34 ND09 ND47 ND52 3K007 AB17 EB00 GA04 5C006 AF75 BB16 BC12 BF42 FA41 FA54 5C080 AA10 BB05 DD22 DD30 FF11 JJ02 JJ04 JJ05 JJ06 KK02 KK43

Claims (19)

[Claims] 1. A method for driving an electro-optical device, comprising: a data line; a scan line intersecting the data line; and an analog switch for controlling supply of a data signal to the data line. A driving method for an electro-optical device, wherein a control power supply potential for performing conduction control is switched according to a potential of the data signal. 2. The method according to claim 1, wherein after switching the control power supply potential, conduction of the analog switch is performed after a potential of a control line for applying the control power supply potential to the analog switch is stabilized. The method for driving an electro-optical device according to claim 1. 3. A precharge signal for raising a potential of the data line in advance before supplying a data signal having a higher potential than the data line to the data line. Claim 1 or Claim 2
3. The method for driving an electro-optical device according to claim 1. 4. An off-control current flowing through the analog switch in a state where the analog switch is off-controlled before supplying a data signal having a higher potential than the data line to the data line. 3. The method of driving an electro-optical device according to claim 1, wherein the potential of the data line is increased in advance. 5. The analog switch is controlled to be off before supplying a data signal having a higher potential than the data line to the data line and before supplying the precharge signal to the data line. 4. The method of driving an electro-optical device according to claim 3, wherein the potential of the data line is increased in advance using an off control current flowing through the analog switch. 6. The precharge signal is supplied to the data line via a precharge analog switch, and before a data signal having a higher potential than the data line is supplied to the data line, and before the scan line. From the start of the supply of the scanning signal to the supply of the precharge signal to the data line, the off control current flowing through the analog switch and the precharge analog switch are turned off while the analog switch is controlled to be off. 4. The device according to claim 3, wherein the potential of the data line is increased in advance by using at least one of an off control current flowing through the precharge analog switch in a controlled state. The driving method of the electro-optical device according to the above. 7. The precharge signal is supplied to the data line before a data signal having a higher potential than the data line is supplied to the data line and from the time when a scan signal is supplied to the scan line. 4. The electro-optical device according to claim 3, wherein a potential of a supply line for supplying a data signal to the data line via the analog switch is maintained at a higher potential than the data line. Drive method. 8. Before supplying a data signal having a higher potential than the data line to the data line, the potential of a supply line for supplying a data signal to the data line via the analog switch is changed to the data line. 3. The method of driving an electro-optical device according to claim 1, wherein a period for maintaining the potential higher than that of the line is provided. 9. A pre-charge signal is supplied to the data line via a pre-charge analog switch, and before a data signal having a higher potential than the data line is supplied to the data line and to the scanning line. From the start of the supply of the scanning signal to the supply of the precharge signal to the data line, the potential of the precharge signal supply line for supplying the precharge signal to the data line,
4. The method according to claim 3, wherein a period for maintaining the potential higher than the data line is provided. 10. A pre-charge signal is supplied to the data line via a pre-charge analog switch, and before a data signal having a higher potential than the data line is supplied to the data line and to the scanning line. During a period from the start of the supply of the scanning signal to the supply of the precharge signal to the data line, the potential of the supply line for supplying the data signal to the data line via the analog switch and the precharge to the data line. 4. The method of driving an electro-optical device according to claim 3, wherein a period is provided in which at least one of the potentials of a supply line for supplying a charge signal is maintained at a higher potential than the data line. 11. Before supplying the data signal to the data line, a current is supplied from the data line to the supply line for supplying a data signal to the data line via the analog switch in a direction from the data line to the supply line. 3. The method of driving an electro-optical device according to claim 1, wherein a signal for preventing the flowing is supplied. 12. An electro-optical device, comprising: a data line; a scanning line intersecting the data line; and an analog switch for controlling supply of a data signal to the data line. An electro-optical device comprising: a power supply switching unit that switches a control power supply potential to be used according to a potential of the data signal. 13. A control unit for controlling conduction of the analog switch, wherein the control unit supplies the control power supply potential to the analog switch after the control power supply potential is switched. 13. The electro-optical device according to claim 12, wherein the conduction of the analog switch is switched after a stabilization time required until the potential of the control line is stabilized. 14. A precharge means for applying a precharge potential for increasing a potential of the data line before supplying a data signal having a higher potential than the data line to the data line. The electro-optical device according to claim 12 or 13, wherein 15. A precharge signal generating means for generating the precharge signal, wherein the precharge means is interposed between a supply line for supplying the precharge signal to the data line and the data line. The electro-optical device according to claim 14, further comprising: a precharge analog switch; and a precharge control unit that controls conduction of the precharge analog switch according to a potential of the data signal. 16. A precharge power supply switching means for switching a control power supply potential for performing conduction control of the precharge analog switch in accordance with the potential of the precharge signal. 1
6. The electro-optical device according to 5. 17. The electro-optical device according to claim 12, wherein the electro-optical device is applied to an organic electroluminescence display device. 18. The electro-optical device according to claim 12, wherein the electro-optical device is applied to a liquid crystal display device. 19. An electronic apparatus comprising the electro-optical device according to claim 12.