JP2001242819A - Electrooptical device and electronics - Google Patents

Abstract

PROBLEM TO BE SOLVED: To control the writing and the holding of data signal to the memory circuit in a pixel driving circuit based on the selection states and the nonselection states of a row scanning line and a column scanning line. SOLUTION: A pixel driver brings a first voltage signal line or a second voltage signal line into conduction according to the data signal held in a memory circuit. Moreover, a reference voltage is applied to the counter electrode of a counter substrate and then a display is performed by the potential difference between the reference voltage and the first voltage signal or the second voltage signal in this device. Thus, an electrooptical device whose power consumtion smaller than that of the conventional static type liquid crystal device and in which a control method and a control circuit configuration are simplified is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electro-optical device in which a driving circuit comprising a memory circuit and a pixel driver is provided for each pixel, and the display of the pixel is controlled by a data signal held in the memory circuit. The present invention relates to an electronic device such as an OA device or a mobile device equipped with an electro-optical device.

[0002]

2. Description of the Related Art In recent years, a liquid crystal device, which is an example of an electro-optical device, is particularly used as an information display device of a portable device such as a mobile phone or a portable information terminal. The content of information to be displayed has been about character display, but a dot matrix type liquid crystal panel has been used to display a large amount of information at a time, and the number of pixels has been gradually increased to increase the duty.

Conventionally, a simple matrix type liquid crystal device has been used as a display device in the above-mentioned portable equipment. However, in a simple matrix type liquid crystal device, when performing multiplex driving, a high duty signal is used as a scanning line selection signal. A higher voltage is required as much as possible, and this has been a serious problem in portable devices driven by a battery, which requires strong reduction in power consumption.

In order to solve such a problem, one of a pair of substrates constituting a liquid crystal panel is used as a semiconductor substrate, and a memory circuit as shown in FIG. A static drive type liquid crystal device that performs display control based on the same has been proposed. Less than,
The operation of the conventional static drive type liquid crystal device will be described with reference to FIG.

The scanning line driving circuit 410 is controlled by the scanning line driving circuit control signal 418, and the selected scanning line 40 is controlled.
A selection signal (scanning signal) is output to 9-n (n is a natural number indicating the number of scanning lines). Similarly, the data line driving circuit 413 is controlled by the data line driving circuit control signal 419, and the selected data line pair 411-m, 412-m (m
Is a natural number indicating the number of data lines), and data signals are supplied so as to have mutually opposite phases (complementary signals).

The scanning line 409-n and the data line pair 411-
At the intersection of m and 412-m, a circuit connected to each line forms a pixel. Scan line 409-n and data line pair 4
N-channel MOS connected to 11-m, 412-m
The switching circuits 401 and 402 having the structure include a scanning line 40.
When 9-n is selected and a selection signal is supplied, the state becomes conductive, and the complementary data signal of the data line pair 411-m and 412-m is written to the memory circuit 403. Here, the memory circuit 403 has a configuration in which two inverters are connected in a feedback manner. Next, the scanning line 409-n is set to a non-selection potential,
By making the data line pairs 411-m and 412-m high impedance, the switching circuits 401 and 402
Is turned off, and holds the data signal written to the memory circuit 403.

A liquid crystal pixel driver 404 including two transmission gate circuits is controlled by a potential level of a second node which is an inversion level of a potential level of a first node in the memory circuit 403 and a connection point thereof. The first transmission gate circuit includes a first voltage signal line 41
6 and conducts according to the level of the data signal held in the memory circuit 403, and applies the first voltage 414 to the pixel electrode 406. On the other hand, the second transmission gate circuit is connected to the second voltage signal line 417,
Conduction is performed in accordance with the level of the data signal held in the memory circuit 403, and the second voltage 415 is applied to the pixel electrode 406. Specifically, when the held data signal is at the H level, the first voltage signal line 416 of the liquid crystal pixel driver 404 that turns on the liquid crystal layer 407 for normally white display is turned on, and the liquid crystal driver 404 is turned on. A first voltage 414 is supplied to the pixel electrode 406 through the first transmission gate circuit 404 and the counter electrode 408
The liquid crystal pixel 405 enters a black display state due to a potential difference from the reference voltage 420 supplied to the pixel. Similarly, when the held data signal is at the L level, the second voltage signal line 417 for turning off the liquid crystal layer 407 is turned on, and the second voltage signal line 417 of the liquid crystal driver 404 is turned on via the second transmission gate circuit. When the voltage 415 is supplied, the liquid crystal pixel 405 enters a white display state.

With such a structure, the power supply voltage, the first and second voltage signals, and the reference voltage can be driven only by the logic voltage, and the data holding function of the memory circuit can be used when rewriting of the screen display is not necessary. , The display state can be maintained, so almost no current flows except for leakage current.
Power consumption was reduced.

[0009]

However, in the conventional static drive type liquid crystal device, the data signal of the data line pair is set to complementary signals of opposite phases when writing data, and is controlled to high impedance when holding data. Therefore, control of the data line is very complicated, and the circuit configuration is also complicated.

[0010]

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and the present invention has low power consumption.
It is an object to provide an electro-optical device having a simple control method and a simple control circuit configuration.

According to the electro-optical device of the present invention, a plurality of row scanning lines and a plurality of column scanning lines intersecting each other, a plurality of data lines arranged along the column scanning lines, and a voltage signal are provided on a substrate. A voltage signal line to be supplied, and a plurality of pixel driving circuits arranged corresponding to intersections of the row scanning line and the column scanning line, wherein each of the pixel driving circuits includes the row scanning line and the column scanning line. A switching circuit that becomes conductive when a line is selected, and becomes nonconductive when at least one of the row scanning line and the column scanning line is not selected, and captures a data signal of the data line when the switching circuit is conductive. A memory circuit for holding a data signal when the switching circuit is off, and a first voltage signal from the voltage signal line to a pixel when the data signal held in the memory circuit is at a first level. Outputs, in the case of the second level; and a pixel driver that outputs a second of said voltage signal from said voltage signal line to a pixel.

According to the configuration of the present invention, the power supply voltage,
Both the first and second voltage signals and the reference voltage can be driven at about the logic voltage, and when the screen display does not need to be rewritten, the display state can be held by the data holding function of the memory circuit, so that almost no current flows. Therefore, when compared with a liquid crystal device, power consumption is greatly reduced as compared with a conventional simple matrix type liquid crystal device. In addition, as in the conventional static drive type liquid crystal device, it is not necessary to perform complicated control such that the data signal of the data line pair is set to the opposite phase at the time of data writing and to the high impedance at the time of data retention, and the circuit configuration can be simplified. Having.

Further, in the electro-optical device according to the present invention, for each of the data lines, a data signal is taken into a corresponding data line when the column scanning line is selected, and the data signal of the data line is held when the column scanning line is not selected. A latch circuit is provided. According to this configuration, the parasitic capacitance of the input data line becomes only the selected data line, and the charge / discharge current accompanying the change in the signal of the input data line is greatly reduced.
This has the effect that power consumption is greatly reduced.

Further, in the electro-optical device according to the present invention, the pixel electrode disposed in the pixel is a light reflection type electrode, and the pixel driving circuit is disposed below the pixel electrode via an electrical insulating film. It is characterized by having been established. According to this configuration, compared to a conventional static drive type liquid crystal device in which a TFT (Thin Film Transistor) is formed on a transparent substrate in which the aperture ratio of a pixel is limited by the area of a pixel drive circuit occupying one pixel area. Thus, the aperture ratio is greatly improved, and a bright and easy-to-read screen is obtained.

Further, in the electro-optical device according to the present invention, when the row scanning line and the column scanning line are selected, the conduction control signal is output when at least one of the row scanning line and the column scanning line is non-conductive. A plurality of switching control circuits for outputting a conduction control signal to the switching circuit are provided, and the switching control circuit controls the switching circuits in the plurality of pixel driving circuits. According to this configuration, the number of switching control circuits can be reduced, and the circuit configuration and control of the column scanning line driving circuit can be simplified. Further, there is an effect that the writing operation of the entire screen can be completed in a short time and power consumption can be reduced.

Further, in the electro-optical device according to the present invention, a row scanning line driving circuit for supplying a row scanning signal to the row scanning line, and a column scanning for supplying a column scanning signal to the column scanning line. A line driving circuit, wherein at least one of the row scanning line driving circuit and the column scanning line driving circuit is constituted by a shift register circuit. According to this configuration, there is an effect that the circuit configuration and control of the scanning line driving circuit can be simplified.

Further, in the electro-optical device according to the present invention, a row scanning line driving circuit for supplying a row scanning signal to the row scanning line, and a column scanning line for supplying a column scanning signal to the column scanning line. A drive circuit, and at least one of the row scan line drive circuit and the column scan line drive circuit is configured by a decoder circuit that selects a corresponding scan line with an address signal having a bit number corresponding to the number of scan lines. It is characterized by that. According to this configuration, when only the display of a part of the screen is to be rewritten, the data signal can be rewritten by controlling the pixel driving circuit of only the target pixel, and the power consumption can be greatly reduced. Has an effect.

Further, the electro-optical device according to the present invention is characterized in that the circuit element structure in the electro-optical device is a CMOS structure. According to this configuration, there is an effect that the leakage current in the data holding period is eliminated and the power consumption can be further reduced.

Further, an electronic apparatus according to the present invention includes the above-described electro-optical device according to the present invention. According to this configuration, it is possible to achieve a significantly longer life than a conventional simple matrix type liquid crystal device using a battery when driven by an electronic device, and also compared to a conventional static drive type liquid crystal device. There is an effect that a simple control method and a control circuit configuration can be achieved.

[0020]

Embodiments of the present invention will be described below with reference to the drawings.

(First Embodiment) FIG. 1 shows a first embodiment of the present invention.
FIG. 3 is a block diagram illustrating main parts such as pixels and a driving circuit of the liquid crystal device which is the electro-optical device according to the embodiment.
FIG. 2 is a detailed circuit diagram of FIG.

In FIG. 1, a pixel area has a row scanning line 1
10-n (n is a natural number indicating a row of a row scanning line) and a column scanning line 112-m (m is a natural number indicating a column of a column scanning line) are arranged in a matrix, and each pixel is located at an intersection of the scanning lines. Is configured. In the pixel area, a column scanning line 11 is provided.
A column data line 115-d (d is a natural number indicating a column of the column data line) branched from the input data line 114 along 2-m is also arranged. A row scanning line driving circuit 111 is arranged in a peripheral area on the row side of the pixel area, and a column scanning line driving circuit 113 is arranged in a peripheral area on the column side of the pixel area.

The row scanning line driving circuit 111 is controlled by the row scanning line driving circuit control signal 120, and a selection signal (scanning signal) is output to the selected row scanning line 110-n.
Unselected row scanning lines are set to a non-selection potential. Similarly, the column scanning line driving circuit 113 is controlled by the column scanning line driving circuit control signal 121, and the selected column scanning line 112 is controlled.
A selection signal is output to −m, and the non-selected column scanning lines are set to the non-selection potential. Which row scanning line and which column scanning line to select is determined by the control signals 120 and 121. That is, the control signals 120 and 121 are address signals that specify the selected pixel.

The switching control circuit 109 arranged near and corresponding to the intersection of the selected row scanning line 110-n and the selected column scanning line 112-m receives the selection signal of both scanning lines and turns on. A signal (conduction control signal) is output, and when at least one of the row scanning line 110-n and the column scanning line 112-m is deselected, an off signal (non-conduction control signal) is output. That is, only the switching control circuit 109 of the pixel located at the intersection of the selected row scanning line and column scanning line outputs an ON signal, and the other switching control circuits output OFF signals. In the present embodiment, the liquid crystal pixel drive circuit 101 is controlled by the ON / OFF signal of the switching control circuit 109.

Next, the configuration and operation of the liquid crystal pixel drive circuit 101 will be described.

The switching circuit 102 is turned on by an on signal of the switching control circuit 109 and is turned off by an off signal. When the switching circuit 102 is turned on, the column data line 1 connected thereto is turned on.
The 15-d data signal is written to the memory circuit 103 via the switching circuit 102. On the other hand, the switching circuit 102 is turned off by the off signal of the switching control circuit 109 and holds the data signal written in the memory circuit 103.

The data signal held in the memory circuit 103 is supplied to a liquid crystal pixel driver 104 arranged for each pixel. The liquid crystal pixel driver 104 supplies the first voltage 116 supplied to the first voltage signal line 118 or the second voltage 117 supplied to the second voltage signal line 119 according to the level of the supplied data signal. One of the liquid crystal pixels 10
5 to the pixel electrode 106. In the present invention, a pixel refers to an electro-optical material that electrically performs an optical action such as light modulation or light emission, or a pixel electrode for each pixel that provides an electrical action thereto. The first voltage 116 is a voltage for setting the liquid crystal pixel 105 to a black display state when the liquid crystal device performs a normally white display, while the second voltage 117 is a voltage for setting the liquid crystal pixel 105 to a white display state. .

When the data signal held in the memory circuit 103 is at the H level, in the liquid crystal pixel driver 104, the gate connected to the first voltage signal line 118 for displaying the liquid crystal in black in the case of normally white display is turned on. In this state, the first voltage 116 is supplied to the pixel electrode 106, and the liquid crystal pixel 105 enters a black display state due to a potential difference from the reference voltage 122 supplied to the counter electrode 108. Similarly, when the held data signal is at the L level, the gate of the liquid crystal pixel driver 104 connected to the second voltage signal line 119 is turned on, and the second voltage 117 is supplied to the pixel electrode 106, and the liquid crystal is supplied. The pixel 105 enters a white display state.

With the above configuration, the power supply voltage, the first and second
When the voltage signal and the reference voltage can be driven at about the logic voltage, and the screen display does not need to be rewritten, the display state can be held by the data holding function of the memory circuit, so that almost no current flows. In addition, a configuration in which writing to pixels is controlled by the logic of a selection signal of two scanning lines of a row and a column allows pixels to be controlled irrespective of the potential of a data line. The data signals of the two data lines are set to the opposite phase (complementary data signal) when writing data,
When data is held, complicated control such as making the data line high impedance and turning off the transistor connected to the data line becomes unnecessary.

The liquid crystal pixel 105 has a pixel electrode to which one of the first voltage 116 and the second voltage 117 output from the liquid crystal pixel driver 104 is selected and supplied according to the held data signal. 106 is provided for each pixel, a potential difference between the two electrodes is applied to a liquid crystal layer 107 interposed between the pixel electrode 106 and the counter electrode 108, and a black display state is set according to a change in alignment of liquid crystal molecules according to the potential difference. (Also called an ON display state) or a white display state (also called an OFF display state). In a liquid crystal device, liquid crystal is sealed and sandwiched between a semiconductor substrate and a light-transmitting substrate such as glass, and pixel electrodes are arranged in a matrix on the semiconductor substrate.
Below the pixel electrodes, the liquid crystal pixel drive circuit, row scan lines, column scan lines, data lines, row scan line drive circuits, column scan line drive circuits, and the like are formed. Since a complementary transistor having a high mobility in a MOS structure can be formed on a semiconductor substrate and a multilayer wiring structure can be easily formed, the above-described various circuits can be formed using the transistor and the multilayer wiring.
Each pixel applies a voltage for each pixel between the pixel electrode 106 and a counter electrode 108 formed on the inner surface of the opposing light transmitting substrate, and a liquid crystal layer 107 for each pixel interposed therebetween.
And the orientation of the liquid crystal molecules is changed for each pixel.

At this time, the pixel electrode 10 of the liquid crystal pixel 105
6 is configured as a light-reflective electrode such as a metal or dielectric multilayer film, and a liquid crystal pixel driving circuit 101 is provided on a semiconductor substrate below a liquid crystal pixel electrode via an electrical insulating film.
The aperture ratio is greatly improved. That is, conventionally, each liquid crystal pixel drive circuit is configured using a TFT on a transparent substrate, and the aperture ratio of the liquid crystal pixel is determined by the area occupied by one pixel area of the liquid crystal pixel drive circuit which is not a light transmission region. In contrast, in the present invention, the pixel electrode and the liquid crystal pixel driving circuit have a laminated structure, and a reflective pixel electrode almost close to the entire area of one pixel can be arranged on the liquid crystal pixel driving circuit. , The aperture ratio is greatly improved, and a bright and easy-to-read screen is obtained.

The column scanning line driving circuit 113 in FIG. 1 can be constituted by a shift register circuit as shown in FIG. In FIG. 9, a control signal 121 for a column scanning line driving circuit comprising two signals of a scanning signal 121-1 of positive logic (H level is an active level) and a clock signal 121-2 is input and synchronized with the clock signal 121-2. Then, the column scanning lines 112-m can be sequentially selected by negative logic (active level when L level). That is, the clock signal 121-2 is output from the inverter 1 having the CMOS transistor configuration.
The signal inverted in step 13-6 is used as a control signal for the shift register circuit, and the scanning signal 121-1 is taken in by the clocked inverter 113-1 having a CMOS transistor configuration at the first stage at the rising edge of the clock signal 121-2. The inverted signal is inverted by the CMOS transistor-structured inverter 113-3, and the output is fed back by the two CMOS transistor-structured clocked inverters 113-2 and 113-4 at the falling edge of the clock signal 121-2 to hold the scanning signal. The operation and the transfer operation of the scanning signal to the next stage are performed, and the scanning signal is sequentially transferred. C
MOS transistor configuration NAND gate circuit 113-
Numeral 5 performs a logical product of outputs of two adjacent stages and outputs a selection signal. The NAND gate circuit 113-5 outputs the selection signal 11
The output phases of 2-m and 112-m + 1 are provided so as not to overlap each other. According to this configuration, the scanning lines are sequentially selected.

Similarly, if the row scanning line driving circuit 111 is also configured by a shift register circuit similar to that of FIG. 9, the circuit configuration and control of the two scanning line driving circuits can be simplified. Further, the column scanning line driving circuit 113 controls the number of bits (AX0, / AX0,.
7, / AX7) decoder circuit. Column scanning line drive circuit control signal 121 composed of address signal
, And the control signal 121 is C
MOS transistor configuration NAND gate circuit 113-
7, the corresponding column scanning line 112-m is selected, and a selection signal can be output. According to such a configuration, a selection signal can be output to an arbitrary scanning line according to an address signal, and each pixel can be randomly accessed.

Similarly, the row scanning line driving circuit 111 also corresponds to FIG.
If it is configured with a decoder circuit similar to that described above, it is possible to rewrite the data signal by controlling the liquid crystal pixel drive circuit of only the target pixel when rewriting only the display of a part of the screen. In the present invention, each pixel is provided with a memory circuit 103, and holds a data signal written in the memory circuit 103 unless the switching circuit 102 is turned on by a selection signal of a row and a column scanning line. It is possible to access and rewrite only the pixel to be rewritten.

As shown in FIG. 2, in the present embodiment, the switching control circuit 109 can be constituted by a logic circuit of a NOR gate circuit 109-1 having a CMOS transistor configuration and an inverter 109-2 having a CMOS transistor configuration. NOR gate circuit 109-1 is 2
When a negative logic selection signal is input to both inputs, a positive logic ON signal is output, and the inverter 109-2 outputs a negative logic ON signal. Further, the switching circuit 102 can be configured by a transmission gate 102-1 having a CMOS transistor configuration. The transmission gate 102-1 has a switching control circuit 109.
Is turned on based on the ON signal, the column data line 115 is connected to the memory circuit 103, and turned off based on the OFF signal. The memory circuit 103 can have a configuration in which a clocked inverter 103-1 having a CMOS transistor configuration and an inverter 103-2 having a CMOS transistor configuration are connected in a feedback manner. The data signal is supplied to the switching control circuit 10
9 is taken into the memory circuit 103 from the switching circuit 102 by the ON signal of 9, and inverted by the inverter 103-2, and the output is fed back by the clocked inverter 103-1 operated by the OFF signal of the switching control circuit 109 to hold the data signal. I do. LCD pixel driver 1
04 can be constituted by transmission gates 104-1 and 104-2 having two CMOS transistors. When the data signal held in the memory circuit 103 is at the H level, the transmission gate 104-1 connected to the first voltage signal line 118 that causes the liquid crystal to display black in the case of normally white display in the liquid crystal pixel driver 104. It becomes conductive and the pixel electrode 106
The first voltage 116 is supplied to the liquid crystal pixel 105 by a potential difference from the reference voltage 122 supplied to the counter electrode 108.
Becomes a black display state. Similarly, when the held data signal is at the L level, the transmission gate 104-2 connected to the second voltage signal line 119 is turned on, the second voltage 117 is supplied to the pixel electrode 106, and the liquid crystal pixel 105 becomes a white display state.

Further, the overall configuration of the liquid crystal device configured as described above will be described with reference to FIGS.
FIG. 13 is a plan view of the liquid crystal device substrate 10 together with the components formed thereon as viewed from the counter substrate 20 side. FIG.
It is -H 'sectional drawing.

Referring to FIG. 13, a sealing material 52 is provided along the edge of the liquid crystal device substrate 10 made of, for example, a semiconductor substrate. A light-shielding film (frame) 53 surrounding the pixel region is provided. In a region outside the sealing material 52, a column scanning line driving circuit 113 and a mounting terminal 102 are provided along one side of the liquid crystal device substrate 10, and a row scanning line driving circuit 111 is disposed adjacent to the one side. It is provided along the side. If the delay of the row scanning signal supplied to the row scanning line 110 does not matter, the row scanning line driving circuit 111 may be provided on only one side. The opposing substrate 20 is made of a transparent substrate such as glass. At least one of the corners of the opposing substrate 20 is used to establish electrical continuity between the liquid crystal device substrate 10 and the opposing substrate 20. Conductive material 1
06 is provided. The counter substrate 20 includes a sealing material 52.
To the liquid crystal device substrate 10. And
The liquid crystal 107 is sealed in the gap formed by the pair of substrates 10 and 20. As the liquid crystal 107, various liquid crystals such as a twisted nematic (TN) type, a vertical alignment type, a horizontal alignment type having no twist, a bistable type such as a ferroelectric type, and a polymer dispersion type can be used. In FIG. 14, 1
Reference numeral 06 denotes pixel electrodes arranged in a matrix on the liquid crystal device substrate 10 in the pixel region, 22 denotes a black matrix formed on the opposing substrate 20 (this may be omitted), and 108 denotes an opposing substrate. This is a counter electrode made of ITO. Note that the pixel electrode 106 and the counter electrode 108 may be arranged to face the liquid crystal device substrate 20 to apply a horizontal electric field to the liquid crystal 107.
Further, the liquid crystal device substrate 10 is not limited to a semiconductor substrate, but is formed of a glass substrate, and constitutes a pixel driving circuit based on a thin film transistor formed of a silicon layer formed on the substrate. It may be configured.

In each of the following embodiments, the configuration of the liquid crystal device is the same as that shown in FIGS.

(Second Embodiment) FIG. 3 shows a second embodiment of the present invention.
FIG. 2 is a block diagram illustrating main parts such as a pixel and a driving circuit thereof in a liquid crystal device which is an electro-optical device according to the embodiment;
FIG. 4 is a detailed circuit diagram.

In this embodiment, as shown in FIG. 3, the column data lines 115 are added to the block diagram of FIG. 1 shown in the first embodiment.
Has a configuration in which a latch circuit 201 arranged at a point branched from the input data line 114 is added. In the present embodiment, configurations that are not particularly described are the same as those in the first embodiment.

The latch circuit 201 is connected to the column scanning line 112-m
When is selected, the data signal from the input data line 114 is taken into the corresponding column data line 115-d, and when not selected, the data signal on the column data line 115-d is held.

With the above configuration, the parasitic capacitance of the input data line 114 can be reduced to only the capacitance of the column data line 115 connected to the selected latch circuit 201.
Power consumption can be greatly reduced.

In this embodiment, as shown in FIG. 4, the latch circuit 20 is added to the circuit diagram of FIG. 2 shown in the first embodiment.
1 is added. The latch circuit 201 includes clocked inverters 201-1 and 201-2 each having a CMOS transistor configuration.
01-2 and CMOS transistor configured inverter 20
It can be constituted by the logic circuits 1-3. The selection signal of the column scanning line 112-m is used as a control signal of the latch circuit 201 together with the signal inverted by the inverter 202 having a CMOS transistor configuration. The data signal input from the input data line 114 is a column scan line 112-m
At the falling edge of the selection signal, and is inverted by the inverter 201-3 at the first stage, inverted by the inverter 201-3, and the output is fed back by the clocked inverter 201-2 at the rising edge of the selection signal of the column scanning line 112-m. Then, the operation of holding the data signal is performed.

(Third Embodiment) FIG. 5 shows a third embodiment of the present invention.
FIG. 3 is a block diagram illustrating a main part of a pixel of a liquid crystal device which is an electro-optical device according to the embodiment and a driving circuit thereof. FIG. 6 is a detailed circuit diagram.

As shown in FIG. 5, the present embodiment has a configuration in which the simultaneous input data signal has two bits. In the present embodiment, configurations that are not particularly described are the same as those in the first embodiment.

In the pixel area, row scanning lines 110-n (n is a natural number indicating a row of the row scanning lines) and column scanning lines 112-m (m
Are natural numbers indicating the columns of the column scanning lines) are arranged in a matrix, and a driving circuit of each pixel is configured at an intersection of the scanning lines. In the pixel area, two input data lines 1 for the number of simultaneous input data bits are arranged along the column scanning line 112-m.
Column data lines 115-d (d is a natural number indicating the column of the column data line) branched from 14 are also arranged. A row scanning line driving circuit 111 is arranged in a peripheral area on the row side of the pixel area, and a column scanning line driving circuit 113 is arranged in a peripheral area on the column side of the pixel area.

The row scanning line driving circuit 111 is controlled by the row scanning line driving circuit control signal 120, and a selection signal is output to the selected row scanning line 110-n. Unselected row scanning lines are set to a non-selection potential. Similarly, the column scanning line driving circuit 11 is controlled by the column scanning line driving circuit control signal 121.
3 is controlled, a selection signal is output to the selected column scanning line 112-m, and an unselected column scanning line is set to a non-selection potential. Which row scanning line and which column scanning line to select is determined by the control signals 120 and 121. That is, the control signals 120 and 121 are address signals that specify the selected pixel.

The switching control circuit 109 arranged near the intersection of the selected row scanning line 110-n and the selected column scanning line 112-m receives the selection signal of both scanning lines and outputs an ON signal. Row scanning line 110-n and column scanning line 11
When at least one of 2-m is not selected, an off signal is output. That is, only the switching control circuit 109 of the pixel located at the intersection of the selected row scanning line and column scanning line outputs an ON signal, and the other switching control circuits output OFF signals. In the present embodiment, two liquid crystal pixel driving circuits 101 are controlled by an on / off signal of one switching control circuit 109.

Next, the configuration and operation of the liquid crystal pixel drive circuit 101 will be described.

The switching circuit 102 is turned on by an on signal of the switching control circuit 109 and is turned off by an off signal. When the switching circuit 102 is turned on, the column data line 1 connected thereto is turned on.
The 15-d data signal is written to the memory circuit 103 via the switching circuit 102. On the other hand, the switching circuit 102 is turned off by the off signal of the switching control circuit 109 and holds the data signal written in the memory circuit 103.

The data signal held in the memory circuit 103 is supplied to a liquid crystal pixel driver 104 arranged for each pixel. The liquid crystal pixel driver 104 supplies the first voltage 116 supplied to the first voltage signal line 118 or the second voltage 117 supplied to the second voltage signal line 119 according to the level of the supplied data signal. One of the liquid crystal pixels 10
5 to the pixel electrode 106. The first voltage 116 is
When the liquid crystal device performs a normally white display, this voltage is a voltage for bringing the liquid crystal pixel 105 to a black display state, while the second voltage 117 is a voltage for bringing the liquid crystal pixel 105 to a white display state.

When the data signal held in the memory circuit 103 is at the H level, in the liquid crystal pixel driver 104, the gate connected to the first voltage signal line 118 for displaying the liquid crystal in black in the case of normally white display is turned on. In this state, the first voltage 116 is supplied to the pixel electrode 106, and the liquid crystal pixel 105 enters a black display state due to a potential difference from the reference voltage 122 supplied to the counter electrode 108. Similarly, when the held data signal is at the L level, the gate of the liquid crystal pixel driver 104 connected to the second voltage signal line 119 is turned on, and the second voltage 117 is supplied to the pixel electrode 106, and the liquid crystal is supplied. The pixel 105 enters a white display state.

With the above configuration, the power supply voltage, the first and second
When the voltage signal and the reference voltage can be driven at about the logic voltage, and the screen display does not need to be rewritten, the display state can be held by the data holding function of the memory circuit, so that almost no current flows. In addition, a configuration in which writing to pixels is controlled by the logic of a selection signal of two scanning lines of a row and a column allows pixels to be controlled irrespective of the potential of a data line. The data signals of the two data lines are set to the opposite phase (complementary data signal) when writing data,
When data is held, complicated control such as making the data line high impedance and turning off the transistor connected to the data line becomes unnecessary. Further, since the two liquid crystal pixel driving circuits 101 are simultaneously controlled by one switching control circuit 109, the number of the switching control circuits 109 can be reduced by half, and the circuit configuration of the column scanning line driving circuit 113 can be simplified. can do.

The liquid crystal pixel 105 has a pixel electrode to which either one of the first voltage 116 or the second voltage 117 output from the liquid crystal pixel driver 104 is selected and supplied according to the held data signal. 106 is provided for each pixel, a potential difference between the two electrodes is applied to a liquid crystal layer 107 interposed between the pixel electrode 106 and the counter electrode 108, and a black display state is set according to a change in alignment of liquid crystal molecules according to the potential difference. (Also called an ON display state) or a white display state (also called an OFF display state). In a liquid crystal device, liquid crystal is sealed and sandwiched between a semiconductor substrate and a light-transmitting substrate such as glass, and pixel electrodes are arranged in a matrix on the semiconductor substrate.
Below the pixel electrodes, the liquid crystal pixel drive circuit, row scan lines, column scan lines, data lines, row scan line drive circuits, column scan line drive circuits, and the like are formed. Since a complementary transistor having a high mobility in a MOS structure can be formed on a semiconductor substrate and a multilayer wiring structure can be easily formed, the above-described various circuits can be formed using the transistor and the multilayer wiring.
Each pixel applies a voltage for each pixel between the pixel electrode 106 and a counter electrode 108 formed on the inner surface of the opposing light transmitting substrate, and a liquid crystal layer 107 for each pixel interposed therebetween.
And the orientation of the liquid crystal molecules is changed for each pixel.

At this time, the pixel electrode 10 of the liquid crystal pixel 105
6 is configured as a light-reflective electrode such as a metal or dielectric multilayer film, and a liquid crystal pixel driving circuit 101 is provided on a semiconductor substrate below a liquid crystal pixel electrode via an electrical insulating film.
The aperture ratio is greatly improved. That is, conventionally, each liquid crystal pixel drive circuit is configured using a TFT on a transparent substrate, and the aperture ratio of the liquid crystal pixel is determined by the area occupied by one pixel area of the liquid crystal pixel drive circuit which is not a light transmission region. In contrast, in the present invention, the pixel electrode and the liquid crystal pixel driving circuit have a laminated structure, and a reflective pixel electrode almost close to the entire area of one pixel can be arranged on the liquid crystal pixel driving circuit. , The aperture ratio is greatly improved, and a bright and easy-to-read screen is obtained.

The column scanning line driving circuit 113 in FIG. 5 can be constituted by a shift register circuit as shown in FIG. In FIG. 9, a control signal 121 for a column scanning line driving circuit comprising two signals of a scanning signal 121-1 of positive logic (H level is an active level) and a clock signal 121-2 is input and synchronized with the clock signal 121-2. Then, the column scanning lines 112-m can be sequentially selected by negative logic (active level when L level). That is, the clock signal 121-2 is output from the inverter 1 having the CMOS transistor configuration.
The signal inverted in step 13-6 is used as a control signal for the shift register circuit, and the scanning signal 121-1 is taken in by the clocked inverter 113-1 having a CMOS transistor configuration at the first stage at the rising edge of the clock signal 121-2. The inverted signal is inverted by the CMOS transistor-structured inverter 113-3, and the output is fed back by the two CMOS transistor-structured clocked inverters 113-2 and 113-4 at the falling edge of the clock signal 121-2 to hold the scanning signal. The operation and the transfer operation of the scanning signal to the next stage are performed, and the scanning signal is sequentially transferred. C
MOS transistor configuration NAND gate circuit 113-
Numeral 5 performs a logical product of outputs of two adjacent stages and outputs a selection signal. The NAND gate circuit 113-5 outputs the selection signal 11
The output phases of 2-m and 112-m + 1 are provided so as not to overlap each other. According to this configuration, the scanning lines are sequentially selected.

Similarly, if the row scanning line driving circuit 111 is also formed of a shift register circuit similar to that of FIG. 9, the circuit configuration and control of the two scanning line driving circuits can be simplified.

Further, the column scanning line driving circuit 113 controls the number of bits (AX0, / AX) according to the number of scanning lines as shown in FIG.
0, AX7, / AX7). A decoder circuit configuration for receiving a column scanning line drive circuit control signal 121 composed of an address signal is provided.
21 is decoded by a NAND gate circuit 113-7 having a CMOS transistor configuration, and the corresponding column scanning line 112 is decoded.
−m can be selected and a selection signal can be output. According to such a configuration, a selection signal can be output to an arbitrary scanning line according to an address signal, and each pixel can be randomly accessed.

Similarly, the row scanning line driving circuit 111 is also provided in FIG.
If it is configured with a decoder circuit similar to that described above, it is possible to rewrite the data signal by controlling the liquid crystal pixel drive circuit of only the target pixel when rewriting only the display of a part of the screen. In the present invention, each pixel is provided with a memory circuit 103, and holds a data signal written in the memory circuit 103 unless the switching circuit 102 is turned on by a selection signal of a row and a column scanning line. It is possible to access and rewrite only the pixel to be rewritten.

As shown in FIG. 6, in the present embodiment, the switching control circuit 109 can be constituted by a logic circuit of a NOR gate circuit 109-1 having a CMOS transistor configuration and an inverter 109-2 having a CMOS transistor configuration. NOR gate circuit 109-1 is 2
When a negative logic selection signal is input to both inputs, a positive logic ON signal is output, and the inverter 109-2 outputs a negative logic ON signal. Further, the switching circuit 102 can be configured by a transmission gate 102-1 having a CMOS transistor configuration. The transmission gate 102-1 has a switching control circuit 109.
Is turned on based on the ON signal, the column data line 115 is connected to the memory circuit 103, and turned off based on the OFF signal. The memory circuit 103 can have a configuration in which a clocked inverter 103-1 having a CMOS transistor configuration and an inverter 103-2 having a CMOS transistor configuration are connected in a feedback manner. The data signal is supplied to the switching control circuit 10
9 is taken into the memory circuit 103 from the switching circuit 102 by the ON signal of 9, and inverted by the inverter 103-2, and the output is fed back by the clocked inverter 103-1 operated by the OFF signal of the switching control circuit 109 to hold the data signal. I do. LCD pixel driver 1
04 can be constituted by transmission gates 104-1 and 104-2 having two CMOS transistors. When the data signal held in the memory circuit 103 is at the H level, the transmission gate 104-1 connected to the first voltage signal line 118 that causes the liquid crystal to display black in the case of normally white display in the liquid crystal pixel driver 104. It becomes conductive and the pixel electrode 106
The first voltage 116 is supplied to the liquid crystal pixel 105 by a potential difference from the reference voltage 122 supplied to the counter electrode 108.
Becomes a black display state. Similarly, when the held data signal is at the L level, the transmission gate 104-2 connected to the second voltage signal line 119 is turned on, the second voltage 117 is supplied to the pixel electrode 106, and the liquid crystal pixel 105 becomes a white display state.

In this embodiment, the simultaneous input data signal has two bits, but the present invention is not limited to this. For example,
In order to simultaneously input data signals for the three colors RGB when performing color display, the simultaneous input data signal may be 3 bits.

(Fourth Embodiment) FIG. 7 shows a fourth embodiment of the present invention.
FIG. 3 is a block diagram illustrating main parts such as pixels and a driving circuit of the liquid crystal device which is the electro-optical device according to the embodiment.
FIG. 8 is a detailed circuit diagram thereof.

In this embodiment, as shown in FIG. 7, the column data lines 115 are added to the block diagram of FIG. 5 shown in the third embodiment.
Has a configuration in which a latch circuit 201 arranged at a point branched from the input data line 114 is added. Configurations that are not particularly described in the present embodiment are the same as those in the third embodiment.

The latch circuit 201 is connected to the column scanning line 112-m
When the data is selected, the data signal from the input data line 114 is taken into the corresponding column data line 115-d, and when not selected, the data signal of the column data line 115-d is held.

With the above configuration, the parasitic capacitance of the input data line 114 can be limited to the capacitance of the column data line 115 connected to the selected latch circuit 201.
Power consumption can be greatly reduced.

In this embodiment, as shown in FIG. 8, the latch circuit 20 is added to the circuit diagram of FIG. 6 shown in the third embodiment.
1 is added. The latch circuit 201 includes clocked inverters 201-1 and 201-2 each having a CMOS transistor configuration.
01-2 and CMOS transistor configured inverter 20
It can be constituted by the logic circuits 1-3. The selection signal of the column scanning line 112-m is used as a control signal of the latch circuit 201 together with the signal inverted by the inverter 202 having a CMOS transistor configuration. The data signal input from the input data line 114 is a column scan line 112-m
At the falling edge of the selection signal, and is inverted by the inverter 201-3 at the first stage, inverted by the inverter 201-3, and the output is fed back by the clocked inverter 201-2 at the rising edge of the selection signal of the column scanning line 112-m. Then, the operation of holding the data signal is performed.

In this embodiment, the simultaneous input data signal is 2 bits, but the present invention is not limited to this. For example,
In order to simultaneously input data signals for the three colors RGB when performing color display, the simultaneous input data signal may be 3 bits.

(Fifth Embodiment) FIG. 11 shows the first embodiment.
An example in which the electro-optical device according to the present invention according to the fourth to fourth embodiments is used for a mobile phone is shown. Display 301 of mobile phone 302
The liquid crystal device of the present invention was used.

With the above-described configuration, when the battery is driven, a significantly longer life can be realized as compared with a conventional electronic device using a simple matrix type liquid crystal device, and a conventional static drive type liquid crystal device can be realized. A simpler control method and control circuit configuration can be achieved.

In the present embodiment, a mobile phone is taken as an example.
It is not limited to this. For example, the electro-optical device of the present invention can be applied to various electronic devices such as a clock, a pager, and a projector. In the case of a projector, the electro-optical device of the present invention is used as a light modulation device.

The electro-optical device according to the present invention is not limited to the above-described embodiments, but can be appropriately modified without departing from the spirit or spirit of the invention which can be read from the entire specification of the present application. An electro-optical device with various changes is also included in the technical scope of the present invention.

For example, in each embodiment, a liquid crystal device has been described as an electro-optical device. However, the present invention can be applied to an electro-optical device in which pixels are replaced with liquid crystal pixels and replaced with other electro-optical members. Electro-optical devices other than liquid crystal devices include a digital micromirror device (DMD) that arranges a mirror for each pixel and changes the angle of the mirror according to an image signal, and a plasma display panel (PDP). , A field emission display (FED), an electroluminescence (EL), etc., in each pixel.
However, such an electro-optical device may be configured with only a single substrate on which a pixel circuit is formed, or a glass substrate may be used instead of a semiconductor substrate. Even so, the present invention can be applied.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a main part of a pixel and a driving circuit thereof of an electro-optical device according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram in which a driving circuit of the electro-optical device according to the first embodiment of the present invention is configured by CMOS transistors.

FIG. 3 is a block diagram illustrating a main part of a pixel and a driving circuit thereof of an electro-optical device according to a second embodiment of the invention.

FIG. 4 is a circuit diagram in which a driving circuit of an electro-optical device according to a second embodiment of the present invention is configured by CMOS transistors.

FIG. 5 is a block diagram showing a main part of a pixel and a driving circuit thereof of an electro-optical device according to a third embodiment of the present invention.

FIG. 6 is a circuit diagram in which a driving circuit of an electro-optical device according to a third embodiment of the present invention is configured by CMOS transistors.

FIG. 7 is a block diagram showing a main part of a pixel and a driving circuit thereof of an electro-optical device according to a fourth embodiment of the present invention.

FIG. 8 is a circuit diagram in which a driving circuit of an electro-optical device according to a fourth embodiment of the present invention is configured by CMOS transistors.

FIG. 9 is a circuit diagram in which the scanning line drive circuit of the electro-optical device according to the first to fourth embodiments of the present invention is configured by a shift register circuit having a CMOS transistor configuration.

FIG. 10 is a circuit diagram in which a scanning line driving circuit of the electro-optical device according to the first to fourth embodiments of the present invention is configured by a decoder circuit having a CMOS transistor configuration.

FIG. 11 is a view showing an electronic device according to a fifth embodiment of the present invention.

FIG. 12 is a diagram showing a conventional static drive type liquid crystal device.

FIG. 13 is a plan view of a liquid crystal device.

FIG. 14 is a cross-sectional view of the liquid crystal device of FIG.

[Explanation of symbols]

 101: liquid crystal pixel driving circuit 102: switching circuit 103: memory circuit 104: liquid crystal pixel driver 105: liquid crystal pixel 106: pixel electrode 107: liquid crystal layer 108: facing Electrode 109: Switching control circuit 110: Row scanning line 111: Row scanning line driving circuit 112: Column scanning line 113: Column scanning line driving circuit 114: Input data line 115 Column data line 116 first voltage 117 second voltage 118 first voltage signal line 119 second voltage signal line 120 for row scanning line drive circuit Control signal 121: Control signal for column scanning line drive circuit 122: Reference voltage 201: Latch circuit 301: Display unit 302: Mobile phone

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (Reference) G02F 1/133 550 G02F 1/133 550 G09G 3/36 G09G 3/36

Claims (8)

[Claims] A plurality of row scanning lines and a plurality of column scanning lines intersecting each other, a plurality of data lines arranged along the column scanning lines, and a voltage signal line for supplying a voltage signal. A plurality of pixel driving circuits arranged corresponding to intersections of the row scanning lines and the column scanning lines, wherein each of the pixel driving circuits is in a conductive state when the row scanning lines and the column scanning lines are selected. And a switching circuit that is non-conductive when at least one of the row scanning line and the column scanning line is not selected, and a data signal of the data line when the switching circuit is conductive, and the switching circuit is non-conductive. A memory circuit for holding a data signal when in a conductive state, and outputting the first voltage signal to the pixel from the voltage signal line to the pixel when the data signal held in the memory circuit is at a first level; From the voltage signal line to the pixel when the second
And a pixel driver that outputs the voltage signal. 2. A latch circuit for each data line, wherein a data signal is taken into a corresponding data line when the column scanning line is selected, and a latch circuit which holds a data signal of the data line when not selected is provided. The electro-optical device according to claim 1. 3. The pixel drive circuit according to claim 1, wherein the pixel electrode disposed in the pixel is a light reflection type electrode, and the pixel drive circuit is disposed below the pixel electrode via an electrical insulating film. 3. The electro-optical device according to any one of claims 1 to 2. 4. A conduction control signal is output to the switching circuit when the row scanning line and the column scanning line are selected, and a non-conduction control signal is output to the switching circuit when at least one of the row scanning line and the column scanning line is non-conduction. 4. The electro-optical device according to claim 1, further comprising a plurality of switching control circuits, wherein the switching control circuit controls the switching circuits in the plurality of pixel driving circuits. 5. 5. A row scanning line driving circuit for supplying a row scanning signal to the row scanning line, and a column scanning line driving circuit for supplying a column scanning signal to the column scanning line. At least one of a driving circuit and the column scanning line driving circuit,
The electro-optical device according to any one of claims 1 to 4, wherein the electro-optical device is configured by a shift register circuit. 6. A row scanning line driving circuit for supplying a row scanning signal to the row scanning line, and a column scanning line driving circuit for supplying a column scanning signal to the column scanning line, wherein: At least one of a driving circuit and the column scanning line driving circuit,
5. The electro-optical device according to claim 1, further comprising a decoder circuit that selects a corresponding scanning line with an address signal having a bit number corresponding to the number of the scanning lines. 7. The electro-optical device according to claim 1, wherein the circuit element structure is a CM.
The electro-optical device according to claim 1, wherein the electro-optical device has an OS structure. 8. An electronic apparatus comprising the electro-optical device according to claim 1.