JP2002329950A - Method for applying electroplating to printed circuit board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a plating method which can set a power supplying circuit simply and form an electroplating layer of high quality, irrespectively of a design of a circuit pattern and a position of a part to be plated, mainly in a board for mounting a semiconductor chip or a printed circuit for a package. SOLUTION: Through holes to circuit patterns 11, 12 having the parts to be plated are formed, a conductive material is spread on a rear, and a conductive coating film 18 is formed. By using the film 18 as an electrode, a current is made to flow in the circuit patterns having the parts to be plated, which are subjected to electroplatings 21, 22. Although a special restriction does not exist, the plating method is mainly suitable for the board for mounting a semiconductor chip or the printed circuit for a package.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for producing a printed wiring board, particularly a printed wiring board used as a substrate for mounting a semiconductor chip, by subjecting a desired portion of a circuit pattern to electrolytic plating.

[0002]

2. Description of the Related Art It is necessary to mount a solder ball on a printed circuit board used for a semiconductor mounting substrate or a package or to apply a noble metal plating such as gold plating to a circuit portion to be wire-bonded. The plating method at this time includes an electrolytic plating method and an electroless plating method. When using the electrolytic plating method, peel strength with copper foil,
Although a high-quality plating layer having a high bonding strength to a wire or solder can be obtained, this method needs to secure a conductive path for supplying current to a portion to be plated.

[0003] A part of the circuit is connected to a ground or a circuit pad for a power supply, and there are also parts that can be supplied with power through them. An appropriate power supply circuit is provided to supply power, and after plating required portions, the power supply circuit is removed. However, the laying of such a power supply circuit has a great influence on the design of the printed circuit, so that the product can be downsized,
High frequency response will be impaired. Therefore, electroless plating is often used for products for which a power supply circuit cannot be laid, but this method has a problem that a high-quality plating layer cannot be obtained.

[0004]

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a simple method irrespective of the design of a circuit pattern and the position of a portion to be plated. Another object of the present invention is to provide a plating method capable of setting a power supply circuit in the apparatus and forming a high-quality electrolytic plating layer.

[0005]

The object of the present invention is to provide a method for performing electrolytic plating on a key portion of a circuit of a printed circuit board formed by etching a surface copper foil layer, as follows:
Providing a conductive hole from the circuit pattern having the portion to be plated to the back surface of the substrate; (b) forming a conductive coating on a surface including at least the opening of the circuit pattern leading to the conductive hole on the back surface, having a portion to be plated; A step of forming a conductive path leading to the circuit pattern, (c) a step of masking the circuit pattern except for a portion to be plated, and (d) a step of electrolytic plating the portion to be plated with the conductive film as an electrode. And (e) removing the conductive film.

[0006] In a preferred embodiment, a step of laminating an insulating coating on the surface of the conductive film and a step of performing a preflux treatment on the conductor surface from which the conductive film has been removed are added during the above steps. In general, the electrolytic plating layer is composed of an underlying nickel plating layer and a surface gold plating layer.

[0007] Further, in the case where portions to be plated are present in the circuit patterns on both the front and back surfaces, first, the portions to be plated on one surface are subjected to electrolytic plating by the above-described method, and the conductive coating used at that time is applied. After at least partial removal, electroplating is performed on the other portion to be plated in the same manner, and the conductive film is completely removed to achieve the object.

[0008] As the conductive hole, a through hole provided in the circuit board can be used as it is. A circuit component having no through-hole may be provided with a simple through-hole as necessary, which can be used as a conductive hole to be filled with a conductive resin.

In some cases, the conductive holes need not be provided for all circuit patterns having portions to be plated. That is, depending on its function, a part of the circuit pattern may be connected to another circuit pattern existing on the same surface to supply power to the portion to be plated.

[0010] As the material for forming the conductive film, specific resistance 5
A conductive resin of × 10 ⁻² Ω / cm or less is recommended. These resins are used in the form of varnish or paste, and are applied to the entire surface or a part of the substrate by a dispenser method or a printing method. Although the present invention can be applied to any printed circuit board, it is particularly recommended to apply the present invention to a semiconductor chip mounting board.

[0011]

Embodiments of the present invention will be specifically described below with reference to the drawings. FIG. 1 is a partially enlarged cross-sectional view showing a configuration before plating of a printed wiring board which has a portion to be plated on only one surface and is plated by the method of the present invention,
2 is a partially enlarged cross-sectional view showing a state in which a conductive hole different from a through hole is provided in the printed wiring board shown in FIG. 1, FIG.
Is a partially enlarged cross-sectional view showing a state in which a conductive coating is formed on the back surface of the printed wiring board shown in FIG. 2, and FIG. 4 is a drawing in which an insulating coating is applied on the conductive coating of the printed wiring board shown in FIG. FIG. 5 is a partially enlarged cross-sectional view showing a state in which masking has been performed on a surface to be plated, and FIG. 5 is a view showing a state in which nickel and gold plating have been performed on the plated part of the printed wiring board shown in FIG. FIG. 6 is a partially enlarged cross-sectional view showing a completed plating state obtained by removing the conductive coating, the insulating coating, and the masking layer from the state shown in FIG. 5.

FIG. 7 is a partially enlarged cross-sectional view showing a state before plating of a printed wiring board which has portions to be plated on both front and back sides and is plated by the method of the present invention, and FIG. 9 is a partially enlarged cross-sectional view showing a state in which conductive holes different from through holes are provided in the printed wiring board shown in FIG. 9, and FIG. 9 is a diagram showing a conductive film and an insulating coating on one surface of the printed wiring board shown in FIG. FIG. 10 is a partially enlarged cross-sectional view showing a state in which the other surface is masked, and FIG. 10 is a diagram showing a state in which a plated portion of the printed wiring board shown in FIG. FIG. 11 is a partially enlarged cross-sectional view showing a state where masking is removed.
Is a partially enlarged cross-sectional view showing a state where a conductive coating, an insulating coating, and masking are applied to the surfaces opposite to those shown in FIG. 9, and FIG. 12 is still plated as shown in FIG. Apply nickel plating and gold plating to the parts to be plated,
FIG. 4 is a partially enlarged cross-sectional view showing a plating completed state obtained by removing a conductive film, an insulating coating, and masking.

In FIG. 1, reference numeral 1 denotes a printed wiring board, and in the figure, circuit patterns 11, 12 and 13 formed by etching a copper foil laminated on the front and back of a synthetic resin substrate 10;
Through hole for electrically connecting circuit patterns 11 and 13
14 is shown. In the circuit patterns 11 and 12 provided on the upper surface side in the drawing, plated portions 15 and 16 to be plated with gold are defined.

An object of the present invention is to form a special circuit for electrolytic plating on the surface of the substrate 10 for this plating,
An object of the present invention is to provide a method for performing electrolytic plating.

[0015] For this purpose, in the present invention, a circuit pattern connected to a portion to be plated, which is present on one surface of a printed wiring board immersed in an electrolytic bath, is supplied from another side of the substrate by electrolysis. So that it can be plated.

[0016] For this reason, a conductive film is formed on the other surface for use as an electrode, and the conductive film leads from this conductive film to a circuit pattern connected to the portion to be plated on the one surface. Form an electrical path. Through-holes are used as power supply paths for this purpose, but for circuit patterns that do not have through-holes, conductive holes are provided on the substrate, and the holes are filled with the same conductive material when forming a conductive coating. Then, a power supply path is formed.

It is recommended that this conductive film be previously coated with an insulating coating in order to prevent gold from being deposited in the electrolytic bath. The printed circuit to be subjected to electrolytic plating is subjected to masking except for a portion to be plated, and nickel plating as a base and gold plating of a surface layer are applied by a conventional method.

In FIG. 2, the printed wiring board 1 shown in FIG.
The state where the through holes 17 are provided is shown. The through hole 17 is for forming a conductive path from the other surface of the substrate 10 to the circuit pattern 12 having no through hole.

Next, as shown in FIG. 3, a conductive film 18 is formed on the other surface, that is, the lower surface in the figure. In order to form the conductive film 18, a paste of varnish, acrylic resin or epoxy resin containing conductive fine particles is applied. These conductive materials are applied to the substrate surface by a dispenser or printing, a part of which penetrates into the conductive holes 17 and forms a conductive path to the printed circuit element 12. This conductive film 18 has a specific resistance
It is desirably 5 × 10 ⁻² Ω / cm or less. When the specific resistance is so low, the thickness of this coating is about 50 μm.

Next, as shown in FIG. 4, an insulating coating 19 is laminated on the surface of the conductive coating 18, and a masking 20 is applied to the side to be plated except for the parts 15 and 16 to be plated. Is done. For the insulating coating 19, a dry film, a photocurable resin, or the like can be used. These are to prevent gold from depositing on the surface of the conductive film 18 in the electrolytic plating bath.

In the state shown in FIG. 4, a portion to be plated 15 and a conductive film 18 are used as electrodes using a common electrolytic plating bath.
16 is subjected to electrolytic nickel plating and gold plating. The plated state is shown in FIG.

Finally, the insulating coating 19, the conductive coating 18, and the masking 20 are removed. FIG. 6 shows a state where these are removed. As described above, according to the present invention, the nickel plating 21 and the gold plating 22 having a desired quality, shape and thickness can be applied to a desired portion to be plated without providing a special printed circuit element for power supply. However, removal of the masking 20 is not essential, and the product may be left as it is.

FIG. 7 shows a printed wiring board having portions to be plated on both front and back surfaces. Thus, in FIG.
Reference numeral 00 denotes a printed wiring board.
Circuit patterns 111, 112, 114, 115 formed by etching the copper foil laminated on the front and back, circuit patterns 111 and 1
A through hole 116 for electrically coupling 13 is shown. Thus, the circuit pattern 111 provided on the upper side in the drawing
To 115 each to be plated with gold
17, 118, 119, 120 and 121 are defined.

First, as shown in FIG. 8, conductive holes 122 and 123 are formed. The conductive hole 122 is for forming a conductive path for supplying power to the printed circuit element 114, and the conductive hole 123 is for forming a conductive path for short-circuiting the printed circuit elements 112 and 115.

First, in order to apply plating to the plated portion on the upper surface side in the figure, as shown in FIG.
24 is formed, and an insulating layer 125 is laminated on the surface,
Masking 126 is applied to all the circuit elements on the upper surface except for the portions to be plated.

FIG. 10 shows that the plated portions 117 and 118 of the printed wiring board shown in FIG.
28, the masking 126 and the conductive coatings 127 and 128 are removed.

Next, in order to apply electrolytic plating to the portion to be plated on the lower surface in the figure, as shown in FIG.
Form 9 and laminate the insulating coating 130 on its surface,
Plated portions 11 are formed on the surfaces of circuit elements 113, 114 and 115 on the lower side.
Masking 131 is applied except for 9, 120 and 121, and then, in a plating bath, power is supplied from the conductive film 129, and
Plating 9, 120 and 121 are applied.

In FIG. 12, plating is completed, and plating layers 127, 128, 132, 133 and 134 are formed on all portions to be plated, and the conductive coating 129, the insulating coating 130 and the masking 131 are removed. Is shown. However, at this stage, the product may be made with the masking left. After plating in this manner, a known post-treatment such as a pre-flux treatment is performed to obtain a finished product.

The structure of the present invention is not limited to the above-described embodiment. For example, the plating method may be combined with electroless plating.
In addition to nickel, silver, gold, platinum, palladium, an alloy thereof, or the like may be appropriately used depending on the application or the like, and the present invention covers all of the polarization examples.

【The invention's effect】

Since the present invention is configured as described above, according to the present invention, a high quality electrolytic plating can be applied to a desired portion without performing a lead wiring for plating as a printed circuit. Therefore, the printed circuit can be made compact and can be constructed. The method of the present invention is suitable for mass production, and has a very low reject rate, thereby increasing the reliability of the plated portion at low cost, so that it can provide inexpensively high-quality semiconductor mounting boards and other printed wiring boards. become

[Brief description of the drawings]

FIG. 1 is a partially enlarged cross-sectional view showing a configuration before plating of a printed wiring board having a portion to be plated on only one surface and plated by a method of the present invention.

FIG. 2 is a partially enlarged cross-sectional view showing a state where conductive holes different from through holes are provided in the printed wiring board shown in FIG. 1;

FIG. 3 is a partially enlarged cross-sectional view illustrating a state where a conductive film is formed on the back surface of the printed wiring board illustrated in FIG. 2;

FIG. 4 is a partially enlarged cross-sectional view showing a state in which an insulating coating is applied on the conductive coating of the printed wiring board shown in FIG. 3 and a surface having a portion to be plated is masked.

5 is a partially enlarged cross-sectional view showing a state where a portion to be plated of the printed wiring board shown in FIG. 4 is plated with nickel and gold.

6 is a partially enlarged cross-sectional view showing a completed state of plating obtained by removing a conductive coating, an insulating coating, and a masking layer from the state shown in FIG. 5;

FIG. 7 is a partially enlarged cross-sectional view showing a state before plating of a printed wiring board which has portions to be plated on both front and back sides and is plated by the method of the present invention.

8 is a partially enlarged cross-sectional view showing a state where conductive holes different from through holes are provided in the printed wiring board shown in FIG. 7;

9 is a partially enlarged cross-sectional view showing a state in which a conductive film and an insulating coating are provided on one surface of the printed wiring board shown in FIG. 8 and the other surface is masked.

10 is a partially enlarged cross-sectional view showing a state where a portion to be plated of the printed wiring board shown in FIG. 9 is plated and a conductive film, an insulating coating, and masking are removed.

FIG. 11 is a partially enlarged cross-sectional view showing a state where a conductive film, an insulating coating, and masking have been applied to surfaces opposite to those shown in FIG. 9;

FIG. 12 is a view showing an unplated portion shown in FIG. 11 which is subjected to nickel plating and gold plating to form a conductive film,
FIG. 4 is a partially enlarged cross-sectional view showing a completed plating state obtained by removing an insulating coating and masking.

[Explanation of symbols]

 1, 100 Printed wiring board 10, 110 Synthetic resin board 11, 12, 13, 111, 112, 113, 114, 115 Circuit pattern 14, 116 Through hole 15, 16, 117, 118, 119, 120, 121 Plated Part 17, 122, 123 Conductive hole 18, 124, 129 Conductive coating 19, 125, 130 Insulating coating 20, 126, 131 Masking 21 Nickel plating layer 22 Gold plating layer 127, 128 Electrolytic plating layer

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H05K 3/40 H05K 3/40 K F term (Reference) 4K024 AA03 AA11 AB02 AB08 BA11 BB11 DA10 5E317 AA24 BB22 CD25 CD27 GG16 5E319 AA01 AC17 CC22 CD21 GG03 GG15 5E343 AA02 BB16 BB24 BB71 BB72 DD02 DD43 DD75 ER21 ER25 FF12 FF18 GG11 GG18

Claims (11)

[Claims] 1. A method for electrolytically plating a key portion of a circuit of a printed circuit board, comprising etching a surface copper foil layer, comprising the following steps. (a) A step of providing a conductive hole from a circuit pattern having a portion to be plated to a back surface of the substrate. (b) forming a conductive coating on at least the surface of the back surface including the opening of the circuit pattern communicating with the conductive hole, and forming a conductive path communicating with the circuit pattern having the portion to be plated; (c) A step of masking the circuit pattern except for a portion to be plated. (d) a step of subjecting the portion to be plated to electrolytic plating using the conductive film as an electrode. (e) removing the conductive film. 2. The method according to claim 1, further comprising the step of laminating an insulating coating on the surface of the conductive coating. 3. The method according to claim 1, further comprising the step of performing a pre-flux treatment on the conductor surface from which the conductive film has been removed. 4. The method according to claim 1, wherein the electrolytic plating layer comprises a base nickel plating layer and a surface gold plating layer. 5. A method for electroplating a plated portion of a printed circuit board having a plated portion on each of the circuit patterns on both front and back surfaces, wherein the plated portion on one surface is electroplated. Electroplating by the method described in the above, after removing at least partially the conductive film used at that time, the plating portion on the other one side of claim 1
5. The method for performing electrolytic plating according to any one of the above-described items 4, wherein the conductive coating is completely removed after the electrolytic plating is performed. 6. The method according to claim 1, wherein the conductive holes are through holes. 7. The method according to claim 1, wherein the conductive holes are simple through holes. 8. The conductive film has a specific resistance of 5 × 10 ⁻² Ω / c.
8. The method according to claim 1, wherein the conductive resin is not more than m. 9. The method according to claim 8, wherein the conductive film is formed by applying and solidifying a conductive resin paste by a dispenser method. 10. The method according to claim 8, wherein the conductive film is formed by applying a conductive resin paste by a printing method and solidifying the conductive resin paste. 11. The method according to claim 1, wherein the printed circuit board is a substrate for mounting a semiconductor chip.