JP2002277531A - Drfm signal generator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To overcome a problem in a hindrance wave generator using a DRFM(digital radio frequency memory) that a plurality of pulses of different frequencies can neither be stored nor be reproduced simultaneously since only one pulse can be stored and reproduced simultaneously. SOLUTION: This DRFM signal generator is equipped with a distribution circuit for distributing RF signals of received coming pulses different in frequencies and in coming times by a prescribed distribution number for each coming pulse, a plurality of DRFMs for storing and reproducing, as digital data, the RF signals distributed by the distribution circuit, and a synthesis circuit for simultaneously generating hindrance signals including a plurality of frequency components of the coming pulses by simultaneously reading and synthesizing the plurality of digital data pulses reproduced by the DRFMs.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to radar interference (E
The present invention relates to a DRFM signal generation device that generates an interference signal for transmitting an interference wave corresponding to an incoming pulse, which is used in a CM) technique.

[0002]

2. Description of the Related Art FIG. 7 shows a conventional DRFM (Digital).
FIG. 2 is a configuration diagram illustrating a radio frequency memory (Radio Frequency Memory) signal generation device. In the drawing, reference numeral 21 denotes a reception antenna that receives an incoming pulse coming from the surrounding environment;
2 is a receiver for selecting and amplifying incoming pulses received by the receiving antenna 21, 23 is a DRFM for storing and reproducing the pulses amplified by the receiver 22, 24 is a transmitter for amplifying the interference signal reproduced by the DRFM 23, 25 Is a transmitting antenna for transmitting the amplified jamming signal to space. DRFM23 is
A recording circuit 26, a data memory 27, a reproducing circuit 28, and a control circuit 29 are provided.

Next, the operation will be described. FIG. 8 is a timing chart showing an example of an incoming pulse received by the reception antenna 21. As shown, incoming pulses P1, P2, P3 coming from a plurality of different sources of interference
Have different frequencies and arrival times (periods, etc.). Therefore, each of the incoming pulses P1, P2, and P3 may come at the same time as shown in the figure. This arriving pulse is selected and amplified by the receiver 22,
Stored in the RFM 23. DRFM 23 is a control circuit 2
9, the input pulse is transferred to the internal recording circuit 2
At 6, the data is converted into digital data and stored in the data memory 27.

The pulse digital data stored in the data memory 27 can be read out at an arbitrary timing. The digital data read out by the reproducing circuit 28 under the control of the control circuit 29 is reproduced into an RF signal, and 2
4 is output. The transmitter 24 amplifies the reproduced pulse, outputs the amplified pulse to the transmitting antenna 25, and transmits the pulse from the transmitting antenna 25 to the space.

[0005] The radar jammer as described above duplicates the received RF signal of the incoming pulse to generate and transmit a predetermined jammer. This interfering signal is output from the reproduction circuit 28 to the DRFM.
The digital data stored in the memory 23 is reproduced by delaying the digital data by an arbitrary time, or is generated by adding interference modulation such as amplitude modulation.

[0006]

Since the conventional radar jammer is constructed as described above, when an incoming pulse arrives from a radiation source to be jammed, it is stored and stored for each pulse.
It functioned as a source of interfering signals that repeated playback. Therefore, only one pulse is always stored and reproduced, but the arrival pulses P1 and P1 having different frequencies from different radiation sources, respectively.
When P2, P3, etc. are radiated, all of these arriving pulses cannot be stored. Even if arriving pulses of different frequencies are sequentially input, only a response is made for each arriving pulse. Simultaneously generate interference signals,
Could not send.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and can generate an interference signal including a plurality of frequency components corresponding to a plurality of arriving pulses having different frequencies. It is an object of the present invention to obtain a DRFM signal generation device capable of transmitting a jamming signal including the interference signal.

[0008]

SUMMARY OF THE INVENTION A DRFM according to the present invention is provided.
The signal generator includes a distribution circuit for distributing incoming pulses having different frequencies and arrival times for each arrival, a plurality of DRFMs for digitally storing and reproducing the distributed pulses, and reading and synthesizing pulses simultaneously from each DRFM to obtain a plurality of frequencies. It is provided with a synthesizing circuit for simultaneously generating an interference signal including components.

[0009] A DRFM signal generating apparatus according to the present invention comprises:
A write circuit for storing received pulses having different received frequencies and arrival times in different data memories in the order of arrival,
It comprises a plurality of data memories for digitally storing pulses, and a single DRFM comprising a reproducing circuit for sequentially reading out the pulses of each data memory and pseudo-simultaneously generating an interference signal containing a plurality of frequency components.

[0010] A DRFM signal generating apparatus according to the present invention comprises:
It comprises a writing circuit for storing incoming pulses having different frequencies and arrival times in different data memories in the order of arrival, a plurality of data memories for digitally storing the pulses, and a plurality of reproducing circuits for simultaneously reading each pulse stored in each data memory. It comprises a single DRFM and a synthesizing circuit for synthesizing pulses reproduced by a plurality of reproducing circuits to simultaneously generate an interference signal containing a plurality of frequency components.

A DRFM signal generator according to the present invention comprises:
A writing circuit for storing arriving pulses having different frequencies and arrival times in different data memories in the order of arrival, a plurality of data memories for digitally storing the pulses, a processor for reading and synthesizing each pulse stored in each data memory, and a processor And a single DRFM comprising a synthesis data memory for storing the pulses synthesized by the above and a reproduction circuit for generating an interference signal containing a plurality of frequency components after synthesis stored in the synthesis data memory. .

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below. Embodiment 1 FIG. FIG. 1 is a block diagram showing a configuration of the first embodiment of the present invention. In the figure, 1 is a receiving antenna for receiving an arriving pulse arriving from the surrounding environment, 2 is a receiver for selecting and amplifying the arriving pulse received by the receiving antenna 1, and 3 is a pulse amplified by the receiver 2. (RF signal) is stored and reproduced, and 4 is DRFM3.
Is a transmitter for amplifying the reproduced interference signal, and 5 is a transmitting antenna for transmitting the amplified interference signal to space.

[0013] A receiving antenna 1 receives an incoming pulse, and then amplifies the RF signal in a receiver 2 into a plurality of different DRFs.
This is a distribution circuit that distributes and outputs to M3 with the distribution number n. DRF
M3 is a plurality (3a, 3a) corresponding to the number n of distributions.
b,..., 3n). 11 is a plurality of DRFM3
This is a combining circuit that combines the RF signals output from (3a, 3b,..., 3n).

Each DRFM3 (3a, 3b,..., 3n)
A recording circuit for converting an RF signal into digital data,
It comprises a data memory for storing digital data, a reproducing circuit for reading digital data from the data memory and converting it to an RF signal, and a control circuit for controlling the operation of these units. The recording circuit, data memory, and reproducing circuit provided in each of these DRFMs 3 have the same configuration as that of the related art, and are not shown.

Next, the operation will be described. D of the present invention
The RFM signal generation apparatus includes, for example, arrival pulses P1 and P having different frequencies and arrival times (periods and the like) at the timings shown in FIG.
2, P3 arrives. The incoming pulses P1, P2, and P3 of different frequencies received by the receiving antenna 1 are selected and amplified by the receiver 2 and output to the distribution circuit 10. The distribution circuit 10 converts the arriving pulses into corresponding DRFMs 3a, 3a based on the management control contents set in advance.
b,..., 3n.

Each DRFM3 (3a, 3b,..., 3n)
Stores the pulses converted into digital data by the respective recording circuits in the data memory. As a result, the inputted pulses of a plurality of frequencies are converted into a plurality of DRFM3s (3a, 3a).
b,..., 3n).

At the time of reproduction, a plurality of DRFM3s (3a, 3
b,..., 3n), each reproducing circuit simultaneously reads out the digital data stored in the data memory, reproduces the digital data, and outputs it to the synthesizing circuit 11. The synthesizing circuit 11 synthesizes a plurality of digital data having these different frequencies, amplifies the digital data at the transmitter 4, and transmits the amplified data from the transmitting antenna 5 to the space. At this time, as described above, the RF signal of the arriving pulse received by using the storage / reproduction function of the DRFM 3 is duplicated, and when the digital data is reproduced by the reproduction circuit, the digital data is reproduced with an arbitrary time delay, A disturbing signal is generated by adding disturbing modulation such as performing modulation.

FIG. 2 is a timing chart showing an interference wave output from the DRFM signal generator according to the first embodiment. As shown in the figure, according to the above configuration, the interference waves PA respectively corresponding to the arrival pulses of a plurality of different frequencies.
1, PA2 and PA3 can be generated and transmitted simultaneously.

As described above, according to the first embodiment, the input arriving pulses of a plurality of frequencies can be distributed to a plurality of different DRFMs 3 and digitally stored.
By simultaneously reading out the digital data stored in M3 and reproducing and synthesizing the RF signal, it is possible to obtain an effect that the interference waves of a plurality of frequencies can be simultaneously transmitted as the interference signal source.

Embodiment 2 FIG. 3 is a block diagram showing a configuration of the second embodiment of the present invention. In FIG. 3, the same components as those in the first embodiment are denoted by the same reference numerals, and thus description thereof is omitted. In the second embodiment, a plurality of DRFMs 3 (3a, 3b,..., 3) described in the first embodiment are used.
A plurality of data memories are provided inside a single DRFM 3 without providing n), and a pulse (RF signal) of a plurality of frequencies can be digitally stored by the single DRFM 3.

Inside the DRFM 3, a recording circuit 6 for converting an RF signal into digital data and storing it in a data memory 7, a plurality of data memories 7 for storing digital data
(7a, 7b,..., 7n), a reproduction circuit 8 for reading digital data from the data memory 7 and converting it to an RF signal, and a control circuit 9 for controlling the operation of these units.

The recording circuit 6 stores 1 in the order of arrival of the incoming pulses.
The second pulse is recorded in the data memory 7a, then the second pulse is sequentially recorded in the data memory 7b,..., The nth pulse is sequentially recorded in the data memory 7n. Reproduction circuit 8
Sequentially reads the contents of each data memory 7 (7a, 7b,..., 7n) and outputs the data to the transmitter 4.

Next, the operation will be described. Also in the second embodiment, arriving pulses P1, P having different frequencies and arriving times (periods, etc.) at the timings shown in FIG.
2 and P3 have arrived. In this case, the recording circuit 6 in the DRFM 3 converts the data into digital data in the order of arrival of the incoming pulses, and sequentially stores the data in the data memory 7 (7a, 7a) for each pulse.
b,..., 7n). As a result, incoming pulses of different frequencies can be digitally stored in the data memory 7. The reproduction circuit 8 includes a data memory 7 (7a, 7
b,..., 7n) are sequentially read and reproduced. When reproducing digital data, the reproducing circuit 8 generates an interfering signal by delaying the reproduction by an arbitrary time or adding an interfering modulation such as amplitude modulation.

FIG. 4 is a timing chart showing an interference wave output from the DRFM signal generator of the second embodiment. The reproducing circuit 8 sequentially reads the digital data of the data memories 7a, 7b,..., 7n corresponding to the arriving pulses of a plurality of different frequencies, sequentially outputs the digital data to the transmitting section 4 in the reading order, and outputs the interfering waves PA1, PA2, Transmit as PA3. As shown in the drawing, in the second embodiment, since the reading from the plurality of data memories 7a, 7b,..., 7n is sequentially performed, the interference waves PA1, PA2, and the plurality of frequencies are not pseudo-simultaneously but pseudo-simultaneously. PA3 is output.

As described above, according to the second embodiment, it is possible to generate an effect that a plurality of interfering waves of frequencies can be generated and transmitted simultaneously as an interfering signal source. In particular, according to the second embodiment, since the external distribution circuit 10 and the synthesizing circuit 11 described in the first embodiment can be eliminated, the circuit configuration can be simplified as compared with the configuration of the first embodiment. In addition, the above-described effects can be obtained while reducing costs.

Embodiment 3 FIG. FIG. 5 is a block diagram showing a configuration of the third embodiment of the present invention. In FIG. 5, the same components as those in the above-described embodiments are denoted by the same reference numerals and will not be described. The third embodiment is a configuration in which the first embodiment and the second embodiment are mixed. The storage up to the arrival pulse is performed in the same configuration as in the second embodiment, and the reproduction is performed in the same configuration as in the first embodiment. Is what you do.

More specifically, in a single DRFM 3, a recording circuit 6 for converting an RF signal into digital data and storing it in a data memory 7, a data memory 7 for storing digital data, and a data memory 7 A reproduction circuit 8 (8a, 8) for reading digital data and converting it to an RF signal
b,..., 8n), and a control circuit 9 for controlling the operation of these units. A synthesizing circuit 11 is provided at a stage subsequent to the DRFM 3, and a plurality of reproducing circuits 8a, 8b,
.., 8n are combined and output to the transmitter 4.

Then, as shown in FIG.
(7a, 7b,..., 7n) and the reproduction circuit 8 (8a, 8
b,..., 8n), a plurality of pairs are provided. As a result, a single DRFM 3 can digitally store and reproduce pulses (RF signals) of a plurality of frequencies.

The recording circuit 6 records the first pulse in the data memory 7a in the order of arrival of the pulses, then stores the second pulse in the data memory 7b,..., The n-th pulse in the data memory 7n. Record sequentially.

The reproducing circuit 8 is provided in pairs with the data memory 7, and the reproducing circuits 8a, 8b,..., 8n read the contents of the corresponding data memories 7a, 7b,. Output to Each of the reproduction circuits 8a, 8b,
, 8n generate an interference signal by playing back the digital data with a delay of an arbitrary time or by applying an interference modulation such as amplitude modulation.

Next, the operation will be described. Also in the configuration of the third embodiment, the arrival pulses P having different frequencies and arrival times (periods, etc.) at the timings shown in FIG.
It is assumed that 1, P2 and P3 have arrived. In this case, DRFM
The internal recording circuit 6 converts the data into digital data in the order of arrival of the incoming pulses, and sequentially stores the data in the data memory 7 (7
a, 7b,..., 7n). As a result, incoming pulses of different frequencies can be digitally stored in the data memory 7.

The reproduction circuit 8 (8a, 8b,..., 8n)
The digital data in the corresponding data memory 7 (7a, 7b,..., 7n) is read and reproduced. For example, the reproducing circuit 8a reads digital data from the data memory 7a,
The reproduction circuit 8n reads digital data from the data memory 8n. Here, a plurality of reproduction circuits 8a, 8b,.
Can simultaneously read digital data from the plurality of data memories 7a, 7b,..., 7n.

A timing chart showing the interference wave output from the DRFM signal generator of the third embodiment is the same as that shown in FIG. The plurality of reproduction circuits 8a, 8b,.
Digital data of the data memories 7a, 7b,..., 7n are simultaneously read out corresponding to the arriving pulses of a plurality of different frequencies, output to the synthesizing circuit 11, synthesized, and transmitted from the transmitting unit 4 as interference waves PA1, PA2, PA3. It is possible to do. In the third embodiment, since reading from a plurality of data memories 7a, 7b,..., 7n can be performed at the same time, interference waves PA of a plurality of frequencies can be completely simultaneously performed.
1, PA2 and PA3 can be output.

As described above, according to the third embodiment, it is possible to obtain the effect of generating an interference wave of a plurality of frequencies and transmitting the interference waves of the plurality of frequencies simultaneously as an interference signal source. According to the third embodiment, the first embodiment
The external distribution circuit 10 described in (1) can be dispensed with and a simple unit configuration can be realized.

Embodiment 4 FIG. FIG. 6 is a block diagram showing a configuration of the fourth embodiment of the present invention. In FIG. 6, the same components as those in the above-described embodiments are denoted by the same reference numerals and will not be described. The fourth embodiment is an example of a modified configuration of the third embodiment, and includes the combining circuit 1 described in the third embodiment.
1 and a processor 12 and a synthesis data memory 13
, A single pulse having a plurality of frequencies is generated and reproduced inside the DRFM 3, and a disturbance signal of a plurality of frequencies is output.

More specifically, in a single DRFM 3, a recording circuit 6 for converting an RF signal into digital data and storing it in a data memory 7, and a plurality of data memories 7 (7a, 7b) for storing digital data are provided. , ..., 7n)
A processor 12 for reading and synthesizing digital data from each data memory 7 (7a, 7b,..., 7n), a synthesizing data memory 13 for storing digital data synthesized by the processor 12, and a digital data from the synthesizing data memory 7. Reproduction circuit 8 for reading data and converting it to an RF signal
And a control circuit 9 for controlling the operation of the recording circuit 6, the data memory 7, and the reproducing circuit 8. DRFM3
At the subsequent stage, a transmitter 4 for transmitting the RF signal output from the reproduction circuit 8 is provided.

The synthesizing data memory 13 has a capacity corresponding to the data amount of the digital data after synthesizing the digital data of different frequencies stored in the plurality of data memories 7 (7a, 7b,..., 7n). Is used. As a result, a single DRFM 3 can digitally store and reproduce pulses (RF signals) of a plurality of frequencies.

Next, the operation will be described. Also in the fourth embodiment, arriving pulses P1, P having different frequencies and arriving times (periods, etc.) at the timings shown in FIG.
2 and P3 have arrived. In this case, the recording circuit 6 inside the DRFM 3 converts the incoming pulses into digital data in the order of arrival, and sequentially stores the data in the data memory 7 (7a, 7a) for each pulse.
b,..., 7n). As a result, incoming pulses of different frequencies can be digitally stored in the data memory 7.

The processor 12 includes a plurality of data memories 7
The digital data of different frequencies stored in a, 7b,..., 7n is read out, synthesized, and stored in the data memory 13 as one pulse having a plurality of frequencies. The reproducing circuit 8 reads out and reproduces the digital data after the synthesizing process stored in the data memory 13, and outputs the digital data to the transmitter 4. When reproducing digital data, the reproducing circuit 8 generates an interfering signal by delaying the reproduction by an arbitrary time or adding an interfering modulation such as amplitude modulation.

The timing chart showing the interference wave output from the DRFM signal generator of the fourth embodiment is the same as that shown in FIG. The processor 12 stores in the data memory 13 digital data obtained by synthesizing digital data of the data memories 7a, 7b,..., 7n corresponding to the incoming pulses of a plurality of different frequencies. Therefore, the reproducing circuit 8 reads out the contents of the data memory 13 and
, The interference waves PA1, PA2, PA3
It is possible to transmit as. In the fourth embodiment, interfering waves PA1 and PA2 of a plurality of frequencies can be completely simultaneously performed.
2, PA3 can be output.

As described above, according to the fourth embodiment, it is possible to generate an interference wave of a plurality of frequencies and transmit the interference waves of the plurality of frequencies simultaneously as an interference signal source. According to the fourth embodiment, the distribution circuit 10 and the synthesis circuit 11 described in the first embodiment can be dispensed with, and a simple unit configuration in which a single DRFM 3 is provided between the receiver 2 and the transmitter 4 Can be.

[0042]

As described above, according to the present invention, a distribution circuit for distributing arriving pulses having different frequencies and arrival times for each arrival, a plurality of DRFMs for digitally storing and reproducing the distributed pulses, and Since the apparatus is provided with a synthesizing circuit for simultaneously reading out and synthesizing pulses from the DRFM and simultaneously generating an interference signal including a plurality of frequency components, it is possible to simultaneously store and reproduce a plurality of pulses of different frequencies. As a result, it is possible to generate an interference signal corresponding to all frequencies of the arriving pulse, and simultaneously transmit the interference signal including the plurality of frequency components as an interference wave, thereby enabling interference with a plurality of frequencies and improving the interference effect. is there.

According to the present invention, a writing circuit for storing received pulses having different frequencies and arrival times in different data memories in the order of arrival, a plurality of data memories for digitally storing pulses, and sequentially storing pulses in each data memory. Since the apparatus is provided with a single DRFM comprising a reproducing circuit for reading and simultaneously generating an interference signal including a plurality of frequency components in a pseudo manner, it is possible to sequentially store and reproduce a plurality of pulses of different frequencies. As a result, it is possible to generate an interference signal corresponding to all frequencies of the arriving pulse, and to transmit an interference signal including a plurality of frequency components in a pseudo-simultaneous manner as an interference signal source, thereby enabling interference at a plurality of frequencies and improving the interference effect. effective. In particular, an external distribution circuit and a synthesizing circuit can be made unnecessary, and the above-mentioned effects can be obtained with a minimum configuration, so that there is an effect that the device configuration can be simplified and the cost can be reduced.

According to the present invention, a write circuit for storing incoming pulses having different frequencies and arrival times in different data memories in the order of arrival, a plurality of data memories for digitally storing pulses, and each pulse stored in each data memory A single DR consisting of multiple playback circuits that read
FM and a synthesizing circuit for synthesizing pulses reproduced by a plurality of reproducing circuits to simultaneously generate an interference signal including a plurality of frequency components, so that a plurality of pulses of different frequencies can be sequentially stored and reproduced simultaneously. be able to. As a result, it is possible to generate an interference signal corresponding to all frequencies of the arriving pulse, and simultaneously transmit an interference signal including a plurality of frequency components as an interference signal source, thereby enabling interference to a plurality of frequencies and improving the interference effect. . Further, there is an effect that an external combining circuit can be eliminated.

According to the present invention, a writing circuit for storing incoming pulses having different frequencies and arrival times in different data memories in the order of arrival, a plurality of data memories for digitally storing pulses, and each pulse stored in each data memory , A processor for reading and combining the signals, a combining data memory for storing the pulses combined by the processor, and a reproducing circuit for generating an interference signal containing a plurality of combined frequency components stored in the combining data memory. Since one DRFM is provided, a plurality of pulses having different frequencies can be sequentially stored and reproduced at the same time. As a result, it is possible to generate an interference signal corresponding to all frequencies of the arriving pulse, and simultaneously transmit an interference signal including a plurality of frequency components as an interference signal source, thereby enabling interference to a plurality of frequencies and improving the interference effect. .
Further, there is an effect that an external distribution circuit and a synthesis circuit can be eliminated.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an internal configuration of a DRFM signal generation device according to a first embodiment of the present invention.

FIG. 2 is a timing chart showing an interference wave output by the DRFM signal generation device according to the first embodiment of the present invention.

FIG. 3 is a block diagram showing an internal configuration of a DRFM signal generation device according to a second embodiment of the present invention.

FIG. 4 is a timing chart showing an interference wave output by a DRFM signal generation device according to a second embodiment of the present invention.

FIG. 5 is a block diagram showing an internal configuration of a DRFM signal generation device according to a third embodiment of the present invention.

FIG. 6 is a block diagram showing an internal configuration of a DRFM signal generation device according to a fourth embodiment of the present invention.

FIG. 7 is a block diagram showing an internal configuration of a conventional DRFM signal generation device.

FIG. 8 is a timing chart showing an example of an incoming pulse.

[Explanation of symbols]

1 receiving antenna, 2 receiver, 3 DRFM, 4 transmitter, 5 transmitting antenna, 6 recording circuit, 7, 7a, 7b,
..., 7n) Data memory, 8, 8a, 8b, ..., 8n
Reproduction circuit, 9 control circuit, 10 distribution circuit, 11 synthesis circuit, 12 processor, 13 synthesis data memory,
P1, P2, P3 Arrival pulse, PA1, PA2, PA
3 Interference waves.

Claims (4)

[Claims] 1. A DRFM signal generator for duplicating an RF signal of a received arriving pulse to generate and transmit a predetermined interference signal, wherein the RF of the arriving pulse having a different frequency and arrival time is received.
A distribution circuit for distributing a signal by a predetermined distribution number for each incoming pulse; a plurality of DRFMs for storing and reproducing each RF signal distributed by the distribution circuit as digital data; and a plurality of digital data reproduced by the DRFM And a synthesizing circuit for simultaneously reading out and synthesizing the pulses and generating an interference signal including a plurality of frequency components of the arriving pulse at the same time. 2. A DRFM signal generating apparatus for duplicating a received RF signal of an incoming pulse to generate and transmit a predetermined interference signal, wherein the RF of the incoming pulse having a different received frequency and arrival time is provided.
A writing circuit for storing signals as digital data in different data memories in the order of arrival pulses, a plurality of data memories for storing the different digital data, and the arrival pulse by sequentially reading the digital data stored in each data memory. And a reproduction circuit for generating pseudo interference signals including a plurality of frequency components at the same time.
M signal generator. 3. A DRFM signal generator for duplicating a received RF signal of an incoming pulse to generate and transmit a predetermined interference signal, wherein the RF of the incoming pulse having a different received frequency and arrival time is provided.
A write circuit for storing signals as digital data in different data memories in the order of arrival pulses, a plurality of data memories for storing the different digital data, and a plurality of data memories provided individually corresponding to the respective data memories and stored in the data memories. A single DRFM composed of a plurality of reproduction circuits for simultaneously reading the respective digital data, and a disturbance signal including a plurality of frequency components of the arriving pulse by synthesizing a plurality of digital data pulses reproduced by the plurality of reproduction circuits. And a synthesizing circuit for simultaneously generating the signals. 4. A DRFM signal generator for generating and transmitting a predetermined interference signal by duplicating an RF signal of a received arriving pulse, wherein the RF signal of the arriving pulse having a different frequency and arrival time is received.
A writing circuit for storing signals as digital data in different data memories in the order of arrival pulses, a plurality of data memories for storing the different digital data, and reading data of the respective digital data stored in the respective data memories to synthesize respective data; A processor for processing, a synthesizing data memory for storing pulses of digital data synthesized by the processor, and a plurality of frequency components of the arriving pulse based on the synthesized digital data stored in the synthesizing data memory. A DRFM signal generator comprising a single DRFM comprising a reproduction circuit for generating a disturbance signal including the DRFM signal.