JP2812025B2 - Adjustment device for time delay of digital audio signal - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for adjusting a time delay of a digital audio signal.

[0002]

2. Description of the Related Art It is well known that sound signals have been conventionally edited for various purposes, and analog signals which have been widely used as sound signal editing apparatuses have been known. In addition to audio signal editing devices in the form of digital signals, audio signal editing devices in the form of digital signals are also used. The audio signal editing apparatus described above has, for example, a recording / playback function, a fade-in, a fade-out, a cross fade, an edit / playback function based on an edit list, and many other functions in order to edit the audio signal. Be composed. By the way, in order to edit the sound signal, time reference information (for example, time information, time information, and other time position information on a time axis) is required, as is well known. Since the sound signal does not include time information, position information on the time axis such as time information, the sound signal editing device in the form of a digital signal includes:
An external frame signal is generated based on an external synchronization signal (for example, a vertical synchronization signal) supplied from outside the apparatus as the time reference information, and an internal frame used for an editing operation in an audio signal editing apparatus. Is generating a signal. As the above-mentioned external synchronizing signal, for example, a vertical synchronizing signal of the NTSC system (the cycle is 1/60 second)
Is used, the digital signal audio signal editing apparatus generates an external frame signal having a period of 1/30 second, and as the external synchronization signal, for example, a PAL vertical synchronization signal (period). Is 1/50 second), the digital signal audio signal editing apparatus generates an external frame signal having a cycle of 1/25 second. Now, a digital signal audio signal editing apparatus has a different cycle from that of a configuration in which an internal frame signal having the same cycle as the above-described external frame signal is generated and used in an editing operation. Internal frame signal having a specific fixed period different from any of the periods of the plurality of external frame signals
3 seconds) to generate an edit operation. When the audio signal editing device in the digital signal form is of the above-described configuration, for example, even when recording an audio signal in the digital signal form, the time code of SMPTE is also recorded. When the external synchronizing signal is used as a timing signal of the recording / reproducing operation, including the case, it is necessary to time-delay the audio signal in order to adjust the time between the external synchronizing signal and the audio signal. By the way, as a means for giving a time delay to a signal when the acoustic signal is a digital acoustic signal, after storing the digital acoustic signal in the random access memory, read the digital signal stored in the random access memory after a predetermined time, It has been generally practiced to obtain a digital audio signal delayed by a predetermined time.

[0003]

However, as described above, the time delay of the digital sound signal is given to the digital sound signal by the time interval from the writing time to the reading time of the random access memory. In a conventional device, dedicated hardware is used for a write operation and a read operation, so that the device becomes large-scale, and a solution to the problem has been demanded.

[0004]

SUMMARY OF THE INVENTION The present invention provides a random access memory for writing and reading a digital audio signal to be given a time delay, and a digital signal for controlling the writing operation and the reading operation of the random access memory. A digital audio signal having a processor and a recording / reproducing unit that can give a predetermined time delay to the reproduced digital audio signal obtained by reproducing the digital audio signal recorded on the recording medium. An apparatus for adjusting a time delay, wherein a phase difference between an external frame signal at the time of recording a digital audio signal on a recording medium and an internal frame signal generated at the time of a recording operation is obtained, and the obtained phase difference is used as first phase difference information. Means for recording a digital audio signal from a recording medium and generating an internal frame signal during a reproducing operation. Means for obtaining the phase difference between the generated internal frame signal and the external frame signal as second phase difference information, and converting the phase difference between the first and second phase difference information into a reproduced digital audio signal. Means for determining the amount of time delay to be provided, and means for updating both the write address and the read address of the random access memory in accordance with the determined amount of time delay and setting the updated value in the digital signal processor. Providing a reproduced digital audio signal to a random access memory via a digital signal processor and outputting the reproduced digital audio signal in a state where a predetermined time delay has been given from the digital signal processor. Device for adjusting the amount of time delay of digital audio signal, and digital device to be provided with time delay A random access memory for writing and reading an acoustic signal; and a digital signal processor for controlling a writing operation and a reading operation of the random access memory, and a digital signal recorded on a recording medium in a recording / reproducing unit. An apparatus for adjusting the amount of time delay of a digital audio signal, which is capable of giving a predetermined time delay to a reproduced digital audio signal obtained by reproducing an audio signal, comprising a plurality of digital audio signals for a recording medium. Means for obtaining a phase difference between an external frame signal at the time of recording and an internal frame signal generated at the time of recording operation and recording the same as first phase difference information on a recording medium, and a plurality of digital audio signals from the recording medium Generates an internal frame signal at the time of reproduction operation, and generates the internal frame signal and the external frame signal. Means for obtaining a phase difference from a signal as second phase difference information, and means for obtaining a time delay to be given to a plurality of systems of reproduced digital audio signals based on the first phase difference information and the second phase difference information. And updating both the write address and the read address of the random access memory corresponding to the determined time delay amount and setting the updated digital audio signal to the digital signal processor. First, the reproduced digital audio signal of the first system is written into the random access memory, and then the reproduced digital audio signal of the second system is changed after the write address is changed by one. By the write operation of being written to the random access memory, the reproduced digital audio signal of the sequential system is randomly accessed. Written to memory, also reproduced digital audio signals stored in a predetermined address that is a reference is read from the random access memory as reproduced digital acoustic signal of the first system, then the address is 1
The read digital audio signal is read out from the random access memory as the second system of the reproduced digital audio signal after being changed only by the read operation, and the read digital audio signal of the successive system is read from the random access memory by the read operation. Means for outputting, from a digital signal processor, a plurality of reproduction digital audio signals in a state where a predetermined time delay has been given, from a digital signal processor. And a random access memory for writing and reading a digital audio signal to be given a time delay, and a digital signal processor for controlling a writing operation and a reading operation of the random access memory. Digitally recorded on a recording medium in the section An apparatus for adjusting the amount of time delay of a digital audio signal, which is capable of giving a predetermined time delay to a reproduced digital audio signal obtained by reproducing an acoustic signal, when the digital audio signal is recorded on a recording medium. At the time of operation and during the operation of reproducing the digital audio signal from the recording medium, the digital audio signal is given to the digital audio signal by being written to and read from the random access memory under the control of the digital signal processor described above. The time delay amount of the digital audio signal, which is provided when the digital audio signal is recorded on the recording medium and the digital audio signal is reproduced from the recording medium, is different. An adjusting device is provided.

[0005]

When a digital audio signal is recorded on a recording medium, a phase difference between an external frame signal and an internal frame signal generated during a recording operation is obtained, and is recorded on the recording medium as first phase difference information. An internal frame signal is generated during the operation of reproducing the digital audio signal from the recording medium, and the phase difference between the generated internal frame signal and the external frame signal reproduced from the recording medium is obtained as second phase difference information. A time delay to be given to the reproduced digital audio signal is obtained from the first phase difference information and the second phase difference information, and a write address and a read address of the random access memory are associated with the obtained time delay. Update both and set to digital signal processor. The reproduced digital audio signal is provided to the random access memory via the digital signal processor, and the reproduced digital audio signal with a predetermined time delay is output from the digital signal processor.

[0006]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an apparatus for adjusting a time delay of a digital audio signal according to the present invention. FIGS. 1 and 4 are block diagrams showing a schematic configuration of a digital sound signal time delay adjusting device according to the present invention. FIG. 2 is a block diagram showing the digital sound signal time delay adjusting device according to the present invention shown in FIGS. Waveform diagrams for explaining the operation of the device, FIGS. 3 and 6 are flowcharts for explaining the operation,
FIG. 5 is a waveform diagram for explaining a write / read operation of the dynamic RAM. In the apparatus for adjusting the amount of time delay of a digital audio signal according to the present invention shown in FIGS. 1 and 4, reference numerals 1, 2, and 4 are signal input terminals, and reference numeral 3 is a time code output terminal. The input terminal 1 is supplied with a digital audio signal to be subjected to signal processing, the input terminal 2 is supplied with a composite video signal including an SMPTE time code, and the input terminal 4 is provided with the composite video signal. This is an input terminal of a vertical synchronization signal included in the video signal. The input terminal 1 is supplied with a digital audio signal modulated by an appropriate modulation method, for example, a biphase modulation method. Reference numeral 5 denotes a receiving unit.
Then, the digital audio signal provided via the input terminal 1 is demodulated.

The digital audio signal data to be subjected to the signal processing obtained by the demodulation operation in the receiving unit 5 is divided into two systems by the digital audio signal time delay adjusting device shown in FIG. The digital audio signals of the left and right channels (for example, the left and right channels) are supplied to a specific one of the two digital signal processors 18 and 19, and the digital audio signals of the digital audio signals shown in FIG. In the device for adjusting the amount of time delay, digital audio signals of a plurality of channels are supplied to one digital signal processor 18. Reference numeral 7 denotes an internal frame signal generation circuit. The internal frame signal generation circuit 7 to which the movable contact v of the changeover switch 6 is connected is connected via the movable contact v of the changeover switch 6 and the fixed contact Rp in the recording mode. The sampling period of the digital audio signal supplied from the phase locked loop 28 (1/4800
An internal frame signal (having a period of 1/33 second) is generated based on a signal having a period of 0 second, and an oscillator 8 is provided via the movable contact v of the changeover switch 6 in the reproduction mode.
Sampling period (1/4) of the digital audio signal supplied from
An internal frame signal (period of 1/33 seconds) is generated based on a signal having a period of 8000 seconds (period of 1/33 seconds) (in the case of internal synchronization), or a phase is generated via a movable contact v of the changeover switch 6 and a fixed contact Rp. Generating an internal frame signal (period of 1/33 second) based on a signal having a sampling period of the digital audio signal supplied from the locked loop 28; The internal frame signal (period of 1/33 second) generated by the internal frame signal generation circuit 7 is supplied to the control unit 26 and the buffer memories 16 and 24.

A signal having a sampling period of the digital audio signal transmitted from the oscillator 8 is also supplied to a phase locked loop 9, and the signal output from the phase locked loop 9 is time-dependent. It is also supplied to the code generator 11 and the fixed contact P of the changeover switch 13. The time code output from the time code generator 11 is sent to the output terminal 3. The time code reader 10 to which the composite video signal has been supplied via the input terminal 2 extracts the SMPTE time code included in the supplied signal and supplies it to the control unit 26. Also, the input terminal 4 or the phase locked loop 9 via the movable contact v of the changeover switch 13
Thus, the external frame signal generating circuit 12 to which the signal of the vertical scanning cycle of the video signal is supplied generates an external frame signal and supplies it to the control unit 26.

[0009] In order for the user to set a desired operation mode for the device for adjusting the amount of time delay of the digital audio signal shown in FIG. When a predetermined input is made by the user, the control unit 26 controls the operation of each component in the time delay adjusting device for the digital audio signal in accordance with a predetermined program corresponding to a desired operation mode set on the operation unit 25 by the user. Perform
First, the case where the recording / reproducing unit 15 in the adjusting device for the amount of time delay of the digital audio signal shown in FIG. 1 (or FIG. 4) performs the recording operation will be described as follows. In the flowchart of FIG. 3 explaining the control operation of the control unit 26, after the start of step (0), the system is initialized in step (1). When the recording / reproducing unit 15 is performing a recording operation, the receiving unit 5 to which a digital audio signal modulated by an appropriate modulation method, for example, a bi-phase modulation method is supplied via the input terminal 1 receives the input signal. The digital audio signal provided via the terminal 1 is demodulated, and the digital audio signal output from the receiving unit 5 undergoes predetermined signal processing in the digital signal processor 18, 19 (or 18), and then is subjected to serial-parallel signal processing. The data is supplied to the buffer memory 24 by the conversion circuit 23.

A signal having a sampling period (period of 1/48000 seconds) in the acoustic signal generated by the phase locked loop 28 based on the vertical synchronizing signal supplied via the terminal 4 is transmitted to the changeover switch. 6 fixed contacts R
In the internal frame signal generation circuit 7 supplied via the p and the movable contact v, the internal frame signal (having a period of 1/33
Second) {see FIG. 2A} is generated and the internal frame signal is supplied to the control unit and the buffer memories 16 and 24. The control unit 26 receives a vertical synchronizing signal (for example, a cycle is 1/60 second) from the terminal 4 via the changeover switch 13.
The external frame signal (period is 1/30 second) generated by the external frame signal generation circuit 12 that generates an external frame signal by supplying the external frame signal (see FIG. 2B) and the composite video from the input terminal 2 The time code output from the time code reader 10 that extracts the time code when the signal is supplied is also supplied. 2 (a),
(B) shows a case where the period of the external synchronization signal is, for example, 1/60 second, and a case where the period of the external frame signal generated by the external frame signal generation circuit 12 is 1/30 second;
Regardless of whether the period of the external synchronization signal is 1/50 second and the period of the external frame signal generated by the external frame signal generation circuit 12 is 1/25 second, the internal frame signal The internal frame signal generated by the generation circuit 7 has a specific constant period of 1/33 seconds.
FIG. 7 is a diagram illustrating that the periods of the external frame signal and the internal frame signal are different. As is apparent from FIG. 2, due to the difference between the periods of the external frame signal and the internal frame signal, the relative phase between the external frame signal and the internal frame signal is shifted on the time axis. When the sampling period of the digital audio signal is 1/48000 seconds, and when the period of the external frame signal is 1/30 seconds, the external frame signal of one frame is composed of 1601.5 words. ,
The internal frame signal of one frame is composed of 1440 words.

In the flow chart of FIG. 3, it is checked whether or not the recording operation mode is set in step (2). If the operation mode is the recording operation mode, the process proceeds to step (4), where the component part 26a is shown in FIG. 2B, the phase difference dR between the internal frame signal and the external frame signal shown in FIG.
Is obtained and subjected to a predetermined format conversion. In step (5), the recording / reproducing unit 15
And then proceeds to step (6). In step (6), the internal frame signal supplied from the internal frame generating circuit 7 and the time code output from the time code reader 10 are sent to the component 26a.
c, and the combined signal is supplied to the buffer memory 24 by the component 26c. In the buffer memory 24, as described above, the digital audio signal supplied to the receiving unit 5 via the digital signal processor 18, 19 (or 18) or the serial / parallel signal conversion circuit 23 and the internal frame described above. The signal and the time code are supplied as recording data to the recording / reproducing unit 15, and the recording / reproducing unit 15 records the recording data on a recording medium.

The user operates the operation unit 25 to the control unit 26 to adjust the time delay amount of the digital audio signal shown in FIG. 1 (or FIG. 4). When the setting is performed, the control unit 26 controls the operation of each component in the adjusting device for the amount of time delay of the digital audio signal according to a predetermined program. First, FIG.
When the recording / reproducing unit 15 in the apparatus for adjusting the amount of time delay of the digital audio signal shown in FIG. 4 (or FIG. 4) performs a reproducing operation, after the start of step (0) in the flowchart of FIG. In 1), the system is initialized. When the recording / reproducing unit 15 performs a reproducing operation, the recording / reproducing unit 15 performs information on an internal frame and time code in recording information recorded on a recording medium,
The information dR of the phase difference between the internal frame and the external frame during the recording operation and the like are transmitted via the register 14 to the control unit 26.
To the component 26a.

When the recording / reproducing unit 15 performs a reproducing operation, the internal frame signal generating circuit 7 sends the component 2
The internal frame signal supplied to the internal frame signal generation circuit 7 is generated based on a signal having a sampling period of the digital audio signal supplied to the internal frame signal generation circuit 7 via the movable contact v of the changeover switch 6 as described above. Therefore, in the state where the movable contact v of the changeover switch 6 is switched to the fixed contact P side, that is, in the state of internal synchronization, a sample of the digital audio signal supplied to the internal frame signal generation circuit 7 is provided. The signal having the switching period is a signal oscillated by the oscillator 8, and the changeover switch 6
In the state where the movable contact v is switched to the fixed contact Rp side, that is, in the state of external synchronization, the signal supplied to the internal frame signal generation circuit 7 is the vertical synchronization signal supplied via the terminal 4. Is a signal having a sampling period in the acoustic signal generated by the phase locked loop 28 based on Then, the signal having the sampling period of the digital audio signal is supplied to the internal frame signal generating circuit 7 via the fixed contact P and the movable contact v of the changeover switch 6 as described above. 7 supplies the internal frame signal generated by the oscillator 8 to the component 26a of the control unit 26, and further outputs the phase signal to which the signal oscillated by the oscillator 8 is supplied.
The signal of the vertical scanning cycle output from the locked loop 9 is supplied to the external frame signal generation circuit 8 via the fixed contact P and the movable contact v of the changeover switch 13, thereby generating the signal from the external frame signal generation circuit 12. The supplied external frame signal is supplied to the component 26a of the control unit 26.

In the flowchart of FIG. 3, it is determined whether or not the recording operation mode is set in step (2). If the reproduction operation mode is selected, the process proceeds to step (3). In step (3), whether or not the reproduction operation mode is set is determined. In the case of the reproduction operation mode, the process proceeds to step (7). In step (7), component 26
In step b, the phase difference dP between the external frame signal and the internal frame signal at the time of reproduction (see FIG. 2C) {see FIG. 2} is determined, and the process proceeds to step (8). The phase difference dR between the internal frame signal and the external frame signal at the time of recording is extracted and the process proceeds to step (9), where the difference between the phase difference dP and the phase difference dR in the component part 26d is obtained. In step (10), the digital signal processor 18, 19 (or 18) calculates a read address corresponding to the phase difference dP-dR, and proceeds to step (11). In step (11), the above-described read address is set, and in step (12), the operation of reading from the buffer memory 16 is controlled.

The digital audio signal, the internal frame signal, and the recording data such as the time code read from the buffer memory 16 are converted into serial signals by a parallel / serial signal conversion circuit 17 and then converted into digital signals by the digital signal processor 1.
The data is written into the random access memories 20, 21 (or 20) under the control of 8, 19 (or 18). The digital signal processor 18, 19 (or 1
8) are random access memories 20, 21 (or 2)
0), the digital audio signal is written to the specific address, and the random access memory 2 is written using the read address set in correspondence with the phase difference dP-dR as described above.
By reading the digital audio signal from 0, 21 (or 20), the digital audio signal read from random access memory 20, 21 (or 20) as described above has a predetermined delay amount. Digital audio signals are used. The digital audio signal read from the random access memories 20 and 21 (or 20) as the digital audio signal having the predetermined delay as described above is subjected to predetermined modulation in the transmission unit 22 and output to the output terminal. 27.

In the apparatus for adjusting the amount of time delay of a digital audio signal shown in FIG. 1, the digital signal processors 18 and 19 generally execute signal processing such as signal level control by a program. Since there,
The digital signal processors 18 and 19 in the conventional signal processor are simply provided with the random access memory 2.
A delay amount adjusting device can be configured only by adding 0 and 21. Therefore, unlike the conventional digital sound signal time delay amount adjusting device, dedicated hardware for writing and reading digital sound signals is not required. Therefore, the present invention can easily provide a small and highly productive digital sound signal time delay adjusting device.

In the apparatus for adjusting the amount of time delay of a digital audio signal shown in FIG. 1, the addresses of the random access memories 20, 21 used for the time delay of the digital audio signal are assigned to digital signal processors 18,1.
The address is moved by being incremented or decremented by the signal of the sampling period of the digital audio signal used as the synchronization signal of the input / output signal of No. 9 and the data of the digital audio signal in the random access memories 20 and 21 are shifted. Go. As in the apparatus for adjusting the amount of time delay of a digital audio signal shown in FIG. 1, a digital audio signal is provided for each channel of two digital audio signals (for example, a left channel digital audio signal and a right channel digital audio signal). .Signal processor 18 (19)
And the random access memory 20 (21),
The two random access memories 20, 21 described above are:
Since a ring memory can be configured for each individual digital audio signal, there is an advantage that address management becomes easy. In the above case, the read address of each system may be common. If the video time code is, for example, 1601.5 words as one frame and the internal frame signal is, for example, 1440 words, the amount of time delay to be delayed by the random access memories 20 and 21 is ± 1 frame at maximum. For example, if the longer frame is 1602 words per frame and one word is 16 bits, the random access memory 20,
The storage capacity of 21 may be 2 × 1602 × 16 = 51,264 bits.

Next, the apparatus for adjusting the amount of time delay of a digital audio signal shown in FIG. 4 includes one digital signal processor 18 and one random access memory 2.
0 is used to adjust the amount of time delay of digital audio signals of a plurality of systems.
The configuration is simpler than that of the device for adjusting the time delay amount of the digital audio signal shown in FIG. FIG. 5 shows an example in which the digital audio signal of two systems is adjusted to the left (as shown in FIG. 4) by adjusting the time delay of two digital audio signals by the digital audio signal time delay adjusting device shown in FIG. FIG. 3 is a diagram for explaining a digital audio signal of an L) channel and a data array state and an addressing state of one random access memory 20 when the digital audio signal is a right (R) channel digital audio signal; FIG.
Is a flow chart showing the operation of one digital signal processor 18 in the above case.

In FIG. 5, first, at a certain sampling period in the digital audio signal, based on the write address A2 (A2 = 0) set as shown in FIG. The digital audio signal data of the channel is written, and then the write address is changed by 1 (in the figure, decremented by 1), and the digital audio of the R channel is written to the write address A2 = -1. The signal data is written, and the digital audio signal data of the L channel of the read address A1 (A1 = K) to be used as a reference is read, and then the read address A1 (A1 = K) is changed by one. (In the case of the figure, it is decremented by 1), and the read address A1 = K
From −1, data of the digital audio signal of the R channel is read.

In the sampling period following the sampling period of the digital audio signal, the base register is decremented by 1 due to the virtual shift of the data of the digital audio signal, and the data of the digital audio signal is shown in FIG. Move as in b). Then, based on the changed write address A2 (A2 = -1), first, the address A2 =
The data of the L-channel digital audio signal is written to -1 and then the write address is changed by 1 (in the case of the figure, decremented by 1), and the write address is changed to A2 = -2. The digital audio signal data of the channel is written, the digital audio signal data of the L channel of the read address A1 (A1 = K-1) to be used as a reference is read, and then the read address A1 is read.
(A1 = K-1) is changed by 1 (in the case shown, decremented by 1), and the read address A1 = K
From -2, the data of the digital audio signal of the R channel is read, and so on, and the writing and reading of the data of the digital audio signal of two systems are performed. The manner of change between the write address and the read address is the same for a plurality of systems (N channels). In the description of the apparatus for adjusting the amount of time delay of a digital audio signal shown in each figure, the serial signals are synchronized and input to or output from the digital signal processor 18 and the digital signal processor 19. The description of the bit synchronization signal used when the synchronization is performed is omitted.

[0021]

As is apparent from the above description, the apparatus for adjusting the amount of time delay of a digital audio signal according to the present invention uses an internal frame generated during a recording operation when recording a digital audio signal on a recording medium. A phase difference between the signal and the external frame signal is obtained and recorded on a recording medium as first phase difference information, and an internal frame signal is generated during a reproduction operation of a digital audio signal from the recording medium. The phase difference between the internal frame signal and the external frame signal is obtained as second phase difference information, and the amount of time delay to be given to the reproduced digital audio signal is determined based on the first phase difference information and the second phase difference information. Then, both the write address and the read address of the random access memory are updated in accordance with the time delay, and the digital signal processor is updated. Set Tsu support, giving reproduced digital acoustic signal into the random access memory through the digital signal processor, the predetermined time delay digital signal reproduced digital acoustic signal of which state is subjected
Because it is made to output from the processor,
In the apparatus for adjusting the amount of time delay of a digital audio signal according to the present invention, the apparatus for adjusting the amount of delay can be constituted by merely adding a random access memory to a digital signal processor used for other signal processing, for example. This eliminates the need for dedicated hardware for writing and reading digital audio signals as in a conventional digital audio signal time delay adjusting device. The present invention can easily solve the above-mentioned conventional problems.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a schematic configuration of a device for adjusting a time delay amount of a digital audio signal according to the present invention.

FIG. 2 is a waveform diagram for explaining the operation of the device for adjusting the amount of time delay of a digital audio signal according to the present invention.

FIG. 3 is a flowchart for explaining the operation of the apparatus for adjusting the amount of time delay of a digital audio signal of the present invention shown in FIG. 1;

FIG. 4 is a block diagram illustrating a schematic configuration of a device for adjusting the amount of time delay of a digital audio signal according to the present invention.

FIG. 5 is a diagram for explaining states of writing and reading of a digital audio signal.

FIG. 6 is a flowchart for explaining the operation of the apparatus for adjusting the amount of time delay of a digital audio signal of the present invention shown in FIG. 4;

[Explanation of symbols]

1, 2, 4 ... signal input terminal, 3 ... time code output terminal, 5 ... reception unit, 6, 13 ... changeover switch, 7 ... internal frame signal generation circuit, 8 ... oscillator, 9, 28 ... phase locked・ Loop, 10 ... Time code reader, 1
DESCRIPTION OF SYMBOLS 1 ... Time code generator, 12 ... External frame signal generation circuit, 15 ... Recording / reproducing part, 17 ... Parallel-serial signal conversion circuit, 18, 19 ... Digital signal processor
20, 21: random access memory, 23: serial / parallel signal conversion circuit, 24: buffer memory, 25: operation unit, 2
6 ... control unit, 27 ... output terminal,

Claims (3)

(57) [Claims] 1. A random access memory for writing and reading a digital audio signal to be given a time delay, and a digital signal processor for controlling a writing operation and a reading operation of the random access memory. A digital audio signal time delay adjusting device which is capable of giving a predetermined time delay to a reproduced digital audio signal obtained by reproducing a digital audio signal recorded on a recording medium in a recording / reproducing unit. Means for determining a phase difference between an external frame signal when recording a digital audio signal on a recording medium and an internal frame signal generated during a recording operation and recording the same as first phase difference information on the recording medium; An internal frame signal is generated during a digital audio signal reproducing operation from a medium, and the generated internal frame signal is generated. Means for obtaining a phase difference between the frame signal and the external frame signal as second phase difference information, and a time delay to be given to the reproduced digital audio signal by the first phase difference information and the second phase difference information. Means for updating both the write address and the read address of the random access memory corresponding to the determined time delay and setting the read digital audio signal in the digital signal processor. Digital·
A digital signal processor for outputting a reproduced digital audio signal in a state where a predetermined time delay has been given from a digital signal processor to a random access memory via a signal processor; Adjustment device for delay amount. 2. A random access memory for writing and reading a digital audio signal to be given a time delay, and a digital signal processor for controlling a writing operation and a reading operation of the random access memory. A digital audio signal time delay adjusting device which is capable of giving a predetermined time delay to a reproduced digital audio signal obtained by reproducing a digital audio signal recorded on a recording medium in a recording / reproducing unit. Means for calculating a phase difference between an external frame signal and an internal frame signal generated during a recording operation when recording a plurality of digital audio signals on a recording medium and recording the same as first phase difference information on the recording medium. And generating an internal frame signal during a reproduction operation of a digital audio signal of a plurality of systems from a recording medium, Means for determining the phase difference between the generated internal frame signal and the external frame signal as second phase difference information, and a plurality of systems of reproduced digital audio signals based on the first phase difference information and the second phase difference information. Means for determining the amount of time delay to be applied to the signal; and updating and setting both the write address and the read address of the random access memory in the digital signal processor in accordance with the determined amount of time delay, and reproducing the updated signal. A digital audio signal is provided to a random access memory via a digital signal processor, and after a first-system reproduced digital audio signal is first written to the random access memory and then the write address is changed by one, The reproduced digital audio signal of the second system is written to the random access memory, and the sequential write operation is performed. A reproduced digital audio signal is written to a random access memory, and a reproduced digital audio signal stored at a predetermined address to be a reference is read from the random access memory as a reproduced digital audio signal of a first system, Next, after the address is changed by one, the reproduced digital audio signal is read out from the random access memory as the second system reproduced digital audio signal. From a digital signal processor, wherein a plurality of systems of reproduced digital audio signals in a state where a predetermined time delay is applied are output from a digital signal processor. Time delay adjustment device. 3. A random access memory for writing and reading a digital audio signal to be given a time delay, and a digital signal processor for controlling a writing operation and a reading operation of the random access memory. A digital audio signal time delay adjusting device which is capable of giving a predetermined time delay to a reproduced digital audio signal obtained by reproducing a digital audio signal recorded on a recording medium in a recording / reproducing unit. At the time of the operation of recording the digital audio signal on the recording medium and the operation of reproducing the digital audio signal from the recording medium, writing to the random access memory is performed under the control of the digital signal processor. The amount of time delay given to the digital audio signal An apparatus for adjusting the amount of time delay of a digital audio signal, comprising means for differentiating between when the digital audio signal is recorded on the recording medium and when the digital audio signal is reproduced from the recording medium.