JP2002262578A - Power converter and its control method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To compensate the distortion of an output current by on-delay neither too much nor too little, even when the value of the output current is minute and a zero clamping phenomenon occurs. SOLUTION: When each absolute value |IUfb |, |IVfb |, |IWfb | of each output current IUfb , IVfb , IWfb outputted from an inverter circuit 2 is smaller than a specified value IC, a voltage distortion compensating circuit 7 makes the magnitude of each absolute values |▵VU|, |▵VV|, |▵VW| of a compensating voltage small, in proportion to the magnitude of each absolute value |IUfb |, |IVfb |, |IWfb |of each output current IUfb , IVfb , IWfb . In this way, the overcompensation of an on-delay circuit 5 can be prevented by making the magnitude of each compensating voltage ▵VU, ▵VV, ▵VW smaller, when the output currents IUfb , IVfb , IWfb are minute.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power converter for converting a DC voltage into an AC voltage having an arbitrary frequency and amplitude, and variably outputting the DC voltage having the frequency and amplitude, and a control method thereof. The present invention relates to a pulse width modulation (hereinafter, PWM) inverter device, which is one of the power conversion devices described above, and a control method thereof.

[0002]

2. Description of the Related Art Conventionally, a PWM inverter device, which is a power conversion device that converts a DC voltage into an AC voltage having an arbitrary frequency and amplitude and variably outputs the DC voltage having the frequency and amplitude, has been known in the art. An on-delay circuit is provided to prevent the self-extinguishing power device of the arm from extinguishing simultaneously and causing a DC short circuit. The on-delay circuit delays a timing at which the self-extinguishing power device is turned on by a predetermined time.

However, in the PWM inverter device, a so-called dead time occurs when both the self-extinguishing type power devices of the upper and lower arms are turned off due to the operation of the on-delay circuit. The output voltage of the device becomes distorted. In addition, as the self-extinguishing power device, G
Other devices such as TO may be used.

In the PWM inverter device, the distortion of the output voltage due to the ON delay depends on the polarity of the output current. Therefore, conventionally, in a PWM inverter device, the polarity of its own output current or a current command input from a higher-order device is obtained, and a rectangular wave-shaped compensation voltage of a predetermined magnitude is applied to the voltage in accordance with the direction of the polarity of the output current. By adding to the command, the above-mentioned distortion of the output voltage was compensated.

However, when the output current of the PWM inverter device is very small, a so-called zero clamp phenomenon occurs in which the output current is clamped to zero until the dead time ends in the dead time when the output current switches between positive and negative. May be. In this case, as described above, if a rectangular wave-like compensation voltage having a predetermined magnitude is added to the voltage command, overcompensation occurs, and the output voltage and output current are distorted.

Japanese Unexamined Patent Publications Nos. 7-31875 and 2000-166252 disclose techniques related to the above-described on-delay compensation. It does not compensate for the distortion of the output voltage caused by the above.

[0007]

As described above, in the conventional PWM inverter device, when the value of the output current is very small and the zero clamp phenomenon occurs, the compensation voltage in the form of a rectangular wave having a predetermined magnitude is applied to the voltage. When added to the command, overcompensation occurs, and conversely, the output voltage and output current are distorted.

The present invention provides a power converter and a control method for the power converter capable of compensating for the distortion of the output current due to the on-delay without excess or deficiency even when the value of the output current is minute and the zero clamp phenomenon occurs. The purpose is to provide.

[0009]

In order to solve the above-mentioned problems, a power converter according to the present invention is configured by connecting a plurality of self-extinguishing power devices each having a diode connected in anti-parallel, in series. A self-extinguishing power device inserted between a positive bus connected to the positive pole of the DC power supply and a negative bus connected to the negative pole of the DC power supply. The inverter circuit includes, for each phase of the load, an inverter circuit having an arm circuit connected to each phase of the load between arc-shaped power devices, and the inverter circuit based on a voltage command of each phase input from a higher-level device. PW to each self-extinguishing type power device
A PWM generation circuit for generating an M-pulse command, an on-delay circuit for changing and outputting each of the PWM pulse commands so as to delay an on-timing for a predetermined time, and a PWM-command command output from the on-delay circuit A gate drive circuit that drives each of the self-extinguishing power devices, a current detection unit that detects an output current value of each phase output from the inverter circuit, and a current detection unit that detects the current value detected by the current detection unit. A voltage distortion compensation circuit that calculates and outputs a compensation voltage to be added to each of the voltage commands based on each of the output current values;
An adder for adding each compensation voltage output from the voltage distortion compensation circuit to each of the voltage commands before being input to the M generation circuit, wherein the voltage distortion compensation circuit comprises: When the absolute value of the current value is equal to or more than a predetermined current value, the compensation voltage having the same polarity as the polarity of each output current value is output at a predetermined voltage value,
When the absolute value of each output current value is smaller than the predetermined current value, the ratio between the absolute value of each compensation voltage and the absolute value of each output current value is the predetermined voltage value and the predetermined current value. The compensation voltages having the same polarity as the output current value and having the same polarity as the ratio of the output current values are output.

In the power converter of the present invention, when the absolute value of each output current output from the inverter circuit is smaller than a predetermined value, the magnitude of the absolute value of the compensation voltage is determined by the magnitude of the absolute value of each output current. Make smaller in proportion to By doing so, when the output current is very small, the magnitude of the compensation voltage can be reduced to prevent over-compensation of the on-delay compensation. Therefore, in the power converter of the present invention,
Even when the value of the output current is very small and the zero clamp phenomenon occurs, the distortion of the output current due to the on-delay can be compensated without excess or deficiency.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, a power converter according to an embodiment of the present invention and a control method thereof will be described in detail with reference to the drawings. FIG. 1 is a block diagram illustrating a configuration of the PWM inverter device according to the present embodiment. As shown in FIG.
The M inverter device includes an inverter circuit 2, a current detector 3, a PWM generation circuit 4, an on-delay circuit 5, a gate drive circuit 6, a voltage distortion compensation circuit 7, and an adder 8.

The inverter circuit 2 is a circuit that converts a DC voltage of the DC power supply 1 into a three-phase AC voltage and inputs the converted voltage to a three-phase load 9. The inverter circuit 2 is configured by inserting the three phases arm circuits 20 ₁ to ₃ between the negative bus connected to a negative electrode side of the positive electrode side connected to the positive bus and the DC power source 1 of the DC power source 1 Have been. Each phase of the arm circuit 20 ₁ to
₃ is two IGBT is self-extinguishing devices, each diode is connected in anti-parallel is composed of connected inverter bridge in series, in each phase of the three-phase load 9, each arm circuit 20 ₁ The voltage between the two IGBTs ₃ is output. The inverter circuit 2 supplies power to each phase of the three-phase load 9 by turning on / off each IGBT. The current detector 3 detects and outputs output current values I _Ufb , I _Vfb , and I _Wfb of each phase output from the inverter circuit 2.

The PWM generation circuit 4 includes a host device (not shown)
PWM, which is an on / off signal for turning on / off each IGBT of the inverter circuit 2 by using a triangular comparison method or a space vector method by inputting three-phase AC voltage commands V _U , V _V , V _W input from the Generate and output pulse command.

Each of the on-delay circuits 5 includes an arm circuit 20.
As two IGBT ₁ to ₃ are not short-circuited, P entered
A so-called on-delay compensation is performed by delaying the ON timing of the WM pulse command for a predetermined time, and a PWM pulse command with on-delay compensation is output. According to the PWM pulse command output from the on-delay circuit 5, the gate drive circuit 6
Turn BT on and off.

The current distortion compensating circuit 7 compensates for current distortion.
Voltage compensation value ΔV for each phase_U, ΔV_V, ΔV_WOut
It is a circuit to power. The voltage distortion compensating circuit 7 calculates each output current
Value I _Ufb, I_Vfb, I_WfbAbsolute value of | I_Ufb|, | I
_Vfb|, | I_Wfb| Is the predetermined current value I _CIf it is more than
Is a predetermined voltage value V_CAnd the polarity is
Flow value I _Ufb, I_Vfb, I_WfbCompensation for each phase that matches the polarity of
Voltage ΔV_U, ΔV_V, ΔV_WAnd output current values
I_Ufb, I_Vfb, I_WfbAbsolute value of | I_Ufb|, | I_Vfb｜,
｜ I_Wfb| Is the predetermined current value I_CIf smaller, larger
Is the compensation voltage ΔV_U, ΔV_V, ΔV_WAbsolute value | ΔV_U
|, | ΔV_V|, | ΔV_W| And each output current value I_Ufb,
I_Vfb, I_WfbAbsolute value of | I_Ufb|, | I_Vfb|, | I_Wfb
Is the predetermined voltage value V_CAnd a predetermined current value I_CAnd the ratio
The polarity is equal to each output current value I_Ufb, I
_Vfb, I_WfbCompensation voltage ΔV that matches the polarity of_U, ΔV_V,
ΔV_WIs output.

FIG. 2 shows an inverter circuit 2 input to the voltage distortion compensating circuit 7 in the power converter of the present embodiment.
6 is a graph showing the relationship between the output currents I _Ufb , I _Vfb , I _Wfb of FIG. 1 and the compensation voltages ΔV _U , ΔV _V , ΔV _W output from the voltage distortion compensation circuit 7. As shown in FIG. 2, the output current I _Ufb of the inverter circuit 2, I _Vfb, large values of I _Wfb is than -I _C, when I _C is smaller than the compensation voltage [Delta] V _U, [Delta] V
_V and ΔV _W are the output current I _Ufb of the inverter circuit 2,
I _Vfb, becomes a value approximately proportional to the I _Wfb, the output current value I _Ufb of the inverter circuit 2, I _Vfb, if I _Wfb is below or I _C or -I _C is compensation voltage [Delta] V _U, Δ
V _V and ΔV _W are constant at V _C or −V _C.

As shown in FIG. 1, the adder 8 adds three-phase AC voltage commands V _U , V _V , V _W to compensation voltages ΔV _U , ΔV _{V of} each phase output from the current distortion compensation circuit 7. , ΔV _W are added and output. That in fact, the PWM generation circuit 4, each phase of the voltage compensation value [Delta] V _U, [Delta] V _V, AC voltage command three-phase [Delta] V _W is added _{V U + ΔV U, V V} + ΔV V,
V _W + ΔV _W is input.

The operation of each component described above will be summarized, and a control method of the power converter of the present embodiment will be described. In the control method of the power converter according to the present embodiment, first, the output current value I _{Ufb of} each phase output from the inverter circuit 2,
I _Vfb and I _Wfb are detected. Then, the absolute values | I _Ufb |, | I _Vfb | of the respective output current values I _Ufb , I _Vfb , I _Wfb ,
If | I _Wfb | is equal to or greater than the predetermined current value I _C , the compensation voltages ΔV _U , ΔV _V , and ΔV _W are set to the predetermined magnitude V _C and the polarities are output current values I _Ufb , I _Vfb , and voltage that matches the polarity of the I _Wfb, the output current value I _Ufb, I _Vfb, the absolute value of _{I Wfb | I Ufb |, |} I Vfb |, | I W fb | when a predetermined current value I _C is less than the absolute values of the compensation voltage _{ΔV U, ΔV V, ΔV W} | ΔV U |, | ΔV V |, | ΔV W | and the output current value I _Ufb, I _Vfb, the absolute value of I _Wfb | I _Ufb |, | I
_Vfb |, | I _Wfb | a ratio of the is equal to the ratio between the predetermined voltage value V _C with a predetermined current value I _C size, polarity the output current value I _Ufb, I _Vfb, the polarity of I _Wfb Are the compensation voltages ΔV _U , ΔV _V , and ΔV _W.

As described above, in the power converter of the present embodiment, the absolute values | I _Ufb |, | I _Vfb | of the output currents I _Ufb , I _Vfb , and I _Wfb output from the inverter circuit 2.
If | I _{W fb} | is smaller than the predetermined value I _C , the absolute values | ΔV _U |, | ΔV _V | of the compensation voltages ΔV _U , ΔV _V , ΔV _W
The magnitude of | ΔV _W | is reduced in proportion to the magnitudes of the absolute values | I _Ufb |, | I _Vfb |, and | I _Wfb | of the output currents I _Ufb , I _Vfb , and I _Wfb . By doing so, the output current I
_{When Ufb} , I _Vfb , and I _Wfb are very small, the magnitude of each of the compensation voltages ΔV _U , ΔV _V , and ΔV _W can be reduced to prevent over-compensation of the on-delay circuit 5. Therefore, in the power converter of the present embodiment, the output current I _Ufb ,
_{Even when} the values of I _Vfb and I _Wfb are minute and the zero clamp phenomenon occurs, the output currents I _Ufb and I
The distortion of _Vfb and _IWfb can be compensated without excess and deficiency.

FIG. 3 is a circuit diagram showing a configuration of the voltage distortion compensating circuit 7 in the power converter of the present embodiment. The voltage distortion compensating circuit 7 includes a polarity discriminating circuit 17 ₁ to
Comprising a _3, a current instantaneous value calculating circuits 10 ₁ to _3, a compensation voltage calculation circuit 11 _1-3, a multiplier 12 _1-3. Polarity determination circuit 17 _1-3 respectively output currents I _Ufb, I _Vfb, I _Wfb
Polarity (±) is determined. Current instantaneous value calculation circuit 10 ₁ to _3
Captures the output currents I _Ufb , I _Vfb , and I _Wfb and outputs instantaneous current absolute values | I _Ufb |, | I _Vfb |, | I _Wfb |, respectively. Compensation voltage calculation circuit 11 _1-3, current instantaneous absolute value output from the current instantaneous value calculating circuit 10 _1-3 | I _Ufb
│, _{│I Vfb} │, _{│I Wfb} │ is equal to or greater than the predetermined current value I _C , the predetermined voltage value V _{C is changed} to the compensation voltage absolute value │Δ
_{V U |, | ΔV V |} , | ΔV W | output as a current instantaneous value calculating circuits 10 ₁ ~ current instantaneous absolute value output from the ₃ | I
_{Ufb |, | I Vfb |,} | I Wfb | is, when a predetermined current value I _C is less than is less than the predetermined voltage value V _C, current instantaneous absolute value _{| I Ufb |, | I Vfb} |, The absolute value of the compensation voltage | ΔV _U |, | ΔV _V |, | Δ that is proportional to | I _Wfb |
V _W | is output.

FIG. 4 shows a compensation voltage calculation circuit 11.₁~_ThreeEnter in
Output current I_Ufb, I_Vfb, I_{Wf b}Instantaneous absolute value of
｜ I_Ufb|, | I_Vfb|, | I_Wfb| And compensation voltage calculation times
Road 11 ₁~_ThreeVoltage absolute value | ΔV output from_U｜,
| ΔV_V|, | ΔV_W| Is a graph showing the relationship with |. Figure
As shown in FIG. 4, the instantaneous current absolute value | I_Ufb|, | I
_Vfb|, | I_WfbIs the predetermined current value I_CAbove, compensation
Voltage absolute value | ΔV_U|, | ΔV_V|, | ΔV_W|
Voltage value V_CAnd a predetermined current value I_CIf less than
Is the absolute value of the compensation voltage | ΔV_U|, | ΔV_V|, | ΔV_W|
Is the instantaneous current absolute value | I_Ufb|, | I_Vfb|, | I_Wfb|
Is proportional to

[0022] Incidentally, the compensation voltage calculation circuit 11 _1-3 or a non-linear relationship is the distortion of the output voltage to the output current, if there is a bias amount, depending on their relationship, appropriate output characteristics Set.

The multipliers 12 ₁ to ₃ serve as compensation voltage calculation circuits 11
Absolute value of compensation voltage | ΔV _U |, | ΔV _V output from ₁ to ₃
|, | ΔV _W | are multiplied by the polarities (± 1) output from the polarity discriminating circuits 17 ₁ to _3, and the compensation voltages ΔV _U , ΔV _V ,
Output ΔV _W.

In the power converter of the present embodiment, the absolute values | I _Ufb |, | I _Vfb |, | I _Wfb | of the output currents I _Ufb , I _Vfb , and I _Wfb of the inverter circuit 2 are set to a predetermined value I. If _C is smaller than the absolute value _{| I Ufb |, | I Vfb} |, |
Compensation voltages ΔV _U , ΔV _V , Δ proportional to I _Wfb |
Since V _W is output, the compensation voltages ΔV _U , ΔV _V , and ΔV _W have continuous values, and smooth on-delay compensation can be performed.

Further, in the power converter of the present embodiment, as shown in FIG. 3, on-delay compensation is realized by a circuit configuration for performing simple calculations such as absolute value calculation, value comparison, and multiplication. It also has the advantage that it can be done. Further, even when the above-described operation of the voltage distortion compensating circuit 7 is realized by software, since the operation is simple, a high-performance CP is used.
U need not be used, and the cost of the power converter can be reduced.

In the power converter of the present embodiment, the voltage distortion compensating circuit 7 uses the compensation voltage ΔV based on the output current values I _Ufb , I _Vfb and I _Wfb of the inverter circuit 2 detected by the current detector 3. _U , ΔV _V and ΔV _W were calculated,
The power conversion device of the present invention is not limited to this, and the power conversion device of the present embodiment is configured such that each of the current commands input from the host device and the output current I of each phase of the inverter circuit 2 are output.
_Ufb , I _Vfb , and the deviation from I _Wfb are input, and each voltage command V _U ,
In the case of a PWM inverter device that includes a current control circuit that outputs V _V and V _W to perform current control, the output current I _Ufb ,
Compensation voltage Δ using current command instead of I _Vfb and I _Wfb
V _U , ΔV _V , and ΔV _W may be calculated.

Also, in the power converter of the present embodiment, the inverter circuit 2 is a two-level inverter, but the power converter of the present invention is not limited to this.
The present invention can also be applied to a three-level inverter in which two sets of DC power supplies are connected in series, and an inverter bridge is connected to the positive bus, the negative bus, and the middle point.

[0028]

As described above, in the power converter of the present invention, when the absolute value of each output current output from the inverter circuit is smaller than the predetermined value, the magnitude of the absolute value of the compensation voltage is reduced. It is reduced in proportion to the magnitude of the absolute value of each output current. By doing so, when the output current is very small, the magnitude of the compensation voltage can be reduced to prevent over-compensation of the on-delay compensation. Therefore, in the power converter of the present invention, even when the value of the output current is very small and the zero clamp phenomenon occurs, the distortion of the output current due to the on-delay can be compensated without excess or deficiency.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a power conversion device according to an embodiment of the present invention.

FIG. 2 is a diagram showing a power converter according to an embodiment of the present invention;
5 is a graph showing a relationship between an output current of the inverter device input to the voltage distortion compensation circuit and a compensation voltage output from the voltage distortion compensation circuit.

FIG. 3 is a diagram showing a power converter according to an embodiment of the present invention;
FIG. 3 is a circuit diagram illustrating a configuration of a voltage distortion compensation circuit.

FIG. 4 is a diagram illustrating a power converter according to an embodiment of the present invention;
9 is a graph showing a relationship between a current instantaneous absolute value of an output current input to the compensation voltage calculation circuit and a compensation voltage absolute value output from the compensation voltage calculation circuit.

[Explanation of symbols]

1 DC power source 2 inverter circuit 3 current detector 4 PWM generating circuit 5 on-delay circuit 6 the gate drive circuit 7 Voltage distortion compensation circuit 8 adder 9 3-phase load 10 _1-3 instantaneous current calculation circuit 11 _1-3 compensation voltage calculation circuits 12 _1-3 multipliers 17 _1-3 polarity determination circuit 20 _1-3 arm circuit

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Yoshiyuki Tanaka Inventor No. 2 Kurosaki Castle Stone, Yawatanishi-ku, Kitakyushu City, Fukuoka Prefecture F-term (reference) 5H007 AA07 BB06 CA01 CB04 CB05 CC23 DA05 DB02 DB05 DC02 EA02

Claims (8)

[Claims] 1. An inverter bridge in which a plurality of self-extinguishing power devices each having a diode connected in anti-parallel are connected in series, and the inverter bridge is connected to a positive bus connected to a positive electrode of a DC power supply and the DC power supply. An inverter circuit that is inserted between a negative bus connected to the negative electrode side of the power supply and turns on and off each of the self-extinguishing power devices to supply power to each phase of the load; and an input from a host device. A PWM generation circuit for generating a PWM pulse command to each of the self-extinguishing power devices included in the inverter circuit based on a voltage command of each phase; and a PWM generation circuit for turning on the timing by a predetermined time. An on-delay circuit that changes and outputs the PWM pulse command based on each of the PWM pulse commands output from the on-delay circuit. A gate drive circuit for driving each self-extinguishing type power device; current detecting means for detecting an output current value of each phase output from the inverter circuit; and a current detecting means for detecting each output current value detected by the current detecting means. A voltage distortion compensating circuit that calculates and outputs a compensation voltage to be added to each of the voltage commands based on the voltage command, before the voltage commands are input to the PWM generation circuit, A power conversion device comprising: an adder that adds the output compensation voltages; wherein the voltage distortion compensating circuit is configured to output a predetermined voltage value when an absolute value of the output current value is equal to or greater than a predetermined current value. The compensation voltage having the same polarity as the polarity of each output current value is output, and when the absolute value of each output current value is smaller than the predetermined current value, Each compensation having the same polarity as the polarity of each of the output current values, with the magnitude of the ratio between the pair value and the absolute value of each of the output current values being equal to the ratio between the predetermined voltage value and the predetermined current value. A power converter that outputs a voltage. 2. The voltage distortion compensating circuit comprises: a polarity discriminating circuit for discriminating and outputting the polarity of each of the output currents; and a current instantaneous circuit for taking in each of the output currents and outputting a current instantaneous absolute value of each of the output currents. A value calculating circuit, outputting a predetermined voltage value as an absolute value of each of the compensation voltages when each of the instantaneous absolute values is equal to or greater than a predetermined current value, wherein each of the instantaneous absolute values is smaller than the predetermined current value In this case, the absolute value of each compensation voltage is output such that the ratio between the absolute value of each compensation voltage and the absolute value of each output current value is equal to the ratio between the predetermined voltage value and the predetermined current value. A compensation voltage calculation circuit, and outputs each compensation voltage having a value obtained by multiplying the polarity of each output current output from the polarity discrimination circuit by the absolute value of each compensation voltage output from the compensation voltage calculation circuit. 2. A multiplier comprising: Mounting of the power converter. 3. A positive bus connected to a positive pole of a DC power supply and a negative pole of the DC power supply, wherein a plurality of self-extinguishing power devices each having a diode connected in anti-parallel are connected in series. Among the self-extinguishing power devices inserted between the negative bus connected to
An inverter circuit having an arm circuit connected to each phase of the load between any two self-extinguishing power devices for each phase of the load; a current command of each phase input from a host device and the inverter; A current control circuit that inputs a deviation from the output current of each phase of the circuit and outputs a voltage command for each phase; and, based on each of the voltage commands, to each of the self-extinguishing power devices included in the inverter circuit. A PWM generation circuit that generates a PWM pulse command; an on-delay circuit that changes and outputs each of the PWM pulse commands so as to delay the on-timing by a predetermined time; and a PWM command that is output from the on-delay circuit. A gate drive circuit for driving each of the self-extinguishing type power devices, based on the current commands, in addition to the respective voltage commands. A voltage distortion compensation circuit that calculates and outputs a compensation voltage; and before the voltage commands are input to the PWM generation circuit, adds each compensation voltage output from the voltage distortion compensation circuit to the voltage commands. In the power conversion device including an adder, the voltage distortion compensation circuit is configured such that, when the absolute value of each of the current commands is equal to or greater than a predetermined current value, the voltage command compensation circuit outputs the current command value with a predetermined voltage value. Output the compensation voltage having the same polarity as that of the current command value, and when the absolute value of the current command value is smaller than the predetermined current value, the magnitude is the absolute value of the compensation voltage and the current command value. Outputting the respective compensation voltages having the same polarity as the polarity of the respective current command values in a magnitude such that the ratio of the absolute value to the predetermined voltage value is equal to the ratio of the predetermined current value. Power converter. 4. The voltage distortion compensating circuit, a polarity discriminating circuit for discriminating and outputting the polarity of each of the current command values, and taking in each of the current command values and outputting a current instantaneous absolute value of each of the current command values. A current instantaneous value calculating circuit that outputs a predetermined voltage value as an absolute value of each of the compensation voltages when each of the instantaneous absolute values is equal to or greater than a predetermined current value; If the value is smaller than the value, the ratio between the absolute value of the compensation voltage and the absolute value of the current command value is equal to the ratio between the predetermined voltage value and the predetermined current value. And a value obtained by multiplying the polarity of each current command value output from the polarity discrimination circuit by the absolute value of each compensation voltage output from the compensation voltage calculation circuit. A multiplier that outputs each compensation voltage of Power converter according to claim 3, further comprising. 5. The power converter according to claim 1, wherein the inverter circuit is a two-level inverter. 6. The inverter circuit according to claim 1, wherein the inverter circuit is a three-level inverter in which two sets of DC power supplies are connected in series, and an inverter bridge is connected to a positive bus, a negative bus, and a middle point. Item 3. The power converter according to item 1. 7. A positive bus connected to a positive pole of a DC power supply and a negative pole of the DC power supply, wherein a plurality of self-extinguishing power devices each having a diode connected in anti-parallel are connected in series. An inverter circuit inserted between the self-extinguishing power devices connected to each phase of the load, and an arm circuit connected to each phase of the load for each phase of the load; and PWM for generating a PWM pulse command to each of the self-extinguishing power devices included in the inverter circuit based on the input voltage command of each phase of the load.
A generating circuit; an on-delay circuit for changing and outputting each of the PWM pulse commands so as to delay the on-timing for a predetermined time; and a self-timer based on each of the PWM pulse commands output from the on-delay circuit. A gate drive circuit for driving the arc-extinguishing power device, wherein a compensation voltage is added to each of the voltage commands to reduce distortion of the output voltage of the inverter circuit due to on-delay correction by the on-delay circuit. A control method for correcting, comprising: detecting an output current value of each phase output from the inverter circuit; and when an absolute value of each output current value is equal to or greater than a predetermined current value, Setting the compensation voltage to a voltage having a predetermined voltage value and the same polarity as the polarity of each of the output current values; When the absolute value of the flow value is smaller than the predetermined current value, the compensation voltage is determined by adjusting the ratio of the absolute value of each compensation voltage to the absolute value of each output current value to the predetermined voltage value and the predetermined value. And setting the voltage to the same magnitude as the ratio of the current value to the output current value. 8. A self-extinguishing power device in which diodes are connected in anti-parallel with each other in series, wherein a positive bus connected to a positive pole of the DC power supply and a negative pole of the DC power supply are connected. An inverter circuit inserted between the self-extinguishing power devices connected to each phase of the load, and an arm circuit connected to each phase of the load for each phase of the load; and A current control circuit for inputting a deviation between each input current command and an output current of each phase of the inverter circuit to output each voltage command; and, based on each of the voltage commands, each of the inverter circuits has A PWM generating circuit for generating a PWM pulse command to the self-extinguishing power device, and changing and outputting each of the PWM pulse commands so as to delay the ON timing by a predetermined time An on-delay circuit, a gate drive circuit for driving each of the self-extinguishing power devices based on the respective PWM pulse commands output from the on-delay circuit, and a voltage command based on the respective current commands A voltage distortion compensating circuit that calculates and outputs a compensation voltage to be added to the PWM signal; and outputs the compensation voltages output from the voltage distortion compensating circuit to the voltage commands before the voltage commands are input to the PWM generation circuit. A control method for correcting a distortion of an output voltage of the inverter circuit due to an on-delay correction by the on-delay circuit by adding a compensation voltage to each of the voltage commands. When the absolute value of each of the current command values is equal to or greater than a predetermined current value, the compensation voltage is set to a value of a predetermined voltage value, and A voltage having the same polarity as the polarity of the flow command value, and when the absolute value of each current command value is smaller than the predetermined current value, the compensation voltage is set to the absolute value of each compensation voltage and Controlling the ratio of the absolute value of the current command value to the ratio between the predetermined voltage value and the predetermined current value to a voltage having the same polarity as the polarity of each current command value. Method.