JP3248301B2 - Control circuit of PWM control inverter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a control circuit for suppressing fluctuations in output voltage and waveform distortion of a voltage-type PWM control inverter controlled by two-arm modulation.

[0002]

2. Description of the Related Art The present applicant has previously filed Japanese Patent Application No. 4-2438.
No. 44 filed a control circuit for a PWM control inverter. This control circuit focuses on the point that an error occurs in the inverter output voltage due to the provision of an ON delay time to prevent a short circuit between the upper and lower arms when turning on and off the semiconductor switch elements constituting the inverter. Then, a compensation amount for compensating the error voltage is calculated and added to the original voltage command value, and the value after the addition is used as a new voltage command value in PWM.
By performing the control, an error in the output voltage is suppressed, and voltage fluctuation and waveform distortion are eliminated. here,
The polarity of the compensation amount calculation value is determined according to the polarity of the inverter output current or the polarity of the voltage command value.

[0003]

However, a two-arm modulation method (a specific section in one cycle, for example, an electrical angle of 60 °)
During this period, the voltage is fixed (saturated) by turning on or off all the semiconductor switching elements above and below one arm, and only the other two arms are modulated, thereby distorting the potential of each phase. In a PWM control inverter of the type that controls the voltage to have a desired waveform, the phase voltage of the arm that is fully turned on or off is determined by the forward voltage drop of the semiconductor switch element according to the polarity of the output current.
fluctuate. FIG. 5 shows this state for the U phase, and e _du ′ in the figure is the voltage fluctuation amount.

[0004] The phase voltage of the switching other than the arm that is all on or all off varies by the forward voltage drop of the semiconductor switch element depending on the output voltage command value and the polarity of the output current. FIG. 6 shows this state. The hatched portions in the figure show the voltage fluctuations (insufficient and excessive).

In the conventional control circuit, the error of the output voltage caused solely by the ON delay time is merely compensated, and even the fluctuation of the output voltage due to the forward voltage drop of the semiconductor switching element as described above is compensated. Not something.
The present invention has been made to solve the above problems,
The purpose of the present invention is to provide a control circuit for a PWM control inverter that compensates not only for the ON delay time but also for the fluctuation of the output voltage due to the forward voltage drop of the semiconductor switch element so as to reduce the waveform distortion. To provide.

[0006]

In order to achieve the above object, a first aspect of the present invention is provided with an ON delay time for controlling two-arm modulation and preventing simultaneous ON of upper and lower semiconductor switch elements. A control circuit of a PWM control inverter, wherein a compensation amount calculator for compensating an error of an inverter output voltage caused by an ON delay time is calculated by a compensation amount calculator, and the voltage compensation amount is calculated based on an output voltage command for each phase. In a control circuit in which a new voltage command value obtained by adding to a value is provided to an inverter, the compensation amount calculator is provided if the semiconductor switch elements of the upper and lower arms of a certain phase are in all ON or all OFF sections. The forward voltage drop by the semiconductor switch element obtained from the output current polarity and output voltage command value polarity of the phase is superimposed on the voltage compensation amount of the other phase, and the voltage compensation amount of the phase is calculated. Those having means for Rokuria.

[0007] A second aspect of the present invention is the above-mentioned first aspect,
The compensation amount calculator superimposes the forward voltage drop by the semiconductor switch element within one switching cycle obtained by the output current polarity and the output voltage command value polarity of the switching phase on the voltage compensation amount of the phase. It is provided with.

[0008]

According to the first aspect of the present invention, in addition to the conventional voltage compensation amount caused by the ON delay time, the polarity of the output voltage command value for the phase in which the semiconductor switch elements of the upper and lower arms are all on or all off is determined. Since the inverter output voltage fluctuates by the forward voltage drop of the semiconductor switch element according to the magnitude and the polarity of the output current, this value is used as a voltage compensation amount.
This is superimposed on the voltage compensation amounts of the other phases that can perform switching control, other than the phases that are all on or all off. If it is desired to obtain a further compensating effect than the first aspect, the second aspect
According to the invention of the first aspect, the forward voltage drop within one switching cycle obtained from the output current polarity and the output voltage command value polarity of the switching phase is superimposed on the voltage compensation amount of the phase.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a configuration of this embodiment together with a main circuit of an inverter. Reference numeral 20 denotes a rectifier circuit 21, a DC intermediate capacitor 22, and a power transistor or an IGBT (insulated gate bipolar transistor) or the like used as a semiconductor switch element. And a voltage-type PWM control inverter including the inverter unit 23. On the AC output side, current detectors 1 _u , 1 _v , 1 _w are provided for each phase, and these are connected to current polarity / near zero detectors 2 _u , 2 _v , 2 _w . The current polarity / near-zero detectors 2 _u , 2 _v , 2 _w include the polarity of each phase output current i _u , i _v , i _w , and a predetermined range where the output currents i _u , i _v , i _w are near zero ( + ΔI ₀ to −ΔI ₀ ). The output signals of the current polarity / near-zero detectors 2 _u , 2 _v , and 2 _w are input to the compensation amount calculator 3.

On the other hand, reference numeral 4 denotes a two-arm modulation signal generator, to which an output voltage amplitude command value | V ^* | of the inverter is input. Reference numeral 5 denotes a frequency integrator, which converts an externally input angular frequency command value ω ₁ into an electrical angle θ ^el and inputs the electrical angle θ ^el to the compensation amount calculator 3 and the two-arm modulation signal generator 4. In the two-arm modulation signal generator 4,
2 based on output voltage amplitude command value | V ^* | and electrical angle θ ^el
Phase output voltage command value for the arm modulation _{^{e u *, e v *,}} e w * are calculated, these command values _{^{e u *, e v *,}} e w * is the adder 7
and _u, 7 _v, 7 _w, and the compensation amount calculator 3, the output voltage command value polarity detector 6 _u, 6 _v, is input to the 6 _w. The output voltage command value polarity detectors 6 _u , 6 _v , and 6 _w output 1 as the voltage polarity signal when the output voltage command values _eu ^* , _ev ^* , _ew ^* are zero or positive, and negative. In this case, 0 is output to the compensation amount calculator 3.

In the compensation amount calculator 3, in order to compensate for the output voltage fluctuation caused by the ON delay time and the forward voltage drop of the semiconductor switch element, the compensation amounts e _du , e _dv , e _dw , and adders 7 _u , 7 _v , 7
_{In w} , each phase output voltage command value _eu ^* , _ev ^* , _ew ^* is added to the final correction voltage command value _eu ^** ,
_ev ^** and _ew ^** are generated and output to a PWM signal generation circuit (not shown). Then, the inverter unit 23 is driven by the PWM signal.

The calculation of the voltage compensation amounts e _du , e _dv , and e _dw of each phase in the compensation amount calculator 3 is performed as follows. First, the compensation amount calculator 3 determines whether the polarity of the output current detected by the current polarity / near-zero detectors 2 _u , 2 _v , 2 _w and whether the output current is in a range near zero, and the output voltage command value. Based on the polarities of the voltage command values detected by the polarity detectors 6 _u , 6 _v , and 6 _w , a variation in the output voltage caused by providing an on-delay time is provided in the same manner as in Japanese Patent Application No. 4-243844. Voltage compensation amount e _du ′ for compensation
e _dv ′ and _{ed w} ′ are obtained for each phase.

That is, as shown in FIG. 2, the compensation amount calculator 3 includes a compensation amount calculator 31, compensation amount distribution circuits 32 _u , 32 _v , 32 _w corresponding to each phase, and a compensation amount correction circuit 33. It has. Here, the compensation amount calculation unit 31 calculates the average error voltage by multiplying all of the DC power supply voltage, the carrier frequency, and the ON delay time, and sets a value equal to the average error voltage as the compensation amount calculation value _ed as the compensation amount distribution circuit 32 _u , _32v , _32w
Output to

The compensation amount distribution circuits 32 _u , 32 _v , and 32 _w are:
As will be described in detail later, when the value of each phase output current i _u , i _v , i _w exceeds a positive predetermined value (+ ΔI ₀ ), positive compensation amounts e _du ′, e _dv ′, e _dw 'outputs, the value is a predetermined negative value of the respective phase output currents (-.DELTA.I ₀₎ each negative compensation amount e _du if below _{the', e dv ', e dw} ' outputs an, When the values of the output currents i _u , i _v , and i _w are between positive and negative predetermined values (+ ΔI ₀ to −ΔI ₀ ), the voltage command values e _u ^* , e _v ^* , e _w ^* are zero. positive compensation amount e _du respectively equal to or greater than ', e _dv', and outputs the e _dw ', the voltage command value e _u ^*, e
_{If v} ^* and _ew ^* are less than zero, negative compensation amounts e _du ′ and
e _dv ′ and _{ed w} ′ are output.

The above operation of the compensation amount distribution circuits 32 _u , 32 _v , 32 _w is based on the current polarity signals C _iu +, C _iu −, C _iv from the current polarity / near zero detectors 2 _u , 2 _v , 2 _w. +, C _iv −, C _iw
+, C _iw − and output voltage command value polarity detectors 6 _u , 6 _v , 6
FIG. 3 shows the configuration of a current polarity / near zero detector (U-phase detector 2 _u as an example) based on the voltage polarity signals C _vu , C _vv , and C _vw from _w . The configuration is U,
V and W are the same for all phases. In FIG.
Current polarity / near-zero detector Detector 2 _u is a comparator 2
01 and 203, and setting devices 202 and 204. When the value of the U-phase output current i _u exceeds a predetermined positive value (+ ΔI ₀ ), the comparator 201 sets the value to 1 (+ ΔI ₀ ).
I ₀ ), and outputs a current polarity signal C _iu + whose value becomes 0 in the following cases. Similarly, comparator 203, U-phase output currents i a predetermined value the value is negative _u (-.DELTA.I ₀₎ 1 value when below a, (- [Delta] I ₀₎ or more current values when becomes 0 The polarity signal C _iu − is output.

FIG. 4 shows a configuration of a compensation amount distribution circuit (for example, a U-phase distribution circuit 32 _u ) when the phase difference between the output current and the voltage command value is equal to or greater than zero and smaller than π [rad]. ing. In FIG. 4, reference numeral 321 denotes a polarity inversion element,
322 and 323 are switches, and 324 is a current polarity signal C _iu.
+, C _iu −, switch 32 based on voltage polarity signal C _vu.
2, 323 is a logic circuit that controls on and off. This configuration is the same for all phases U, V and W.

Under the above premise, the operation of the compensation amount calculator 3 will be described more specifically for the U phase. If the phase difference between the output current and the voltage command value is equal to or greater than zero, it will be greater than π [rad]. smaller, the current polarity signal C _iu + current polarity signal C _iu when the 1 - since is 0, the compensation amount distribution circuit 32 _u of the switch 322 is turned on, the switch 323 is turned off, the distribution circuit 32 _u is regardless of the voltage polarity signal C _vu, it outputs the value of the compensation amount calculation value e _d as it is to a positive voltage compensation amount e _du of '. Also, the current polarity signal C _iu + is 0
In this case, since the current polarity signal C _iu − is 1, the switch 322 of the compensation amount distribution circuit 32 _u is turned off, and the switch 323 is turned off.
There turned on, the distribution circuit 32 _u, regardless of the voltage polarity signal C _vu, outputs the compensation amount calculation value e _d via the polarity inversion element 321, it unchanged as negative compensation amount e _du of ' I do.

The current polarity signal C _iu + and the current polarity signal C _iu −
Are all 0 (when the value of the output current i _u is in the range near zero and it is difficult to determine the polarity, that is, when the value of the output current i _{u is in} the range of + ΔI ₀ to −ΔI ₀ ). When the voltage polarity signal C _vu is 1, the compensation amount operation value _ed is
2, the value is output as the positive polarity compensation amount e _du 'while keeping the value as it is. On the other hand, the voltage polarity signal C _vu when is 0, the compensation amount calculation value e _d is the polarity inversion element 321 and through the switch 323, the compensation amount of the negative polarity it unchanged e
output as _du '. As described above, the voltage compensation amounts e _du ′, _{ed v} ′, and _{ed w} ′ of each phase due to only the ON delay time of the inverter are calculated, and these values are input to the compensation amount correction circuit 33.

[0019] In the compensation amount correction circuit 33, voltage compensation amount inputted e _du ', e _dv', separately to e _dw ', such as by superimposing a compensation amount, a voltage compensation amount is corrected by the following steps . That is, each phase is input the output voltage command value e _u ^*, e _v ^*, or from e _w ^*, the voltage command value of a certain phase is in an all-on or full off to have intervals of an electrical angle of 60 ° not And if it is all on or all off, the forward voltage drop (constant amount) by the semiconductor switch element obtained from the current polarity signal of the phase and the voltage polarity signal of the output voltage command value
Is superimposed on the voltage compensation amount of the other phase, and the voltage compensation amount of the phase (own phase) is cleared to zero. In other words, when the own phase is not in the all-on or all-off section, the voltage compensation amount of the other phase in the all-on or all-off section is superimposed and corrected on the own-phase voltage compensation amount.

That is, the two-arm modulation type fully-on or all-off phase voltage is equal to the forward voltage drop of the semiconductor switch element according to the output current polarity as shown in FIG.
fluctuate. Therefore, since the phase that is all on or all off cannot be compensated by the own phase, the voltage compensation amount is corrected by superimposing a fixed forward voltage drop on the voltage compensation amount of the other phase that can perform switching control. This was reflected in the voltage command value.

The function of the compensation amount correction circuit 33 is first.
Accordingly, the output voltage error can be suppressed as compared with the related art. On the other hand, when it is desired to obtain a further compensation effect, the following processing may be applied, and this corresponds to the embodiment of the second invention. That is, the switching phase voltage fluctuates by the forward voltage drop of the semiconductor switch element depending on the polarity and magnitude of the output voltage command value and the polarity of the output current as shown in FIG. Therefore, in the switching phase, the forward voltage drop within one switching cycle is obtained based on the polarity and magnitude of the output voltage command value and the output current polarity, and this is superimposed on the voltage compensation amount of the own phase to compensate. Correct the amount.

[0022] Thus corrected phase voltage compensation amount e _du, e _dv, e _dw is the final output of the compensation amount calculator 3, the original voltage command by the adder 7 _u, 7 _v, 7 _w values ^{_{e u *, e v *,}} e w * and is added the final phase output voltage command value ^{_{e u **, e v **,}} e w ** is obtained.

It is possible to determine whether the inverter is in the drive mode or the braking mode based on the output current polarity and the output voltage command value polarity. Accordingly, the forward voltage drop by the semiconductor switch element may be superimposed on the voltage compensation amount of another phase as a compensation amount at the time of driving or braking.

[0024]

As described above, according to the first or second aspect, not only the error of the output voltage due to the provision of the ON delay time in the inverter, but also the fluctuation due to the forward voltage drop of the semiconductor switch element. Since it is calculated and superimposed on the voltage compensation amount, fluctuations and errors in the inverter output voltage can be further suppressed and waveform distortion can be reduced as compared with the related art.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of the present invention.

FIG. 2 is a block diagram illustrating a configuration of a compensation amount calculator according to the embodiment.

FIG. 3 is a block diagram illustrating a configuration of a current polarity / near-zero detector in the embodiment.

FIG. 4 is a block diagram illustrating a configuration of a compensation amount distribution circuit according to the embodiment.

FIG. 5 is an explanatory diagram of an output voltage fluctuation amount of an inverter according to the related art.

FIG. 6 is an explanatory diagram of an output voltage fluctuation amount of an inverter according to the related art.

[Explanation of symbols]

1 _u , 1 _v , 1 _w Current detector 2 _u , 2 _v , 2 _w Current polarity / near-zero detector 3 Compensation amount calculator 4 2-arm modulation signal generator 5 Frequency integrator 7 _u , 7 _v , 7 _w Adder 6 _u , 6 _v , 6 _w Output voltage command value polarity detector 20 Voltage source PWM control inverter 21 Rectifier circuit 22 DC intermediate capacitor 23 Inverter unit 31 Compensation amount calculation unit 32 _u , 32 _v , 32 _w Compensation amount distribution Circuit 33 Compensation amount correction circuit

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H02M 7/48 H02J 3/18 H02M 7/537

Claims (4)

(57) [Claims] 1. A control circuit for a voltage-type PWM control inverter which is controlled by two-arm modulation and provided with an ON delay time for preventing simultaneous ON of upper and lower semiconductor switch elements. The amount of voltage compensation that compensates for the error in the inverter output voltage is calculated by the compensation amount calculator, and this voltage compensation amount is added to the original output voltage command value of each phase, and a new voltage command value obtained by the inverter is applied to the inverter. In the control circuit, when the semiconductor switch elements of the upper and lower arms of a certain phase are in the all-on or all-off section, the compensation amount calculator obtains the output current polarity and the output voltage command value polarity of the phase. PW comprising means for superimposing a forward voltage drop caused by the semiconductor switch element on the voltage compensation amount of another phase and clearing the voltage compensation amount of the phase to zero. Control circuit of the control inverter. 2. The control circuit for a PWM control inverter according to claim 1, wherein the compensation amount calculator is a semiconductor switch element within one switching cycle obtained from an output current polarity and an output voltage command value polarity of a switching phase. 3. A control circuit for a PWM control inverter, comprising: means for superimposing a forward voltage drop due to the above on a voltage compensation amount of the phase. 3. When the semiconductor switch elements of the upper and lower arms of a certain phase are in all ON or all OFF sections, the compensation amount calculator operates in the drive / brake mode based on the output current polarity and the output voltage command value polarity of the phase. 3. The control circuit for a PWM control inverter according to claim 1, further comprising: means for judging the forward voltage drop by the semiconductor switch element and superimposing the forward voltage drop amount as a compensation amount at the time of driving or braking on the voltage compensation amount of another phase. 4. The PWM control according to claim 1, wherein the compensation amount calculator uses the magnitude of the output voltage command value of the phase in calculating the forward voltage drop of the semiconductor switch element. Inverter control circuit.