CN110692192A

CN110692192A - Control device for AC motor

Info

Publication number: CN110692192A
Application number: CN201880027526.5A
Authority: CN
Inventors: 保月孝志; 古谷真一
Original assignee: Mitsubishi Corp
Current assignee: Mitsubishi Corp
Priority date: 2017-05-31
Filing date: 2018-03-27
Publication date: 2020-01-14
Anticipated expiration: 2038-03-27
Also published as: JP6636216B2; JPWO2018220968A1; WO2018220968A1; CN110692192B

Abstract

A control device (10) for an AC motor comprises: a correction unit (220) that calculates a correction voltage for compensating for an output voltage error of the power converter (3), and corrects the voltage command; a voltage error feature value extraction unit (100) that extracts a feature value of an output voltage error from the detected phase current; and a correction voltage adjustment unit (300) that adjusts the parameter of the correction voltage on the basis of the extracted characteristic amount of the output voltage error. Then, as a parameter, a correction voltage adjustment unit (300) adjusts a parasitic capacitance (C) in the power converter (3) corresponding to the slope of the correction voltage, and a correction unit (220) calculates the correction voltage using the adjusted parasitic capacitance (C).

Description

Control device for AC motor

Technical Field

The present invention relates to a control device for controlling an ac motor, and more particularly to output voltage control of a power converter for driving the ac motor.

Background

In a power converter for driving an ac motor, particularly an inverter using PWM (Pulse-Width Modulation), switching elements of 2 arms perform a switching operation in accordance with a voltage command to generate an ac voltage, and output the ac voltage to an ac load. In this case, a dead time (Td) is provided as a period for simultaneously controlling the 2-arm switching elements to be in an off operation state, in order to prevent short circuit breakdown due to simultaneous conduction of the 2-arm switching elements. Due to the dead time, the output voltage of the inverter is distorted, and a torque ripple is generated in the ac motor driven by the inverter, thereby deteriorating the control accuracy of the ac motor.

Therefore, the following methods are known: the output voltage distortion is suppressed by adding a compensation signal calculated from the output current of the power converter to a voltage command of the power converter.

In the following conventional technology, the output voltage distortion is estimated from the output voltage command value and the output current value of the power converter, and the amplitude of the compensation signal is adjusted based on the estimated value (see, for example, patent document 1).

Further, the following are disclosed: a direction orthogonal to the induced voltage of the load is obtained, and the output voltage command value is corrected based on a value in the direction orthogonal to the induced voltage of the estimated output voltage error and the output current value (see, for example, patent document 2).

Documents of the prior art

Patent document

Patent document 1: japanese patent No. 3536114

Patent document 2: japanese patent No. 4448351

Disclosure of Invention

Problems to be solved by the invention

In the power converter, a delay time is generated in the switch due to the influence of parasitic capacitance of the switching element or impedance in the wiring. Therefore, the output voltage distortion, i.e., the voltage error, generated due to the dead time is also deformed from the rectangular wave shape. In the conventional method, although the magnitude of the voltage error is suppressed, a spike-like voltage error may remain in the vicinity of the zero-cross phase of the current.

The present application discloses a technique for solving the above-described problem, and an object of the present application is to prevent generation of a spike-like voltage error in the vicinity of a zero-cross phase of a current by appropriately generating a voltage command of a power converter in a control device for an ac motor, and to suppress an output voltage error with high accuracy.

Means for solving the problems

A control device for an ac motor, which generates a voltage command for a power converter that drives the ac motor and controls the ac motor, includes: a current detection unit that detects phase currents of respective phases of the ac motor; a correction unit that calculates a correction voltage for compensating for an output voltage error of the power converter and corrects the voltage command; a voltage error feature value extraction unit that extracts a feature value of the output voltage error based on the detected phase current; and a correction voltage adjustment unit that adjusts a parameter of the correction voltage based on the extracted characteristic amount of the output voltage error. The correction voltage adjustment unit further includes a 1 st adjustment unit that adjusts a 1 st parameter corresponding to a slope of the correction voltage, that is, a parasitic capacitance in the power converter, as the parameter, and the correction unit calculates the correction voltage using the parameter adjusted by the correction voltage adjustment unit.

Effects of the invention

According to the control device for an ac motor disclosed in the present application, since the parasitic capacitance in the power converter corresponding to the slope of the correction voltage for compensating for the output voltage error of the power converter is adjusted, it is possible to prevent a spike-like output voltage error from occurring in the vicinity of the zero-cross phase of the current, and to suppress the output voltage error with high accuracy.

Drawings

Fig. 1 is a functional block diagram showing the configuration of a control device for an ac motor according to embodiment 1.

Fig. 2 is a diagram showing a hardware configuration of a control device for an ac motor according to embodiment 1.

Fig. 3 is a waveform diagram illustrating an output voltage error of the power converter.

Fig. 4 is a waveform diagram of an output current and an error voltage of the power converter.

Fig. 5 is a control block diagram showing the voltage error feature value extraction unit according to embodiment 1.

Fig. 6 is a control block diagram showing the correction voltage adjustment section of embodiment 1.

Fig. 7 is a diagram for explaining a switching operation of the inverter according to embodiment 1.

Fig. 8 is a diagram for explaining a switching operation of the inverter according to embodiment 1.

Fig. 9 is a waveform diagram of each part of the inverter according to embodiment 1.

Fig. 10 is a partially enlarged view of fig. 9.

Fig. 11 is a waveform diagram showing components orthogonal to the current vector of the output voltage error in embodiment 1.

Fig. 12 is a diagram for explaining the operation of the correction voltage adjustment unit according to embodiment 1.

Fig. 13 is a diagram for explaining the operation of the correction voltage adjustment unit according to embodiment 1.

Fig. 14 is a functional block diagram showing the configuration of a control device for an ac motor according to embodiment 3.

Fig. 15 is a block diagram illustrating an operation in a parameter adjustment mode in the ac motor control device according to embodiment 3.

Fig. 16 is a block diagram illustrating an operation in a normal mode in the control device for the ac motor according to embodiment 3.

Fig. 17 is a functional block diagram showing the configuration of a control device for an ac motor according to embodiment 4.

Fig. 18 is a control block diagram showing the correction voltage adjustment section of embodiment 4.

Detailed Description

Embodiment mode 1

Next, a control device for an ac motor according to embodiment 1 will be described with reference to the drawings.

Fig. 1 is a functional block diagram showing the configuration of a control device for an ac motor according to embodiment 1. As shown in fig. 1, a control device 10 of an ac motor 1 controls driving of the ac motor 1 by controlling a PWM inverter, which is a power converter 3 having switching elements.

The control device 10 includes a power converter 3, a phase current detector 4 as a phase current detecting unit, a voltage error feature value extracting unit 100, a correcting unit 220 including a correction voltage calculating unit 200 and an adder 210, and a correction voltage adjusting unit 300. Further, the ac motor 1 has a phase detector 2.

In this case, although the control device 10 has been shown to include the power converter 3, the power converter 3 may be disposed outside the control device 10 and controlled by the control device 10. In this case, the phase current detector 4 may be disposed outside the control device 10, and the current detection unit in the control device 10 detects the phase current iuvw of each phase based on the current signal from the phase current detector 4.

The control device 10 shown in fig. 1 can be realized by a hardware configuration shown in fig. 2, for example. As shown in fig. 2, the control device 10 includes a power converter 3, a phase current detector 4, a processor 12, and a storage device 13. Then, the processor 12 inputs the three-phase voltage command Vuvw from the upper control device 11, reads out and executes the program stored in the storage device 13. The functions of the voltage error feature value extraction section 100, the correction section 220, and the correction voltage adjustment section 300 in fig. 1 are realized by executing a program on the processor 12.

In addition, the plurality of processors 12 and the plurality of storage devices 13 may cooperate to execute the above-described functions.

As described above, the power converter 3 performs switching control by providing the dead time, which is a period during which the switching elements of the 2 arms are simultaneously controlled to the off operation state, and the dead time causes an output voltage to generate a disturbance voltage, which becomes a voltage error with respect to the voltage command.

Fig. 3 is a waveform diagram of 1 cycle of the U phase for explaining an output voltage error of the power converter 3.

The Td interference voltage P due to the dead time is determined by the dead time period Td, the carrier frequency fc, and the dc voltage Vdc of the power converter 3, and has a minute area of (Td · Vdc), and is a pulse voltage generated fc times in a half cycle with a polarity opposite to the U-phase current iu.

It is known that the Td disturbance voltage P of each phase is equivalent to a rectangular wave-shaped error voltage Q having an amplitude VTd of Td · fc · Vdc and having a polarity opposite to the phase current [ i ] output from the power converter 3, if considered by time averaging. Where the notation [ ] indicates that the quantities within [ ] are vectors.

When it is assumed that the switching operation is ideally performed without delay, the error voltage Q of the rectangular wave can be represented by (-sgn ([ i ]), VTd). In this case, the Td interference voltage can be corrected by adding the correction voltage R having the opposite polarity to the error voltage Q, that is, the rectangular wave-shaped voltage having the same polarity as the phase current and having the amplitude VTd to each phase of the voltage command input to the power converter 3 in advance. The correction voltage R of a rectangular wave shape is represented by (sgn ([ i ]), VTd).

However, in practice, on/off time of the switch occurs due to the influence of parasitic capacitance of the switching element or impedance in the wiring. As shown in fig. 4, the actual Td disturbance voltage (error voltage) affected by these influences cancels the corners of the rectangular wave, and becomes a smooth trapezoidal wave having a slope in a minute phase section sandwiching the zero-cross phase of the current zero-crossing.

In the control device 10, the correction voltage calculation unit 200 calculates the correction voltage Vuvwc for each phase for compensating for an output voltage error (hereinafter, a voltage error or an error voltage) with respect to the voltage command Vuvw for each phase supplied from the upper control device 11, the adder 210 adds the correction voltage Vuvwc to the voltage command Vuvw, and the corrected voltage command 3a is output to the power converter 3. The power converter 3 performs output control based on the corrected voltage command 3a to drive the ac motor 1. Then, the phase current detector 4 detects the current iouvw of each phase flowing through the ac motor 1. In this case, the currents of the two phases may be detected, and the current of the remaining one phase may be obtained by calculation.

The voltage error feature value extraction unit 100 extracts the voltage error feature value Vqi as follows. First, a current vector phase θ i is calculated after converting the detected phase current iouvw and the phase θ re from the phase detector 2 into a dq-axis current in the rotating magnetic field. Then, using the current vector phase θ i, the current vector and the voltage component Vdqi in the direction orthogonal thereto are calculated from the phase current iouvw (Vdi, Vqi). The orthogonal voltage component Vqi of the calculated current vector is a characteristic amount of the voltage error. Further, the voltage error feature value extraction unit 100 calculates the reproduction phase current iuvwRP from the phase current iuvw and the current vector phase θ i.

The correction voltage adjustment unit 300 receives the current vector phase θ i and the voltage error feature Vqi as input from the voltage error feature extraction unit 100, and receives the correction voltage Vuvwc as input from the correction voltage calculation unit 200. Then, the amplitude α of the parasitic capacitance C as the 1 st parameter and the correction voltage Vuvwc as the 2 nd parameter corresponding to the slope of the correction voltage Vuvwc is adjusted and output.

The correction voltage calculation unit 200 calculates the correction voltage Vuvwc for each phase from the reproduction phase current iuvwRP, the amplitude α, and the parasitic capacitance C.

Next, the operation of the voltage error feature extraction unit 100 will be described in detail below with reference to fig. 5. The configuration shown in fig. 5 is only an example and is not limited thereto.

As shown in fig. 5, the detected phase current iuvw is converted into a dq-axis current idq (id, iq) on the rotation coordinate in accordance with the phase θ re by a coordinate converter (three-phase-dq converter) 101.

The dq-axis current idq is filtered by a low-pass filter (LPF)102 and then input to a current vector phase calculator 103. The current vector phase calculator 103 obtains the arctangent of the dq-axis current idq after the filtering process and adds the arctangent to the phase θ re to obtain a current vector phase θ i.

The dq-axis current idq is also input to the amplitude calculator 104, and the amplitude calculator 104 calculates the amplitude in (√ (2/3) · (id)) of the phase current²+iq²))). Then, the phase current arithmetic unit 105 obtains the reproduction phase currents iuvwRP (iuRP, ivRP, iwRP) based on the current vector phase θ i by the following equation (1) based on the amplitude in and the current vector phase θ i.

[ mathematical formula 1 ]

Number 1

Further, the phase current iouvw is converted into dqi axis current idqi (idi, iqi) by a coordinate converter (three-phase-dqi converter) 106 which is converted into dqi coordinates which are coordinates synchronized with the phase θ i of the current vector. Then, the motor inverse model arithmetic unit 107, which obtains a voltage from a current according to a voltage equation of the ac motor 1, obtains dqi-axis voltage Vdqi (Vdi, Vqi) from dqi-axis current idqi by the following equation (2). The orthogonal direction voltage component Vqi of the current vector becomes a characteristic amount of the voltage error.

[ mathematical formula 2 ]

Number 2

Where R denotes a winding resistance of the ac motor 1, Ld and Lq denote dq-axis inductances of the ac motor 1, and p denotes a differentiation operator. There are many known techniques for differential operation, such as combining with a low-pass filter and installing it as pseudo-differential operation, and these known techniques can be used.

Next, the operation of the correction voltage adjustment unit 300 will be described in detail with reference to fig. 6. The configuration shown in fig. 6 is only an example and is not limited thereto.

As shown in fig. 6, the correction voltage adjustment unit 300 converts the correction voltage Vuvwc into a dqi-axis voltage Vdqic by a coordinate converter (three-phase-dqi converter) 301 that converts the current vector phase θ i into dqi coordinates, and obtains a voltage component Vqic in the orthogonal direction of the current vector. The qi-axis voltage Vqic is multiplied by the characteristic amount Vqi of the voltage error, which is a voltage component in the orthogonal direction of the same current vector, by the multiplier 302, to obtain a multiplication result 302 a.

The multiplication result 302a is input to a parasitic capacitance adjuster 303 as a 1 st adjustment section and an amplitude adjuster 304 as a 2 nd adjustment section. The parasitic capacitance adjuster 303 adjusts the parasitic capacitance C corresponding to the slope of the correction voltage Vuvwc, and the amplitude adjuster 304 adjusts the amplitude α of the correction voltage Vuvwc. The parasitic capacitance adjuster 303 multiplies the multiplication result 302a by a predetermined gain K1, and performs integration adjustment only in a predetermined interval, thereby adjusting the parasitic capacitance C. The amplitude adjuster 304 multiplies the multiplication result 302a by a predetermined gain (-K2: K2>0) and performs integral adjustment, thereby adjusting the amplitude α. The details of the adjustment of the amplitude α and the parasitic capacitance C will be described later.

As described above, the correction voltage calculation unit 200 calculates the correction voltage Vuvwc for each phase from the reproduction phase current iuvwRP, the amplitude α, and the parasitic capacitance C. The principle thereof will be explained below.

The power converter 3 is constituted by a three-phase PWM inverter, and switching operation of the 1-phase inverter will be described with reference to fig. 7 to 9. Fig. 7 is a circuit diagram of 1-phase inverter 20 including parasitic capacitances C1 and C2(C1 ═ C2 ═ C). The inverter 20 of the 1 phase is configured such that a branch, in which 2 switching elements S1 and S2 each having a diode connected in reverse parallel are connected in series, is connected in parallel with a dc power supply 21 of a voltage Vdc. The connection point of the 2 switching elements S1, S2 serves as an ac output terminal, and the parasitic capacitors C1, C2 are connected in parallel to the switching elements S1, S2.

For simplicity, consider the case where the current i is positive. In the model of the inverter 20 including the parasitic capacitances C1 and C2, for example, the following operation is performed at the timing when the switching element S2 is turned off and the switching element S1 is turned on. That is, as shown in fig. 8, even if the switching element S1 is turned on, the voltage does not rise to the power supply voltage Vdc until the charging of the parasitic capacitor C1 is completed, and even if the switching element S2 is turned off, the voltage does not become 0 until the discharging of the parasitic capacitor C2 is completed. The behavior of the output voltage at this time will be described with reference to fig. 9.

As shown in fig. 9, the dead time Td is provided to provide a P command VP as a voltage command for the positive-side switching device S1 and an N command VN as a voltage command for the negative-side switching device S2. In this case, an output voltage such as the ideal output voltage Vout-a is ideally obtained. However, the output voltage has a delay time Tdr at the rising timing and a delay time Tdf at the falling timing. Further, there are actually a voltage vr (i) from the start of voltage rise until the charging of the parasitic capacitance C is completed and a voltage vf (i) from the start of voltage drop until the discharging of the parasitic capacitance C is completed. In consideration of this, the actual output voltage is a voltage waveform like the output voltage Vout-b.

The delay times Tdr and Tdf at the rise and fall of the output voltage are different, and the voltage vr (i) and the voltage vf (i) are also different. The voltage vr (i) and the voltage vf (i) may vary in a complicated manner depending on the current, and it is difficult to accurately specify the voltage.

Therefore, the total amount of vr (i) + vf (i) is considered instead of voltage vr (i) and voltage vf (i) alone. That is, the charge/discharge voltage vp (i) ═ vr (i) + vf (i) is assumed, and an output voltage model (output voltage Vout-md) in which charging is completed in one instant and which is linearly discharged at a constant current i/2 is considered.

At this time, vp (i) is represented by the area S of the triangle shown in fig. 10.

Discharge time t1 ═ (C · Vdc)/([ i ]/2)

S＝Vdc·t1·(1/2)＝(C·Vdc²)/[i]

This triangle of area S appears the carrier frequency fc times in a half cycle, and therefore vp (i) is expressed by the following equation (3).

Vp(i)＝C·Vdc²·fc/[i]…(3)

The voltage error of the output voltage is considered in two cases, i.e., a case where the discharge time t1 is equal to or less than the dead time Td and a case where the discharge time t is longer than the dead time Td.

First, when the discharge time t1 is equal to or shorter than the dead time Td, i.e., (C · Vdc)/([ i ]/2) ≦ Td, the voltage error is a value obtained by adding the error voltage Q shown in fig. 3 to vp (i) of the above equation (3). Further, since there is a voltage error based on the delay time Tdr, Tdf at the rise time and the fall time, when the amplitude α is introduced as a parameter for adaptively adjusting these voltage errors, the voltage error Vuvwer is expressed by the following expression (4).

[Vuvwer]

＝α(Td·fc·Vdc·(-sgn([i]))+C·Vdc²·fc/[i])

…(4)

Next, when the discharge time t1 is longer than the dead time Td, that is, (C · Vdc)/([ i ]/2) > Td, the triangle of vp (i) does not completely converge in the dead time Td section, and is partially missing and trapezoidal, but it is difficult to formulate the discharge time t 1. Therefore, the voltage error Vuvwer is set to be smoothly switched to the voltage error shown in the above equation (4).

Since the correction voltage Vuvwc for compensating the voltage error Vuvwer is obtained by inverting the polarity of the voltage error, the correction voltage Vuvwc is obtained by the following equation (5).

[Vuvwc]

(| [ i ] | ≧ ith) and

＝α(Td·fc·Vdc·sgn([i])-C·Vdc²·fc/[i])

(| [ i ] | < ith) time

＝α(Td²·fc/4C)·[i])

Wherein ith is 2C Vdc/Td

…(5)

As described above, the correction voltage calculation unit 200 calculates the correction voltage Vuvwc for each phase using the above equation (5) based on the reproduction phase current iuvwRP, i.e., [ i ], the amplitude α, and the parasitic capacitance C.

Next, the adjustment of the amplitude α and the parasitic capacitance C by the correction voltage adjustment unit 300 will be described below with reference to fig. 11 to 13.

As described above, the corners of the actual Td disturbance voltage cancellation rectangular wave have a smooth trapezoidal wave shape having an inclination in a minute phase section sandwiching the zero-cross phase of the current zero-crossing (see fig. 4). The voltage output to the ac motor 1 has a voltage error remaining therein and is not completely corrected, and if the output voltage is subjected to rotational coordinate conversion in a direction synchronized therewith and in a direction orthogonal thereto with reference to the current vector phase θ i, as shown in fig. 11, the voltage component Vqi in the current vector orthogonal direction (qi direction) is not 0 but has a sawtooth waveform. If the sawtooth-like qi-axis voltage component Vqi approaches 0, there is almost no residual voltage error, and it can be determined that the voltage error due to the dead time Td has been corrected with high accuracy.

Therefore, as shown in fig. 12 and 13, by applying signal processing of fourier analysis, the qi axis voltage Vqi, which is a characteristic amount of the voltage error, is set as a target signal, and the qi axis voltage Vqic of the correction voltage Vuvwc, which is a signal synchronized with the residual voltage error, is set as a base signal. Then, the residual voltage error component included in the qi axis voltage Vqi is extracted to cancel the residual voltage error.

As shown in fig. 12, the amplitude itself including the polarity of Vqi causes excess or deficiency of the amplitude α, which is a parameter of the correction voltage Vuvwc. Therefore, if the multiplication result 302a of the multiplier 302 is integrated by the amplitude adjuster 304, α can be obtained. A loop is formed in which this α is fed back to the correction voltage calculation unit 200, and the integral adjustment gain (-K2) in the amplitude adjuster 304 is negative, so that α is adjusted to reduce the residual voltage error. When there is no residual voltage error, α does not change.

The parasitic capacitance C is a parameter relating to the slope of the correction voltage Vuvwc, and as shown in fig. 13, the slope in the zero-crossing section (the section sandwiching the zero-crossing point) in Vqi is excessive or insufficient. Vqi is the zero crossing of three phase currents that occur 6 times within a cycle of electrical angle. That is, the slope of the zero-crossing of Vqi is the slope of the zero-crossing of Vqi within the phase interval that sandwiches the current zero-crossing phase.

Therefore, C can be obtained if the parasitic capacitance adjuster 303 integrates the multiplication result 302a of the multiplier 302 in a predetermined phase section Ti with the current zero-crossing phase therebetween. The phase section Ti is a phase section reflecting the slope in the vicinity of the current zero-crossing phase, and as shown in fig. 13, is a phase section in which the temporal change rate of Vqi is steeper. In this case, the phase section Ti is selected to be the one having a smaller peak-to-peak phase section. Then, the parasitic capacitance adjuster 303 is operated in the phase zone Ti.

In addition, all peak-to-peak intervals may not be selected as the phase intervals, and in order to prevent malfunctions, the phase intervals may be from half of one peak to half of another peak, from 1/4 of one peak to 1/4 of another peak, or the like. Then, the parasitic capacitance adjuster 303 is set to operate in the selected phase zone.

C obtained by multiplying the integration result by gain K1 and adjusting the result is fed back to correction voltage calculation unit 200. Since the amplitude α is adjusted to reduce the residual voltage error, the adjustment of the parasitic capacitance C is performed with an appropriate response.

In this way, the amplitude α of the correction voltage Vuvwc is adjusted to cancel the residual voltage error, and the slope of the correction voltage Vuvwc is adjusted by adjusting the parasitic capacitance C that divides the integration section. Thus, the slope of the correction voltage Vuvwc is adjusted to match the slope of the Td disturbance voltage in the minute phase zone sandwiching the zero-crossing phase of the current.

As described above, the Td disturbance voltage to be corrected has a smooth trapezoidal waveform as shown in fig. 4, and the correction voltage to be generated also has the same shape. In this embodiment, the slope and amplitude of the correction voltage Vuvwc can be adjusted individually. Therefore, the trapezoidal waveform can be adjusted more accurately, spike-like output voltage errors can be prevented from occurring in the vicinity of the current zero-crossing phase, and the output voltage errors can be suppressed with high accuracy.

Embodiment mode 2

Next, a control device for an ac motor according to embodiment 2 will be described.

In embodiment 1, the correction voltage calculation unit 200 calculates the correction voltage Vuvwc of each phase using the above equation (5) based on the reproduction phase current iuvwRP, i.e., [ i ], the amplitude α, and the parasitic capacitance C, but in embodiment 2, the correction voltage Vuvwc is obtained by a different calculation. The other structure is the same as embodiment 1.

As described above, there are delay times Tdr and Tdf when the output voltage of the inverter rises and falls, and voltages vr (i) and vf (i) until the charging and discharging of the parasitic capacitance C are completed (see fig. 9). In this case, the output voltage model is divided into rectangular wave components

(Td·fc·Vdc+(Tdr-Tdf)·fc·Vdc)

＝(Td+Tdr-Tdf)·fc·Vdc

And the remaining components, i.e., vp (i) shown in equation (3) above, in consideration of the output voltage.

When the amplitude α is considered as a parameter for adjusting only the rectangular wave component, the correction voltage Vuvwc can be given by the following equation (6).

[Vuvwc]

＝α·Td·fc·Vdc·sgn([i])-C·Vdc²·fc/([i]+ix)

…(6)

Here, ix is a correction term for setting the correction voltage Vuvwc to 0 when the current i is 0, and is defined as follows.

ix＝C·Vdc/(α·Td)

Further, by using the following expression (7) for the correction voltage Vuvwc, the polarity can be changed by the same absolute value according to the sign of the current.

[Vuvwc]

(| i ≧ 0)

＝α·Td·fc·Vdc·sgn([i])-C·Vdc²·fc/([i]+ix)

(| [ i ] | <0)

＝α·Td·fc·Vdc·sgn([i])-C·Vdc²·fc/([i]-ix)

Wherein ix is C.vdc/(alpha.Td)

…(7)

In this embodiment, although the calculation load for calculating the correction voltage Vuvwc is larger than that in embodiment 1, the amplitude α is set as a parameter for adjusting only the rectangular wave component, and therefore, the correction voltage Vuvwc can be obtained with high accuracy, and an output voltage error can be suppressed with higher accuracy.

Embodiment 3

Next, a control device for an ac motor according to embodiment 3 will be described. Fig. 14 is a functional block diagram showing the configuration of a control device for an ac motor according to embodiment 3.

The control device 10A operates in 2 operation modes, i.e., a normal mode and a parameter adjustment mode, and includes a power converter 3, a phase current detector 4, a voltage error feature amount extraction unit 100, a correction unit 220 including a correction voltage calculation unit 200 and an adder 210, a correction voltage adjustment unit 300A, a parameter acquisition command generator 400, a command switcher 410, and a parameter storage unit 500. Further, the control device 10A has a sequence of shifting to the normal mode after performing the operation as the parameter adjustment mode.

The configuration and operation are the same as those of embodiment 1 except for the correction voltage adjustment unit 300A, the parameter acquisition command generator 400, the command switcher 410, and the parameter storage unit 500.

Note that the hardware configuration in embodiment 3 is also the same as the hardware configuration shown in fig. 2. In this case, the functions of the voltage error feature value extraction unit 100, the correction unit 220, the correction voltage adjustment unit 300A, the parameter acquisition instruction generator 400, the instruction switcher 410, and the parameter storage unit 500 are realized by executing a program read from the storage device 13 on the processor 12.

Fig. 15 is a block diagram illustrating an operation of the control device 10A in the parameter adjustment mode, and fig. 16 is a block diagram illustrating an operation of the control device 10A in the normal mode.

In the parameter adjustment mode, the command switch 410 selects the voltage command Vuvw, which is an output from the command generator 400 for parameter acquisition. The parameter acquisition command generator 400 stores the control mode of the ac motor 1 for determining the amplitude α and the parasitic capacitance C, which are parameters for determining the correction voltage Vuvwc, and generates and outputs a voltage command Vuvw that can realize the control mode.

Then, as shown in fig. 15, the voltage error feature value extraction unit 100, the correction unit 220, and the correction voltage adjustment unit 300A adjust the amplitude α and the parasitic capacitance C by the same operation as in embodiment 1 described above, and calculate the correction voltage Vuvwc and the correction voltage command Vuvw. At this time, the amplitude α and the parasitic capacitance C output from the correction voltage adjustment unit 300A are also input to the parameter storage unit 500 and stored.

Then, when the parameters, i.e., the amplitude α and the parasitic capacitance C converge, a transition is made from the parameter adjustment mode to the normal mode. In the normal mode, the command switch 410 selects the voltage command Vuvw supplied from the outside, and the correction voltage adjustment unit 300A and the parameter acquisition command generator 400 stop functioning.

Then, as shown in fig. 16, the parameter storage unit 500 outputs the amplitude α and the parasitic capacitance C converged by the adjustment in the parameter adjustment mode to the correction voltage calculation unit 200. As in embodiment 1, the correction voltage calculation unit 200 calculates the correction voltage Vuvwc for each phase from the reproduction phase current iuvwRP, the amplitude α, and the parasitic capacitance C, and adds the correction voltage Vuvwc to the voltage command Vuvw.

As described above, in embodiment 3, the controller 10A is configured to operate in 2 operation modes, that is, the normal mode and the parameter adjustment mode, and therefore, calculation for parameter adjustment is not necessary in the normal mode. Therefore, the same effects as those of embodiment 1 described above can be obtained, and the calculation load is reduced.

In this embodiment, the same effect can be obtained by calculating the correction voltage Vuvwc by applying embodiment 2 described above.

Embodiment 4

Next, a control device for an ac motor according to embodiment 4 will be described.

Fig. 17 is a functional block diagram showing the configuration of a control device for an ac motor according to embodiment 4, and fig. 18 is a control block diagram showing a correction voltage adjustment unit in the control device.

In the control device 10B of this embodiment, the correction voltage adjustment unit 300B adjusts only the parasitic capacitance C as a parameter of the correction voltage Vuvwc. The correction voltage calculation unit 200 obtains the parasitic capacitance C from the correction voltage adjustment unit 300B, and calculates the correction voltage Vuvwc for each phase from the reproduction phase current iuvwRP, the amplitude α, and the parasitic capacitance C using an amplitude set value that is a preset value for the amplitude α. The other structure is the same as embodiment 1.

The hardware configuration in embodiment 4 is also the same as that shown in fig. 2.

As shown in fig. 18, the correction voltage adjustment unit 300B receives the current vector phase θ i and the voltage error feature Vqi as input from the voltage error feature extraction unit 100, and receives the correction voltage Vuvwc as input from the correction voltage calculation unit 200. The correction voltage Vuvwc is converted into a dqi-axis voltage Vdqic by a coordinate converter (three-phase-dqi converter) 301, and a voltage component Vqic in the orthogonal direction of the current vector is obtained. The qi-axis voltage Vqic is multiplied by the characteristic amount Vqi of the voltage error, which is a voltage component in the orthogonal direction of the same current vector, by the multiplier 302, to obtain a multiplication result 302 a.

The multiplication result 302a is input to the parasitic capacitance adjuster 303, and the parasitic capacitance adjuster 303 adjusts the parasitic capacitance C corresponding to the slope of the correction voltage Vuvwc. The parasitic capacitance adjuster 303 integrates the multiplication result 302a only in a predetermined phase section Ti sandwiching the current zero-crossing phase, multiplies the integrated value by a predetermined gain K1, and adjusts the parasitic capacitance C.

The method of adjusting the parasitic capacitance C is the same as that of embodiment 1.

In this way, by adjusting the parasitic capacitance C, the slope adjustment of the correction voltage Vuvwc is performed to cancel the residual voltage error. Thus, the slope of the correction voltage Vuvwc is adjusted to match the slope of the Td disturbance voltage in the minute phase zone sandwiching the zero-crossing phase of the current. Therefore, the spike-like output voltage error can be prevented from occurring in the vicinity of the current zero-crossing phase, and the output voltage error can be suppressed with high accuracy. Further, since the amplitude set value is used without performing the adjustment calculation of the amplitude α, the calculation load can be reduced.

In this embodiment, the above-described embodiment 3 can be applied, and the operation can be performed in 2 operation modes, that is, the normal mode and the parameter adjustment mode, thereby further reducing the calculation load. In this case, the parasitic capacitance C is adjusted in the parameter adjustment mode, and the adjusted parasitic capacitance C is used in the normal mode. The amplitude a uses the same amplitude setting in both modes of operation.

Although various exemplary embodiments and examples have been described in the present application, the various features, forms, and functions described in 1 or more embodiments are not limited to the application to a specific embodiment, and can be applied to the embodiments alone or in various combinations.

Therefore, numerous modifications not illustrated are assumed within the technical scope disclosed in the present application. For example, the case where at least one component is modified, the case where at least one component is added, the case where at least one component is omitted, or the case where at least one component is extracted and combined with the components of other embodiments is included.

Description of the reference symbols

1: an AC motor; 3: a power converter; 4: a phase current detector; 10. 10A, 10B: a control device; 100: a voltage error characteristic amount extraction unit; 101: a coordinate converter; 102: a low-pass filter; 105: a phase current arithmetic unit; 200: a correction voltage calculation unit; 220: a correction unit; 300. 300A, 300B: a correction voltage adjustment unit; 303: a parasitic capacitance adjuster; 304: an amplitude adjuster; 100: a parameter acquisition instruction generator; 410: an instruction switcher; 500: a parameter storage unit.

Claims

1. A control device for an AC motor, which generates a voltage command for a power converter that drives the AC motor and controls the AC motor, the control device comprising:

a current detection unit that detects phase currents of respective phases of the ac motor;

a correction unit that calculates a correction voltage for compensating for an output voltage error of the power converter and corrects the voltage command;

a voltage error feature value extraction unit that extracts a feature value of the output voltage error based on the detected phase current; and

a correction voltage adjustment unit that adjusts a parameter of the correction voltage based on the extracted characteristic amount of the output voltage error,

the correction voltage adjustment section has a 1 st adjustment section for adjusting a 1 st parameter corresponding to a slope of the correction voltage, that is, a parasitic capacitance in the power converter as the parameter,

the correction unit calculates the correction voltage using the parameter adjusted by the correction voltage adjustment unit.

2. The control device of the alternating-current motor according to claim 1,

the 1 st adjusting unit calculates and adjusts the 1 st parameter in a phase section that sandwiches a zero-cross phase of the detected phase current.

3. The control device of an alternating-current motor according to claim 2,

the phase interval is a phase interval in which the time change rate in the peak-to-peak interval of the feature quantity is steeper.

4. The control device of the AC motor according to any one of claims 1 to 3, wherein,

the correction unit calculates the correction voltage to compensate for the output voltage error, using the disturbance voltage due to the dead time of the switching of the power converter as the output voltage error.

5. The control device of the AC motor according to any one of claims 1 to 4, wherein,

the voltage error feature value extraction unit converts the detected phase current into a dq-axis current in a rotating magnetic field of the ac motor,

filtering the dq-axis current to obtain a phase of a current vector,

and detecting a current component in the orthogonal direction of the current vector from the detection phase current according to the phase of the current vector, and calculating a voltage component in the orthogonal direction of the current vector as the characteristic quantity according to the current component in the orthogonal direction.

6. The control device of the alternating-current motor according to claim 5,

the voltage error feature value extracting unit further reproduces a phase current based on the dq-axis current from a phase of the current vector, and the correcting unit calculates the correction voltage from the reproduced phase current.

7. The control device of the AC motor according to any one of claims 1 to 6, wherein,

the correction voltage adjustment section further includes a 2 nd adjustment section for adjusting, as the parameter, a 2 nd parameter corresponding to the amplitude of the correction voltage,

the correction unit calculates the correction voltage using the 1 st parameter and the 2 nd parameter adjusted by the correction voltage adjustment unit.

8. The control device of the AC motor according to any one of claims 1 to 6, wherein,

the correction unit calculates the correction voltage using the 1 st parameter adjusted by the correction voltage adjustment unit and the amplitude setting value of the correction voltage.

9. The control device of the AC motor according to any one of claims 1 to 8, wherein,

the control device for the AC motor has a storage unit for storing the parameters and 2 operation modes including a normal mode and a parameter adjustment mode,

in the parameter adjustment mode, the correction voltage adjustment section adjusts the parameter and causes the storage section to hold the adjusted parameter,

when the adjustment of the parameter is finished, switching from the parameter adjustment mode to the normal mode,

in the normal mode, the operation of the correction voltage adjustment unit is stopped, and the correction unit obtains the parameter from the storage unit and calculates the correction voltage.

10. The control device of the AC motor according to any one of claims 1 to 9, wherein,

the control device for the ac motor includes the power converter, and the power converter outputs a voltage corresponding to the voltage command to the ac motor to drive the ac motor.