JP2002261414A - Wiring board and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wiring board and a method of manufacturing the same capable of utilizing and arranging in required density a plurality of solder bumps for power terminals of IC chip and/or grounding terminals. SOLUTION: A wiring board comprises linear shape pads 24 expressing linear shape in planar vision in the vicinity of a surface (a first main surface) 30 and linear shape solder bumps 28 formed on the surface of the linear shape pads 24. The wiring board 1 having a linear shape solder bump 28 with 400 μm or more length and the solder bumps 28 and 28 with 200 μm or less distance can be included.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a wiring board having elongated solder bumps on a first main surface on which a semiconductor element such as an IC chip is mounted, and a method of manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, a first principal surface of a wiring board for mounting an IC chip or the like includes:
A large number of solder bumps, each having a substantially circular or rectangular shape in plan view, are arranged in a grid or scattered shape, corresponding to a large number of external connection terminals individually formed on the bottom surface of the IC chip.
However, the above-mentioned solder bumps should be used as power supply terminals for supplying a relatively large current to an IC chip or the like to be mounted, or as ground terminals for grounding a large number of external connection terminals of the IC chip. Was difficult.

In order to use as a power supply terminal and a ground terminal for supplying a relatively large current to an IC chip to be mounted, the area of each solder bump must be increased in the vertical and horizontal directions on the first main surface of the wiring board. When it is spread, there is a problem that a required number of solder bumps cannot be secured. The present invention solves the problems in the conventional technology described above, and proposes a wiring board that can utilize a plurality of solder bumps as power supply terminals and ground terminals of an IC chip and can be arranged at a required density. Make it an issue.

When solder bumps of the same shape are printed on the surface of a linear pad and reflowed, one or more spherical solders are formed due to the surface tension of the solder.
There is a problem that a linear solder bump cannot be formed. Furthermore, when reflow is performed after solder printing when forming a linear solder bump, there is another problem that if the solder bumps are arranged at a high density, adjacent solder bumps come into contact with each other and cause a short circuit. The present invention solves the above problems, and provides a method of manufacturing a wiring board that can form a linear solder bump on the surface of a linear pad and that can be formed without contact between adjacent solder bumps during reflow. Make it an issue.

[0005]

SUMMARY OF THE INVENTION In order to solve the above problems, the present invention has been made with an idea that a solder bump has an elongated shape and a plurality of solder bumps can be arranged in parallel with each other. That is, the wiring board of the present invention (Claim 1)
Is a linear pad having a linear shape in plan view,
And a linear solder bump formed on the surface of the linear pad. Note that such a wiring board may include a plurality of linear pads arranged in parallel with each other in a plan view, and linear solder bumps individually formed on the surfaces of the linear pads. .

According to these, a required number of elongated solder bumps can be used as power supply terminals and ground terminals for supplying a relatively large current on the surface (first main surface) of the wiring board. In addition, elongated solder bumps can be arranged at high density without short-circuiting each other. Therefore, since it can be sufficiently used as a power supply terminal and a ground terminal of a semiconductor element such as an IC chip mounted on the surface, it is easy to increase the performance of the mounted semiconductor element and to increase the density of internal wiring. . It should be noted that the solder in this specification is not limited to a typical Sn-Pb-based alloy (so-called solder), but may be a Sn-Ag-based, Sn-Ag-Cu
Low melting point alloys such as Sn-based, Sn-Sb-based and Sn-Zn-based alloys are also included. Further, the wiring board of the present invention includes a resin-based multilayer board in which a resin insulating layer and a wiring layer are stacked, a ceramic-based multilayer board in which a ceramic insulating layer and a wiring layer are stacked, and 1000 ° C. or lower. A so-called low-temperature fired substrate fired at a temperature is also included.

[0007] In addition, the linear pad may be a wiring board located at the bottom of an opening formed in a solder resist layer forming the surface (first main surface) of the wiring board. It is. As such a linear pad, for example, the upper surface of an elongated wiring in a wiring layer formed immediately below a solder resist layer is used. That is, the solder resist layer is formed in one of a form covering a part of the surface of the linear pad and a form not covering the surface of the linear pad. Further, it is also possible to provide a wiring board in which the top of the linear solder bump protrudes higher than the surface of the solder resist layer. Conventionally, if a solder bump is to be formed linearly on a linear pad formed inside the opening of the solder resist layer, the solder becomes a spherical solder due to the surface tension of the solder during reflow of the solder, and the linear solder bump is formed. Could not be formed. However, such a wiring board is realized by the present invention.

[0008] It is also possible to provide a wiring board in which the tops of the linear solder bumps are flat tops.
Still further, the flatness of the top surface of the linear solder bumps
It is also possible to use a wiring board having a (coplanarity) of 1 μm or less per 1 mm. In these cases, the contact area of the mounted IC chip with the external terminal can be easily secured, and the IC chip can be reliably used as a power terminal or a ground terminal.

The length of the linear pad is 400 μm.
The present invention also includes a wiring board having a diameter of at least m. The length of the linear pad is 400 μm or more, and the interval between the pads when a plurality of the linear pads are formed is 50 μm or more and 200 μm or less. . Further, the present invention also includes a wiring board in which the length of the linear pad is at least five times the width thereof. According to these, even if a plurality of linear solder bumps are printed and formed at predetermined intervals on the surface (first main surface) of the wiring board, adjacent solder bumps are less likely to come into contact with each other during reflow. It becomes a wiring board in which the high density solder bumps are securely arranged without short-circuiting each other.

Conventionally, a linear pad has a length of 400 μm.
With the above, a spherical solder is formed due to the surface tension of the solder at the time of reflow of the solder bump,
The shape as a straight solder bump could not be maintained. The same applies to the case where the length of the linear pad is at least five times its width. According to the present invention, a wiring board having the above-mentioned linear solder bumps can be implemented. The interval between the plurality of linear solder bumps is 50 μm.
When the distance is less than m, it is difficult to form at such an interval because of contact and short-circuiting. Therefore, such a range is excluded.

On the other hand, according to a method of manufacturing a wiring board of the present invention (claim 4), solder bumps are individually formed by printing on a plurality of linear pads arranged parallel to each other in plan view near the surface of the wiring board. And inserting a wiring board having a spacer disposed on the surface excluding the portion where the solder bumps are formed, between the pair of plate-like bodies, and between the pair of plate-like bodies, the total thickness of the spacer and the wiring board Reflowing the solder bumps with a large-sized heat-deformed body interposed and sandwiched therebetween. According to this, since the heat deformable body such as the solder ball is softened by the heating at the time of the reflow, the plate-like body on the solder bump side shifts toward the other plate-like body. Therefore, the top of the linear solder bump is pressed by the shifted plate-like body to become a flat top surface, so that it is possible to provide a wiring board that can be sufficiently used as a connection terminal.

For the plate-like member, for example, a glass plate which does not react with the solder bumps and is not easily deformed by heat is used.
When a solder ball is used as the heat-deformable body, the diameter thereof is larger than the total thickness of the spacer and the wiring board. However, the heat deformable body may be a cylindrical body or a polygonal cylindrical body made of a low melting point alloy such as solder, and the length in the axial direction may be longer than the total thickness of the spacer and the wiring board. Such a solder ball or the like is formed of an alloy having a melting point equal to or lower than the melting point of the solder bump. In addition, it is also possible to adopt a method for manufacturing a wiring board, wherein the melting point of the heat deformable body (solder ball) is lower than the melting point of the solder bump. According to this, solder balls etc. soften before solder bumps
Since the solder bumps are melted, careless deformation of the solder bumps can be prevented, and a linear solder bump having a flat top surface can be reliably formed.

However, as a material of the heat deformable body, a shape memory alloy or a superelastic alloy having a transformation point between normal temperature and reflow temperature, or a bimetal deformable between normal temperature and reflow temperature may be applied. It is possible. In addition, in order to sandwich the wiring board between a pair of plate-like bodies, for example, a plurality of clips or clamps,
Alternatively, a plurality of weights can be arranged. The present invention also includes the wiring board (described in any one of claims 1 to 3) manufactured by the manufacturing method (claim 4).

[0014]

Preferred embodiments of the present invention will be described below with reference to the drawings. FIG. 1A is a plan view of a wiring board 1 according to one embodiment of the present invention, and each side has a length of about 20 m.
The first main surface (surface of the wiring substrate 1) 3 having a substantially square shape of m
0 shows a state where a plurality of linear solder bumps 28 are formed in parallel with each other. The first main surface 30 is
Solder resist layer 26 forming the uppermost layer of wiring board 1
Surface. The individual linear solder bumps 28 are made of Sn
-It is made of Ag-based solder, has a linear shape in plan view, has a length of about 10 mm and a width of about 70 µm, and has a gap of about 80 µm between adjacent solder bumps 28. . Incidentally, the length of the linear solder bump 28 is about 140 times its width.

As shown in FIG. 1B and FIG. 1C, the individual linear solder bumps 28 are formed on the solder resist layer 2.
6 is formed to project higher than the first main surface 30 from directly above the linear pad 24 of substantially the same shape exposed from the opening 26a formed in the hole 6. In addition, each linear solder bump 28
Is made of, for example, a Sn-Ag alloy, and its top surface 28a
Project about 20 μm higher than the first main surface 30. The top surface 28a of the linear solder bump 28 is formed in advance so as to be a flat horizontal surface and its flatness (coplanarity) is 1 μm or less per 1 mm.

FIG. 2A shows a vertical cross section of the wiring board 1 along the line XX in FIG. 1B. The wiring board 1 is shown in FIG.
As shown in FIG. 1A, a plurality of resin insulating layers 12, 18, 26, 13, 1 are formed on a core substrate 3 and on a front surface 4 and a back surface 5 thereof.
9, 25 and wiring layers 10, 16, 22, 11, 17,
23 are alternately stacked. The core substrate 3 is made of, for example, a composite material of glass-epoxy resin, has a thickness of about 0.8 mm having front and rear surfaces 4 and 5, is an approximately square in plan view, and is an insulating plate. A plurality of through-holes 6 having a diameter of about 100 μm penetrate between the front and back surfaces 4 and 5 of the core substrate 3, and a copper through-hole conductor 8 and a filling resin 9 are formed therein. Filling resin 9
It is made of an epoxy resin containing silica filler.

As shown in FIG. 2A, resin insulating layers 12, 18, and 26 made of an epoxy resin containing an inorganic filler such as a silica filler and a predetermined pattern are provided above the surface 4 of the core substrate 3. Cu wiring layers 10, 16, 22 having
Are alternately stacked to form a build-up layer. In the insulating layers 12 and 18, the filled via conductor 1 connecting between the wiring layers 10 and 16 or between the wiring layers 16 and 22 is provided.
4, 20 are formed. The above insulating layers 12, 1
8 is about 30 μm thick, and the insulating layer located on the uppermost layer
(Solder resist layer) 26 has a thickness of about 20 μm.

The uppermost wiring layer 22 is elongated in the front-rear direction in FIG. 2A and formed over a plurality of via conductors 20. On the surface thereof, elongated linear pads 24 are formed. positioned. As shown in FIG.
The linear pad 24 is coated on its surface with a plating film 24a in which Ni and Au plating are laminated, the Ni plating film is about 5 μm, and the Au plating film is 0.02 to 0.15.
It has a thickness of μm. Such a linear pad 24 is formed in an elongated opening 2 formed in an insulating layer (solder resist layer) 26.
It is exposed to the first main surface 30 side via 6a.

On the linear pad 24, a linear solder bump 28 having a substantially semi-cylindrical cross section is formed by printing or the like, which penetrates through the insulating layer 26 and protrudes higher than the first main surface 30. First main surface 3 at top surface 28a
The IC chip is individually connected to a plurality of external terminals protruding from the bottom surface of an IC chip (not shown) mounted on the IC chip. FIG. 2 (C)
As shown in FIG. 3, the opening 26 having a width larger than the width of the wiring layer 22 is formed.
b may be formed in the insulating layer 26, and the surface and both side surfaces of the linear pad 24 exposed at the bottom thereof may be covered with a plating film 24b in which Ni and Au plating are laminated. In this embodiment, as shown, the wiring layer 22, the linear pad 2
4, and both sides of the linear solder bump 28 and the opening 2
A gap may be formed between the side walls 6b.

Further, as shown in FIG.
Below the back surface 5 of the semiconductor device, resin insulating layers 13, 19, 25 and wiring layers 11, 17, 2 made of the same material and having the same thickness as described above.
3 are alternately stacked to form a build-up layer. Filled via conductor 1 connecting between wiring layers 11 and 17 or between wiring layers 17 and 23 is provided in resin insulating layers 13 and 19.
5, 21 are formed. Further, a part of the wiring layer 23 is exposed in an opening hole 25a provided toward the second main surface 27 of the lowermost resin insulating layer (solder resist layer) 25,
A connection terminal 29 having a surface coated with a Ni and Au plating film (not shown) is formed. The connection terminals 29 are used for connection to a printed board such as a motherboard (not shown) on which the wiring board 1 itself is mounted. In addition, connection terminal 2
No. 9 is a pin made of Kovar, Fe-42 wt% Ni alloy, or copper via a Sn-Sb low melting point solder.
(Not shown) may be connected.

According to the wiring board 1 as described above, the linear solder bumps 28 projecting higher than the first main surface 30 individually on the plurality of elongated linear pads 24 are formed on the first main surface 3.
At 0, they are formed parallel to each other and at a predetermined interval. Therefore, the required number of linear solder bumps 28
Can be arranged at high density on the surface (first main surface) 30 of the wiring substrate 1 without short-circuiting each other. Accordingly, the semiconductor element such as an IC chip mounted on the first main surface 30 can be sufficiently used as a power supply terminal and a ground terminal, and thus the mounted semiconductor element has higher performance and the internal wiring has a higher density. Becomes easier. Note that the linear pad 24 is formed by widening the wiring layer 22 in a solid shape,
A plurality of openings 26a may be formed in the solder resist layer 26 so that the surface of the solid wiring layer 22 is exposed.

A method of manufacturing the wiring board 1 will be described with reference to FIG. FIG. 3A shows the front and back surfaces 4 of the core substrate 3.
5, insulating layers 12, 13, 19, 25 and wiring layer 1
0, 11, 17, and 23 are formed in advance by a known build-up process, and the through-hole conductor 8 and the via conductor 1 are formed.
A state is shown in which wiring layers 16, 22 and insulating layers 18, 26 are formed on a base portion 1z indicated by a broken line on which 4, 15, 21 are formed. The known build-up process described above includes a semi-additive method, a full-additive method, a subtractive method, formation of an insulating layer by laminating a film-like resin material, photolithography technology, drilling of through holes by a drill or a laser, and the like. Including.

As shown in FIG. 3A, the insulating layer just above the linear pads 24 located on the surface of each wiring layer 22 is formed.
(Solder resist layer) 26 has a plurality of elongated openings 26a of about 80 μm
The holes are individually drilled at intervals. Surface of insulating layer 26
(First main surface) A metal mask (not shown, for example, made of a stainless steel plate) is disposed on the 30 and an Sn-Ag alloy is formed from an opening having substantially the same shape as the opening 26a previously opened on the mask. A solder paste containing a suitable flux and flux is printed and filled on each linear pad 24 individually. As a result, as shown in FIG. 3A, the elongated solder bump 2 having a length of about 10 mm, a width of about 70 μm, a semi-elliptical cross section, and protruding higher than the surface 30.
8b are formed individually. In addition, as the above-mentioned flux, a flux having a small reducing property, an R type, an RMA type, an RA type, or the like is used.

Next, as shown in FIG. 3A, heat-resistant spacers 36, 36 are placed on the surface 30 around each solder bump 28b. The upper surface of each spacer 36 is preset so as to be slightly lower than the top of each solder bump 28b. Next, as shown in FIG. 3B, the lower side of the bottom surface (second main surface 27) of the base portion 1z and the spacer 3
A pair of glass plates (plate-like bodies) 37 are disposed above the upper and lower glass plates 36, 36, and a solder ball (thermally deformable body) 38 is sandwiched around the glass plates 37, 37.

The solder ball 38 is formed by solder bump 2
8b of the Sn-Ag solder alloy (about 220
C.), for example, a Sn—Pb-based solder alloy having a lower melting point (about 183 ° C.), and its diameter is set slightly larger than the total value of the thickness of the entire wiring board 1 and the spacer 36. Therefore, as shown in FIG. 3B, a gap of about 20 μm is formed between the apex of each solder bump 28 b and the upper surface of the spacer 36 and the upper glass plate 37. In order to facilitate the positioning of each solder ball 38, a not-shown concave groove or flux is arranged at a predetermined position on the upper surface of the lower glass plate 37.

In this state, as shown by a vertical arrow in FIG. 3B, a clip or clamp (not shown) is arranged around the pair of upper and lower glass plates 37, 37, and is sandwiched between the glass plates. , 37 are pressed together. In this state, the solder bump 28b is charged into a heating furnace (not shown) or the like, and is heated to, for example, 250 ° C. and held for 30 seconds to perform a reflow process. Thereby, as shown in FIG. 3C, the solder balls 38, 3
8 is first softened and reduced in diameter in the vertical direction, so that the upper glass plate 37 descends to a position where it contacts the upper surface of each spacer 36.

As a result, as shown in FIG. 3C, the solder bumps 28b softened by the reflow are pressed downward by the bottom surface of the glass plate 37 having fallen. In order to prevent a situation in which the adjacent solder bumps 28b, 28b expand in the width direction and approach or come into contact with each other at the time of the reflow, the heating temperature at the time of the reflow process and the interval between the solder bumps 28b, 28b are set in advance. .

As a result of the above reflow process, FIG.
As shown in (D), the wiring board 1 can be obtained in which a required number of linear solder bumps 28 having a substantially semi-cylindrical cross section and a flat top surface 28a are formed on the surface 30 in parallel with each other. Also, the top surface 28a of each solder bump 28 is flattened to 1 μm or less per 1 mm of its length (coplanarity) by being pressed by the glass plate 37.
Has been granted.

The steps of printing and forming the solder bumps 28b and the step of reflowing are performed in the state of a multi-cavity panel in which a large number of individual wiring boards 1 as product units are continuously arranged in a plane direction. Can also. Thereby, manufacturing efficiency can be increased. The solder ball 3
8 may be a hollow sphere having a hollow inside, or a cylindrical body, a cylindrical body, or a polygonal body having a longer axial length set in advance may be used instead. Also, instead of the solder ball 38, a heat deformable body made of a shape memory alloy or a superelastic alloy having a martensite transformation point between room temperature and the reflow temperature, or a bimetal deformable between room temperature and the reflow temperature is applied. It is also possible.

FIGS. 4A and 4B show a partial plane and a vertical cross section of a wiring board 1a of a different form. In FIG. 4, the same reference numerals are used for the same parts and elements as those in the above embodiment. As shown in FIG. 4A, the wiring board 1a also has
(First principal surface) 30, a plurality of linear solder bumps 2
8 are formed at a predetermined interval in parallel with each other. As shown in FIG. 4B, the wiring board 1a is composed of a wiring board main body 2 of a multilayer board, resin insulating layers 18, 26, 19, 25 formed on the front and back surfaces 12a, 13a and the wiring layer 1a.
And a build-up layer in which 6, 22, 17, and 23 are alternately stacked.

The wiring board main body 2 is composed of the same core substrate 3 as described above, and the insulating layers 12 and 1 laminated on the front and back surfaces 4 and 5 thereof.
3 and a multi-layer substrate including wiring layers 10 and 11 disposed therebetween. Front / back surface 12 of wiring board body 2
A long through-hole 32 and a through-hole conductor 34 are formed to penetrate between a and 13a, and a filling resin 9 is formed inside the latter. The through-hole conductor 34
It is connected to the wiring layers 10 and 11 at an intermediate position, and connected to the wiring layers 16 and 17 at the upper and lower ends. However, the conductor 34 has the wiring layer 1 at the positions of the round holes 10a and 11a.
It is far from 0,11.

As shown in FIG. 4B, resin insulating layers 18 and 26 and Cu wiring layers 16 and 22 having a predetermined pattern are alternately laminated on the surface 12a of the wiring board body 2. The formed build-up layer is formed. Insulating layer 18
Inside, a filled via conductor 20 connecting between the wiring layers 16 and 22 is formed. The uppermost wiring layer 22 is shown in FIG.
(B), a plurality of via conductors 20 elongated in the front-rear direction.
And a linear pad 2 on its surface.
4 are located. As before, the linear pad 24
Is coated with a plating film 24a on which Ni and Au plating are laminated. Such a linear pad 24
The insulating layer (solder resist layer) 26 is exposed to the first main surface 30 via an elongated opening 26 a formed in the insulating layer (solder resist layer) 26.

On the linear pad 24, a linear solder bump 28 having a substantially semi-cylindrical section is formed by printing or the like, which penetrates through the insulating layer 26 and protrudes higher than its surface (first main surface) 30. The flat top surface 28a is individually connected to a plurality of external terminals protruding from the bottom surface of an IC chip (not shown) mounted on the first main surface 30. Further, as shown in FIG.
Below a, a build-up layer is formed in which resin insulating layers 19 and 25 and wiring layers 17 and 23 similar to the above are alternately stacked. In the insulating layer 19, a filled via conductor 21 connecting between the wiring layers 17 and 23 is formed.

In the wiring board 1a, by using the wiring board main body 2 of a multilayer board and penetrating the long through-hole conductor 34, the via conductors 14 and 14 are formed in the insulating layers 12 and 13.
The manufacturing process of the via hole and the via conductor for forming the via hole 15 can be omitted. A part of the wiring layer 23 is exposed in an opening 25a opening on the second main surface 27 side of the lowermost resin insulating layer (solder resist layer) 25, and a Ni and Au plating film (not shown) is formed on the surface. ) Is formed. The connection terminals 29 are used to connect a motherboard (not shown) on which the wiring board 1 is mounted.

With the wiring board 1a as described above, the surface (first main surface) 30 is also provided on the plurality of elongated linear pads 24.
The linear solder bumps 28 projecting higher than the surface 3
At 0, they are formed parallel to each other and at a predetermined interval. Therefore, a predetermined number of linear solder bumps 28
Can be arranged at high density on the surface 30 of the wiring board 1a without short-circuiting each other. Therefore,
Since it can be sufficiently used as a power supply terminal and a ground terminal of an IC chip mounted on the front surface (first main surface) 30,
It is possible to increase the performance of the semiconductor element to be mounted and to increase the density of the internal wiring. Moreover, there is an advantage that the IC chip and the like can conduct with the wiring layers 11, 17, and 23 near the second main surface 27 via the long through-hole conductors 34 in a relatively short path.

The present invention is not limited to the embodiments described above. For example, the material of the core substrate 3 is the same as the above-described glass-epoxy resin-based composite material including glass cloth and the like, as well as similar heat resistance, mechanical strength, flexibility, and the like.
Glass fabric such as glass woven fabric or glass woven fabric having ease of processing and epoxy resin, polyimide resin, or B
A glass fiber-resin material which is a composite material with a resin such as a T resin may be used. Alternatively, a composite material of an organic fiber such as a polyimide fiber and a resin, or a PT having continuous pores
It is also possible to use a resin-resin composite material in which a resin such as an epoxy resin is impregnated into a fluorine-based resin having a three-dimensional network structure such as FE.

The material of the wiring layers 16 and 17 may be Ni, Ni-Au, or the like, in addition to the copper plating layer, or a conductive resin may be applied without using metal plating. It is also possible to form by the method of. Further, the via conductor 20 and the like are not limited to the filled via via form in which the inside of the via hole is filled with the conductor, and may be a conical form following the hole. The material of the insulating layers 18 and 19 is not only a material mainly composed of the epoxy resin, but also a polyimide resin, a BT resin, a PPE resin having the same heat resistance and pattern moldability, or a PTFE having continuous pores. A resin-resin composite material in which a resin such as an epoxy resin is impregnated into a fluorine-based resin having a three-dimensional network structure, or the like can also be used. For the formation of the insulating layer, a method of thermocompression bonding of an insulating film can be used in addition to a method of applying a liquid resin by a roll coater.

Further, the wiring substrate of the present invention includes a ceramic multilayer substrate in which a ceramic insulating layer and a wiring layer are laminated, and a so-called low-temperature firing substrate fired at 1000 ° C. or lower. Among them, in the ceramic type, a metal paste of a high melting point metal such as tungsten (W) or molybdenum (Mo) is arranged between green sheets made of alumina, aluminum nitride, mullite, etc., and baked to form an insulating layer ( A ceramic layer) and a wiring layer are alternately stacked. In addition, an elongated opening is formed in the uppermost green sheet in advance, and a solder paste is printed and filled just above the linear pad on the surface of the uppermost wiring layer exposed at the bottom of the opening. After that, reflow processing is performed by the above method. Thereby, the surface of the ceramic wiring board (first
On the main surface, a plurality of elongated linear solder bumps can be formed parallel to each other. The low-temperature fired substrate can also be formed by a manufacturing method according to the method described above. Note that the wiring board of the present invention includes a configuration in which a wiring layer whose surface is a linear pad is disposed between two insulating layers.

[0039]

The wiring board of the present invention described above.
According to the first aspect, the required number of linear solder bumps can be used as power supply terminals and ground terminals capable of supplying a relatively large current on the first main surface of the wiring board. In addition, elongated solder bumps can be arranged at high density without short-circuiting each other. Therefore, it can be sufficiently used as a power supply terminal and a ground terminal of a semiconductor element such as an IC chip mounted on the first main surface. Therefore, the performance of the mounted semiconductor element and the density of the internal wiring can be increased. It will be easier. According to the wiring board of the second and third aspects, even if a plurality of linear solder bumps are printed at predetermined intervals on the surface (first main surface) of the wiring board, the adjacent solder bumps contact each other during reflow. Therefore, the required number of linear solder bumps are reliably arranged at high density without short-circuiting.

On the other hand, according to the method for manufacturing a wiring board of the present invention (claim 4), the heat deformable body such as a solder ball is softened by the heating at the time of reflow, so that the plate-shaped body on the side of the linear solder bump is the other. It shifts closer to the plate. Therefore,
Since the top of each solder bump is pressed against the shifted plate-like body to form a flat top surface, it is possible to provide a wiring board that can be sufficiently used as a connection terminal. Further, a wiring board according to claim 5 can be provided.

[Brief description of the drawings]

1A is a plan view of a wiring board according to an embodiment of the present invention, FIG. 1B is an enlarged view of a dashed-dotted line portion B in FIG. 1A, and FIG.
FIG. 3B is an exploded perspective view showing the vicinity of a corner in FIG.

FIG. 2A is a sectional view taken along line XX in FIG. 1B;
(B) is an enlarged view showing the vicinity of the linear pad in (A),
(C) is an enlarged view showing the vicinity of a linear pad of a different form.

FIGS. 3A to 3D are schematic views showing main steps in a method of manufacturing the wiring board shown in FIGS. 1 and 2A and 2B.

FIG. 4A is a plan view of a wiring board having a different configuration, and FIG.
Sectional drawing by the viewing angle along BB line in (A).

[Explanation of symbols]

 1, 1a Wiring board 24 Linear pad 28 Linear solder bump 30 First main surface (front surface) 36 Spacer 37 Glass plate (plate-like body) 38 … Solder ball (thermally deformed body)

Claims (5)

[Claims] 1. A wiring board comprising: a linear pad having a linear shape in plan view; and a linear solder bump formed on a surface of the linear pad. 2. The wiring board according to claim 1, wherein the length of the linear pad is 400 μm or more. 3. The wiring board according to claim 1, wherein the length of the linear pad is at least five times the width thereof. 4. A step of individually forming solder bumps by printing on a plurality of linear pads arranged in parallel with each other in plan view in the vicinity of the surface of the wiring board, and forming the solder bumps on the surface excluding the portions where the solder bumps are formed. In a state where the wiring board on which the spacer is arranged is inserted between the pair of plate-like bodies, and a heat-deformable body having a size larger than the total thickness of the spacer and the wiring board is interposed and sandwiched between the pair of plate-like bodies, And a step of reflowing the solder bumps. 5. The wiring board according to claim 1, which is manufactured by the manufacturing method according to claim 4.