JP2002261287A - Liquid crystal display and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve OFF characteristics in a thin-film transistor. SOLUTION: An n-type thin-film transistor is provided on a surface at a liquid-crystal side of at least one of substrates that are arranged oppositely via liquid crystal, and a layer that is subjected to hydrogen treatment or high- condensation doping is formed on the sidewall surface of a semiconductor layer in the thin-film transistor.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, for example, to an active matrix type liquid crystal display device.

[0002]

2. Description of the Related Art In an active matrix type liquid crystal display device, a gate signal extending in the x direction and juxtaposed in the y direction is formed on one liquid crystal side surface of each of substrates opposed to each other with a liquid crystal interposed therebetween. A line and a drain signal line extending in the y direction and juxtaposed in the x direction are formed, and a region surrounded by each of the signal lines is a pixel region.

In each pixel area, a thin film transistor which is activated by a scanning signal from one gate signal line and a pixel electrode to which a video signal from one drain signal line is supplied via the thin film transistor are formed. . The pixel electrode generates an electric field between the other substrate and a counter electrode formed on one substrate to control the light transmittance of the liquid crystal.

Here, a thin film transistor uses a part of a gate signal line as a gate electrode, and a gate insulating film,
It has a structure in which a semiconductor layer, a contact layer (a layer doped with a high concentration of n-type impurity), a drain electrode and a source electrode are sequentially stacked.

That is, after forming a laminate of a gate insulating film, a semiconductor layer, and a contact layer (a layer doped with a high concentration of n-type impurity) over the entire area of one substrate, the laminate is formed in a region where a thin film transistor is to be formed. Is selectively etched so as to remain, the drain electrode and the source electrode are formed in a predetermined pattern, and then the contact layer exposed from the mask is etched using these electrodes as a mask. Has become.

[0006]

However, in the thin film transistor thus formed, the semiconductor layer is formed in an island shape, the contact layer is not formed on the side wall surface, and the source electrode or the drain is formed in this portion. When the electrodes are formed in contact with each other, the following problems (1) and (2) occur. (1) A Schottky barrier is formed in this portion in the ON state of the thin film transistor (state in which a positive gate voltage is applied). (2) When the thin film transistor is in an OFF state (a state in which a negative gate voltage is applied), a source-drain current flows due to injection of holes.

In this case, in the case of (1), the writing of pixel information becomes defective, but it is not a major problem since most of the current from the electrode to the semiconductor layer flows through the contact layer. However, in the case of (2), the OFF current of the thin film transistor becomes defective, which is inconvenient as a defective holding of the liquid crystal display device and a defective image quality.

[0008] The present invention is based on such circumstances, and an object of the present invention is to provide a liquid crystal display device in which deterioration of the OFF characteristics of a thin film transistor is avoided.

[0009]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present invention, typical ones will be briefly described as follows.

That is, the liquid crystal display device according to the present invention comprises:
For example, it is assumed that a thin film transistor is provided on a liquid crystal side surface of at least one of substrates opposed to each other with a liquid crystal interposed therebetween, and a hydrogen-treated layer is formed on a side wall surface of a semiconductor layer of the thin film transistor. It is a feature.

[0011] In the liquid crystal display device thus configured, since the side wall surface of the semiconductor layer of the thin film transistor is subjected to hydrogen treatment, the drain electrode and the source electrode formed on the upper surface of the semiconductor layer are provided on the side wall, for example. Even if it is formed so as to extend to a point, direct contact with the semiconductor layer can be avoided. Therefore, the OFF characteristics of the thin film transistor can be improved.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the liquid crystal display device according to the present invention will be described below with reference to the drawings. Embodiment 1 FIG. << Configuration of Pixel >> FIG. 2 is a plan view showing an embodiment of the configuration of the pixel of the liquid crystal display device according to the present invention. In the figure, I
FIG. 1 shows a cross section taken along line -I.

This pixel indicates one of a large number of pixels arranged in a matrix on the liquid crystal display unit, and the pixels arranged on the left and right or up and down of the pixel have the same configuration.

In FIG. 1, a gate signal line GL extending in the x direction and juxtaposed in the y direction is formed on the surface of the transparent substrate SUB1 on the liquid crystal side. An insulating film GI (see FIG. 1) is formed on the upper surface of the transparent substrate SUB1 so as to cover the gate signal line GL.

The insulating film GI functions as an interlayer insulating film with the gate signal line GL for a drain signal line DL described later, and functions as a gate insulating film for a thin film transistor TFT described later. Capacitive element Cad described later
d has a function as a dielectric film.

A semiconductor layer AS made of intrinsic (i-type: amorphous) amorphous silicon (a-Si) is provided on the upper surface of the insulating film and a portion overlapping with the gate signal line GL.
Are formed.

This semiconductor layer AS is composed of a thin film transistor TF
A drain layer SD1 and a source electrode SD2 are formed on the upper surface of the semiconductor layer constituting the T, so that an MIS (Metal-Insulator-MIS) having an inverted staggered structure using a part of the gate signal line GL as a gate electrode Semiconducto
An r) type transistor is formed. Drain electrode SD1
The source electrode SD2 is formed simultaneously with the formation of the drain signal line DL.

That is, a drain signal line DL is formed extending in the y direction in FIG. 1 and juxtaposed in the x direction, and a part of the drain signal line DL is extended to the upper surface of the semiconductor layer AS to form a drain signal line. An electrode SD1 is formed, and a source electrode SD2 is formed apart from the drain electrode SD1 by a distance corresponding to the channel length of the thin film transistor TFT.

The surface of the semiconductor layer AS formed in an island shape is shown in FIG.
Surface (excluding the side wall surface) and the drain electrodes SD1 and
At the interface with each of the source electrodes SD2, for example,
N-type semiconductor doped with high concentration impurities such as
Contact layer d composed of body layer ₀Are formed.

Further, in this embodiment, a layer D ₀ doped with a larger amount of hydrogen (which may be referred to as an altered layer D _{0 in} this specification for convenience) is formed on the side wall surface of the semiconductor layer AS. Hydrogen contained in the altered layer D ₀ is about 10% to 50% as compared with that contained in the intrinsic a-Si.
It has increased.

[0021] As described above, the contact layer d ₀ formed on the semiconductor layer AS is made with the surface except for the side wall surface of the semiconductor layer AS, the drain electrodes SD1 and the source electrodes formed on the upper surface of the contact layer d ₀ extension of the SD2 has a structure be avoided by the altered layer D ₀ direct contact with the semiconductor layer aS made of intrinsic a-Si at the sidewall surface of the semiconductor layer aS.

The source electrode SD2 is connected to a pixel electrode PI described later.
X, and therefore has an extending portion slightly extending to the pixel region side.

The transparent substrate S covers the drain signal line DL, the drain electrode SD1, and the source electrode SD2.
On the upper surface of UB1, for example, a protective film PSV made of SiN
Are formed. The protective film PSV prevents direct contact of the liquid crystal with the thin film transistor TFT, thereby preventing deterioration of characteristics of the thin film transistor TFT.

Further, a contact hole CH is formed in the protective film PSV, so that a part of the extension of the source electrode SD2 of the thin film transistor TFT is exposed.

On the upper surface of the protective film PSV, a pixel electrode PIX made of, for example, an ITO film is formed. This pixel electrode PIX is connected to the gate signal line GL and the drain signal line DL.
, And occupy most of the pixel area, part of which overlaps with another gate signal line GL adjacent to the gate signal line GL for operating the thin film transistor TFT. It is formed.

In a region where the pixel electrode PIX and the gate signal line GL overlap each other, a capacitive element Cadd using the insulating film GI and the protective film PSV as a dielectric film is formed. The capacitive element Cadd is provided for storing pixel information in the pixel electrode PIX for a relatively long time.

Further, the transparent substrate SU thus configured
Another transparent substrate (not shown) is arranged on B1 via a liquid crystal. A black matrix B is formed on the liquid crystal side surface of the transparent substrate so as to define each pixel region.
M (see FIG. 2) is formed, and a color filter is formed in the opening.

The color filter is formed of, for example, a filter of the same color common to each pixel region arranged in the y direction, such that, for example, R (red), G (green), and B (blue) colors are repeated in the x direction. Has become.

A flattening film made of a resin film is formed on the surface on which the black matrix BM and the color filter are formed, and a counter electrode common to each pixel region is formed on the upper surface by, for example, an ITO film. .

The pixel electrode PIX in each pixel region generates an electric field between the pixel electrode PIX and the counter electrode, and controls the light transmittance of the liquid crystal between these electrodes. In the case of such a liquid crystal display device, since the direction of the electric field is perpendicular to the substrate, it is called a so-called vertical electric field method.

In the thin film transistor TFT of the liquid crystal display device thus configured, the contact layer d ₀ formed on the semiconductor layer AS is a surface excluding the side wall surface of the semiconductor layer AS, and the upper surface of the contact layer d ₀ extending portion of the formed drain electrode SD1 and the source electrode SD2 is configured to be avoided by the altered layer D ₀ of direct contact with the semiconductor layer made of intrinsic a-Si at the sidewall surface of the semiconductor layer aS in ing.

Therefore, the OF of the thin film transistor TFT is
In the F state (a state where a negative gate voltage is applied), the current between the source and the drain due to the injection of holes does not flow, and the OFF characteristics of the thin film transistor TFT can be improved.

FIG. 3 shows the drain current Id with respect to the gate voltage Vg of the thin film transistor TFT constructed in this embodiment.
For comparison, the characteristic diagram of FIG. 1 also shows that of the related art (where the side wall surface of the semiconductor layer AS is not subjected to hydrogen treatment). As is clear from this characteristic diagram, the OFF characteristic of the thin film transistor TFT can be greatly improved.

In order to achieve the same effect, an attempt was made to form an island-shaped semiconductor layer and then perform oxygen ashing to form a thin oxide film on the side wall surface of the semiconductor layer. It was confirmed that the photoresist formed on the surface was also ashed, and that an oxide film formed on the surface of the semiconductor layer easily caused contact failure.

In addition, an attempt was made to avoid contact with the drain electrode and the source electrode on the side wall surface of the semiconductor layer. However, for example, carriers generated by light irradiation move in the semiconductor layer and the thin film transistor TFT has a thin film transistor. OF
It has been confirmed that the structure is such that the F current is increased and the parasitic capacitance between the electrodes is increased, resulting in a decrease in operation speed.

<< Manufacturing Method >> An embodiment of the manufacturing method of the above-described liquid crystal display device will be described below with reference to FIG.

Step 1. (FIG. 4A) First, a transparent substrate SUB1 is prepared. This transparent substrate SU
B1 is a size that can take a plurality of final liquid crystal display devices, for example, 370 mm × 470 mm × 1.1 mm
Of the size. Then, the transparent substrate SUB1
Wash.

Step 2. (FIG. 4B) A metal film is formed on the entire main surface (the liquid crystal side surface) of the transparent substrate SUB1 by, for example, a sputtering method. This metal film is made of, for example, Cr and has a thickness of about 200
nm.

Then, this metal film is formed into a predetermined pattern by selective etching using a photolithography technique. Thus, a gate signal line GL, its terminals, a peripheral protection circuit (not shown), and the like are formed.

Step 3. (FIG. 4 (c)) Silicon nitride (SiN), amorphous silicon (a-S) is formed over the entire surface of the transparent substrate SUB1 by, for example, a plasma CVD method while also covering the patterned metal film.
i), a stacked body of high-concentration n-type amorphous silicon doped with n-type impurities (for example, phosphorus) is formed.

The thickness of silicon nitride (SiN) is, for example, 400 nm, the thickness of amorphous silicon (a-Si) is, for example, 250 nm, and the thickness of high-concentration n-type amorphous silicon doped with n-type impurities is, for example, 50 nm.
nm.

Silicon nitride (SiN) is used for the gate insulating film G
As I, amorphous silicon (a-Si) is used as the semiconductor layer AS as a high-concentration n-type impurity doped with n-type impurities.
Type amorphous silicon serves as a contact layer d _0.

Step 4. (FIG. 4D) High-concentration n-type amorphous silicon doped with n-type impurities and amorphous silicon (a-Si) by a selective etching method using a photolithography technique.
Are sequentially etched. As the etching at this time, for example, a dry etching method using sulfur hexafluoride and hydrogen chloride is performed.

Then, a process using hydrogen in this state is performed.
Perform a plasma treatment. At this time, the flow rate of hydrogen is 0.5 l
/ Min, processing pressure is 66.7 Pa, input power is 2000
W was performed for 60 seconds. Thereby, the remaining semiconductor layer A
The altered layer D having different hydrogen concentration is formed on the side wall surface of S. ₀Formed
It is.

[0045] The altered layer D _0, in the same processing conditions a-
As a result of analyzing the sample treated with Si, about 10% to 5%
It can be seen that the 0% hydrogen concentration has increased. After that, the photoresist used in the photolithography technique is removed.

Step 5. (FIG. 4E) A metal film is formed on the entire surface of the transparent substrate SUB1 thus treated, for example, by a sputtering method. This metal film is made of, for example, Cr and has a thickness of about 20 mm.
It is set to 0 nm.

Then, this metal film is formed into a predetermined pattern by selective etching using a photolithography technique. Thus, the drain signal line DL, its terminal, the drain electrode SD1 and the source electrode SD2 of the thin-film transistor TFT, a peripheral protection circuit (not shown), and the like are formed.

Step 6. (FIG. 4F) Using the drain electrode SD1 and the source electrode SD2 of the thin film transistor TFT as a mask, the high-concentration n-type amorphous silicon exposed from each of the electrodes is etched.

In this case, the etching is performed so that the amorphous silicon (a-Si) is slightly etched, and the etching depth is about 150 nm. The etching is performed by, for example, a dry etching method using a mixed gas of sulfur hexafluoride and hydrogen chloride.

Step 7. (FIG. 4 (g)) A silicon nitride film (Si) is formed on the entire surface of the transparent substrate SUB1 thus treated by, for example, a plasma CVD method.
N). This silicon nitride film functions as a protective film PSV.

Then, a contact hole CH is formed in the silicon nitride film by a selective etching method using a photolithography technique.

Step 8. (FIG. 4 (h)) The entire surface of the transparent substrate SUB1 thus treated is covered with ITO (Indium-Tin-O) by sputtering, for example.
xide) Form a film. This ITO film functions as a pixel electrode PIX and is formed in a predetermined pattern by a selective etching method using a photolithography technique.

In this case, the pixel electrode PIX is connected to the source electrode SD2 of the thin film transistor TFT through the contact hole CH.

<< Another Embodiment of Manufacturing Method >> In the manufacturing method of the liquid crystal display device described above, in the step 4 (FIG. 4D), the selective etching of the semiconductor layer AS is performed and then the hydrogen plasma treatment is performed. .

However, the present invention is not limited to this. For example, a process using a phosphine gas containing phosphorus (P) may be performed.

This phosphine gas is, for example, diluted to about 1% with hydrogen. The other processing conditions are the same except for the type of gas.

In this case, as the altered layer D ₀ formed on the side surface of the semiconductor layer AS, not a layer having a different hydrogen concentration but a layer in which a small amount of phosphorus (P) is mixed as an impurity is formed.

Under the same processing conditions, a-Si
As a result of analyzing the sample treated with, it is confirmed that, for example, secondary ion mass spectrometry (SIMS) contains about 0.01% to 0.1% of phosphorus (P). In addition,
The semiconductor layer AS also phosphorus (P) is doped as a contact layer d ₀ of the thin film transistor TFT, the concentration of the phosphorus is 0.5 to 2%.

The thus constructed thin film transistor T
FT is the drain current Id with respect to the gate voltage Vg.
As shown in FIG. 5, which is a characteristic diagram of
The OFF characteristic of the FT can be greatly improved. It is also found that there is no influence on the original thin film transistor TFT characteristics (ON characteristics).

<< Another Embodiment of Manufacturing Method >> FIG. 6 is a process chart showing another embodiment of the manufacturing method of the liquid crystal display device, and corresponds to FIG.

A different point from the case of FIG.
In FIG. 6D, the semiconductor layer AS is selectively etched, and after removing the photoresist at that time, the remaining semiconductor layer AS is subjected to a treatment with a chemical solution containing, for example, phosphorus (P).

Here, as the chemical solution, for example, a mixture of phosphoric acid (H ₃ PH ₄ ), nitric acid and acetic acid at a ratio of 10: 2: 1 is used, and the treatment is performed at a liquid temperature of 40 ° C. for 2 minutes.

Thereafter, the transparent substrate SUB1 is thoroughly washed with water and dried, and annealed in a nitrogen atmosphere at atmospheric pressure. The deteriorated layer D ₀ thus formed is formed not only on the surface of the semiconductor layer AS but also on the side wall surface thereof.

[0064] Then, drain electrodes SD1, the source electrode SD2 are formed in the same manner as in the embodiment described above, the modified protein layer D ₀ but is also formed at the interface between the respective electrode and the semiconductor layer AS, this Does not adversely affect the characteristics of the thin film transistor TFT.

The thus constructed thin film transistor T
FT is the drain current Id with respect to the gate voltage Vg.
As shown in FIG. 7, which is a characteristic diagram of
The OFF characteristic of the FT can be greatly improved. It is also found that there is no influence on the original thin film transistor TFT characteristics (ON characteristics).

The above-described manufacturing method can be applied after the removal of the photoresist by applying the treatment with the chemical solution, and can eliminate the influence on the photoresist stripping step. Further, as another embodiment, the same effect can be obtained by performing the treatment with the chemical solution instead of the plasma treatment with the phosphine gas.

In the above-described embodiment, the liquid crystal display device of the so-called vertical electric field type has been described. However, the present invention is not limited to this, and is applicable to the liquid crystal display device of the horizontal electric field type. Needless to say.

Here, the liquid crystal display device referred to as a lateral electric field type is such that a pixel electrode and a counter electrode are formed in each pixel region of one of the substrates arranged to face each other with a liquid crystal therebetween. A structure in which the light transmittance of the liquid crystal is controlled by an electric field component in a direction substantially parallel to the substrate between the electrodes.

In this case, each of the electrodes may be formed of a light-transmitting conductive layer, or at least one of the electrodes may be formed of a non-light-transmitting conductive layer.

[0070]

As will be apparent from the above description, according to the liquid crystal display device of the present invention, it is possible to obtain a liquid crystal display device having an improved OFF characteristic of the thin film transistor.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing one embodiment of a thin film transistor of a liquid crystal display device according to the present invention, and shows a cross section taken along line II of FIG.

FIG. 2 is a plan view showing one embodiment of a pixel of the liquid crystal display device according to the present invention.

FIG. 3 is a diagram showing characteristics of one embodiment of a thin film transistor of a liquid crystal display device according to the present invention.

FIG. 4 is a process chart showing one embodiment of a method of manufacturing a liquid crystal display device according to the present invention.

FIG. 5 is a graph showing characteristics of another embodiment of the thin film transistor of the liquid crystal display device according to the present invention.

FIG. 6 is a process chart showing another embodiment of the method of manufacturing the liquid crystal display device according to the present invention.

FIG. 7 is a graph showing characteristics of another embodiment of the thin film transistor of the liquid crystal display device according to the present invention.

[Explanation of symbols]

SUB1 ... Transparent substrate, GL ... Gate signal line, AS ...
... semiconductor layer, d ₀ ...... contact layer, D ₀ ...... altered layer, S
D1 ... Drain electrode, SD2 ... Source electrode, PSV
... Protective film, PIX... Pixel electrode.

Continued on the front page (51) Int.Cl. ⁷ Identification code FI Theme coat II (Reference) H01L 29/78 616V F term (Reference) 2H092 JA26 JA37 JA41 JA46 JB51 MA13 MA17 MA27 MA29 NA22 5C094 AA13 AA43 BA03 BA43 CA19 EA04 EA07 5F110 AA06 AA19 BB01 CC07 DD01 EE04 EE44 FF03 FF30 GG02 GG15 GG24 GG45 HK04 HK09 HK16 HK21 HK33 HK35 NN02 NN24 NN35 NN72 QQ25 QQ30 5G435 AA16 AA17 BB12 CC09 CC12 GG12 KK09 KK

Claims (10)

[Claims] 1. A thin film transistor is provided on a liquid crystal side surface of at least one of substrates opposed to each other via a liquid crystal, and a hydrogen-treated layer is formed on a side wall surface of a semiconductor layer of the thin film transistor. A liquid crystal display device. 2. The method according to claim 1, wherein a contact layer made of an n-type impurity layer is formed on a surface of the thin film transistor except for a side wall surface of the semiconductor layer and at an interface between the drain electrode and the source electrode. The liquid crystal display device as described in the above. 3. The hydrogen concentration of a layer that has been subjected to hydrogen treatment is 10 times lower than that of a semiconductor layer that has not been subjected to hydrogen treatment.
2. The liquid crystal display device according to claim 1, wherein the amount is increased by 50%. 4. An n-type thin film transistor is provided on a liquid crystal side surface of at least one of substrates opposed to each other via a liquid crystal, and an n-type impurity layer is formed on a side wall surface of a semiconductor layer of the thin film transistor. A liquid crystal display device. 5. The thin film transistor according to claim 4, wherein a contact layer made of an n-type impurity layer is formed on a surface excluding a side wall surface of the semiconductor layer of the thin film transistor and at an interface between the drain electrode and the source electrode. The liquid crystal display device as described in the above. 6. The liquid crystal display device according to claim 5, wherein the n-type impurity layer is a layer doped with phosphorus. 7. The method according to claim 7, wherein the phosphorus doped in the contact layer is 0.1 to 1.0.
7. The liquid crystal display device according to claim 6, wherein the amount of phosphorus doped on the side wall surface of the semiconductor layer is 5% to 2% and the amount of phosphorus is 0.01% to 0.1%. 8. A pixel region is defined by a region surrounded by a gate signal line disposed adjacent to a liquid crystal side surface of the one substrate and a drain signal line disposed adjacent thereto. The n-type thin film transistor operated by a scanning signal from one gate signal line and a pixel electrode to which a video signal from one drain signal line is supplied via the n-type thin film transistor are formed. The liquid crystal display device according to claim 1. 9. A method for manufacturing a liquid crystal display device having a thin film transistor formed on at least one of substrates opposed to each other with a liquid crystal interposed therebetween, comprising: an insulating film on a gate electrode of the one substrate; A step of sequentially forming a stacked body of the semiconductor layer and the contact layer; a step of selectively etching the stacked body; a step of hydrogen-treating the side wall surface of the stacked body left by the selective etching; and an upper surface of the remaining stacked body Forming a drain electrode and a source electrode extending to the side wall surface; and etching a contact layer exposed from each of the electrodes using the drain electrode and the source electrode as a mask. A method for manufacturing a display device. 10. A method for manufacturing a liquid crystal display device having a thin film transistor formed on at least one of substrates opposed to each other with a liquid crystal interposed therebetween, comprising: an insulating film on a gate electrode of the one substrate; A step of sequentially forming a stacked body of a contact layer comprising an intrinsic semiconductor layer and an n-type impurity layer; a step of selectively etching the stacked body; and an n-type impurity layer on at least a side wall surface of the stacked body left by the selective etching. Forming a drain electrode and a source electrode extending to the side wall surface on the upper surface of the remaining stacked body; and contact exposed from the respective electrodes using the drain electrode and the source electrode as a mask. And a step of etching the layer.