KR100502481B1 - Thin Film Transistor device for Liquid Crystal Display Device and Method for Fabricating the same - Google Patents

Abstract

According to the thin film transistor element for a liquid crystal display device and a method for manufacturing the same according to the present invention, a separate ohmic contact layer material deposition process and a channel forming process can be omitted by the salicide process, thereby simplifying the process. By increasing the production yield and product competitiveness by simplifying the process, and thirdly, the resistance problem of the contact part is solved by the RTP process, which is a short heat treatment process for several seconds, thereby preventing thermal damage to the substrate. There is an advantage that can increase the process reliability.

Description

Thin Film Transistor device for Liquid Crystal Display Device and Method for Fabricating the same

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to thin film transistors for liquid crystal display devices, and in particular, to liquid crystals including a SALICIDE (self-aligned silicide) process capable of reducing contact part resistance between a metal material and a semiconductor material in a thin film transistor. A thin film transistor for a display device and a method of manufacturing the same.

Recently, liquid crystal displays have been spotlighted as next-generation advanced display devices with low power consumption, good portability, technology-intensive, and high added value.

The liquid crystal display is formed by injecting a liquid crystal between two substrates on which transparent electrodes are formed, and placing upper and lower polarizers outside the upper and lower substrates, and applying a voltage to the upper and lower electrodes to change the arrangement of the liquid crystals. It is driven in a manner that adjusts the transmittance of light.

Currently, an active matrix liquid crystal display (AM-LCD), in which thin film transistors (TFTs), which are switching elements that open and close each pixel, is disposed for each pixel, has an excellent resolution and video performance. The most attention is.

1 is a cross-sectional view of a general liquid crystal display device and will be described with reference to one pixel unit for convenience of description.

As shown, the upper and lower substrates 10 and 30 are spaced apart from each other by a predetermined distance, and the liquid crystal layer 50 is interposed between the upper and lower substrates 10 and 30.

A gate electrode 32 is formed on the transparent substrate 1 of the lower substrate 30, and a gate insulating layer 34 is formed on the gate electrode 32. The semiconductor layer 36 formed by stacking an active layer 36a and an ohmic contact layer 36b in order is disposed at a position covering the gate electrode 32. Source and drain electrodes 38 and 40 are spaced apart from each other at upper portions, and a channel ch exposing a part of the active layer 36a is exposed in the interval between the source and drain electrodes 38 and 40. channel) is formed.

The gate electrode 32, the semiconductor layer 36, the source and drain electrodes 38 and 40, and the channel ch form a thin film transistor T.

Although not shown in the drawings, a gate line is formed in a first direction by being connected to the gate electrode 32, and a data line is formed in a second direction crossing the first direction and is connected to the source electrode 38. The area where the gate and the data line cross each other is defined as the pixel area P. FIG.

Meanwhile, a passivation layer 42 having a drain contact hole 44 is formed on the thin film transistor T, and the pixel region P is connected to the drain electrode 40 through the drain contact hole 44. The pixel electrode 46 to be formed is formed.

A lower alignment layer 48 is formed on the passivation layer 42 and the pixel electrode 46 to easily induce alignment of the liquid crystal layer 50.

A color filter 14 is formed below the transparent substrate 1 of the upper substrate 10 to filter only light of a specific wavelength band at a position corresponding to the pixel electrode 46. The color filter 14 The black matrix 12 is formed in the color-specific boundary and the non-display area in which the liquid crystal is not driven to block light leakage and light inflow into the thin film transistor T.

A common electrode 16, which is another electrode for applying a voltage to the liquid crystal layer 50, is formed below the color filter 14 and the black matrix 12, and below the common electrode 16. The upper alignment film 18 is formed.

Meanwhile, in order to prevent leakage of the liquid crystal layer 50 interposed between the upper and lower substrates 10 and 30, edges between the upper and lower substrates 10 and 30 are sealed by the seal pattern 52. have.

2A through 2D are cross-sectional views illustrating a general manufacturing process of a thin film transistor for a liquid crystal display device, and will be described based on the number of mask processes corresponding to a photolithography process defined as a patterning process using a photosensitive material.

2A illustrates depositing a first metal material on a substrate 60 and then forming a gate electrode 62 by a first mask process, and FIG. 2B illustrates a first upper portion of the gate electrode 62. An insulating material, a first semiconductor material, and a second semiconductor material are successively formed, and then the first insulating material is used as the gate insulating film 64, and the first and second semiconductor materials are made of the active layer 66a by a second mask process; active layers) and ohmic contact layers 66b.

For example, the first semiconductor material is made of pure amorphous silicon material, the second semiconductor material is made of impurity semiconductor material, and the active layer 66a and the ohmic contact layer 66b constitute the semiconductor layer 66. do.

In FIG. 2C, a second metal material is deposited on the entire surface of the substrate covering the ohmic contact layer 66b, and then a source electrode 68 spaced apart from each other on the ohmic contact layer 66b by a third mask process. In this step, the drain electrode 70 is formed.

In this step, the ohmic contact layer 66b in the section between the source electrode 68 and the drain electrode 70 is removed using the source electrode 68 and the drain electrode 70 as a mask to form a lower layer. The method may further include configuring the active layer 66a as a channel (ch).

The gate electrode 62, the semiconductor layer 66, the source electrode 68, and the drain electrode 70 form a thin film transistor T.

In FIG. 2D, the protective layer 72 is formed on the entire surface of the substrate covering the thin film transistor T for the purpose of protecting the thin film transistor T from external impact or moisture.

Although not shown in the drawing, when the above-described thin film transistor T is used as a pixel switching element, in the forming of the protective layer 72, the drain electrode 70 is partially exposed to the protective layer 72. Forming a drain contact hole and forming a pixel electrode connected to the drain electrode 70 through the drain contact hole on the passivation layer 72.

As described above, the patterns of the thin film transistors for general liquid crystal display devices are formed through a photolithography process defined by a patterning process using a photosensitive material. The gate electrode, the semiconductor layer, the source electrode, and the drain electrode are respectively It is formed by a photolithography process. As a result, as the photolithography process involving chemical and physical processes is repeated, the probability of imparting defects to the device is increased, and the manufacturing cost is increased to reduce the production yield.

In order to solve the above problems, an object of the present invention is to simplify the manufacturing process of the thin film transistor element for a liquid crystal display device.

To this end, the present invention intends to apply the salicide process of a semiconductor device capable of forming an ohmic contact layer in a self-aligned manner to a thin film transistor manufacturing process for a liquid crystal display device.

3A and 3B are cross-sectional views of silicon wafers schematically showing a process of forming salicide of a semiconductor device according to a conventional method.

First, as illustrated in FIG. 3A, the silicon wafer 82 in which the device isolation region 80 is defined is thermally oxidized to a device region defined by a local oxidation of silicon (LOCOS), shallow trench isolation (STI) process, or the like. After the gate oxide film is formed and polysilicon is deposited on the gate oxide film, the gate electrode G is formed by patterning the polysilicon and the gate oxide film. Then, the silicon wafer 82 is charged into a furnace and thermally oxidized to form a poly oxide film 84 having a thickness of about 100 microseconds on the polysilicon surface of the gate electrode G and the silicon surface of the exposed device region. Rounding the corner edge of G) mitigates stress induced leakage (SILC) applied to the gate. In addition, a cap oxide film 86 is deposited to suppress damage of the gate electrode G and the silicon wafer according to a subsequent ion implantation process by chemical vapor deposition (CVD). Thereafter, a P-type or N-type dopant is ion-implanted and annealed to the silicon wafer 82 using the gate electrode G as a mask, and the source S / A drain (D) region is formed. Then, an insulating film 88 such as a nitride film or an oxide film is deposited on the entire surface of the silicon wafer 82 by chemical vapor deposition.

3B, the insulating film 88 is anisotropically etched by plasma etching and used as sidewall spacers on the sidewalls of the gate electrode G. As shown in FIG. The cap oxide film 86 and the poly oxide film 84 that are exposed by cleaning the silicon wafer 82, that is, on the gate electrode G and the source S / drain D region of the silicon wafer, are removed. After removal, a metal thin film for silicide formation is deposited by sputtering and a rapid thermal process (RTP) to form a low resistance salicide 90.

In the present invention, the salicide process used in such a semiconductor process is intended to be applied to a thin film transistor manufacturing process for a liquid crystal display device.

In more detail, when the salicide process is applied to the manufacturing process of the thin film transistor for liquid crystal display, the impurity semiconductor material in the section between the source electrode and the drain electrode is etched to form the existing impurity semiconductor material layer and the channel. It has the advantage of eliminating the process to do.

That is, in the present invention, when the source electrode and the drain electrode are formed to be spaced apart from each other by using a heat resistant metal material on the substrate on which the active pattern made of the gate electrode, the gate insulating film, and the amorphous silicon material is sequentially formed, the RTP process is performed. The silicide layer is selectively formed on the active pattern portion in contact with the source electrode and the drain electrode, so that the active pattern positioned in the separation interval between the source electrode and the drain electrode can be used as the channel portion without a separate channel process.

Hereinafter, a salicide process applied to a conventional semiconductor device will be described in detail with reference to the accompanying drawings.

In order to achieve the above object, in a first aspect of the present invention, there is provided a semiconductor device comprising: a gate electrode formed on a substrate; A gate insulating film formed in a region covering the gate electrode; An active layer made of an amorphous silicon (a-Si) material formed at a position covering the gate electrode on the gate insulating layer; A region corresponding to the center portion of the gate electrode is defined as a channel portion, and has a pattern structure corresponding to the active layer on the active layer, and is spaced apart from each other while exposing the active layer in the channel portion, and has high heat resistance. A source electrode and a drain electrode made of a material; Provided is a thin film transistor element for a liquid crystal display device including an ohmic contact layer made of silicide positioned at an interface portion between the source electrode and the drain electrode and the active layer.

The metal material having high heat resistance is cobalt (Co), titanium (Ti), platinum (Pt), molybdenum (Mo), tungsten (W), nickel (Ni), iron (Fe), vanadium (V), zirconium ( Zr), and the material forming the source electrode and the drain electrode is selected from any one of metal materials such as cobalt and titanium, and the silicide forming the ohmic contact layer is made of any one of CoSix, TiSix. .

The active layer and the ohmic contact layer constitute a semiconductor layer, and the gate electrode, the semiconductor layer, the source electrode, and the drain electrode form a thin film transistor, and further include a protective layer at a position covering the thin film transistor. .

In a second aspect of the invention, there is provided a method for forming a gate electrode on a substrate; Sequentially forming a metal layer made of a gate insulating film, an amorphous silicon layer, and a metal material having high heat resistance on the entire surface of the substrate covering the gate electrode; The region corresponding to the center portion of the gate electrode is defined as a channel portion, and simultaneously etching the amorphous silicon layer and the metal layer and selectively etching only the metal layer in the channel portion are performed. Forming a source electrode and a drain electrode spaced apart from each other; Forming a silicide layer at an interface between the source electrode and the drain electrode and an amorphous silicon layer by a rapid thermal process (RTP) process using the source electrode and the drain electrode as a mask; Using the silicide as an ohmic contact layer to complete a semiconductor layer including the active layer and the ohmic contact layer, and forming an active layer region positioned in a section between the source electrode and the drain electrode as a channel; Provided is a method of manufacturing a thin film transistor element.

The metal material having high heat resistance is cobalt (Co), titanium (Ti), platinum (Pt), molybdenum (Mo), tungsten (W), nickel (Ni), iron (Fe), vanadium (V), zirconium ( Zr), and the material forming the source electrode and the drain electrode is selected from any one of metal materials such as cobalt and titanium, the silicide forming the ohmic contact layer is made of any one of CoSix, TiSix, the RTP The processing step includes the step of performing a short heat treatment for 10 to 30 seconds under a temperature condition of 800 to 1,000 ° C. in a nitrogen (N ₂ ) or nitrogen / oxygen (0 ₂ ) atmosphere, wherein the gate electrode, semiconductor layer, source electrode and The drain electrode further comprises forming a thin film transistor, and forming a protective layer in a region covering the thin film transistor, wherein the material of the protective layer is selected from one of silicon nitride (SiNx) and silicon oxide (SiOx). To be It features.

In the forming of the gate electrode, the source electrode and the drain electrode, a patterning process is performed by a photolithography process including an exposure and development process using a photo-resist (PR), which is a photosensitive material, and the source electrode and the drain. In the forming of the electrode, a diffraction exposure method for forming the PR thickness of the channel portion thinner than other regions is used.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings.

First Embodiment

4A through 4E are cross-sectional views illustrating a manufacturing process of a thin film transistor element for a liquid crystal display according to a first embodiment of the present invention.

In FIG. 4A, the gate electrode 112 is formed on the substrate 110 using the first metal material.

Although not shown in detail in the drawings, the photosensitive material is applied to the photosensitive material on the first metal material layer, and then a PR pattern is formed through an exposure and development process, and PR The gate electrode 112 is completed by a first mask process, which is a mask process for patterning an exposed first metal material using a pattern as a mask. In this step, the gate wiring 112 is included in the first direction including the gate electrode 112. Forming a step.

The first metal material is selected from a metal material having a low specific resistance, and is preferably a metal material including aluminum.

In FIG. 4B, the gate insulating layer 114 and the amorphous silicon material are formed on the substrate 110 on which the gate electrode 112 is formed by using a first insulating material, an amorphous silicon (a-Si) material, and a second metal material. In this step, the layer 116 and the metal layer 118 are sequentially formed.

The first insulating material is selected from one of an organic insulating material and an inorganic insulating material, preferably selected from inorganic insulating materials, and more preferably selected from silicon insulating materials.

For example, a material selected from any one of silicon nitride film (SiNx) and silicon oxide film (SiOx) may be formed as a single layer or a plurality of layers.

An example of applying a plurality of layers among them is to increase the deposition characteristics of the gate insulating layer 114.

The second metal material may be selected from a metal material having high heat resistance. Preferably, the second metal material is cobalt (Co), titanium (Ti), platinum (Pt), molybdenum (Mo), tungsten (W), or nickel. (Ni), iron (Fe), vanadium (V), and zirconium (Zr).

In the present exemplary embodiment, the active layer of the semiconductor layer and the metal layers for the source electrode and the drain electrode are continuously formed in contact with each other, unlike the conventional manufacturing process of the thin film transistor for a liquid crystal display device.

In FIG. 4C, the metal layer 118 and the amorphous silicon material layer 116 are continuously etched by the second mask process, and the channel portion I defined as a region corresponding to the center portion of the gate electrode 112 is formed. In this case, only the metal layer 118 is selectively removed.

That is, in the step of continuously etching the metal layer 118 and the amorphous silicon material layer 116, it is preferable to use a diffraction exposure method to selectively etch only the metal layer 118 located in the channel portion (I).

The diffraction exposure method corresponds to a method in which the thickness of a PR pattern in a desired region can be adjusted by using a mask having a half-tone or slit portion.

Through this step, the left and right metal layer patterns which are spaced apart from each other in the channel part I form a source electrode 120 and a drain electrode 122, respectively, and the source electrode 120 and the drain electrode 122 are formed. The pattern of the amorphous silicon material layer 116 having the pattern corresponding to forms the active layer 117.

Although not shown in detail in the drawings, the data line is formed in a second direction including the source electrode 120 to cross the first direction.

An area where the gate line and the data line cross each other is defined as a pixel area.

In FIG. 4D, the source electrode 120, the drain electrode 122, and the active layer 117 are interfaced with each other by a salicide process defined as an RTP process using the source electrode 120 and the drain electrode 122 as a mask. A silicide is formed to form the silicide as the ohmic contact layer 124.

For example, when the above-described second metal material is made of cobalt, the ohmic contact layer 124 is made of CoSix, and forms silicide according to each metal material such as TiSix for titanium and WSix for tungsten.

This step, as a key process of the present embodiment, according to the salicide process, the step of forming a separate ohmic contact material layer and the etching process for configuring the channel portion, omitting the source electrode 120 and the self-aligned method Since the contact portion between the drain electrode 122 and the active layer 117 is formed by the ohmic contact layer 124, the process can be simplified.

In one example, the RTP treatment is active active made of amorphous silicon because it forms a silicide through a short heat treatment for 10 to 30 seconds under a temperature condition of 800 ~ 1,000 ℃ in nitrogen (N ₂ ) or nitrogen / oxygen (0 ₂ ) atmosphere It may not affect the physical properties of the layer 117.

The active layer 116 and the ohmic contact layer 124 constitute a semiconductor layer 126, and the gate electrode 112, the semiconductor layer 126, the source electrode 120, and the drain electrode 122 are thin film transistors. (T).

In addition, an active layer 116 region positioned in the separation interval between the source electrode 120 and the drain electrode 122 forms a channel ch.

In FIG. 4E, the protective layer 128 made of the second insulating material is formed in the region covering the thin film transistor T. Referring to FIG.

The second insulating material may be formed using any one or a plurality of organic insulating materials or inorganic insulating materials. Preferably, the insulating material directly contacting the thin film transistor T is an inorganic insulating material, more preferably, a silicon nitride film. Or silicon oxide film.

Although not shown in the drawing, forming a drain contact hole partially exposing the drain electrode 122 in the passivation layer 128 and forming a pixel electrode connected to the drain contact hole on the passivation layer 128. Steps.

The present invention is not limited to the above embodiments, and various modifications can be made without departing from the spirit of the present invention.

As described above, according to the thin film transistor element and the method of manufacturing the same according to the present invention, a separate ohmic contact layer material deposition process and a channel forming process can be omitted by the first salicide process, thereby simplifying the process. have.

Second, process simplification can increase production yields and increase product competitiveness.

Third, the problem of resistance of the contact portion can be solved by the RTP process, which is a short heat treatment process for several seconds, so that thermal damage can be prevented from being applied to the substrate, thereby improving process reliability.

1 is a cross-sectional view of a general liquid crystal display device.

2A to 2D are cross-sectional views illustrating a manufacturing process of a thin film transistor for a general liquid crystal display device.

3A and 3B are cross-sectional views of silicon wafers schematically showing a process for forming salicide of a semiconductor device according to a conventional method.

4A to 4E are cross-sectional views showing step-by-step manufacturing processes of a thin film transistor element for a liquid crystal display according to a first embodiment of the present invention.

<Description of Symbols for Main Parts of Drawings>

110 substrate 112 gate electrode

114: gate insulating film 117: active layer

120 source electrode 122 drain electrode

124: ohmic contact layer 126: semiconductor layer

ch: Channel T: Thin film transistor

Claims (11)

A gate electrode formed on the substrate; A gate insulating film formed in a region covering the gate electrode; An active layer made of an amorphous silicon (a-Si) material formed at a position covering the gate electrode on the gate insulating layer; A region corresponding to the center portion of the gate electrode is defined as a channel portion, and has a pattern structure corresponding to the active layer on the active layer, and is spaced apart from each other while exposing the active layer in the channel portion, and has high heat resistance. A source electrode and a drain electrode made of a material; An ohmic contact layer made of silicide positioned at an interface between the source electrode and the drain electrode and the active layer. Thin film transistor element for a liquid crystal display device comprising a. The method of claim 1, The metal material having high heat resistance is cobalt (Co), titanium (Ti), platinum (Pt), molybdenum (Mo), tungsten (W), nickel (Ni), iron (Fe), vanadium (V), zirconium ( A thin film transistor element for liquid crystal display device selected from any one of Zr). The method of claim 2, The material constituting the source electrode and the drain electrode is selected from any one of cobalt and titanium, and the silicide constituting the ohmic contact layer is made of any one of CoSix and TiSix. The method of claim 1, The active layer and the ohmic contact layer constitute a semiconductor layer, and the gate electrode, the semiconductor layer, the source electrode, and the drain electrode form a thin film transistor, and further include a protective layer at a position covering the thin film transistor. Thin film transistor element. Forming a gate electrode on the substrate; Sequentially forming a metal layer made of a gate insulating film, an amorphous silicon layer, and a metal material having high heat resistance on the entire surface of the substrate covering the gate electrode; The region corresponding to the center portion of the gate electrode is defined as a channel portion, and simultaneously etching the amorphous silicon layer and the metal layer and selectively etching only the metal layer in the channel portion are performed. Forming a source electrode and a drain electrode spaced apart from each other; Forming a silicide layer at an interface between the source electrode and the drain electrode and an amorphous silicon layer by a rapid thermal process (RTP) process using the source electrode and the drain electrode as a mask; Using the silicide as an ohmic contact layer to complete a semiconductor layer including the active layer and the ohmic contact layer, and forming an active layer region positioned in a section between the source electrode and the drain electrode as a channel Method of manufacturing a thin film transistor element for a liquid crystal display device comprising a. The method of claim 5, The metal material having high heat resistance is cobalt (Co), titanium (Ti), platinum (Pt), molybdenum (Mo), tungsten (W), nickel (Ni), iron (Fe), vanadium (V), zirconium ( Zr) a method for manufacturing a thin film transistor element for a liquid crystal display device. The method of claim 6, The material constituting the source electrode and the drain electrode is selected from any one of metal materials such as cobalt and titanium, and the silicide constituting the ohmic contact layer is made of any one of CoSix and TiSix. The method of claim 5, In the RTP processing step, the thin film transistor device for liquid crystal display device comprising the step of a short heat treatment for 10 to 30 seconds under a temperature condition of 800 ~ 1,000 ℃ in nitrogen (N ₂ ) or nitrogen / oxygen (0 ₂ ) atmosphere Way. The method of claim 5, And the gate electrode, the semiconductor layer, the source electrode, and the drain electrode form a thin film transistor, and forming a protective layer in a region covering the thin film transistor. The method of claim 9, The material of the protective layer is a method of manufacturing a thin film transistor element for a liquid crystal display device selected from any one of silicon nitride film (SiNx), silicon oxide film (SiOx). The method of claim 5, In the forming of the gate electrode, the source electrode and the drain electrode, a patterning process is performed by a photolithography process including an exposure and development process using a photo-resist (PR), which is a photosensitive material, and the source electrode and the drain. In the forming of the electrode, a method of manufacturing a thin film transistor element for a liquid crystal display device, wherein a diffraction exposure method for forming a PR thickness of the channel portion thinner than other regions is used.