JP2002246539A - Manufacturing method for semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To simplify material and manufacturing processes by using a surface protective resin also as an adhesive, and increase adhesiveness of the semiconductor chip. SOLUTION: The BGA type semiconductor device has a stacked structure made up of two laminated semiconductor chips 4 and 5. When the semiconductor chip 5 is laminated on the semiconductor chip 4, an adhesive in a paste-like state is applied on the surface of the semiconductor chip 4 having no surface protective resin and the like applied thereon. The adhesive 6 functions as an adhesive and also as pellet surface protection. In this case, the adhesive 6 is made of polyimide-, epoxy-, acryl- or their mixture-based material of either thermoplastic or heat hardening type. As a result, the resin material is saved and the manufacturing process can be simplified.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a manufacturing technique for a semiconductor device, and more particularly to a technique effective for improving reliability of a stacked semiconductor device and reducing manufacturing costs.

[0002]

2. Description of the Related Art According to studies by the present inventor, as a technique for increasing the density of a package having a size substantially the same as the size of a semiconductor chip, for example, two semiconductor chips are stacked. Worst Stacked CSP (C
2. Description of the Related Art A semiconductor device having a chip size (Hip Size Package) structure is known.

In this semiconductor device, semiconductor chips stacked in two stages are mounted at the center of a printed wiring board, and the lower semiconductor chip has a larger shape than the upper semiconductor chip.

When bonding the lower semiconductor chip and the upper semiconductor chip, a paste or film adhesive is applied to the surface of the lower semiconductor chip, and the upper semiconductor chip is laminated. Glued.

Further, bonding pads are formed in the vicinity of the peripheral portions of the upper and lower semiconductor chips, respectively, and the bonding pads and the electrodes formed on the printed wiring board are connected by bonding wires. Has become.

Japanese Patent Application Laid-Open No. 11-204720 discloses an example of this type of semiconductor device in detail, which describes a semiconductor device in a stacked package having a CSP structure.

[0007]

However, it has been found by the present inventors that the following problems occur in the semiconductor integrated circuit device of the stacked package as described above.

That is, the surface of the semiconductor chip is coated in advance with a surface-protecting resin such as a polyimide resin for the purpose of preventing scratches and preventing alpha rays, and the surface-protecting resin and the adhesive are superposed. Therefore, the type of the resin material used for the adhesive is limited, and the reliability of the adhesive may be reduced.

[0009] Further, since two steps of a protective resin and an adhesive are required, and two materials are required, there is a problem that the cost is increased and the production efficiency is reduced.

Further, when there is no margin in the application area of the adhesive resin in the lower semiconductor chip, a film-like adhesive is mainly used because there is a concern that the adhesive may overflow or bleed. In addition, since the shape and type of the adhesive are also restricted, there is a problem that the manufacturing cost of the semiconductor device is increased.

An object of the present invention is to use a resin for surface protection and an adhesive so as to simplify the material and the manufacturing process, and to greatly improve the adhesiveness of the semiconductor chips to be superposed and adhered. It is an object of the present invention to provide a possible semiconductor device.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0013]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, in the method of manufacturing a semiconductor device according to the present invention, a first electrode formed near an outer peripheral portion and connected to an internal circuit via an internal wiring is provided, and the surface is not protected by a protective material. A step of preparing a first semiconductor chip; a step of preparing a second semiconductor chip provided near a peripheral portion and provided with a second electrode connected to an internal circuit via an internal wiring; Preparing a printed wiring board on which the semiconductor chip is mounted, mounting the first semiconductor chip on the printed wiring board, and bonding and fixing the semiconductor chip with an adhesive; A step of applying an adhesive protection resin serving as both surface protection and adhesion, laminating a second semiconductor chip via the adhesion protection resin, and bonding and fixing; a first electrode of the first semiconductor chip; Second semiconductor chip The bonding electrode formed on the second electrode and the printed circuit board of the flop first, those having a step of connecting each of the second wire.

As described above, since the resin layer interposed between the first semiconductor chip and the second semiconductor chip is only the resin for adhesion protection, the decrease in reliability due to the decrease in adhesiveness and the like can be prevented. It is possible to greatly reduce the manufacturing cost and improve the manufacturing cost.

[0016]

Embodiments of the present invention will be described below in detail with reference to the drawings.

(Embodiment 1) FIG. 1 is a sectional view of a semiconductor device according to Embodiment 1 of the present invention, and FIGS.
FIG. 9 is an explanatory diagram of the manufacturing process of the semiconductor device of FIG. 1, and FIG. 9 is a flowchart of the manufacturing process of the semiconductor device of FIG.

In the first embodiment, the semiconductor device 1
Is a BGA (Ball), a type of surface mount CSP.
Grid Array). As shown in FIG. 1, the semiconductor device 1 is provided with a printed wiring board 2 made of, for example, a BT (bismaleimide-based resin) material.

On the rear surface of the printed wiring board 2, connection electrodes and wiring patterns arranged in an array are formed. A semiconductor chip (first semiconductor chip) 4 is mounted at the center of the main surface (semiconductor chip mounting surface) of the printed wiring board 2 via an adhesive 3 such as an insulating resin.

On the semiconductor chip 4, a semiconductor chip (second semiconductor chip) 5 is stacked, and has a so-called stacked structure. The semiconductor chip 5 is also adhered and fixed to the semiconductor chip 4 via an adhesive (adhesion protection resin) 6 such as an insulating resin.

On the main surface of the printed wiring board 2, a bonding electrode 2a and a wiring pattern are formed near the periphery of two opposing sides of the semiconductor chip 4. The bonding electrode 2a and the connection electrode are electrically connected by wiring patterns formed on both surfaces of the printed wiring board, through holes, and the like.

On the connection electrodes on the back surface of the printed wiring board 2, solder bumps 7 made of spherical solder are formed. On the main surface of the semiconductor chip 4, a plurality of electrodes (first electrodes) 4a are formed near the outer peripheral portion of the semiconductor chip 4.

Similarly, on the main surface of the semiconductor chip 5, an electrode (second electrode) 5a is provided near the outer peripheral portion of the semiconductor chip 5.
Are formed. These electrodes 4a and 5a are connected by a bonding wire (first wire) 8 and a bonding wire (second wire) 9, which will be described later.

The semiconductor chips 4 and 5, the periphery of the bonding electrode 2a of the printed wiring board 2, and the bonding wires 8 and 9 are sealed with a sealing resin 10 to form a package.

A predetermined bonding electrode 2a is connected to the electrodes 4a, 5a of the semiconductor chips 4, 5 via bonding wires 8, 9, respectively.

When the semiconductor device 1 is mounted on a printed circuit board on which electronic components and the like are mounted, solder bumps 7 are superimposed on electrodes such as lands formed on the printed circuit board 2 and mounted. , And are electrically connected by performing reflow.

Next, the manufacturing process of the semiconductor device 1 according to the first embodiment will be described with reference to FIGS. 1, 2 to 8, and the flowchart of FIG.

First, the printed wiring board 2 on which the semiconductor chip 4 on which the bonding electrode 2a is formed is mounted, the semiconductor chip 4 on which the electrode 4a is formed on the periphery, and the semiconductor chip 5 on which the electrode 5a is formed on the periphery. Each is prepared (step S101). It is assumed that no resin or the like for protecting the surface is applied to the surfaces of the semiconductor chips 4 and 5 at all.

Then, as shown in FIG. 2, a paste-like or film-like adhesive 3 is applied to the center of the printed wiring board 2 (step S102). Then, FIG.
As shown in FIG. 4, the semiconductor chip 4 is mounted, and as shown in FIG. 4, the printed wiring board 2 and the semiconductor chip 4 are bonded and fixed (step S103).

Next, as shown in FIG. 5, a paste or film adhesive 6 is applied to the surface of the semiconductor chip 4 other than the electrodes 4a (step S104).
As shown in (5), the semiconductor chip 5 is mounted and laminated, and the semiconductor chip 4 and the semiconductor chip 5 are bonded and fixed (step S105).

The adhesive 6 serves both for protecting the surface of the pellet and for bonding. In this case, the adhesive 6 is also used.
Are polyimide-based, epoxy-based, acrylic-based, or mixtures thereof, and may be of any type such as thermoplasticity and thermosetting. Thereby, the resin material can be omitted and the process can be simplified.

Then, in the bonding step, FIG.
As shown in FIG. 5, the electrodes 4a of the semiconductor chip 4 and the predetermined bonding electrodes 2a of the printed wiring board 2 are bonded by the bonding wires 8 (step S10).
6).

When the bonding by the bonding wire 8 is completed, the predetermined bonding electrode 2a of the printed wiring board 2 and the electrode 5a of the semiconductor chip 5 are bonded by the bonding wire 9 (step S10).
7).

Then, the semiconductor chips 4 and 5, the periphery of the bonding electrode 2a of the printed wiring board 2, and the bonding wires 8 and 9 are sealed with a sealing resin 10 as shown in FIG. 8 (step S10).
8).

Thereafter, solder bumps 7 are respectively formed on the connection electrodes on the back surface of the resin-sealed printed wiring board 2 by, for example, a printing method or a transfer method (step S109), and the semiconductor device 1 shown in FIG. Is completed (step S110).

Thus, according to the first embodiment, since the resin layer interposed between the semiconductor chip 4 and the semiconductor chip 5 is only the adhesive 6, the reliability due to a decrease in the adhesiveness and the like is reduced. The reduction can be greatly reduced.

Further, since there is no restriction on the shape and type of the adhesive 6, the production efficiency can be improved while reducing the production cost.

(Second Embodiment) FIG. 10 is a sectional view of a semiconductor device according to a second embodiment of the present invention, and FIGS.
FIG. 19 is an explanatory view of a manufacturing process of the semiconductor device of FIG. 10;
11 is a flowchart of a manufacturing process of the semiconductor device of FIG.

In the second embodiment, the surface mount type CS
Semiconductor device 1a composed of BGA which is a kind of P
As shown in FIG. 10, a printed wiring board 2 provided with a bonding electrode 2a, an adhesive 3, a semiconductor chip 4 provided with an electrode 4a, a semiconductor chip 5 provided with an electrode 5a, an adhesive 6, a solder It is composed of a bump 7, bonding wires 8, 9 and a sealing resin 10,
The configuration is the same as that of the semiconductor device 1 of the first embodiment.

The differences from the semiconductor device 1 are as follows.
This is in the order of the manufacturing steps of the bonding step of the semiconductor chips 4 and 5 and the bonding step of the bonding wires 8 and 9, and that the adhesive 6 is also applied to the electrodes 4 a of the semiconductor chip 4.

Next, the manufacturing process of the semiconductor device 1a will be described with reference to FIGS. 10 and 11 and FIGS. 11 to 18 and the flowchart of FIG.

First, the printed wiring board 2 on which the semiconductor chip 4 on which the bonding electrode 2a is formed is mounted, the semiconductor chip 4 on which the electrode 4a is formed on the peripheral part, and the semiconductor chip 5 on which the electrode 5a is formed on the peripheral part. Each is prepared (step S201). Here, it is also assumed that the surface of the semiconductor chips 4 and 5 is not coated with any resin for protecting the surface.

Then, as shown in FIG. 11, a paste or film adhesive 3 is applied to the center of the printed wiring board 2 (step S202). Also in this case, the adhesive 3 may be a polyimide, an epoxy, an acrylic, or a mixture thereof, and may be of any type such as thermoplastic or thermosetting.

Thereafter, as shown in FIG. 12, the semiconductor chip 4 is mounted, and as shown in FIG. 13, the printed wiring board 2 and the semiconductor chip 4 are bonded and fixed (step S).
203).

Next, as shown in FIG. 14, the electrodes 4a of the semiconductor chip 4 and the predetermined bonding electrodes 2a of the printed wiring board 2 are bonded by bonding wires 8 (step S204).

Then, as shown in FIG. 15, a paste-like adhesive 6 is applied on the semiconductor chip 4 (step S205). Here, in the process of step 204, since the electrode 4a and the bonding electrode 2a have already been bonded by the bonding wire 8, the adhesive is applied to the entire surface of the semiconductor chip 4 including the electrode 4a.

Thereafter, as shown in FIG. 16, the semiconductor chips 5 are mounted and laminated, and the semiconductor chips 4 and 5 are bonded and fixed (step S206). The adhesive 6 serves both for protecting the surface of the pellet and for bonding, and also in this case, the adhesive 6 includes polyimide, epoxy, acrylic, or a mixture thereof,
The type thereof is not limited, such as thermoplasticity and thermosetting. Thereby, the resin material can be omitted and the process can be simplified.

Then, as shown in FIG. 17, the predetermined bonding electrode 2a of the printed wiring board 2 and the electrode 5a of the semiconductor chip 5 are bonded by the bonding wire 9 (step S207).

As shown in FIG. 18, the semiconductor chips 4 and 5, the periphery of the bonding electrode 2 a of the printed wiring board 2, and the bonding wires 8 and 9 are
The resin is sealed with 0 (step S208).

Thereafter, solder bumps 7 are respectively formed on the connection electrodes on the back surface of the printed wiring board 2 sealed with resin by, for example, a printing method or a transfer method (step S209), and the semiconductor device 1a shown in FIG. Is completed (step S210).

Thus, also in the second embodiment,
Since the adhesive layer 6 is the only resin layer interposed between the semiconductor chip 4 and the semiconductor chip 5, a decrease in reliability due to a decrease in adhesiveness or the like is significantly reduced, and the manufacturing cost is reduced. Efficiency can be improved.

After bonding with the bonding wire 8, the adhesive material 6 is applied.
Adhesion material does not protrude and contamination due to bleeding is eliminated, and high bondability can be secured.

Further, in the second embodiment, the case where the adhesive 6 is applied to the entire surface of the semiconductor chip 4 is described. However, after the bonding of the wire bonding 8, the adhesive 6 is applied to the surface of the semiconductor chip 4 except for the electrodes 4 a ( (FIG. 5).

Although the invention made by the inventor has been specifically described based on the embodiments of the present invention, the present invention is not limited to the above-described embodiments, and various modifications may be made without departing from the scope of the invention. Needless to say, it can be changed.

For example, according to the first and second embodiments, the surface protection resin is not applied to the surface of the upper semiconductor chip. However, as shown in FIG. 20, the semiconductor device 1 (, 1a The surface protection resin 11 may be applied to the surface of the uppermost semiconductor chip 5 in the step (1).

In the above-described embodiment, a semiconductor device having a stacked structure in which semiconductor chips are stacked in two stages has been described. However, even in a semiconductor device having a stacked structure in which semiconductor chips are stacked in three or more stages, the adhesive property can be improved. Can be greatly improved.

For example, three semiconductor chips 12 to 14
In the case of the semiconductor device 1b in which the semiconductor chip 1b is overlaid, as shown in FIG.
2 are bonded by an adhesive 16, and between the semiconductor chip 12 and the middle semiconductor chip 13, and between the semiconductor chip 13 and the uppermost semiconductor chip 14,
Adhesive material 17 that is used both for protecting the surface of the pellet and for bonding
18 respectively.

Here, the adhesives 17 and 18 are made of polyimide, epoxy, acrylic, or a mixture thereof, and may be of any type such as thermoplastic or thermosetting.

The electrodes 12a to 14a provided on the semiconductor chips 12 to 14 and the printed wiring board 1
5 are connected to the bonding electrodes 15a by wire bondings 19 to 21, respectively, and these are sealed by a sealing resin 22 to form a package. Further, a solder bump 23 is formed on the back surface of the printed wiring board 15.

As a result, the reliability of the semiconductor device 1b can be improved while omitting the resin material and simplifying the steps.

Further, in the first and second embodiments, the BGA type semiconductor device has been described. For example, as shown in FIG. 22, an SOP (Small Outli)
NePackage) type semiconductor device 1c or LOC (Lead On Chip) as shown in FIG.
Any type of package may be used as long as the semiconductor device has a stacked structure such as a semiconductor device 1d of a die type.

For example, an SOP type semiconductor device 1c shown in FIG. 22 has a structure in which leads 25 project from two sides of a package formed by a sealing resin 24, and the leads 25 are formed in a gull wing shape. I have.

Of the stacked semiconductor chips 26 and 27, the lower semiconductor chip 26 and the die pad 28 are adhered by an adhesive 29.
The upper semiconductor chip 27 is bonded to the upper semiconductor chip 27 by an adhesive 30 which is used both for protecting the surface of the pellet and for bonding.

The electrodes 26 a and 27 a formed on the semiconductor chips 26 and 27 are connected to the leads 25 by wire bondings 31 and 32, respectively.

Further, the semiconductor device 1d shown in FIG.
Of the two-stage semiconductor chips 33 and 34, the tip of the lead 35 is arranged above the lower semiconductor chip 33, and the electrodes 33 provided on the semiconductor chips 33 and 34 are formed.
a, 34a and the lead 35 are wire-bonded 36,
37 are respectively connected. Semiconductor chip 3
3 and 34 are adhered by an adhesive 38 which is used both for protection of the pellet surface and for adhesion. The leads 35 projecting from two side surfaces of the package formed by the sealing resin 39 are formed in a J-shape.

Also in this case, the adhesive 38 is made of polyimide, epoxy, acrylic, or a mixture thereof, and may be of any type such as thermoplastic or thermosetting.

[0067]

Advantageous effects obtained by typical ones of the inventions disclosed by the present application will be briefly described as follows.
It is as follows.

(1) Since the resin layer interposed between the first semiconductor chip and the second semiconductor chip is only the resin for adhesion protection, the package configuration is simplified and the reliability of the stacked structure semiconductor device is improved. Can be done.

(2) Since there is no need to limit the shape and type of the protective resin for adhesion, and the number of materials used can be reduced while simplifying the manufacturing process, the manufacturing cost of the semiconductor device can be reduced and the manufacturing efficiency can be improved. be able to.

[Brief description of the drawings]

FIG. 1 is a sectional view of a semiconductor device according to a first embodiment of the present invention;

FIG. 2 is an explanatory diagram of a manufacturing process in the semiconductor device of FIG. 1;

FIG. 3 is an explanatory view of the semiconductor device manufacturing process following FIG. 2;

FIG. 4 is an explanatory view of the semiconductor device manufacturing process following FIG. 3;

FIG. 5 is an explanatory view of the semiconductor device manufacturing process following FIG. 4;

FIG. 6 is an explanatory view of the manufacturing process of the semiconductor device, following FIG. 5;

FIG. 7 is an explanatory view of the semiconductor device manufacturing process following FIG. 6;

FIG. 8 is an explanatory view of the manufacturing process of the semiconductor device, following FIG. 7;

FIG. 9 is a flowchart of a manufacturing process of the semiconductor device of FIG. 1;

FIG. 10 is a sectional view of a semiconductor device according to a second embodiment of the present invention;

FIG. 11 is an explanatory diagram of a manufacturing process in the semiconductor device of FIG. 10;

FIG. 12 is an explanatory diagram of the semiconductor device manufacturing process following FIG. 11;

FIG. 13 is an explanatory view of the manufacturing process for the semiconductor device, following FIG. 12;

FIG. 14 is an explanatory view of the semiconductor device manufacturing process following FIG. 13;

FIG. 15 is an explanatory view of the semiconductor device manufacturing process following FIG. 14;

FIG. 16 is an explanatory diagram of the manufacturing process of the semiconductor device, following FIG. 15;

FIG. 17 is an explanatory view of the semiconductor device manufacturing process following FIG. 16;

FIG. 18 is an explanatory diagram of the manufacturing process for the semiconductor device, following FIG. 17;

FIG. 19 is a flowchart of a manufacturing process of the semiconductor device of FIG. 10;

FIG. 20 is a sectional view showing an example of a semiconductor device according to another embodiment of the present invention.

FIG. 21 is a sectional view showing another example of a semiconductor device according to another embodiment of the present invention.

FIG. 22 is a sectional view showing an example of a semiconductor device according to another embodiment of the present invention.

FIG. 23 is a sectional view showing another example of the semiconductor device according to another embodiment of the present invention;

[Explanation of symbols]

 Reference Signs List 1 semiconductor device 1a to 1d semiconductor device 2 printed wiring board 2a bonding electrode 3 adhesive 4 semiconductor chip (first semiconductor chip) 4a electrode (first electrode) 5 semiconductor chip (second semiconductor chip) 5a electrode (second Electrode) 6 adhesive (bonding protection resin) 7 solder bump 8 bonding wire (first wire) 9 bonding wire (second wire) 10 sealing resin 11 resin 12 semiconductor chip 12a electrode 13 semiconductor chip 13a electrode 14 semiconductor chip 14a Electrode 15 Printed circuit board 15a Bonding electrode 16 Adhesive material 17, 18 Adhesive material 19-21 Wire bonding 22 Sealing resin 23 Solder bump 24 Sealing resin 25 Lead 26 Semiconductor chip 26a Electrode 27 Semiconductor chip 27a Electrode 28 Die pad 29 Adhesive 0 adhesive 31,32 wire bonding 33 semiconductor chips 33a electrode 34 semiconductor chips 34a electrodes 35 lead 36, 37 the wire bonding 38 adhesive 39 sealing resin

Continuing on the front page (72) Inventor Takafumi Nishida 5-2-2-1, Kamimizuhoncho, Kodaira-shi, Tokyo Inside Hitachi Super LSI Systems Co., Ltd. (72) Inventor Masaru Yamada, Kodaira-shi, Tokyo 5-22-1, Mizumotocho Within Hitachi Ultra-LII Systems, Ltd. (72) Inventor Hiroshi Ono 5-2-21-1 Kamimizu-Honcho, Kodaira-shi, Tokyo Hitachi, Ltd.・ I-Systems Inc. (72) Inventor Tsuyoshi Kaneda 5-2-2-1, Kamimizuhoncho, Kodaira-shi, Tokyo Hitachi, Ltd. In-System Hitachi Ltd. (72) Inventor Masanori Shibamoto Kodaira, Tokyo Hitachi, Ltd. Semiconductor Group

Claims (1)

[Claims] A step of preparing a first semiconductor chip provided with a first electrode formed near an outer peripheral portion and connected to an internal circuit via an internal wiring and not subjected to surface protection by a protective material; Preparing a second semiconductor chip formed in the vicinity of the peripheral portion and provided with a second electrode connected to an internal circuit via an internal wiring; and providing a printed wiring board on which the first semiconductor chip is mounted. A step of preparing; a step of mounting the first semiconductor chip on the printed wiring board; and a step of bonding and fixing the same via an adhesive; and a step of bonding and protecting the surface of the first semiconductor chip. Applying a resin for application, laminating the second semiconductor chip via the adhesive protection resin, and bonding and fixing the first semiconductor chip; and a first electrode of the first semiconductor chip and a second electrode of the second semiconductor chip. Two electrodes and front Printed wiring bonding the electrode first substrate formed, a method of manufacturing a semiconductor device characterized by having a step of connecting each of the second wire.