JP2002221734A - Plane display unit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a plane display unit to attain further thinning. SOLUTION: In the plane display unit, a tubular light source 811 is disposed on one end face of a thick part 821A of a light guide plate 821, and a driving circuit board 500 is disposed along an end face orthogonal to one end face of the light guide plate 821. The thinning of the unit is not prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flat display device, and more particularly to a structure of a flat display device which can be made thin.

[0002]

2. Description of the Related Art A flat display device represented by a liquid crystal display device has been used in various fields by utilizing its features of light weight, thinness, and low power consumption. Among them, liquid crystal display devices are frequently used in portable information devices represented by personal computers.

In recent years, such liquid crystal display devices have been required to be further reduced in thickness.

[0004]

In order to satisfy such a demand, an external circuit is reduced by integrally forming a drive circuit on one of the substrates constituting the liquid crystal display device, thereby reducing the thickness of the liquid crystal display device. Attempts have been made to achieve this.

[0005] However, even in such a configuration, it has not been possible to completely integrate the external circuits, and at present it is necessary to provide some external circuits.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a flat display device which can achieve a further reduction in thickness.

[0007]

According to a first aspect of the present invention, there is provided a flat display device comprising: an electrode substrate including a plurality of horizontal pixel lines on which a plurality of display pixels are arranged; A surface light source unit including a display panel, a substantially rectangular light guide plate disposed on the back side of the display panel and having one end face as a light incident end face, and a tubular light source disposed opposite the incident end face of the light guide plate. And a drive circuit disposed on one side end surface side of the light guide plate adjacent to the incident end surface and arranged substantially parallel to the electrode substrate of the display panel and supplying a drive signal to the electrode substrate. Board and
A connection portion for electrically connecting the electrode substrate and the drive circuit board, the electrode substrate of the display panel,
A driving circuit unit that drives a pixel electrode provided for each of the display pixels, wherein the connection unit electrically connects to the electrode substrate on an edge side of the electrode substrate corresponding to the one side end surface of the light guide plate; It is characterized by being electrically connected.

According to the flat display device of the present invention, the drive circuit board is arranged along the end face of the wedge-shaped light guide plate, so that the thinning of the device is not hindered. Further, since a part of the drive circuit is formed integrally on the electrode substrate of the display panel, the circuit substrate area can be reduced, so that the frame size is not significantly reduced.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an embodiment of the flat panel display according to the present invention will be described with reference to the drawings.

An embodiment of the flat panel display according to the present invention will be described below with reference to the drawings.

As shown in FIGS. 1 and 2, the liquid crystal display device 1 includes a liquid crystal panel 100 and the liquid crystal panel 100.
A driving circuit board 500 for supplying a driving signal to the liquid crystal panel 100, a surface light source unit 800 disposed on the back side of the liquid crystal panel 100, and a bezel 900 for holding the liquid crystal panel 100 between the surface light source unit 800. Then, the liquid crystal panel 100 and the drive circuit board 500 are electrically connected via the flexible wiring board 950.

More specifically, this liquid crystal panel 100
As shown in FIG. 4, an effective display area 102 conforming to the XGA specification and having a display pixel of (1024 × 3) × 800 with a diagonal size of 12.1 inches is included. The liquid crystal panel 100
Array substrate 200, counter substrate 400, array substrate 2
TN (twisted nematic) liquid crystal layer 4 held between alignment layer 00 and counter substrate 400 via an alignment film, respectively.
10 is included.

The array substrate 200 is composed of 1024 × 3 signal lines Xi (i = 1) arranged in a matrix on a transparent insulating substrate 201 made of glass and having a thickness of 0.5 mm in order to achieve further reduction in thickness. , 2, ..., 1024 x 3) and 8
A switching element 211 composed of 00 scanning lines Yj (j = 1, 2,..., 800), a thin film transistor or a TFT disposed near the intersection of the signal line Xi and the scanning line Yj, and a switching element 211 Pixel electrode 2 to be connected
13 is provided.

The switch element 211 includes a polycrystalline silicon film having a channel region 212c and a source region 212s and a drain region 212d interposed between the channel region 212c, that is, a p-Si film;
A gate insulating film 21 on the channel region 212c of the Si film;
4 and a gate electrode 215 electrically connected to the scanning line, and a source electrode 21 connected to the source region 212s and the drain region 212d, respectively.
6s and the drain electrode 216d.

The gate electrode 215 is connected to the scanning line Yj, the drain electrode 216d is connected to the signal line Xj, and the source electrode 216s is connected to the pixel electrode 213.

The pixel electrode 213 includes a transparent conductive member,
For example, an interlayer insulating film 217 and a passivation film 21 which are formed of ITO and are sequentially stacked on the TFT 211
8 and are disposed on the color filter layer CF. The interlayer insulating film 217 and the passivation film 218 are formed of silicon nitride. The pixel electrode 213 is covered with an alignment film 219 disposed over the entire effective display area 102.

The counter substrate 400 is made of glass
A counter electrode 403 facing the pixel electrode 213 is provided on a transparent insulating substrate 401 having a thickness of mm. The counter electrode 403 is formed of a transparent conductive member, for example, ITO, and is formed of an alignment film 4 disposed on the entire effective display area 102.
05.

Outer surface of array substrate 200 and counter substrate 40
A pair of polarizing plates 220 and 407 whose polarization directions are set in accordance with the characteristics of the liquid crystal layer 410 are provided on the outer surface of the liquid crystal layer 410.

Inside effective display area 102 and effective display area 1
02, a resin spacer 1 for forming a predetermined gap between the array substrate 200 and the counter substrate 400 is formed.
04 is arranged.

The array substrate 200 and the counter substrate 400 are
In a state where a predetermined gap is formed by the spacer 104, they are bonded by the sealant 106.

In the peripheral area of the effective display area 102, an integrated drive circuit section 110 is arranged.

That is, scanning line driving circuits 251 and 253 for supplying scanning pulses are provided at both ends of the scanning line Yj.
Is arranged. These scanning line driving circuits 251, 2
A shift register 53 sequentially transfers and outputs the vertical start pulse STV based on the vertical clock signal CPV.

On one end of the signal line Xi, a pair of signal line drive circuit units 261 and 263 are arranged. Since the configurations are substantially the same, the configuration of the signal line driver circuit portion 261 will be described here.

The signal line drive circuit section 261 includes a shift register 271 for sequentially transferring and outputting a horizontal start pulse STH based on a horizontal clock signal CPH. The output of the shift register 271 is guided to the logic circuit unit 281. Further, based on the output of the logic circuit unit 281, the analog sampling unit 291 samples predetermined analog video signals Video (+) and Video (-), and outputs them to the corresponding signal lines Xi.

The logic circuit unit 281 includes a set of OR gates 2
83, 285, a NAND gate 287, and a NOR gate 289.

The OR gate 283 is connected to a selection wiring to which the selection signal SW is supplied, and is connected to a first output terminal of the shift register 271 via an inverter circuit 284. The OR gate 285 is connected to a selection wiring to which the selection signal SW is supplied, and is also connected to a first output terminal of the shift register 271.

The OR gate 283 performs sampling of the positive-phase analog video signal Video (+) based on the selection signal SW and the signal output from the first output terminal.
A signal for controlling the gate of the pattern sampling TFT 293 is output. The OR gate 285 outputs a negative-phase analog video signal Video based on the selection signal SW and a signal output from the first output terminal via the inverter circuit 284.
N-type sampling TFT for sampling (-)
295 to output a signal for controlling the gate.

The NAND gate 287 is connected to a selection line to which the selection signal SW is supplied, and is also connected to a second output terminal of the shift register 271. NO
The R gate 289 is connected to a selection wiring to which the selection signal SW is supplied, and is connected to a second output terminal of the shift register 271 via an inverter circuit 288.

The NAND gate 287 performs sampling of the positive-phase analog video signal Video (+) based on the selection signal SW and the output signal from the second output terminal.
A signal for controlling the gate of the pattern sampling TFT 293 is output. The NOR gate 289 receives the negative-phase analog video signal Video based on the selection signal SW and the output signal from the second output terminal via the inverter circuit 288.
N-type sampling TFT for sampling (-)
295 to output a signal for controlling the gate.

According to the above configuration, since the analog video signal Video supplied from the outside can be separated into at least a positive phase and a negative phase and wired on the substrate, power consumption can be reduced, and the waveform of the analog video signal Video can be further reduced. There is no deterioration. In this embodiment, the pair of signal line drive circuits 261 and 263 are arranged so as to divide the signal line Xi into two in order to shorten the wiring length for transmitting the analog video signal Video on the substrate. In addition, this is because the respective processing times are set to be substantially long by operating them in parallel. Here, it is divided into two, but it can be set to three or more.

Further, with the above configuration, the analog video signal Video can be wired on the substrate while being separated into a positive phase and a negative phase, and the polarity can be inverted for each adjacent signal line Xi. Thereby, flicker can also be reduced.

A digital video signal Video and a system clock signal CK are externally input to a driving circuit board 500 for driving the liquid crystal panel 100. The control circuit G / A 511 controls the digital video signal V
The video is distributed to the positive and negative digital / analog conversion circuits 521 and 523 based on the system clock signal CK.

The positive digital / analog conversion circuit 521
Divides the distributed digital video signal Video from 5 to 1
The signal is converted to a positive-phase analog video signal Video (+) in the range of 0V. Negative digital / analog conversion circuit 523
Indicates that the distributed digital video signal Video is 0 to 5
The signal is converted into a negative-phase analog video signal Video (-) in the range of V. Then, in the distribution circuit 531, the outputs of the positive-side digital / analog conversion circuit 521 and the negative-side digital / analog conversion circuit 523 are guided to the positive and negative phase transmission lines, respectively.

In this embodiment, in order to achieve a reduction in the thickness of the device, an IVH
A substrate 551 having an (Interstitial Via Hole) structure is used. The control circuit G / A 511 and the digital / analog conversion circuits 521 and 523
(Chip Size Package) structure is used.

As shown in FIG. 5, a substrate 551 having an IVH structure has a plurality of layers of copper foils 561, 563, 565, 567,
569 are laminated via insulating materials 571, 572, 573, and 574, and the copper paste 561,.
583, 585, 587 are electrically connected. Therefore, the mounting density can be increased.

The CSP structure has a structure as shown in FIG.
A substrate on which a semiconductor chip is mounted face-up or face-down is connected by bumps formed of solder balls or the like. The size can be sufficiently reduced, and narrow-pitch connection is possible.

Further, in this embodiment, as shown in FIG. 5, C is used to further reduce the size and thickness.
The control circuit G / A 511 having the SP structure is connected to the substrate 5
The copper foil 56 of the inner phase is embedded in a groove 591 provided in
3 is electrically connected.

In this embodiment, as shown in FIG. 1 and FIG. 2, the tubular light source 811 of the surface light source section 800 is connected to one end face of the liquid crystal panel 100 in the short direction, that is, one side of the scanning line driving circuit 253 side. It is arranged along the end face.

On the back side of the liquid crystal panel 100, a light guide plate 821 of the surface light source unit 800 held by the frame 831 is arranged. This light guide plate 821 has a thickness of about 2.0 m.
m thick portion 821A and a thin portion 8 having a thickness of about 0.8 mm
21B is formed of a wedge-shaped acrylic resin. The tubular light source 811 is disposed on one end surface of the thick portion 821A of the light guide plate 821.

The drive circuit board 500 is a liquid crystal panel 100
Are disposed close to the signal line drive circuits 261 and 263 in the longitudinal direction. That is, the drive circuit board 500
As shown in FIGS. 1 and 2, the light guide plate 821 is arranged along an end surface orthogonal to one end surface 821C (where the tubular light source 811 is arranged). In this embodiment, the circuit board 500 is provided with the signal line driving circuit 26 of the liquid crystal panel 100.
It is arranged along the outer circumference of the end surface on the side of 1, 263.

Light emitted from the tubular light source 811 enters from the incident end face 821C of the light guide plate 821 on the side of the thick portion 821A, and propagates inside the light guide plate 821. On the back surface of the light guide plate 821, a reflection sheet (not shown) is disposed, and the light guide plate 8
The light leaking from 21 to the back surface is reflected again toward the light guide plate 821. The light that has propagated through the entire light guide plate 821 is emitted from the emission surface 821D facing the liquid crystal panel 100. Light emitted from the emission surface 821D is given predetermined optical characteristics by an optical sheet, for example, a diffusion sheet or a prism sheet, interposed between the light guide plate 821 and the liquid crystal panel 100. Incident on the side.

Light incident on the liquid crystal panel 200 is modulated by the liquid crystal layer 410 controlled by an electric field between the pixel electrode 213 and the counter electrode 403, and is selectively transmitted for each display pixel to form a display image. .

As described above, in the liquid crystal display device 1 of this embodiment, a part of the drive circuit is integrally formed on the array substrate 200. Therefore, the external circuit scale can be reduced as compared with the conventional case. Moreover, the substrate 51 having the IVH structure
1 and the CSP structure are effectively combined, so that the circuit board 500 can be reduced in size and thickness.

Further, in this embodiment, the drive circuit board 500 that achieves such miniaturization and thinning is mounted in the longitudinal direction of the liquid crystal panel 100, that is, the signal line drive circuit 261,
263 side. For this reason, the thickness of the entire apparatus can be sufficiently reduced.

Further, the circuit board 500 is disposed along the longitudinal direction of the light guide plate 821 so as to follow the wedge-shaped shape of the light guide plate 821.
1 is arranged on the side of the thick portion 821 </ b> A, and a component having a relatively small thickness is arranged on the side of the thin portion 821 </ b> B of the light guide plate 821. Since the thickness of the circuit board 500 is smaller than the sum of the thickness of the liquid crystal panel 100 and the thickness of the light guide plate 821 at each of the opposing portions, the arrangement of the drive circuit board 500 does not increase the overall thickness of the device.

In this embodiment, since the drive circuit board 500 is arranged in the longitudinal direction of the liquid crystal panel 100, that is, along the signal line drive circuit 261 side, the wiring length by the flexible wiring board 950 is shortened. It becomes possible. Therefore, the influence of the unnecessary radiation can be significantly reduced.

In this embodiment, the circuit board 500 is arranged along the outer periphery of the end face of the liquid crystal panel 100 on the signal line drive circuit 261 side.
It may be arranged so as to overlap the thin portion 821B. That is, as shown in FIGS. 6 and 7, the thickness of the circuit board 500 is smaller than the difference in thickness between the thick portion 821A and the thin portion 821B of the light guide plate 821. Therefore, by disposing the circuit board 500 below the thin portion 821B along the longitudinal direction of the light guide plate 821, the liquid crystal display device 1 can be formed extremely thin, and the frame width can be reduced. Become.

Although the above embodiment has been described with reference to a liquid crystal display device as an example, other display panels can be used.

[0049]

As described above, according to the present invention, it is possible to provide a very thin display device even if the drive circuit is not completely integrated on the substrate constituting the display device. Becomes

[Brief description of the drawings]

FIG. 1 is a schematic perspective view of a liquid crystal display device according to an embodiment of the flat panel display device of the present invention.

FIG. 2 is a schematic sectional view of the liquid crystal display device shown in FIG. 1 taken along the line II-II.

FIG. 3 is a schematic sectional view of a liquid crystal panel applied to the liquid crystal display device shown in FIG.

FIG. 4 is a diagram showing an equivalent circuit of the liquid crystal display device shown in FIG.

FIG. 5 is a schematic sectional view of a circuit board applied to the liquid crystal display device shown in FIG.

FIG. 6 is a schematic perspective view of a liquid crystal display device according to another embodiment of the flat panel display device of the present invention.

FIG. 7 is a sectional view of the liquid crystal display device shown in FIG.
It is the schematic sectional drawing cut | disconnected along the line.

[Explanation of symbols]

 Reference Signs List 100 liquid crystal panel 102 effective display area 200 array substrate 400 counter substrate 410 TN liquid crystal layer 500 driving circuit board 800 surface light source unit 950 flexible wiring board

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G09F 9/30 338 G09F 9/30 338 (72) Inventor Tetsuya Murai 1-9-9 Hara-cho, Fukaya-shi, Saitama No. 2 In the Toshiba Fukaya Plant (72) Inventor Tomio Makino 7-1 Nisshincho, Kawasaki-ku, Kawasaki-shi, Kanagawa F-term in Toshiba Electronics Engineering Co., Ltd. (Reference) 2H092 GA33 GA40 GA59 JA24 NA25 PA06 PA13 QA07 5C094 AA15 BA03 BA43 CA19 DA09 DA14 DA15 DB01 DB02 DB04 DB05 EA04 EA05 EA07 EB02 ED01 5G435 AA18 BB12 BB15 EE03 EE13 EE27 EE33 EE36 EE37 EE40 EE47 FF03 FF06 FF08 GG03 GG24

Claims (7)

[Claims] A display panel provided with an electrode substrate including a plurality of horizontal pixel lines in which a plurality of display pixels are arranged; and a substantially rectangular shape disposed on the back side of the display panel and having one end face as a light incident end face. A surface light source unit including a light guide plate and a tubular light source arranged to face the incident end surface of the light guide plate; and the electrode of the display panel arranged on one side end surface side of the light guide plate adjacent to the incident end surface. A drive circuit board arranged substantially parallel to the board and supplying a drive signal to the electrode board; and a connection unit for electrically connecting the electrode board and the drive circuit board; The electrode substrate of the panel includes a drive circuit unit that drives a pixel electrode provided for each of the display pixels, and the connection unit includes an edge of the electrode substrate corresponding to the one side end surface of the light guide plate. At the electrode base Flat display device characterized by being electrically connected to the. 2. An electrode substrate comprising: a plurality of signal lines and scanning lines substantially orthogonal to each other; and a pixel electrode arranged via a switching element arranged near an intersection of the signal line and the scanning line. The flat panel display according to claim 1, comprising: 3. The device according to claim 2, wherein the electrode substrate includes a scanning line driving circuit connected to the scanning line, and a signal line driving circuit connected to the signal line. Flat panel display. 4. The flat display device according to claim 3, wherein the signal line drive circuit section is arranged along the edge of the electrode substrate. 5. The flat display device according to claim 3, wherein the signal line drive circuit section and the switch element are constituted by thin film transistors including a polycrystalline silicon film. 6. The flat display device according to claim 3, wherein the signal line drive circuit section includes a plurality of signal line drive circuit blocks operating in parallel with each other. 7. A signal line driving circuit section, comprising: a shift register; a video bus line for supplying a video signal; and sampling the video signal supplied to the video bus line based on an output of the shift register, and sampling the video signal. The flat panel display according to claim 3, further comprising: a sampling circuit that outputs the signal to a signal line.