JP2002217329A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device in which ooze-out of solder due to thermal stress and malfunction caused by ooze-out of solder are suppressed. SOLUTION: The semiconductor device comprises a semiconductor chip 1, an interposer electrode 3 being connected with the semiconductor chip 1 through solder bumps 2, and an interposer substrate 4 having external terminals wherein these semiconductor chip 1 and interposer electrode 3 are resin sealed on the interposer substrate 4 and the interposer electrode 3 is provided with vacant holes 11.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device,
In particular, the present invention relates to a semiconductor device having a structure in which a semiconductor chip and external terminals are connected via solder bumps inside a package of the semiconductor device.

[0002]

2. Description of the Related Art FIG. 4 is a diagram showing a structure of a conventional semiconductor device. This semiconductor device has a structure in which a semiconductor chip and external terminals are connected using solder bumps inside a package. As shown in FIG.
The semiconductor chip 1 is connected to the interposer electrode 3 via the internal solder bump 2, and a layer of a solder resist 6 for ensuring insulation between the electrodes is provided around a connection portion between the internal solder bump 2 and the interposer electrode 3. Have been. The semiconductor chip 1, the internal solder bumps 2 and the interposer electrodes 3 are sealed on the interposer substrate 4 by a mold resin 5. A semiconductor chip 1 in a semiconductor device includes an internal solder bump 2, an interposer electrode 3, and a solder ball 7.
Exchanges signals with an external circuit board via the.

FIG. 5 is a diagram for explaining an assembling process of such a semiconductor device. First, the interposer electrode 3 and the solder resist 6 are disposed on the interposer substrate 4 so as to cover the interposer electrode 3 (see FIG. 5A). Then, the semiconductor chip 1 is attached to them, and at this time, the semiconductor chip 1 is
(See FIG. 5B). Thereafter, the semiconductor chip 1 and the like provided on the interposer substrate 4 are sealed with a mold resin 5 (see FIG. 5C). Finally, solder balls 7 are attached as external terminals below the interposer substrate 4 (see FIG. 5D). FIG. 6 shows a cross section of a portion near the internal solder bump 2 of the semiconductor device configured as described above.

[0004]

As shown in FIG. 6, in the case of a semiconductor device having a structure in which a solder bump is provided inside a package and a semiconductor chip and an external terminal of the semiconductor are connected via the solder bump, When solder balls are attached to the outside of the device or when the semiconductor device is bonded to a substrate and mounted, the device receives a thermal stress exceeding 230 degrees.

When a semiconductor device receives this thermal stress,
Internal solder bumps expand and generate stress. When the stress is applied to the interface between the solder resist and the mold resin, peeling may occur, and a phenomenon may occur in which molten solder leaks out toward the adjacent solder bumps through the interface where the peeling has occurred. This seepage phenomenon may cause a short circuit between the adjacent solder bumps due to the molten solder, which may cause a malfunction of the semiconductor device.

More specifically, when a semiconductor device receives a thermal stress during mounting or the like, the internal solder bumps 2 expand and generate stress. When the stress is applied to the interface between the mold resin 5 and the solder resist 6, peeling occurs at the interface between the mold resin 5 and the solder resist 6.
For example, as shown in FIG. 7, peeling 2c occurs at the interface between the mold resin 5 and the solder resist 6. When peeling occurs, the molten solder of the solder bump adjacent to the peeled portion through the interface leaks out. That is, as shown in FIG. 8, the solder component 2d of the internal bump 2 oozes into the peeled portion.
Due to the seepage phenomenon, as shown in FIG. 9, a short circuit occurs between the adjacent solder bumps via the molten solder 2e, thereby causing a malfunction of the semiconductor device.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to suppress the occurrence of solder bleeding phenomenon due to thermal stress and the occurrence of a malfunction of a semiconductor device caused by the bleeding phenomenon. It is to provide a device.

[0008]

A first semiconductor device according to the present invention comprises a semiconductor element, an internal electrode connected to the semiconductor element via a solder bump, and an external terminal electrically connected to the internal electrode. Wherein the semiconductor element and the internal electrode are sealed on the substrate with a resin, and a hole is provided in the internal electrode.

A second semiconductor device according to the present invention has a semiconductor element, an internal electrode connected to the semiconductor element via a solder bump, and a substrate having an external terminal electrically connected to the internal electrode. The semiconductor element and the internal electrode are sealed on the substrate with resin, and a solder resist is arranged around a connection portion between the semiconductor element and the solder bump, and the solder resist has a recess.

A third semiconductor device according to the present invention includes a semiconductor element, an internal electrode connected to the semiconductor element via a solder bump, and a substrate having external terminals electrically connected to the internal electrode. Then, the semiconductor element and the internal electrode are sealed on the substrate with a resin, a solder resist is arranged around a connection portion between the semiconductor element and the solder bump, and the solder resist has a projection.

[0011]

Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

Embodiment 1 FIG. 1A is a sectional view of an embodiment of a semiconductor device according to the present invention. In the semiconductor device shown in FIG. 1, a semiconductor chip 1 is connected to an interposer electrode 3 via an internal solder bump 2,
Solder resist 6 is arranged around the connection portion between the interposer electrode 3 and the interposer substrate 3.
Implemented above. The semiconductor chip 1, the internal solder bumps 2, the interposer electrodes 3, and the solder resist 6 are sealed on the interposer substrate 4 with a mold resin 5. In these respects, the semiconductor device of the present embodiment has the same overall configuration as the conventional semiconductor device shown in FIG. However, the semiconductor device of the present embodiment is significantly different from the conventional semiconductor device in that the holes 11 are provided in the interposer electrode 3. The holes 11 are provided on the interposer electrode 3 by etching or laser processing. The interposer substrate 4 has external terminals such as the solder balls 7 shown in FIG.

By providing the holes 11 on the interposer electrode 3 as described above, even if the solder bump expands due to thermal stress, as shown in FIG. Enters the hole 11. Therefore, it is possible to prevent the solder expanded due to the thermal stress from seeping out to the adjacent solder bump. This can prevent a short circuit between the solder bumps and a malfunction of the semiconductor device.

Embodiment 2 FIG. FIG. 2A is a sectional view of another embodiment of the semiconductor device according to the present invention. The semiconductor device of the present embodiment has substantially the same configuration as the semiconductor device of the first embodiment, except that a recess 9 is provided on the solder resist 6. The recess 9 is provided on the solder resist 6 by etching or laser processing. In the semiconductor device of this embodiment, no holes are provided in the interposer substrate 4, but holes may be provided in the interposer substrate 4 as in the first embodiment.

By providing the recess 9 on the solder resist 6 in this manner, even if the solder bump expands due to thermal stress, the expanded portion 2a of the solder bump as shown in FIG. Enters the recess 9. For this reason, it is possible to prevent the solder expanded due to the thermal stress from seeping out to the adjacent solder bumps, and it is possible to prevent a short circuit between the solder bumps and a malfunction of the semiconductor device.

Embodiment 3 FIG. 3A is a sectional view of still another embodiment of the semiconductor device according to the present invention. In the semiconductor device of the second embodiment, the recess is provided on the solder resist 6, but in the semiconductor device of the present embodiment, the projection 13 is provided instead. The protrusion 13 is provided on the solder resist 6 by an etching process.

As described above, the projection 1 is formed on the solder resist 6.
By providing the solder bump 3, as shown in FIG. 3 (b), even when the portion 2 b where the solder bump has expanded due to the thermal stress leaks out to the interface between the mold resin 5 and the solder resist 6, The expanded portion 2b of the protrusion 13
, The molten solder is prevented from traveling in the direction of the adjacent solder bumps. Therefore, it is possible to suppress the exudation to the adjacent solder bumps, and it is possible to prevent a short circuit between the solder bumps and a malfunction of the semiconductor device.

As described above, the semiconductor device shown in the above embodiment can prevent a short circuit between solder bumps due to thermal stress and a malfunction of the semiconductor device.

[0019]

According to the first semiconductor device of the present invention, since the holes are provided on the internal substrate in contact with the solder bumps, even if the solder bumps expand due to thermal stress, the expanded solder has holes. To get in and stop the progress,
Short circuit between solder bumps can be prevented.

According to the second semiconductor device of the present invention, by providing the concave portion on the solder register, even if the solder bump expands due to the thermal stress, the expanded solder enters the concave portion, and the progress is caused by the concave portion. Since this is prevented, a short circuit between the solder bumps can be prevented.

According to the third semiconductor device of the present invention, since the protrusion is provided on the solder register, even if the solder bump expands due to thermal stress, the progress of the expanded solder is blocked by the protrusion. Therefore, a short circuit between the solder bumps can be prevented.

[Brief description of the drawings]

FIG. 1 is a partial cross-sectional view of one embodiment of a semiconductor device according to the present invention.

FIG. 2 is a partial cross-sectional view of another embodiment of the semiconductor device according to the present invention.

FIG. 3 is a partial cross-sectional view of still another embodiment of the semiconductor device according to the present invention.

FIG. 4 is a cross-sectional view of a conventional semiconductor device.

FIG. 5 is a diagram illustrating a manufacturing process of a conventional semiconductor device.

FIG. 6 is a partial cross-sectional view of a conventional semiconductor device.

FIG. 7 is a diagram illustrating peeling of a solder bump due to thermal stress in a conventional semiconductor device.

FIG. 8 is a diagram illustrating the exudation of solder bumps due to thermal stress in a conventional semiconductor device.

FIG. 9 is a diagram illustrating a short circuit between solder bumps due to thermal stress in a conventional semiconductor device.

[Explanation of symbols]

1 semiconductor chip, 2 internal solder bump, 3 interposer electrode, 4 interposer board, 5 mold resin, 6 solder resist, 7 solder ball,
9 Solder resist recess, 11 Interposer electrode void, 13 Solder resist protrusion.

Claims (3)

[Claims] 1. A semiconductor device comprising: a semiconductor element; an internal electrode connected to the semiconductor element via a solder bump; and a substrate having an external terminal electrically connected to the internal electrode. A semiconductor device, wherein an internal electrode is sealed on the substrate with a resin, and a hole is provided in the internal electrode. 2. A semiconductor device comprising: a semiconductor element; an internal electrode connected to the semiconductor element via solder bumps; and a substrate having an external terminal electrically connected to the internal electrode. A semiconductor device, wherein an internal electrode is sealed on the substrate with a resin, a solder resist is disposed around a connection portion between the semiconductor element and the solder bump, and a concave portion is provided in the solder resist. . 3. A semiconductor device comprising: a semiconductor element; an internal electrode connected to the semiconductor element via solder bumps; and a substrate having an external terminal electrically connected to the internal electrode. A semiconductor, wherein an internal electrode is sealed with a resin on the substrate, a solder resist is disposed around a connection portion between the semiconductor element and the solder bump, and a protrusion is provided on the solder resist. apparatus.