JP2002207527A - Clock signal circuit and electronic device-mounted equipment mounted with the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a clock signal circuit capable of sufficiently suppressing harmonics of a clock signal by a spread-spectrum function to reduce the harmonics below a noise level, and provide an electronic device-mounted equipment mounted with the clock signal circuit. SOLUTION: The clock signal circuit has at least a reference oscillator 1 oscillating a reference clock; a phase comparator 2 comparing phases of two signals and sending a signal according to a phase difference; a low pass filter 3 passing a signal in a low-frequency band; a modulator 4 performing a spread spectrum of an input signal; a voltage control oscillator 7 whose oscillation frequency is controlled by an application voltage; and a divider 5 dividing the signal from the voltage control oscillator 7. A harmonic wave filter 6 suppressing the harmonic signal of the reference oscillator 1 is set in at least one position along a signal transmission route of the clock signal circuit, e.g. between the modulator 4 and the voltage control oscillator 7, to prevent application of the harmonic signal of the reference oscillator 1 to a voltage control terminal of the voltage control oscillator 7.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a clock signal circuit and an electronic device mounted with the clock signal circuit, and more particularly to a clock signal circuit comprising a phase locked oscillator with a spread spectrum function and the clock signal circuit. The present invention relates to an electronic device mounted device.

[0002]

2. Description of the Related Art The radiation noise level of electronic equipment such as personal computers and information processing equipment of workstations is lower than a specified value so that noise radiated from the equipment does not cause malfunction of other equipment. Standards are defined as follows. On the other hand, a device equipped with an electronic device is equipped with a clock signal circuit to achieve synchronous operation with internal and external circuits, and the clock signal harmonics from this clock signal circuit cause noise emission from the device. It has become.

[0003] As a measure for suppressing the clock signal harmonic level, in recent years, devices equipped with electronic devices using a phase locked oscillator having a spread spectrum function as a clock signal circuit have been increasing. An electronic device mounted device using the phase locked oscillator with a spread spectrum function as a clock signal circuit will be described with reference to FIGS.

FIG. 7 is a block diagram showing a conventional phase locked oscillator with a spread spectrum function, which is a clock signal circuit of an electronic device. In the figure, a phase locked oscillator includes a reference oscillator 71, a phase comparator 7
2. It comprises a low-pass filter 73, a modulator 74, a frequency divider 75, and a voltage-controlled oscillator 76.

The oscillation signal generated by the voltage controlled oscillator 76 is divided by the divider 75. The phase of the divided signal and the oscillation signal of the reference oscillator 71 are compared by the phase comparator 72. A voltage corresponding to the phase difference is output from the phase comparator 72.

The output phase difference voltage is applied to a voltage control unit of a voltage controlled oscillator 76 via a low pass filter 73 and a modulator 74 having a function of determining a control range of phase synchronization. The voltage controlled oscillator 76 is controlled by the applied voltage.
The oscillation frequency of the phase-locked oscillator changes, and the phase of the phase-locked oscillator is synchronized. Then, a phase-locked oscillation signal synchronized with the stability of the reference oscillator 71 is output from the output terminal 77.

FIG. 8 shows an output signal spectrum of a 50 MHz phase locked oscillator. In the figure, it can be seen that a dotted spectrum 81 is a phase-locked oscillation signal, which is a stable signal having no spectrum spread in a sideband.

FIG. 9 shows output signal harmonic characteristics of the phase locked oscillator. In the figure, the dotted spectrum is the harmonic spectrum of the phase-locked oscillation signal. This harmonic becomes a radiation noise factor of the electronic device mounted device, and there is a problem that it cannot be suppressed below a specified noise level.

In order to solve this problem, a modulator 7 is provided between the low-pass filter 73 and the voltage-controlled oscillator 76 shown in FIG.
4 and the modulation signal is input from the modulation input terminal 78, the voltage applied to the voltage control unit of the voltage control oscillator 76 is changed, and the voltage control oscillator
6, there is a method of applying a spread spectrum function in which the oscillation signal changes.

The spectrum shown by the solid line in FIG.
Modulated signal spectrum 8 with 2.5% frequency modulation
2, which shows that the peak power is reduced by about 7 dB due to the modulation when comparing the spectrum 81 that does not perform modulation with the spectrum 82 of the modulation signal.

The harmonic spectrum shown by the solid line in FIG. 9 is a harmonic spectrum of a modulated signal obtained by performing modulation of ± 2.5%.

[0012]

However, as compared with the harmonic spectrum without modulation, the higher-order harmonic spectrum of the modulated signal shown in FIG. I understand.

FIG. 10 shows a 650 MHz spectrum of the 13th harmonic of the output signal of the modulated 50 MHz phase locked oscillator. In the figure, the frequency modulation of the modulation width 101 can be confirmed. In addition, the spectrum 102 that is not modulated can be confirmed. This is an oscillation signal harmonic of the reference oscillator 71.

The harmonic signal of the unmodulated reference oscillator 71 superimposed on the modulated signal harmonic is used to generate a specified radiation noise level in an electronic device equipped with a clock signal circuit using a phase locked oscillator with a spread spectrum function. This may lead to a problem that cannot be suppressed.

The configuration disclosed in Japanese Patent Application Laid-Open No. 2000-101424 is a clock generation circuit that can realize spread spectrum of a clock signal and reduce electromagnetic wave radiation. It cannot be suppressed by a phase comparator, a low-pass filter, an amplifier, a frequency divider and a VCO. Therefore, there is a problem that even a clock generation circuit having a spread spectrum function cannot reduce electromagnetic wave radiation due to a reference clock signal harmonic.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and a main object of the present invention is to provide a noise reduction apparatus in which harmonics of a clock signal are sufficiently suppressed by a spread spectrum function and reduced below a specified noise level. An object of the present invention is to provide a clock signal circuit having a radiation characteristic and an electronic device mounted with the clock signal circuit.

[0017]

To achieve the above object, a clock signal circuit according to the present invention is a clock signal circuit for spreading an oscillation signal, which is phase-synchronized with a reference clock of a reference oscillator, with a modulator by a modulator, the clock signal circuit comprising: A harmonic filter for suppressing a harmonic signal of the reference oscillator is provided in the signal circuit.

The present invention also provides a reference oscillator that oscillates a reference clock, a phase comparator, a low-pass filter, a frequency modulator that spreads the spectrum of an input signal, and a voltage whose oscillation frequency is controlled by an applied voltage. A phase comparator that includes at least a control oscillator and a frequency divider, wherein a phase of a reference clock signal transmitted from the reference oscillator and a phase of a signal transmitted from the voltage controlled oscillator via the frequency divider are the phase comparator. And a signal corresponding to the phase difference is transmitted.
In the clock signal circuit including a phase locked oscillator with a spread spectrum function, wherein the transmitted signal is input to the voltage controlled oscillator via the low pass filter and the frequency modulator, the signal transmission path of the clock signal circuit At least a part thereof includes a harmonic filter for suppressing a harmonic signal of the reference oscillator.

In the present invention, a configuration may be adopted in which a harmonic filter for suppressing the harmonic signal is provided between the frequency modulator and the voltage controlled oscillator.

Further, in the present invention, a configuration may be such that a harmonic filter for suppressing the harmonic signal is provided between the voltage controlled oscillator and the frequency divider.

Further, in the present invention, the configuration may be such that the harmonic filter is provided between the phase comparator and the low-pass filter.

Further, according to the present invention, a phase synchronization comprising a power supply terminal of the reference oscillator, the phase comparator, the low-pass filter, the frequency modulator, the voltage-controlled oscillator, and the frequency divider is provided. It is also possible to adopt a configuration in which the harmonic filter is provided between the power supply circuit and the circuit.

In the present invention, it is preferable that the harmonic filter suppresses harmonic noise without increasing radiation noise.

According to another aspect of the invention, there is provided an electronic apparatus-equipped device including the above-described clock signal circuit.

As described above, at least a portion between the frequency modulator and the voltage controlled oscillator, between the frequency divider and the voltage controlled oscillator, and between the phase comparator and the low-pass filter, for example,
By installing a harmonic filter in one or more of the frequency modulator and the voltage-controlled oscillator, between the frequency divider and the voltage-controlled oscillator, or between the phase comparator and the low-pass filter, Even if the signal harmonic passes through the phase comparator, the low-pass filter, and the modulator, and also passes through the frequency divider, the signal harmonic is suppressed by the harmonic filter and does not overlap the voltage-controlled oscillator.

Also, by providing a harmonic filter between a power supply terminal of the reference oscillator and a power supply terminal of a phase locked loop composed of a phase comparator, a frequency modulator, a voltage controlled oscillator and a frequency divider. The output harmonic of the reference oscillator leaked to the power supply terminal of the reference oscillator is suppressed by the harmonic filter, and is not superimposed on the power supply terminal for the phase locked loop.

Thus, the output signal of the phase locked oscillator is
It becomes a harmonic signal suppressed by the spread spectrum function, so that even when a radiation noise standard value is specified for an electronic device mounted device, it is possible to obtain an effect that noise below the standard value can be obtained. .

[0028]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In a preferred embodiment, a clock signal circuit according to the present invention compares a phase of two signals with a reference oscillator 1 for oscillating a reference clock, and outputs a signal corresponding to a phase difference. A phase comparator 2 to be transmitted, and a low-pass filter (LP) for passing a signal in a low frequency band.
F) 3 and a modulator 4 that spreads the spectrum of the input signal
And a frequency-controlled oscillator 7 whose frequency is controlled by an applied voltage, and a frequency divider 5 which divides a signal from the voltage-controlled oscillator 7 and sends it out to the phase comparator 2. In a clock circuit using an oscillator, a harmonic filter (LPF) for suppressing a harmonic signal of the reference oscillator 1 is provided between at least a part of a signal transmission path of the clock circuit, for example, between the modulator 4 and the voltage controlled oscillator 7. 6 to prevent a harmonic signal of the reference oscillator 1 from being applied to the voltage control terminal of the voltage controlled oscillator 7 and to output only a signal that is spread by the modulation signal input to the modulation input terminal 8. Can be. The details will be described below with reference to the drawings.

[Embodiment 1] First, a clock signal circuit according to a first embodiment of the present invention and an electronic equipment mounted with the clock signal circuit will be described with reference to FIG. FIG. 1 is a block diagram of a phase locked oscillator for a clock signal circuit of an electronic device-mounted device according to the first embodiment.

As shown in FIG. 1, the phase-locked oscillator according to the present embodiment includes a reference oscillator 1, a phase comparator 2, a low-pass filter 3, a modulator 4, a frequency divider 5, a harmonic filter 6, and a voltage It comprises a control oscillator 7. Modulator 4
Has a modulation signal input terminal 8 and the voltage controlled oscillator 7 has a signal output terminal 9. Hereinafter, the operation of the present embodiment will be described.

The oscillation signal of the reference oscillator 1 is input to the phase comparator 2. On the other hand, the output signal of the voltage controlled oscillator 7 is frequency-divided by the frequency divider 5 and input to the phase comparator 2.
The phase of the oscillation signal of the reference oscillator 1 input to the phase comparator 2 is compared with the phase of the frequency-divided signal of the frequency divider 5, and a signal voltage corresponding to the phase difference is converted to a low-pass filter 3, a modulator 4, a harmonic, The voltage is applied to the voltage control unit of the voltage controlled oscillator 7 via the filter 6.

Then, the oscillation signal frequency of the voltage controlled oscillator 7 changes according to the applied voltage, and an oscillation signal that is phase-synchronized with the reference oscillator 1 is output from the output terminal 9.

Here, the output signal of the reference oscillator 1 includes a harmonic signal of an integral multiple in addition to the reference signal frequency.
This harmonic signal cannot be suppressed by the phase comparator 2, the low-pass filter 3 that determines the control range of the phase synchronization, and the modulator 4. However, the harmonic signal of the reference oscillator 1 that has passed through the modulator 4 is suppressed by the harmonic filter 6 and is not applied to the voltage control terminal of the voltage controlled oscillator 7.

Therefore, only the signal that has been subjected to the spectrum spreading by the modulation signal input to the modulation input terminal 8 is output from the output terminal 9 of the voltage controlled oscillator 7. This allows
Noise radiated from the electronic device-equipped equipment is reduced, and noise characteristics can be suppressed to a specified noise level or less.

[Embodiment 2] Next, a clock signal circuit according to a second embodiment of the present invention and an electronic device mounted device equipped with the clock signal circuit will be described with reference to FIG. FIG. 2 is a block diagram of a phase locked oscillator for a clock signal circuit of an electronic device-mounted device according to the second embodiment.

As shown in FIG. 2, the phase-locked oscillator according to the present embodiment includes a reference oscillator 21, a phase comparator 22, a low-pass filter 23, a modulator 24, a frequency divider 25, a harmonic filter 26, It comprises a control oscillator 27.
The modulator 24 has a modulation signal input terminal 28, and the voltage controlled oscillator 27 has a signal output terminal 29. Hereinafter, the operation of the present embodiment will be described.

The oscillation signal of the reference oscillator 21 is applied to the phase comparator 2
2 is input. On the other hand, the output signal of the voltage controlled oscillator 27 passes through the harmonic filter 26, is frequency-divided by the frequency divider 25, and is input to the phase comparator 22. Phase comparator 2
2 and the oscillation signal of the reference oscillator 21 and the frequency divider 25
Are compared, and a signal voltage corresponding to the phase difference is applied to the voltage control unit of the voltage-controlled oscillator 27 via the low-pass filter 23 and the modulator 24.

Then, the oscillation signal frequency of the voltage controlled oscillator 27 changes according to the applied voltage, and an oscillation signal phase-synchronized with the reference oscillator is output from the output terminal 29.

Here, the output signal of the reference oscillator 21 includes:
In addition to the reference signal frequency, a harmonic signal of an integral multiple is included, and this harmonic signal cannot be suppressed by the frequency divider 25. However, the harmonic signal of the reference oscillator 21 that has passed through the frequency divider 25 is suppressed by the harmonic filter 26 and does not overlap the voltage-controlled oscillator 27.

Accordingly, the output terminal 2 of the voltage controlled oscillator 27
From 9, only a signal that has been spectrum-spread by the modulation signal input to the modulation input terminal 28 is output. This reduces radiated noise from electronic equipment,
The noise characteristics can be suppressed to a level lower than the specified noise level.

[Embodiment 3] Next, a clock signal circuit according to a third embodiment of the present invention and an electronic device mounted device equipped with the clock signal circuit will be described with reference to FIG. FIG. 3 shows a block diagram of a phase locked oscillator for a clock signal circuit of an electronic device-mounted device according to the present embodiment.

As shown in FIG. 3, the phase-locked oscillator according to the present embodiment includes a reference oscillator 31, a phase comparator 32, a low-pass filter 33, a modulator 34, a frequency divider 35, and harmonic filters 36 and 37. And a voltage-controlled oscillator 38. The modulator 34 has a modulation signal input terminal 39, and the voltage controlled oscillator 38 has a signal output terminal 40.
Hereinafter, the operation of the present embodiment will be described.

The oscillation signal of the reference oscillator 31 is applied to the phase comparator 3
2 is input. On the other hand, the output signal of the voltage controlled oscillator 38 passes through the harmonic filter 36, is frequency-divided by the frequency divider 35, and is input to the phase comparator 32. Phase comparator 3
The oscillation signal of the reference oscillator 31 input to the second and the frequency divider 35
Are compared, and a signal voltage corresponding to the phase difference is applied to the voltage control unit of the voltage controlled oscillator 38 via the low-pass filter 33, the modulator 34, and the harmonic filter 37.

The frequency of the oscillating signal of the voltage controlled oscillator 38 changes according to the applied voltage.
An oscillation signal phase-synchronized with the output signal is output from the output terminal 40.

Here, the output signal of the reference oscillator 31 includes
In addition to the reference signal frequency, the signal includes an integer multiple harmonic signal.
4 cannot be suppressed. However, the harmonic signal of the reference oscillator that has passed through the modulator 34 is suppressed by the harmonic filter 37 and is not applied to the voltage control terminal of the voltage controlled oscillator 38. As a result, only a signal that has been subjected to spectrum spreading by the modulation signal input to the modulation input terminal 39 is output from the output terminal 40 of the voltage controlled oscillator 38.

Although the harmonic signal of the reference oscillator 31 cannot be suppressed by the frequency divider 35, the harmonic signal of the reference oscillator 31 that has passed through the frequency divider 35 is suppressed by the harmonic filter 36. It is not superimposed on the voltage controlled oscillator 38.

Therefore, the output terminal 4 of the voltage controlled oscillator 38
From 0, only a signal that is spread spectrum by the modulation signal input to the modulation input terminal 39 is output. This reduces radiated noise from electronic equipment,
The noise characteristics can be suppressed to a level lower than the specified noise level.

[Fourth Embodiment] Next, a clock signal circuit according to a fourth embodiment of the present invention and an electronic device-mounted apparatus equipped with the clock signal circuit will be described with reference to FIG. FIG. 4 shows a block diagram of a phase locked oscillator for a clock signal circuit of an electronic device-mounted device according to the present embodiment.

As shown in FIG. 4, the phase-locked oscillator according to the present embodiment includes a reference oscillator 41, a phase comparator 42, a low-pass filter 43, a modulator 44, a frequency divider 45, a harmonic filter 46, A control oscillator 47 is provided.
The modulator 44 has a modulation signal input terminal 48, and the voltage controlled oscillator 47 has a signal output terminal 49. Hereinafter, the operation of the present embodiment will be described.

The oscillation signal of the reference oscillator 41 is
2 is input. On the other hand, the output signal of the voltage controlled oscillator 47 is frequency-divided by the frequency divider 45 and input to the phase comparator 42. Reference oscillator 41 input to phase comparator 42
Is compared with the phase of the divided signal of the frequency divider 45,
A signal voltage corresponding to the phase difference is applied to a voltage control unit of a voltage controlled oscillator 47 via a harmonic filter 46, a low-pass filter 43, and a modulator 44.

Then, the oscillation signal frequency of the voltage controlled oscillator 47 changes according to the applied voltage, and an oscillation signal that is phase-synchronized with the reference oscillator is output from the output terminal 49.

Here, the output signal of the reference oscillator 41 includes
In addition to the reference signal frequency, a harmonic signal of an integral multiple is included, and this harmonic signal cannot be suppressed by the phase comparator 42. However, the harmonic signal of the reference oscillator 41 passing through the phase comparator 42 is suppressed by the harmonic filter 46 and is not applied to the voltage control terminal of the voltage controlled oscillator 47.

Therefore, the output terminal 4 of the voltage controlled oscillator 47
From 9, only a signal that is spread spectrum by the modulation signal input to the modulation input terminal 48 is output. This reduces radiated noise from electronic equipment,
The noise characteristics can be suppressed to a level lower than the specified noise level.

[Fifth Embodiment] Next, a clock signal circuit according to a fifth embodiment of the present invention and an electronic equipment mounted with the clock signal circuit will be described with reference to FIGS. . FIG. 5 and FIG. 6 are block diagrams of a phase locked oscillator for a clock signal circuit of an electronic device-mounted apparatus according to the present embodiment.

As shown in FIG. 5, the phase-locked oscillator according to the present embodiment includes a reference oscillator 51, a phase comparator 52, a low-pass filter 53, a modulator 54, a frequency divider 55, a harmonic filter 56, and a voltage. It comprises a control oscillator 57.
The modulator 54 has a modulation signal input terminal 58, and the voltage controlled oscillator 57 has a signal output terminal 59. Then, power is supplied from a power supply terminal 60 of the phase locked oscillator. Hereinafter, the operation of the present embodiment will be described.

The oscillation signal of the reference oscillator 51 is supplied to the phase comparator 5
2 is input. On the other hand, the output signal of the voltage controlled oscillator 57 is frequency-divided by the frequency divider 55 and input to the phase comparator 52. Reference oscillator 51 input to phase comparator 52
Is compared with the phase of the divided signal of the frequency divider 55,
A signal voltage corresponding to the phase difference is applied to the voltage control unit of the voltage controlled oscillator 57 via the low pass filter 53 and the modulator 54.

Then, the oscillating signal frequency of the voltage controlled oscillator 57 changes according to the applied voltage, and the reference oscillator 51
An oscillation signal phase-synchronized with the output signal is output from the output terminal 59.

Here, the output signal of the reference oscillator 51 includes
In addition to the reference signal frequency, a harmonic signal of an integral multiple is included, and this harmonic signal is superimposed on the power terminal 60 unless bypassed by the power circuit. However, the power supply terminal 60
The harmonic signal of the reference oscillator superimposed on the signal is suppressed by the harmonic filter 56 and is not superimposed on the power supply circuit of the phase locked loop.

Therefore, the output terminal 5 of the voltage controlled oscillator 57
From 9, only a signal that is spread spectrum by the modulation signal input to the modulation input terminal 58 is output. This reduces radiated noise from electronic equipment,
The noise characteristics can be suppressed to a level lower than the specified noise level.

It is also possible to combine the configuration shown in FIG. 5 with the configuration of the first to fourth embodiments. For example, as shown in FIG.
4 and the voltage controlled oscillator 69, between the voltage controlled oscillator 69 and the frequency divider 65, and between the power supply terminal of the reference oscillator 61 and the power supply circuit of the phase locked loop circuit.
7, 68 can also be provided. Even with such a configuration, the radiation noise from the electronic device mounted device is reduced,
The noise characteristics can be suppressed to a level lower than the specified noise level.

[0061]

As described above, according to the present invention,
Even if signal harmonics of the reference oscillator are applied to the phase locked loop, they are suppressed by the harmonic filter, so that they are not superimposed on the voltage-controlled oscillator, so that only the spectrum-spread signal is output from the voltage-controlled oscillator. The effect is obtained. The above effect will be described with reference to FIGS.

FIG. 11 shows the output signal harmonic characteristics of the phase-locked oscillator in which the harmonic signal of the reference oscillator is suppressed by the harmonic filter, compared to the unmodulated output signal harmonic indicated by the dotted line in the figure. It can be confirmed that the level of the output-spread harmonic signal, which is indicated by the solid line and spread, is reduced.

FIG. 12 is a graph showing the effect of reducing the level of output signal harmonics by spread spectrum.
The solid line in the figure indicates the case where the harmonics of the reference oscillator are not suppressed, and the dotted line indicates the case where the harmonics of the reference oscillator are suppressed. As can be seen from the figure, it can be confirmed that the level reduction effect amount of the output signal harmonic is improved as the order of the harmonic increases.

It should be noted that the present invention is not limited to the above embodiments, and it is clear that the embodiments can be appropriately modified within the scope of the technical idea of the present invention.

[Brief description of the drawings]

FIG. 1 is a block diagram of a phase locked oscillator for a clock circuit of an electronic device-mounted device according to a first embodiment of the present invention.

FIG. 2 is a block diagram of a phase locked oscillator for a clock circuit of an electronic device-mounted device according to a second embodiment of the present invention.

FIG. 3 is a block diagram of a phase locked oscillator for a clock circuit of an electronic device-mounted device according to a third embodiment of the present invention.

FIG. 4 is a block diagram of a phase locked oscillator for a clock circuit of an electronic device-mounted device according to a fourth embodiment of the present invention.

FIG. 5 is a block diagram of a phase locked oscillator for a clock circuit of an electronic device-mounted apparatus according to a fifth embodiment of the present invention.

FIG. 6 is a block diagram of a phase locked oscillator for a clock circuit of an electronic device-mounted device according to a fifth embodiment of the present invention.

FIG. 7 is a block diagram of a conventional phase locked oscillator for a clock circuit of an electronic device-mounted device.

FIG. 8 is an output spectrum diagram of a conventional phase locked oscillator.

FIG. 9 is an output harmonic spectrum diagram of a conventional phase locked oscillator.

FIG. 10 is a 650 MHz harmonic spectrum diagram of a conventional phase locked oscillator.

FIG. 11 is an output harmonic spectrum diagram of the phase-locked oscillator according to the present invention.

FIG. 12 is a diagram for comparing the harmonic level reduction effects of the phase locked oscillator of the present invention and the conventional example.

[Explanation of symbols]

1, 21, 31, 41, 51, 61, 71 Reference oscillator 2, 22, 32, 42, 52, 62, 72 Phase comparator 3, 23, 33, 43, 53, 63, 73 Low-pass filter 4, 24, 34, 44, 54, 64, 74 Modulator 5, 25, 35, 45, 55, 65, 75 Divider 6, 26, 36, 37, 46, 56, 66, 67, 68
Harmonic filter 7, 27, 38, 47, 57, 69 Voltage controlled oscillator 8, 28, 39, 48, 58, 70a, 78 Modulation input terminal 9, 29, 40, 49, 59, 70b, 77 Output terminal 60, 70c power supply terminal 81 spectrum without modulation 82 spectrum with modulation 101 modulation width 102 spectrum without modulation

Claims (8)

[Claims] 1. A clock signal circuit for spreading an oscillation signal, which is phase-synchronized with a reference clock of a reference oscillator, with a modulator, wherein a harmonic filter for suppressing a harmonic signal of the reference oscillator is provided in the clock signal circuit. A clock signal circuit provided. 2. A reference oscillator for oscillating a reference clock, a phase comparator, a low-pass filter, a frequency modulator for spectrum-spreading an input signal, a voltage-controlled oscillator whose oscillation frequency is controlled by an applied voltage, A frequency divider, and a phase of a reference clock signal transmitted from the reference oscillator and a phase of a signal transmitted from the voltage controlled oscillator via the frequency divider are compared by the phase comparator. In a clock signal circuit including a phase-locked oscillator with a spread spectrum function, a signal corresponding to a phase difference is transmitted, and the transmitted signal is input to the voltage controlled oscillator via the low-pass filter and the frequency modulator. A harmonic filter for suppressing a harmonic signal of the reference oscillator is provided on at least a part of a signal transmission path of the clock signal circuit. Clock signal circuit according to claim. 3. The clock signal circuit according to claim 2, wherein said harmonic filter is provided between said frequency modulator and said voltage controlled oscillator. 4. The clock signal circuit according to claim 2, wherein said harmonic filter is provided between said voltage controlled oscillator and said frequency divider. 5. The clock signal circuit according to claim 2, wherein the harmonic filter is provided between the phase comparator and the low-pass filter. 6. A power supply terminal of the reference oscillator, a power supply circuit of a phase locked loop comprising the phase comparator, the low-pass filter, the frequency modulator, the voltage controlled oscillator, and the frequency divider. The clock signal circuit according to any one of claims 2 to 5, further comprising the harmonic filter between them. 7. The clock signal circuit according to claim 1, wherein said harmonic filter suppresses harmonic noise without increasing radiation noise. 8. An electronic device mounted with the clock signal circuit according to claim 1.