JP2002184907A - Semiconductor device for power - Google Patents
Semiconductor device for powerInfo
- Publication number
- JP2002184907A JP2002184907A JP2000379569A JP2000379569A JP2002184907A JP 2002184907 A JP2002184907 A JP 2002184907A JP 2000379569 A JP2000379569 A JP 2000379569A JP 2000379569 A JP2000379569 A JP 2000379569A JP 2002184907 A JP2002184907 A JP 2002184907A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- resin
- pad
- semiconductor device
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
Landscapes
- Die Bonding (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は電力用半導体装置に
関する。The present invention relates to a power semiconductor device.
【０００２】[0002]
【従来の技術】半導体電力変換装置等の大きい電力を扱
い大きな電流が流れる電力用半導体チップを使用する電
力用半導体装置において、放熱性をよくするために金属
製の基板のパッドに半導体チップを搭載し、この半導体
チップを樹脂で封止した構成のものがある。2. Description of the Related Art In a power semiconductor device, such as a semiconductor power converter, which uses a power semiconductor chip which handles a large amount of power and through which a large current flows, the semiconductor chip is mounted on a pad of a metal substrate in order to improve heat dissipation. Some semiconductor chips are sealed with resin.
【０００３】図２は従来の電力用半導体装置の構成図で
ある。（Ａ）および（Ｂ）に示すように、金属基材１と
その上面にコーティングされた絶縁膜２からなる金属絶
縁基板３上にパッド４がパターン形成され、その上にヒ
ートスプレッダ５を介して電力用の半導体チップ６が接
合される。半導体チップ６は樹脂８で封止される。
（Ａ）の例では、半導体チップ６は、流れ止め用のケー
ス７を用いてシリコーンゲル等の樹脂８で封止される。
（Ｂ）の例では、粘性の大きいエポキシ材料等からなる
樹脂８により流れ止めを用いることなくそのまま半導体
チップ６を封止する。半導体チップ６はボンディングワ
イヤ９を介して、基板３上に形成された電極パターン
（または配線パターン）１０に接続される。FIG. 2 is a configuration diagram of a conventional power semiconductor device. As shown in FIGS. 1A and 1B, a pad 4 is patterned on a metal insulating substrate 3 composed of a metal substrate 1 and an insulating film 2 coated on the upper surface thereof. Semiconductor chip 6 is bonded. The semiconductor chip 6 is sealed with a resin 8.
In the example of (A), the semiconductor chip 6 is sealed with a resin 8 such as silicone gel using a case 7 for preventing flow.
In the example of (B), the semiconductor chip 6 is sealed with the resin 8 made of a highly viscous epoxy material or the like without using a flow stopper. The semiconductor chip 6 is connected via bonding wires 9 to an electrode pattern (or wiring pattern) 10 formed on the substrate 3.
【０００４】半導体チップ６は半田１１によりヒートス
プレッダ５に接合され、ヒートスプレッダ５は半田１２
によりパッド４に接合される。このヒートスプレッダ５
は、電力用半導体チップ６の放熱性を高めるとともに、
半導体チップ６と基板３との間の熱膨張率の差に基づく
熱応力を緩和させる。すなわち、ヒートスプレッダ５
は、温度変化による半導体チップ６と基板３の熱膨張量
（または収縮量）の差を軽減して基板３に対する半導体
チップ６の半田接合部のクラックやチップ自体のクラッ
ク等を防止して接合の信頼性を維持するために備わる。The semiconductor chip 6 is joined to the heat spreader 5 by solder 11, and the heat spreader 5 is
To the pad 4. This heat spreader 5
Improves the heat dissipation of the power semiconductor chip 6 and
The thermal stress based on the difference in the coefficient of thermal expansion between the semiconductor chip 6 and the substrate 3 is reduced. That is, the heat spreader 5
Is to reduce the difference in the amount of thermal expansion (or shrinkage) between the semiconductor chip 6 and the substrate 3 due to a temperature change to prevent cracks in the solder joints of the semiconductor chip 6 with the substrate 3 and cracks in the chip itself by preventing the chip 3 from cracking. Equipped to maintain reliability.
【０００５】[0005]
【発明が解決しようとする課題】しかしながら、従来の
ヒートスプレッダを用いた電力用半導体装置では、ヒー
トスプレッダを設けることにより部品点数が多くなり構
造も複雑で大型になるとともに、製造工程も面倒にな
る。すなわち、最初に半導体チップをヒートスプレッダ
上に高融点半田により接合し、次にこの半導体チップを
搭載したヒートスプレッダを最初の半田より低い融点の
半田により基板のパッド上に接合しなければならず、組
立てプロセスの手間が多くかかる。However, in a conventional power semiconductor device using a heat spreader, the provision of the heat spreader increases the number of components, makes the structure complicated and large, and complicates the manufacturing process. That is, the semiconductor chip must first be joined to the heat spreader with high melting point solder, and then the heat spreader mounting this semiconductor chip must be joined to the board pads with solder having a lower melting point than the first solder. It takes a lot of trouble.
【０００６】また、ヒートスプレッダは半導体チップよ
りサイズが大きいため、パッドも大きくしなければなら
ず、基板上での半導体チップの実装密度が低下する。[0006] Further, since the heat spreader is larger in size than the semiconductor chip, the pad must also be made larger, and the mounting density of the semiconductor chip on the substrate is reduced.
【０００７】本発明は上記従来技術を考慮したものであ
って、部品点数を減らして構造を簡素化し、半導体チッ
プの実装密度の向上を図るとともに、充分な接合信頼性
を維持できる電力用半導体装置の提供を目的とする。The present invention has been made in consideration of the above-mentioned prior art, and is intended to reduce the number of components, simplify the structure, improve the mounting density of semiconductor chips, and maintain sufficient bonding reliability. The purpose is to provide.
【０００８】[0008]
【課題を解決するための手段】前記目的を達成するた
め、本発明では、金属基板のパッドに半導体チップを搭
載し、該半導体チップを樹脂で封止した電力用半導体装
置において、前記パッド上に半田層のみを介して前記半
導体チップを接合したことを特徴とする電力用半導体装
置を提供する。In order to achieve the above object, the present invention provides a power semiconductor device in which a semiconductor chip is mounted on a pad of a metal substrate and the semiconductor chip is sealed with a resin. Provided is a power semiconductor device, wherein the semiconductor chip is joined only via a solder layer.
【０００９】この構成によれば、半導体チップは、半田
のみを介してパッド上に接合されるため、構造が簡素化
し組立て製造プロセスも簡素化する。According to this structure, the semiconductor chip is joined to the pad via only the solder, so that the structure is simplified and the assembly process is also simplified.
【００１０】好ましい構成例では、前記樹脂の線膨張係
数が前記金属基板またはパッドの線膨張係数より小さい
ことを特徴としている。In a preferred configuration example, the linear expansion coefficient of the resin is smaller than the linear expansion coefficient of the metal substrate or the pad.
【００１１】この構成によれば、放熱性の高い金属絶縁
基板上にこの基板またはパッドより線膨張係数が小さい
樹脂材料で半導体チップを封止することにより、半田に
作用する熱応力を充分に緩和して接合の信頼性を維持す
ることができる。According to this configuration, the thermal stress acting on the solder is sufficiently reduced by sealing the semiconductor chip on the metal insulating substrate having high heat dissipation with a resin material having a smaller linear expansion coefficient than that of the substrate or the pad. Thus, the reliability of the joint can be maintained.
【００１２】さらに好ましい構成例では、前記金属基板
はアルミニウム、前記パッドは銅からなり、前記樹脂の
線膨張係数を２３ｐｐｍ／Ｋ以下としたことを特徴とし
ている。In a further preferred embodiment, the metal substrate is made of aluminum and the pad is made of copper, and the resin has a linear expansion coefficient of 23 ppm / K or less.
【００１３】この構成によれば、アルミニウム基板上に
銅のパッドパターンを形成し、封止用樹脂の線膨張係数
を２３ｐｐｍ／Ｋ以下とすることにより、充分な接合信
頼性が得られることが実験で確認された。According to this configuration, by forming a copper pad pattern on an aluminum substrate and setting the linear expansion coefficient of the sealing resin to 23 ppm / K or less, sufficient bonding reliability can be obtained. Was confirmed.
【００１４】[0014]
【発明の実施の形態】以下、図面を参照して本発明に係
る電力用半導体装置について説明する。図１は本発明に
係る電力用半導体装置の構成図である。DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a power semiconductor device according to the present invention will be described with reference to the drawings. FIG. 1 is a configuration diagram of a power semiconductor device according to the present invention.
【００１５】金属基材２１とその上面にコーティングさ
れた絶縁膜２２からなる金属絶縁基板２３上にパッド２
４がパターン形成され、その上に電力用の半導体チップ
２６が接合される。このとき、半導体チップ２６は、従
来のようにヒートスプレッダ（図２）を設けることな
く、パッド２４上に半田３１のみを介して直接接合され
る。この半導体チップ２６はボンディングワイヤ２９を
介して、基板２３上に形成された電極パターン（または
配線パターン）３０に接続される。この状態で半導体チ
ップ２６は樹脂２８で封止される。この樹脂２８は、例
えば粘性の大きいエポキシ材料等からなる液状または半
流動性樹脂を、例えばディスペンサを用いて流れ止めを
用いることなくそのまま半導体チップ２６を封止する。A pad 2 is formed on a metal insulating substrate 23 comprising a metal base 21 and an insulating film 22 coated on the upper surface thereof.
4 are patterned, and a power semiconductor chip 26 is bonded thereon. At this time, the semiconductor chip 26 is directly joined to the pad 24 via only the solder 31 without providing a heat spreader (FIG. 2) as in the related art. The semiconductor chip 26 is connected to an electrode pattern (or wiring pattern) 30 formed on the substrate 23 via a bonding wire 29. In this state, the semiconductor chip 26 is sealed with the resin 28. The resin 28 is a liquid or semi-fluid resin made of, for example, a highly viscous epoxy material or the like, and is used to seal the semiconductor chip 26 without using a flow stopper, for example, using a dispenser.
【００１６】この樹脂２８の線膨張係数は、金属基材２
１またはパッド２４の線膨張係数より小さい。本実施形
態において、金属基材２１をアルミニウム（線膨張係
数：約２３ｐｐｍ／Ｋ）で構成し、パッド２４を銅（線
膨張係数：約１６〜１７ｐｐｍ／Ｋ）で構成した場合、
樹脂の線膨張係数を２３ｐｐｍ／Ｋ以下とした時、ヒー
トスプレッダを省略しても、半田に作用する熱応力を充
分に緩和して半田接合部のクラックやチップ自体のクラ
ック等を防止して充分な接合信頼性が得られることが実
験で確認された。このように、ヒートスプレッダが省略
可能となるため、部品点数が少なくなって構造が簡単に
なる。また、ヒートスプレッダは半導体チップより大き
く、パッドはヒートスプレッダよりさらに大きいため、
このヒートスプレッダの省略により半導体チップ２６の
基板２３上への実装密度が高くなる。さらに、半導体チ
ップにヒートスプレッダを取付ける製造工程を省略する
ことができ、生産性が向上する。The linear expansion coefficient of the resin 28 is
1 or smaller than the linear expansion coefficient of the pad 24. In the present embodiment, when the metal base 21 is made of aluminum (linear expansion coefficient: about 23 ppm / K) and the pad 24 is made of copper (linear expansion coefficient: about 16 to 17 ppm / K),
When the coefficient of linear expansion of the resin is 23 ppm / K or less, even if the heat spreader is omitted, the thermal stress acting on the solder is sufficiently relaxed to prevent cracks at the solder joints and cracks at the chip itself. Experiments have confirmed that joining reliability can be obtained. As described above, since the heat spreader can be omitted, the number of parts is reduced and the structure is simplified. Also, since the heat spreader is larger than the semiconductor chip and the pad is even larger than the heat spreader,
By omitting the heat spreader, the mounting density of the semiconductor chip 26 on the substrate 23 is increased. Further, a manufacturing process for attaching a heat spreader to a semiconductor chip can be omitted, and productivity is improved.
【００１７】なお、このような樹脂の線膨張係数につい
ては、例えばエポキシ系樹脂の構成成分の割合調整等に
より、容易に所望の値の線膨張係数の樹脂を得ることが
できる。Regarding the coefficient of linear expansion of such a resin, a resin having a desired value of the coefficient of linear expansion can be easily obtained by, for example, adjusting the ratio of the constituent components of the epoxy resin.
【００１８】[0018]
【発明の効果】以上説明したように、本発明では、半導
体チップは、半田のみを介してパッド上に接合されるた
め、構造が簡素化し組立て製造プロセスも簡素化する。As described above, according to the present invention, the semiconductor chip is joined to the pad only through solder, so that the structure is simplified and the assembly process is also simplified.
【図１】 本発明に係る電力用半導体装置の構成図。FIG. 1 is a configuration diagram of a power semiconductor device according to the present invention.
【図２】 従来の電力用半導体装置の構成図。FIG. 2 is a configuration diagram of a conventional power semiconductor device.
１：金属基材、２：絶縁膜、３：金属絶縁基板、４：パ
ッド、５：ヒートスプレッダ、６：半導体チップ、７：
ケース、８：樹脂、９：ボンディングワイヤ、１０：パ
ターン、１１：半田、１２：半田、２１：金属基材、２
２：絶縁膜、２３：金属絶縁基板、２４：パッド、２
６：半導体チップ、２８：樹脂、２９：ボンディングワ
イヤ、３０：パターン、３１：半田。1: metal substrate, 2: insulating film, 3: metal insulating substrate, 4: pad, 5: heat spreader, 6: semiconductor chip, 7:
Case, 8: resin, 9: bonding wire, 10: pattern, 11: solder, 12: solder, 21: metal substrate, 2
2: insulating film, 23: metal insulating substrate, 24: pad, 2
6: semiconductor chip, 28: resin, 29: bonding wire, 30: pattern, 31: solder.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 吉川 孝夫 静岡県磐田市新貝2500番地 ヤマハ発動機 株式会社内 Ｆターム(参考） 4M109 AA01 CA05 DB03 DB16 EC20 GA10 5F036 AA01 BA04 BA23 BB08 BC06 BD01 BD03 BE01 5F047 AA02 BA05 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Takao Yoshikawa 2500 Shinkai, Iwata-shi, Shizuoka Yamaha Motor F-term (reference) 4M109 AA01 CA05 DB03 DB16 EC20 GA10 5F036 AA01 BA04 BA23 BB08 BC06 BD01 BD03 BE01 5F047 AA02 BA05
Claims (3)
し、該半導体チップを樹脂で封止した電力用半導体装置
において、 前記パッド上に半田層のみを介して前記半導体チップを
接合したことを特徴とする電力用半導体装置。1. A power semiconductor device having a semiconductor chip mounted on a pad of a metal substrate and sealing the semiconductor chip with a resin, wherein the semiconductor chip is bonded on the pad via only a solder layer. Power semiconductor device.
はパッドの線膨張係数より小さいことを特徴とする請求
項１に記載の電力用半導体装置。2. The power semiconductor device according to claim 1, wherein a linear expansion coefficient of the resin is smaller than a linear expansion coefficient of the metal substrate or the pad.
は銅からなり、前記樹脂の線膨張係数を２３ｐｐｍ／Ｋ
以下としたことを特徴とする請求項２に記載の電力用半
導体装置。3. The metal substrate is made of aluminum and the pad is made of copper, and the resin has a linear expansion coefficient of 23 ppm / K.
3. The power semiconductor device according to claim 2, wherein:
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000379569A JP2002184907A (en) | 2000-12-14 | 2000-12-14 | Semiconductor device for power |
| US10/022,297 US6798078B2 (en) | 2000-12-14 | 2001-12-12 | Power control device with semiconductor chips mounted on a substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000379569A JP2002184907A (en) | 2000-12-14 | 2000-12-14 | Semiconductor device for power |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2002184907A true JP2002184907A (en) | 2002-06-28 |
Family
ID=18847910
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000379569A Pending JP2002184907A (en) | 2000-12-14 | 2000-12-14 | Semiconductor device for power |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2002184907A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20040024675A (en) * | 2002-09-16 | 2004-03-22 | 주식회사 만도 | Power module for electro-motive apparatus |
| US7119437B2 (en) | 2002-12-26 | 2006-10-10 | Yamaha Hatsudoki Kabushiki Kaisha | Electronic substrate, power module and motor driver |
| US7151311B2 (en) | 2002-11-11 | 2006-12-19 | Mitsubishi Denki Kabushiki Kaisha | Mold resin-sealed power semiconductor device having insulating resin layer fixed on bottom surface of heat sink and metal layer on the resin layer |
-
2000
- 2000-12-14 JP JP2000379569A patent/JP2002184907A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20040024675A (en) * | 2002-09-16 | 2004-03-22 | 주식회사 만도 | Power module for electro-motive apparatus |
| US7151311B2 (en) | 2002-11-11 | 2006-12-19 | Mitsubishi Denki Kabushiki Kaisha | Mold resin-sealed power semiconductor device having insulating resin layer fixed on bottom surface of heat sink and metal layer on the resin layer |
| DE10331857B4 (en) * | 2002-11-11 | 2008-01-24 | Mitsubishi Denki K.K. | Casting resin sealed power semiconductor device and method for its manufacture |
| US7119437B2 (en) | 2002-12-26 | 2006-10-10 | Yamaha Hatsudoki Kabushiki Kaisha | Electronic substrate, power module and motor driver |
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