JP2002164362A - チップサイズ半導体装置及びその製造方法 - Google Patents

チップサイズ半導体装置及びその製造方法

Info

Publication number
JP2002164362A
JP2002164362A JP2000356312A JP2000356312A JP2002164362A JP 2002164362 A JP2002164362 A JP 2002164362A JP 2000356312 A JP2000356312 A JP 2000356312A JP 2000356312 A JP2000356312 A JP 2000356312A JP 2002164362 A JP2002164362 A JP 2002164362A
Authority
JP
Japan
Prior art keywords
chip
semiconductor device
semiconductor
size
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000356312A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002164362A5 (enrdf_load_html_response
Inventor
Tsunenori Umetsu
恒徳 梅津
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2000356312A priority Critical patent/JP2002164362A/ja
Publication of JP2002164362A publication Critical patent/JP2002164362A/ja
Publication of JP2002164362A5 publication Critical patent/JP2002164362A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP2000356312A 2000-11-22 2000-11-22 チップサイズ半導体装置及びその製造方法 Pending JP2002164362A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000356312A JP2002164362A (ja) 2000-11-22 2000-11-22 チップサイズ半導体装置及びその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000356312A JP2002164362A (ja) 2000-11-22 2000-11-22 チップサイズ半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
JP2002164362A true JP2002164362A (ja) 2002-06-07
JP2002164362A5 JP2002164362A5 (enrdf_load_html_response) 2008-02-07

Family

ID=18828589

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000356312A Pending JP2002164362A (ja) 2000-11-22 2000-11-22 チップサイズ半導体装置及びその製造方法

Country Status (1)

Country Link
JP (1) JP2002164362A (enrdf_load_html_response)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100586607B1 (ko) 2004-12-28 2006-06-07 동부일렉트로닉스 주식회사 차단판을 이용한 반도체 칩 표면의 보호 방법
JP2007266421A (ja) * 2006-03-29 2007-10-11 Sanyo Electric Co Ltd 半導体装置およびその製造方法
WO2012107972A1 (ja) * 2011-02-10 2012-08-16 パナソニック株式会社 半導体装置

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100586607B1 (ko) 2004-12-28 2006-06-07 동부일렉트로닉스 주식회사 차단판을 이용한 반도체 칩 표면의 보호 방법
JP2007266421A (ja) * 2006-03-29 2007-10-11 Sanyo Electric Co Ltd 半導体装置およびその製造方法
WO2012107972A1 (ja) * 2011-02-10 2012-08-16 パナソニック株式会社 半導体装置
JP5066302B2 (ja) * 2011-02-10 2012-11-07 パナソニック株式会社 半導体装置

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