JP2002157032A - Current limiter and arithmetic amplifier - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a current limiter capable of precisely setting a limit current value with good control sensitivity, and stable with a small circuit scale. SOLUTION: This current limiter comprises an input buffer circuit for inputting voltage, a current control circuit for inputting the output voltage of the input buffer circuit and outputting a current according to the output voltage; a first bias generating circuit for supplying a bias voltage to the current control circuit; a current limiting circuit for limiting the change range of base voltage of the input transistor of the current control circuit for inputting the output voltage of the input buffer circuit to a prescribed range; and a second bias generating circuit for supplying a bias voltage to the current limiting circuit. When the voltage of the input buffer circuit is largely changed, the base voltage of the input transistor of the current control circuit for inputting the output voltage of the input buffer circuit is fixed by the current limiting circuit, whereby the output current of the current control circuit is suppressed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current limiting device for use in an output stage of an operational amplifier circuit for limiting an output current and an operational amplifier using the current limiting device.

[0002]

2. Description of the Related Art FIG. 4 is a circuit diagram showing a configuration example of a conventional current limiting device. NPN transistors Q11 and Q1
2 are connected in Darlington to form an input / output stage. When an input voltage is applied from the input 10 to the base of the transistor Q11, a current flows to the output 20 through the transistors Q11 and Q12. At this time, the current detection circuit 3
0 detects the current flowing through the output 20, and when it detects that the current has reached the limit, the current limiting circuit 40 operates to lower the input voltage from the input 10, thereby reducing the current flowing through the transistors Q11 and Q12. And output 2
Limit output current to zero.

FIG. 5 is a circuit diagram showing another example of the configuration of a conventional current limiting device. NPN transistors Q11, Q
Reference numeral 12 denotes a differential pair, and the common emitter of these transistors is connected to the GND via a constant current source I1. The base of transistor Q11 is connected to input 10, the collector of transistor Q12 is connected to output 20, and the base of transistor Q12 is connected to a base bias circuit consisting of a constant current source I2 and a series circuit of transistors Q13 and Q14. , A constant base bias is applied. When an input voltage is input from the input 10, a current corresponding to the potential difference between the bases of the transistors Q11 and Q12 is output through the transistor Q12 to the output 20.
Flows to However, the current is suppressed at the maximum to the constant current value of the constant current source I1.

[0004]

In the conventional current limiting device shown in FIG. 4, the current value detecting circuit 30 and the current limiting circuit 40 are separately required, and the circuit scale becomes large. Further, the addition of a feedback circuit impairs the stability of the circuit. Further, the limit current value cannot be set accurately due to a detection error of the external current value detection circuit 30 or a feedback error of the feedback circuit. Although the circuit of FIG. 5 solves the above-described problem, the circuit configuration has low control sensitivity because a differential pair of the transistors Q1 and Q2 is used.

SUMMARY OF THE INVENTION The present invention has been made to solve the conventional problems as described above, and has as its object to provide a control current with good control sensitivity and to set a current limit value with high accuracy, and to reduce the circuit scale. An object of the present invention is to provide a small and stable current limiting device and an operational amplifier using the same.

[0006]

According to one aspect of the present invention, an input buffer circuit for inputting a voltage, an output voltage of the input buffer circuit being input, and A current control circuit that outputs a corresponding current; a first bias generation circuit that supplies a base bias voltage to a transistor included in the current control circuit; and an input of the current control circuit that inputs an output voltage of the input buffer circuit. A current limiting circuit for limiting a change range of the base voltage of the transistor for use to a predetermined voltage range, and a second bias generating circuit for supplying a base bias voltage to the transistors constituting the current limiting circuit.

A second feature of the present invention is that the input buffer circuit is formed, and a first transistor whose emitter is grounded via a first constant current source is connected in series to form the current control circuit. A second transistor, a third transistor, and a fourth transistor connected to the base of the second transistor, the fourth transistor forming the current limiting circuit for fixing the base potential to a predetermined value during current limiting; The first and second bias generation circuits are provided with a second constant current source connected in series and a plurality of diode-connected transistors.

According to a third aspect of the present invention, an input buffer circuit for inputting a voltage, a current control circuit for inputting an output voltage of the input buffer circuit and outputting a current corresponding to the input output voltage, A bias generation circuit that supplies a base bias voltage to a transistor included in the current control circuit; and a change range of a base voltage of an input transistor of the current control circuit that inputs an output voltage of the input buffer circuit is limited to a predetermined voltage range. A current limiting circuit.

According to a fourth aspect of the present invention, there is provided an operational amplifier circuit, and the current limiting device according to claim 1 or 3 connected to an output stage of the operational amplifier circuit.

Here, the first transistor corresponds to the transistor Q1, the second and third transistors correspond to the transistors Q3 and Q4, and the fourth transistor corresponds to the transistor Q2. The first and second constant current sources correspond to the constant current sources I1 and I2.

[0011]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram showing a configuration of a current limiting device according to a first embodiment of the present invention. The current limiting device includes an NPN transistor Q1 and a constant current source I1.
An input buffer circuit A comprising a PNP transistor Q3 and an NPN transistor Q4, a PNP transistor Q5 diode-connected to a constant current source I2, and an NPN transistor Q6 and Q7 connected in series. And a current limiting circuit D comprising an NPN transistor Q2.

Next, the operation of this embodiment will be described.
A bias circuit C is provided at the base of the NPN transistor Q4.
, And a constant bias voltage from the bias circuit C is also applied to the NPN transistor Q2. When an input voltage is applied thereto from the input 10, the base potential of the PNP transistor Q3 changes via the transistor Q1, so that the voltage between the base of the PNP transistor Q3 and the base of the NPN transistor Q4 changes. According to the change, the output 2 is output through the PNP transistor Q3 and the NPN transistor Q4.
The output current flows to 0.

When the input voltage drops more than necessary and the emitter potential of the transistor Q1 drops, the transistor Q2 forming a differential pair is turned on. When the transistor Q2 is turned on, the base potential of the transistor Q3 is fixed at the voltage applied via the transistor Q2.
3 no longer changes and the transistor Q
3. Since the current flowing through Q4 is limited, the output 2
0 output current is limited.

More specifically, the current limit value is determined by the current value I0 flowing through the current limiting transistors Q2 and Q5,
It is determined by n × I0 according to the ratio n of the emitter areas of the transistors Q3 and Q4 of the current control circuit and the emitter areas of the current limiting transistors Q2 and Q5. The input buffer transistor Q1 and the current limiting transistor Q2 form a differential pair. The base-emitter voltages of the current controlling transistors Q3 and Q4 are equal to the current limiting transistors Q2 and Q2.
The maximum current that can be output, which is limited by the base-emitter voltage of Q5, is limited to current limiting transistors Q2 and Q5.
5 depends on the value of the current flowing. As a result, the current limit value of the output current can be freely set based on the current value flowing through the current limiting transistors Q2 and Q5 and the emitter area ratio between the current control transistor and the current limiting transistor.

According to this embodiment, since no external current detection circuit or the like is used, the circuit scale is not large, and the transistors Q1 and Q3 are Darlington-connected and follow the configuration of the conventional circuit shown in FIG. Therefore, the control sensitivity is good, and the maximum current flowing through the transistors Q3 and Q4 can be accurately determined by the constant current sources I1 and I2, so that the limiting current value can be set with high accuracy. Further, since there is no feedback circuit, the circuit operation is stable.

FIG. 2 is a circuit diagram showing a configuration of a current limiting device according to a second embodiment of the present invention. The current limiting device of this example also has an input buffer circuit A, a current control circuit B, a bias circuit C, and a current limiting circuit D, and has a configuration substantially similar to that of the first embodiment shown in FIG. I have. The difference is that the base bias potential of the current limiting transistor Q2 is set by the transistor Q4.

In such a configuration, the base potential of the transistor Q1 drops more than necessary, and the transistor Q2 forming a differential pair with the transistor Q1 turns on. When the transistor Q2 is turned on, the base potential of the transistor Q3 is fixed.
Since the voltage between the base of the NP-type transistor Q3 and the base of the NPN-type transistor Q4 does not open and the current flowing through the PNP-type transistor Q3 and the NPN-type transistor Q4 does not increase, the output current of the output 20 is suppressed. .

According to the present embodiment, the case where the accuracy of the limiting current value may be slightly lower may be acceptable, or the NPN transistor and the P
When the characteristics of the NP-type transistors can be made substantially the same, the same effects as those of the first embodiment can be obtained even with the above configuration.

FIG. 3 is a circuit diagram showing a configuration according to an embodiment of the operational amplifier of the present invention.

In the operational amplifier, the current limiting device 100 shown in FIG. 1 is connected to the output side of a normal operational amplifier circuit 5, and an amplifier circuit 200 for amplifying the output is provided. Here, the amplifier circuit 200 includes transistors Q8, Q9, Q1.
0, Q11 and a bias voltage resistor R3 of a common base of the transistors Q8, Q10 and voltage dividing resistors R1, R2. The output OUT is taken out from the emitter of the transistor Q11, and the output divided voltage by the voltage dividing resistors R1 and R2 is input to the inverting input terminal of the operational amplifier circuit 5. With the above configuration, the output current of the operational amplifier circuit 5 is limited by the current limiting circuit 100, so that the output current value extracted from the emitter of the transistor Q11 is also limited.

According to the present embodiment, the current limiting device 100
As the circuit scale is not large, the sensitivity is good, and the current limiting circuit that can set the limiting current value with high accuracy is used, so the operational amplifier also has a small circuit scale and good sensitivity. The limiting current value can be set with high accuracy. The operational amplifier of this example is used for, for example, a regulator.

The device shown in FIG. 2 may be used as the current limiting device 100.

Further, the present invention is not limited to the above-described embodiment, and can be embodied in various other forms in a specific configuration, function, operation, and effect without departing from the gist thereof. .

[0024]

As described above in detail, according to the present invention, since it is not necessary to detect the output current value, the circuit scale is small and no feedback circuit is formed. Since the diode characteristics between the base and the emitter are used for current control, the control sensitivity is high. Since the current limit value is determined using the current density ratio between the current control circuit and the current limiting transistor,
A free limiting current value can be set accurately.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of a current limiting device according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a configuration of a current limiting device according to a second embodiment of the present invention.

FIG. 3 is a circuit diagram showing a configuration according to an embodiment of the operational amplifier of the present invention.

FIG. 4 is a circuit diagram showing a configuration example of a conventional current limiting device.

FIG. 5 is a circuit diagram showing another configuration example of the conventional current limiting device.

[Explanation of symbols]

 Reference Signs List 5 operational amplifier circuit 10 input I1, I2 constant current source 20 output 100 current limiter 200 amplifier circuit Q1, Q2, Q4, Q6, Q7 NPN transistor Q3, Q5 PNP transistor

Continued on the front page F-term (reference) 5H420 BB13 CC02 DD02 EA11 EA19 EA24 EB15 EB37 FF04 FF23 NA32 NB03 NB24 NC33 NE15 NE26 5H430 BB01 BB05 BB09 BB11 EE02 FF04 FF13 GG08 HH03 LA06 5J0A01 CC01 DD01 CC01 CC AA12 AA13 AA47 CA57 CA81 FA04 FA09 FA10 FA11 FP06 GP02 HA07 KA01 KA02 KA05 KA12 KA17 KA20 KA47 MA17 MA19 MA21 TA01

Claims (4)

[Claims] An input buffer circuit that inputs a voltage; a current control circuit that receives an output voltage of the input buffer circuit and outputs a current corresponding to the output voltage; and supplies a bias voltage to the current control circuit. A first bias generation circuit, a current limiting circuit that limits a change range of an input voltage of the current control circuit that inputs an output voltage of the input buffer circuit to a predetermined voltage range, and a bias voltage is supplied to the current limiting circuit. A current limiting device, comprising: a second bias generation circuit. 2. A first transistor constituting the input buffer circuit and having an emitter grounded via a first constant current source; a second transistor connected in series constituting the current control circuit; A third transistor connected to the base of the second transistor, the fourth transistor forming the current limiting circuit for fixing the base potential to a predetermined value at the time of current limiting; and the first and second biases. The current limiting device according to claim 1, further comprising: a second constant current source connected in series and a plurality of transistors connected in a diode to form a generating circuit. 3. An input buffer circuit for inputting a voltage, a current control circuit for inputting an output voltage of the input buffer circuit and outputting a current corresponding to the input output voltage, and a bias voltage for the current control circuit. And a current limiting circuit for limiting a change range of an input voltage of the current control circuit for inputting an output voltage of the input buffer circuit to a predetermined voltage range. . 4. The operational amplifier circuit, wherein the operational amplifier circuit is connected to an output stage of the operational amplifier circuit.
An operational amplifier, comprising: the current limiting device according to claim 3.