JP2002156646A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display device having high contrast and good visibility and capable of reducing alignment defect of a liquid crystal such as a disclination or light leakage in the liquid crystal display device when a black level is displayed. SOLUTION: A part of pixel electrodes 203a to 203b is formed to overlap a projecting part 204. If the projecting part is too high, the liquid crystal is aligned as tilted to the substrate surface to increase leaking of light (fig. 1(c)). If the projecting part is low, it gives a low effect to decrease disclination. Therefore, the optimum height of the projecting part is determined.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a field effect transistor (FET), for example, a thin film transistor (TF).
The present invention relates to a semiconductor device having a circuit constituted by T) and a method for manufacturing the same. For example, the present invention relates to a semiconductor device typified by a liquid crystal display panel and an electronic device having such a semiconductor device mounted as a component.

[0002] In this specification, an electro-optical device generally refers to a device that performs light and dark display by a change in an electric signal, and a liquid crystal display device and a display device using EL are all electro-optical devices. .

[0003] In this specification, an element substrate is defined as:
Refers to all substrates on which active elements such as TFTs and MIMs are formed.

[0004]

2. Description of the Related Art In recent years, a technique of forming a thin film transistor using a semiconductor thin film (having a thickness of about several to several hundred nm) formed on a substrate having an insulating surface has been attracting attention. Thin film transistors are widely applied to electronic devices such as ICs and semiconductor devices, and are particularly rapidly developed as switching elements for liquid crystal display devices.

There are two main types of liquid crystal display devices, an active matrix type and a passive matrix type.

An active matrix type liquid crystal display device uses a TFT as a switching element, and can obtain a high quality image. A notebook personal computer is generally used as an active matrix type application, but is also expected to be used as a home television and a portable terminal.

Incidentally, an active matrix type liquid crystal display device generally performs line inversion driving. Line inversion driving is, for example, in source line inversion driving,
As shown in FIG. 37, the polarity of the voltage applied to adjacent source lines is different, and the polarity of the voltage applied to each source line is changed for each frame. FIG. 37 shows the polarity of the voltage applied to the pixel when performing the source line inversion driving. Driving in which the polarity of the voltage differs for each adjacent source line is called source line inversion driving. When the polarity of the voltage differs for each adjacent gate line, it is called gate line inversion driving.

FIG. 10 schematically shows a cross section of a pixel portion of a liquid crystal display device. In this specification, as shown in FIG.
Electrodes 102a to 102b formed on the substrate and the counter substrate 1
The electric field generated between the opposing electrodes 103 formed in 04 is referred to as “longitudinal electric field” 105. Further, the adjacent pixel electrode 1
The electric field generated between the electrodes 02a and 102b is called “lateral electric field” 1
06.

When the line inversion driving is performed, the liquid crystal is aligned along the horizontal electric field in the vicinity of the pixel electrode, so that the alignment of the liquid crystal becomes non-uniform at the edge of the pixel electrode and disclination occurs. In order to obtain a good black level, a light shielding film for hiding disclination is required. However, if the disclination is hidden by the light shielding film, the aperture ratio is reduced by the light shielding film. In order to obtain a high-quality black level and display a bright image with a high aperture ratio, it is necessary to take measures to minimize disclination. In addition,
In the present specification, a misalignment of the liquid crystal caused by a difference in the pretilt direction and a difference in the twist direction at the interface of the liquid crystal alignment film is referred to as “disclination”. Further, a region having a different brightness when a polarizing plate is provided due to the liquid crystal not being in a normal alignment state is referred to as “light leakage”.

In particular, in a liquid crystal display device in which pixels are formed at a fine pitch, such as a projection type liquid crystal display device, the ratio of disclination and light leakage caused by a lateral electric field to pixels is not negligible. Big. Further, in a projection type liquid crystal display device, such disclination and light leakage are enlarged and projected on a screen. Therefore, how to suppress such light leakage and disclination is important for securing contrast. .

[0011]

SUMMARY OF THE INVENTION It is an object of the present invention to provide an active matrix type liquid crystal display device having an element structure capable of preventing liquid crystal disclination and light leakage.

[0012]

In order to solve the above-mentioned problems of the prior art, the following measures have been taken.

FIG. 2 is a cross-sectional view of a simulation model in which an edge of a pixel electrode is overlapped with a projection having a predetermined height. According to the present invention, as shown in FIG. 2, the ends of the pixel electrodes 203a to 203b on the first substrate (not shown) are formed so as to overlap with the projections 204 formed on the flat surface. And the fact that disclination and light leakage when a voltage is applied to the liquid crystal 202 move to the edge of the pixel electrode. In FIG. 2, the counter electrode 2
01 is formed on the counter substrate 207.

In this specification, a convex portion is selectively provided below the pixel electrode. A region where the pixel electrode and the upper end of the projection overlap each other is referred to as a first region (a) of the pixel electrode. The region in which the pixel electrode is formed on the side of the convex portion is the second region of the pixel electrode.
Region (b). A region where the pixel electrode is formed on a flat surface, and a region in contact with the second region of the pixel electrode is referred to as a third region (c) of the pixel electrode.

The height (h) of the projection refers to the maximum value of the length of the perpendicular when the perpendicular is lowered from the upper end of the projection to the flat surface on which the projection is formed.

The cell gap (d) refers to the distance between the counter electrode formed on the counter substrate (second substrate) and the third region of the pixel electrode.

The distance (s) between the pixel electrodes means a distance between the first regions of the pixel electrodes adjacent to each other.

Hitherto, it has been said that if a projection is present on the alignment surface of the liquid crystal, the alignment of the liquid crystal is disturbed by the projection and light leakage occurs.
However, as a result of simulating the orientation of the liquid crystal, the inventors found that the first region of the pixel electrode formed on the convex portion having the predetermined height and the side region of the convex portion having the predetermined height were formed. It has been found that when the liquid crystal display device has the second region of the pixel electrode, the poor orientation of the liquid crystal due to the lateral electric field when the liquid crystal display device is driven is reduced. Specifically, it was found that the position where disclination and light leakage appear during black display is toward the edge of the pixel electrode.

This phenomenon will be described with reference to the schematic diagram of FIG. 1 showing the principle of the present invention. The alignment mode of the liquid crystal is a TN mode.
In FIG. 1, + 5V or -5V by line inversion drive
3 shows the orientation of the liquid crystal when the liquid crystal display device is driven by the video voltage of FIG. The alignment film is not shown.

First, as shown in FIG. 1A, when the ends of the pixel electrodes 203a and 203b formed on the first substrate (not shown) are formed on the convex portion 204, the convex portion is formed. Disclination is harder than when there is no disclination. Nevertheless, if the height of the protrusion is low, the counter electrode 201 and the pixel electrodes 203a to 203b formed on the second substrate (not shown) are formed.
The vertical electric field generated between the pixel electrodes 203a and 203b is strongly affected by the horizontal electric field generated between the pixel electrodes 203a and 203b, and the liquid crystal molecules 208 near the convex portions have an oblique inclination with respect to the substrate surface. Orientation. Thus, light leaks under the crossed Nicols polarizing plate. Further, the liquid crystal molecules 20 near the interface of the alignment film are determined by the rubbing directions 205 to 206.
Since the pretilt angle of 9 is determined, the disclination 210 having a high light intensity can be obtained where the direction of the lateral electric field near the interface is different from the direction of the liquid crystal molecules near the interface determined by rubbing.

However, as the height of the projection increases,
The position where the disclination 210 appears in FIG. 1A changes to the end of the pixel electrode. Further, the pixel electrode 2
When the height of the convex portion 204 overlapping the end portions of the pixel electrodes 03a and 203b is increased, as shown in FIG.
The vertical electric field generated between the gate electrode 15 and the counter electrode 201 becomes stronger as the height of the projection increases, and the influence of the horizontal electric field is reduced. In addition, an electric field generated between the counter electrode 201 and the second region 212 of the pixel electrode formed on the side of the projection among the pixel electrodes 203a to 203b can generate a large electric field in a direction substantially perpendicular to the substrate surface. . Since the TN type liquid crystal is a positive type liquid crystal, the major axis of the liquid crystal molecules 211 is oriented parallel to the electric field. A positive liquid crystal refers to a liquid crystal having a positive dielectric anisotropy. Thereby, disclination and light leakage near the convex portion are reduced.

Next, as shown in FIG. 1 (c), when the height of the convex portion 204 is increased, the liquid crystal on the pixel electrode 203b is transferred onto the substrate surface between the counter electrode and the second region of the pixel. On the other hand, the electric field in the oblique direction can be made in the same direction as the pretilt, so that the liquid crystal molecules 213 follow the electric field and are oriented obliquely with respect to the substrate surface. On the pixel electrode 203a, the oblique electric field is opposite to the direction of the pretilt of the liquid crystal with respect to the substrate surface formed between the second region 216 of the pixel electrode and the counter electrode.
7 does not easily follow the electric field, and light leakage is relatively difficult. Nevertheless, the aperture ratio decreases as a whole because the width of light leakage is widened by the electric field generated between the counter electrode and the second region 212 of the pixel electrode 203b.

As described above, when the end portion of the pixel electrode is formed on the convex portion, in order to reduce both the disclination of black display and the width of light leakage, the optimum value of the convex portion height is required. You can see it exists. If the projections are too high, the overall width of light leakage will increase (FIG. 1 (c)). 1A and 1B can increase the aperture ratio. The results of the simulation described later support this principle.

Here, it is considered that the optimum value of the height of the projection is determined by using the cell gap (that is, an element that determines the strength of the vertical electric field) as a parameter.

Therefore, the inventors conducted a simulation and confirmed the optimum value of the height of the convex portion.

The disclination and light leakage caused by the lateral electric field are particularly problematic because the area of the pixel is small, and when the disclination and light leakage occur, the ratio of the pixel to the pixel cannot be ignored. It's about as big. That is, it is mainly used as a projection type liquid crystal display device. In a projection type liquid crystal display device, the pitch between pixels is small, and in many cases, the distance between pixel electrodes is necessarily as small as 4.0 μm or less. In view of this, the inventors performed simulations with a focus on a distance between pixel electrodes of 4.0 μm or less in order to reduce disclination and light leakage in a projection-type liquid crystal display device.

FIG. 2 shows a simulation model. In FIG. 2, a counter electrode 201, a liquid crystal 202, a convex portion 204,
The pixel electrodes 203a to 203b are components of the simulation model. This is repeated periodically with the simulation model of FIG. 2 as one unit.

The simulation parameters are summarized below. Cell gap d: 4.5 μm, 3.0 μm Distance between pixel electrodes s: 2 μm, 4 μm Height of protrusion h: 0 μm, 0.2 μm, 0.3 μm, 0.1 μm
4 μm, 0.5 μm, 0.7 μm, 1.0 μm, 1.5
μm Pixel pitch p: 18 μm, 43 μm

The conditions fixed in the simulation are summarized below. Width o of first region of pixel electrode: 1.0 μm Potential of pixel electrode 203 a: +5 V Potential of pixel electrode 203 b: −5 V Potential of counter electrode 201: 0 V

In order to generalize the relationship between the distance (s) between the pixel electrodes, the cell gap (d), and the height (h) of the convex portion forming the end of the pixel electrode, 4.5 μm and 3. 0
The simulation was performed with a cell gap of μm. In the simulation, the orientation was obtained by calculation using ZLI4792 for the liquid crystal even when the cell gap was 4.5 μm and 3.0 μm.

The pretilt angle of the liquid crystal was 6.0 °, and the chiral pitch was left-handed 70 μm. FIG. 2 shows the rubbing directions 205 to 206. The twist angle is 90 °. The alignment of the liquid crystal is of the TN type.

Further, in order to grasp the tendency by increasing the number of evaluations, a simulation was performed with two types of pixel pitches as described above.

2SBENCH of LCD Master, a liquid crystal orientation simulation software manufactured by Shintec
Was used to simulate the orientation of the liquid crystal. 2SB
ENCH indicates the orientation of the liquid crystal by a two-dimensional flat surface including the cell gap direction and the substrate surface direction.

The simulation results are shown below. FIG.
8 are partial enlarged views showing the results of the simulation.

In FIGS. 3 to 8, the height of the projection is changed under the conditions that the cell gap (d) is 4.5 μm, the distance (s) between the pixel electrodes is 2.0 μm, and the pixel pitch (p) is 18 μm. Is simulating. The simulation results show the transmittance at each coordinate calculated from the equipotential lines, the director of the liquid crystal, and the refractive index anisotropy.
The coordinates of 18 μm on the horizontal axis indicate the edge of the pixel (the boundary between adjacent pixels). The pixel electrode 203a is at coordinates of 1 to 17 μm and the pixel electrode 203b is at coordinates of 19 to 35 μm. FIGS. 3 to 8 are enlarged views showing light leakage and disclination near the convex portion. Things.
Since the liquid crystal is positive, the lines of electric force are the liquid crystal director.
It is considered to be almost equal to the direction of.

The alignment of the liquid crystal on the pixel electrode having a potential of -5 V will be described below.

When there is no convex portion as shown in FIG. 3, a horizontal electric field is formed up to a region inside the pixel electrode. Also, disclination occurs in a region where the direction of the horizontal electric field and the direction of the pretilt of the liquid crystal are reversed.

When the height of the convex portion is 0.3 μm as shown in FIG. 4, the vertical electric field is increased by the first region of the pixel electrode formed at the upper end of the convex portion. The position of the nation moves closer to the outside of the pixel electrode than when there is no protrusion in FIG.

When the height of the projection is increased to 0.7 μm as shown in FIG. 5, the effect of increasing the vertical electric field and the second region of the pixel electrode formed on the side of the projection are reduced. Due to the effect that the lines of electric force formed by the counter electrode have components that are almost perpendicular to the substrate surface, many liquid crystals are aligned perpendicular to the substrate surface along with the lines of electric force, and disclination near the protruding portion is reduced. Less.

As shown in FIG. 6, when the height of the projection is as high as 1.0 μm, the width of the disclination in the vicinity of the projection is 0.2 μm as compared with when the height of the projection is 0.7 μm. Has only decreased.

As shown in FIG. 7, when the height of the convex portion is as high as 1.5 μm, it can be formed in the vicinity of the convex portion by the second region of the pixel electrode formed on the side of the convex portion and the counter electrode. The lines of electric force have an angle of about 60 ° with respect to the substrate surface. The liquid crystal is aligned along the lines of electric force, and light leaks near the convex portions.

The angle of the electric force lines with respect to the substrate surface is estimated from the distribution of equipotential lines.

In FIG. 8, the height of the projection is 3.0 μm.
And the liquid crystal above the third region of the pixel electrode at the upper end of the projection is oriented almost perpendicular to the substrate surface because the vertical electric field is strengthened. However, an electric field generated between the second region of the pixel electrode formed on the side portion of the convex portion and the counter electrode is generated on the substrate surface.
Since the liquid crystal has an angle of about 30 ° and is aligned along the lines of electric force, a wide light leak can occur near the convex portion.

The orientation of the liquid crystal in FIG. 4 corresponds to the schematic diagram in FIG. The orientation of the liquid crystal in FIGS. 5 and 6 corresponds to the schematic diagram in FIG. The orientation of the liquid crystal in FIGS. 7 and 8 is shown in FIG.
It corresponds to the schematic diagram of (c). That is, it was confirmed that when the height of the convex portion exceeded the upper limit, light leakage of the liquid crystal increased.

In order to improve the display quality, systematic simulation data was obtained. Attention was paid to the distance between the ends of the disclination and the light leakage that affect the aperture ratio.

Data was also collected on the light leakage and the disclination width on the pixel electrode having a potential of -5V. This is because light leakage and disclination on a pixel electrode having a potential of -5 V have a high light intensity and greatly affect display quality.

FIGS. 9 and 36 show the simulation results. FIG. 9 is a graph showing the height (h) of the convex portion and the width (x) of light leakage and disclination with respect to the cell gap (d) in the simulation model of FIG. Here, the width (x) of the light leakage and the disclination indicates the width of the high brightness region caused by the disclination and the light leakage formed on both sides of the convex portion.

FIG. 36 is a graph showing the height (h) of the projection and the width (y) of light leakage and disclination with respect to the cell gap (d) in the simulation model of FIG. Here, the width (y) of the light leakage and disclination is one side of the projection, that is, −5.
4 shows the width of a high-brightness region caused by disclination and light leakage on the electrode side having a potential of V.

When the cell gap was 4.5 μm, simulations were performed when the pixel pitch (p) was 18 μm and 43 μm. The distance (s) between adjacent pixel electrodes was set to 2.0 μm or 4.0 μm.

When the cell gap was 3.0 μm, the distance (s) between adjacent pixel electrodes was set to 2.0 μm or 4.0 μm. Pixel pitch (p) is 18μ
m.

9 and 36, the relationship between the height of the projection and the width of light leakage and disclination showed the same tendency.

First, irrespective of the pixel pitch, the relationship between the height of the projections and the width of light leakage and disclination hardly changed. Light leakage and disclination are caused by the phenomenon caused by the horizontal electric field and the vertical electric field at the edge of the pixel electrode.

Light leakage and disclination were relatively small when the distance between adjacent pixel electrodes was small.

9 and 36, the pixel pitch (p)
Irrespective of the cell gap (d), as the height of the projections was increased, the area of the liquid crystal alignment defect represented by light leakage and disclination was reduced. When the height of the convex portion was too high, the area of poor alignment of the liquid crystal increased. The optimum height of the convex portion is determined by the cell gap and the distance between the pixel electrodes.

Considering the inflection point of the graph, the height of the convex portion where the effect of reducing the region of poor liquid crystal alignment is remarkably obtained is as follows:
When the cell gap is 4.5 μm, it is preferable that the cell gap is 4.4% or more and 22.5% or less.

Even when the cell gap is 3.0 μm, when the distance (s) between the pixel electrodes is 2.0 μm or less, the height of the projection is set to 4.4% or more and 22.5% or less of the cell gap. By doing so, a better effect of reducing the region of poor alignment can be obtained as compared with the case where there is no convex portion.

The height of the convex portion with respect to the cell gap is 4.4.
%, The width of light leakage and disclination does not change so much even if the height of the projections is increased. When the height of the convex portion with respect to the cell gap exceeds 22.5%, the width of light leakage and disclination increases.

Further, if the convex portions are high, poor alignment of the liquid crystal due to uneven rubbing is likely to occur. Therefore, it is better to reduce the convex portions to reduce the width of light leakage and disclination in order to ensure good display quality. Is preferred. For this reason, when the cell gap is 4.5 μm, it is better to suppress the height of the convex portion with respect to the cell gap from 4.4% to 15.6% of the cell gap. Even in the range of the height of the protrusion, the same effect of reducing light leakage and disclination can be obtained as when the height of the protrusion is set to 4.4% or more and 22.5% or less of the cell gap.

Also, when the cell gap is 3.0 μm and the distance (s) between the pixel electrodes is 2.0 μm or less, the height of the projections is not less than 4.4% and not more than 15.6%. As in the case where the height of the portion is set to 4.4% or more and 22.5% or less of the cell gap, excellent light leakage and disclination reduction effects can be obtained.

The distance (s) between the pixel electrodes is 4.0 μm.
In the case of m, when the height of the convex portion is 22.5%, light leakage is increased on the contrary. Therefore, even when the distance (s) between the pixel electrodes is included up to 4.0 μm, the height of the convex portion with respect to the cell gap is 4.4% or more and 15.6%.
The following is desirable.

That is, under the condition that the distance between the pixel electrodes is 4.0 μm or less, the cell gap is 3.0 μm or more and 4.0 μm or less.
When it is 5 μm or less, the height of the projection is set to 4.4 of the cell gap.
% To 22.5%, preferably 4.4% to 15.
It is good to make it 6% or less.

The smaller the cell gap, the smaller the height of the projections required to reduce the light leakage and the width of the disclination. 3. Cell gap of 3.0 μm or more
When the cell gap is 5 μm or less, good liquid crystal alignment can be obtained when the height of the projections is 15.6% or less. Therefore, when the cell gap is 3.0 μm or less, the light leakage and the width of disclination are reduced. It is considered that the height of the convex portion necessary for the above is sufficiently 15.6% or less of the cell gap.

When the cell gap is less than 3.0 μm,
The height of the projection is preferably set to 15.6% or less of the cell gap. Of course, considering the inflection point of the graph, it is expected that a good effect can be obtained even if the height of the projection is set to 6.7% or less of the cell gap.

If the height of the convex portion with respect to the cell gap is 6.7% or less when the cell gap is 3.0 μm, the light leakage and the width of disclination monotonously decrease as the convex portion becomes higher. Therefore, the cell gap is set to 3.0.
When the height is reduced to not more than μm, the reason why the width of the light leakage and the disclination monotonously decreases as the height of the protrusion increases is considered to be a range where the height of the protrusion relative to the cell gap does not exceed 6.7%. .

In this manner, the upper limit, or the upper and lower limits, of the height of the convex portion is determined. The ridges of the rubbing cloth may be disturbed by the protrusions, resulting in rubbing failure. Therefore, it is necessary to determine the upper limit of the height of the protrusions in order to manufacture a liquid crystal display panel. In addition, the optimum value of the height of the convex portion with respect to the cell gap tends to decrease as the cell gap decreases.

The optimum value of the height of the convex portion thus determined can be widely used as a means for hiding the disclination of the liquid crystal in not only the TN mode but also the normally white mode alignment mode.

The optimum value of the height of the convex portion is determined by appropriately adjusting the lines of electric force generated by the horizontal electric field and the vertical electric field of the active matrix type liquid crystal display device, and as shown in FIG. The area where the lines of electric force having a vertical component are generated is increased at the end of the pixel electrode.

For this reason, the simulation is performed with a transmission type liquid crystal display device, but it is considered that the present invention can be applied to a reflection type liquid crystal display device. Even in a reflective liquid crystal display device, when a voltage is applied to the pixel electrode and the liquid crystal is aligned with a vertical electric field, unnecessary electric fields in the oblique direction with respect to the substrate surface are reduced, and light leakage at the end of the pixel electrode and This is because disclination can be reduced.

Although the simulation was performed using the TN method, the alignment method of the liquid crystal is not limited to the TN method.
This is because, in an active matrix type liquid crystal display device, when the liquid crystal is aligned by a vertical electric field, the height of the convex portion is optimized to reduce an unnecessary electric field oblique to the substrate surface. For example, OCB (Optically Contr
It is considered that the present invention can be applied to an olled birefringence (STB) method, an STB method, an ECB method using a homogeneous alignment cell, and the like.

If the projections do not induce alignment defects in the liquid crystal, it is considered that the method can be applied to an alignment method using a smectic liquid crystal. For example, it is considered that the present invention can be applied to a liquid crystal display device using a ferroelectric liquid crystal or an antiferroelectric liquid crystal. In addition, it is considered that the present invention can be applied to a liquid crystal display device using a material obtained by adding a liquid crystalline polymer to these liquid crystals and curing by irradiation of light (for example, ultraviolet light).

The simulation is based on the angle formed by the surface of the pixel electrode formed on the side surface of the convex portion in contact with the second region and the third region of the pixel electrode formed on the flat surface (hereinafter, the taper angle of the convex portion is defined as Is 90 °. However, the present invention is also applicable to the case where the taper angle of the convex portion is 90 ° or less. The taper angle θ of the convex portion 204 is 90 ° as in the cross-sectional view showing the electric lines of force when the convex portion has a taper in FIG.
In the case where the distance is less than the line of electric force, the lines of electric force are generated in the direction perpendicular to the conductor, so that the convex portion is tapered, so that the counter electrode 201 and the second region 21 of the pixel electrodes 203a to 203b are
9, the lines of electric force 218 formed between the lines 9 become gentle, and the liquid crystal 220 is more likely to be oriented perpendicular to the substrate surface. For this reason, when the convex portion has a taper, a greater light leakage and a larger disc than the taper angle of 90 ° are obtained by using the relationship between the convex portion height 221 and the cell gap shown in the present invention. It is considered that there is an effect of reducing ligation.

[Width of First Region of Pixel Electrode at Top of Protrusion] Next, the liquid crystal when the width of the first region of the pixel electrode formed so as to overlap the top of the projection is changed. The change in orientation was investigated.

FIG. 2 shows a simulation model. In FIG. 2, a counter electrode 201, a liquid crystal 202, a convex portion 204,
The pixel electrodes 203a to 203b are components of the simulation model.

The simulation parameters are summarized below. Cell gap d: 4.5 μm Distance between pixel electrodes s: 2 μm, 4 μm Height of convex portion h: 0 μm, 0.5 μm Width o of first region of pixel electrode o: −1.0 μm, −0.5
μm, 0 μm, 0.5 μm, 1.0 μm In the width o of the first region of the pixel electrode, a sign of − such as −1.0 μm indicates that the pixel electrode is not formed on the convex portion, and the , 1.0 μm apart from each other.

The conditions fixed in the simulation are summarized below. Potential of the pixel electrode 203a: + 5V Potential of the pixel electrode 203b: -5V Potential of the counter electrode 201: 0V Pixel pitch p: 18 μm

The results of the simulation are shown in the sectional views of FIGS. The distance (s) between the pixel electrodes is 2.0 μm.

FIG. 11 has no projection. FIG. 12 shows that the projection and the pixel electrode do not overlap each other, and 0.5 μm from the end of the projection.
There is an end of the pixel electrode at m. That is, the second region of the pixel electrode and the first region of the pixel electrode do not exist in FIGS. At this time, the light leakage from the edge of the pixel and the width (x) of the disclination did not change at all in FIGS.

In FIG. 13, a pixel electrode is formed on the side of the projection. That is, there is a second region of the pixel electrode. FIG.
12, the position of the disclination above the pixel electrode having a potential of −5 V has moved to the end of the pixel of 0.4 μm. Due to the second region of the pixel electrode, the vertical electric field is strengthened and the horizontal electric field is slightly weakened.

FIG. 14 shows a first area of the pixel electrode formed at the upper end of the projection and a second area of the pixel electrode formed at the side of the projection. The width of the first region of the pixel electrode is 0.
5 μm. Due to the second region of the pixel electrode, the vertical electric field is increased, and disclination above the pixel electrode having a potential of -5 V is moved to the end of the pixel electrode.

FIG. 15 is different from FIG.
Is 1.0 μm in width. This further increases the vertical electric field relative to the horizontal electric field, and
The disclination above the pixel electrode having the potential has moved to the end of the pixel electrode.

As described above, the effect of reducing the disclination due to the presence of the first region of the pixel electrode and the second region of the pixel electrode can be understood.

Next, the distance (s) between the pixel electrodes is 4.0 μm.
Data at the time of m was added to obtain systematic data. FIG. 16 shows a simulation result. FIG.
2A is a graph of the width (o) of the first region of the pixel electrode and the width (x) of light leakage and disclination with respect to the cell gap (d) in the simulation model of FIG. Here, the width (x) of the light leakage and the disclination indicates the width of the high brightness region caused by the disclination and the light leakage formed on both sides of the convex portion.

FIG. 16B is a graph showing the width (o) of the first region of the pixel electrode and the width (y) of light leakage and disclination with respect to the cell gap (d) in the simulation model of FIG. It was done. Here, the width (y) of the light leakage and the disclination indicates the width of the high brightness area caused by the disclination and the light leakage on one side of the projection, that is, on the electrode side having a potential of -5 V. .

From FIGS. 16A and 16B, the width (o) of the first region of the pixel electrode is 0.5 μm or more, preferably 1.0 mm, regardless of the distance (s) between the pixel electrodes. It can be seen that when the thickness is 0 μm or more, there is an effect of reducing disclination and light leakage.

In FIGS. 16A and 16B, when the width of the first region of the pixel electrode is 0 μm, the light leakage and the disclination width are such that the pixel electrode is formed only on the side surface of the projection. 3 shows the light leakage and the width of the disclination in the state of being closed. The width of the first region of the pixel electrode is 0.5 μm
The effect of reducing the light leakage and the width of the disclination is low as compared with the above case or the case of 1.0 μm or more. However, as compared with the case where the width of the first region of the pixel electrode in which the pixel electrode is not completely hung on the convex portion is −0.5 μm,
Light leakage and disclination width are reduced.

An experiment was conducted by actually changing the width of the overlap between the projection and the pixel electrode. FIG. 33A is a top view of a substrate having a convex portion, and FIGS. 33B to 33C are cross-sectional views of the substrate having a convex portion.

In the top view of FIG. 33A, all the pixel electrodes 301a indicated by oblique lines have the same potential. In addition, the pixel electrodes 301b indicated by the vertical lines all have the same potential. This is because adjacent pixel electrodes are connected by a transparent conductive film 300 having a width of 3 μm. Assuming line inversion driving, a potential of +5 V is applied to the pixel electrode 301a. Further, a potential of -5 V is applied to the pixel electrode 301b. Rubbing direction 302 of substrate having convex structure
Is shown in the figure. The rubbing direction of the substrate facing the substrate having the convex structure is orthogonal to the rubbing direction 302.

FIG. 33B shows a cross section of the top view of FIG. 33A taken along a chain line GG ′. FIG. 33C shows a cross section of the top view of FIG. 33A taken along a chain line HH ′. The same parts as those in FIG. 33A are denoted by the same reference numerals. The ends of the pixel electrodes 301 a and 301 b formed on the substrate 303 are over the projections 304. Adjacent pixel electrode 301
The distance between a and 301b was fixed at 2.0 μm, and the width of the pixel electrode overlapping the projection, that is, the width 305 of the first region of the pixel electrode was changed, and the alignment of the liquid crystal was confirmed. The width of the first region of the pixel electrode is −1.0 μm, 0 μm, 0.5 μm,
1.0 μm. The cell gap is 4.5 μm, the height of the projection is 0.5 μm, and the pixel pitch is 18 μm.

FIG. 34 shows a photograph of the orientation of the liquid crystal when the pixel electrode structure of FIG. 33 is used. Pixel electrodes adjacent to each other in the horizontal direction on the paper have the same potential. The rubbing is perpendicular to the plane of the paper. Also in the experiment, when the width (o) of the first region of the pixel electrode is 0.5 μm or more, preferably 1.0 μm or more, there is an effect that the width of disclination is reduced. It can be seen that the width of the disclination and light leakage extending in the horizontal direction of the paper decreases as the width (o) of the first region of the pixel electrode increases.

[0090]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention are shown in FIGS. 17 to 20, parts having the same function are denoted by the same reference numerals.

The top view of the pixel shown in FIG.
06 and a gate wiring 30 serving as a gate electrode of a semiconductor layer
1, a source wiring 302 electrically connected to a source region of a semiconductor layer, and a pixel electrode 303 electrically connected to a drain region of a semiconductor layer via a contact hole 305 are illustrated. FIG. 17 shows a configuration in which a projection 304 of the present invention is provided above the source wiring 302 in parallel with the source wiring. This is effective in reducing disclination and light leakage that can be made parallel to the source line at the end of the pixel electrode when the source line inversion drive is performed. The first region of the pixel electrode formed so as to overlap the upper end portion of the convex portion and the second region of the pixel electrode formed on the side portion of the convex portion exhibit the effect of the present invention. Therefore, the convex portion is provided in a region overlapping with the pixel electrode.

When the gate line inversion driving is performed, the protrusion of the present invention may be provided in parallel with the gate wiring.

The top view of the pixel shown in FIG.
02 of the present invention in parallel with the
Is provided. For example, when the source line inversion driving is performed, the horizontal electric field is generated not only between the pixel electrodes adjacent to each other with the source wiring interposed therebetween but also between the pixel electrodes adjacent to each other with the gate wiring interposed therebetween. Therefore, FIG. 18 also has an effect of reducing disclination and light leakage caused by a lateral electric field between pixel electrodes adjacent to each other with a gate line interposed therebetween. The protrusions are the same as those in FIG. 17 and are provided in a region overlapping with the pixel electrode.

The top view of the pixel shown in FIG.
02 of the present invention in parallel with the
Is provided. In FIG. 18, the protrusions are high,
The tip of the rubbing cloth may not reach the concave portion of the gap between the convex portions 304 in FIG. 18, and uneven rubbing may occur. FIG.
In order to make the rubbing uniform, a convex portion is provided as a dummy pattern also on a portion where the pixel electrode 303 does not overlap with the convex portion on the source wiring and the gate wiring.

17 to 19, when the cell gap is not less than 3.0 μm and not more than 4.5 μm, the height of the convex portion is not less than 4.4% and not more than 22.5%, preferably not more than 4.25% of the cell gap. It is good to make it 4% or more and 15.6% or less. When the cell gap is 3.0 μm or less, the height of the projection is 15.6% or less of the cell gap, preferably 6.7.
% Is desirable. Cell gap of 4.5μ
m or more, the height of the projection is 15.6 of the cell gap.
% Is desirable.

The top view of the pixel shown in FIG.
The protrusion of the present invention is provided in parallel with the gate electrode 02 and the gate wiring 301, and the height of the protrusion is changed depending on the location. For example, when the source line inversion driving is performed, the horizontal electric field is generated not only between the pixel electrodes adjacent to each other with the source wiring 302 interposed therebetween but also between the pixel electrodes adjacent to each other with the gate wiring 301 interposed therebetween. Of course, the horizontal electric field between the pixel electrodes adjacent to each other with the source wiring interposed therebetween is larger. Therefore, it is preferable to change the height of the convex portion in consideration of the way of forming lines of electric force between adjacent pixels. FIG. 20 illustrates a protrusion 307 having a first height and a protrusion 308 having a second height. The height of the convex portion may be changed depending on the location depending on how the electric field is generated. For example, depending on how the lines of electric force are formed, it is possible to make the protrusion having the first height relatively higher than the protrusion having the second height.

The convex portions having the first height and the convex portions having the second height have their cell gaps of 3.0 μm.
When the thickness is not less than 4.5 μm and not more than 4.4% and not more than 22.5% of the cell gap, preferably not less than 4.4% and 15.6%
It is better to do the following. When the cell gap is 3.0 μm or less, the protrusion having the first height and the protrusion having the second height have a cell gap of 15.6% or less, preferably 6.7% or less. It is desirable to do. When the cell gap is 4.5 μm or more, the protrusion having the first height and the protrusion having the second height have 15.6% of the cell gap.
It is desirable to make the following.

The projections may be formed by patterning a photosensitive organic resin film or an organic resin film by a photolithography process. Needless to say, an inorganic film such as a silicon oxide film, a nitrogen oxide film, or a silicon nitride oxide film can be formed by patterning.

In order to change the height of the convex portion depending on the location, it is preferable to form the photosensitive resin film twice. In addition, a semiconductor layer, a gate wiring, a source wiring, and the like of the element substrate are also formed in a place where a convex portion is desired to be high, and a portion which is selectively convex is formed before forming a pixel electrode. Is also good.

In FIGS. 17 to 20, the width of the first region of the pixel electrode formed at the upper end of the projection is 0.5 μm.
m or more, preferably 1.0 μm.

The present invention is not limited to the above embodiments, and it is also possible to combine the features of the above embodiments.

[0102]

[Embodiment 1] FIGS. 21 and 2 show an embodiment of the present invention.
5 will be described.

In this embodiment, a method of manufacturing a pixel TFT which is a switching element of a pixel portion and a TFT of a driving circuit (a signal line driving circuit, a scanning line driving circuit, and the like) provided around the pixel portion on the same substrate. Will be described according to the steps. However, for the sake of simplicity, a CMOS circuit, which is a basic configuration circuit, is provided in the drive circuit section for the pixel T in the pixel section.
In the FT, an n-channel TFT is illustrated by a cross section along a certain path.

First, as shown in FIG. 21A, oxidation is performed on a substrate 400 made of glass such as barium borosilicate glass represented by Corning # 7059 glass or # 1737 glass, or aluminoborosilicate glass. A base film 401 including an insulating film such as a silicon film, a silicon nitride film, or a silicon oxynitride film is formed. For example, a silicon oxynitride film 401a manufactured from SiH ₄ , NH ₃ , and N ₂ O by a plasma CVD method has a thickness of 10 to 200 nm.
(Preferably 50-100 nm) and Si
Silicon oxynitride hydride film 4 made of H ₄ and N ₂ O
01b is 50 to 200 nm (preferably 100 to 150 nm).
(nm). In this embodiment, the base film 401 is used.
Is shown as a two-layer structure, but may be formed as a single-layer film of the insulating film or a structure in which two or more layers are stacked.

The island-shaped semiconductor films 402 to 406 are formed of a crystalline semiconductor film formed by using a semiconductor film having an amorphous structure by a laser crystallization method or a known thermal crystallization method. The thickness of the island-shaped semiconductor films 402 to 406 is 25 to 80 nm.
(Preferably 30 to 60 nm). The material of the crystalline semiconductor film is not limited, but is preferably formed of silicon or a silicon germanium (SiGe) alloy.

Preparation of crystalline semiconductor film by laser crystallization
To do this, use a pulse oscillation type or continuous emission type excimer
Laser, Ar laser, Kr laser, YAG laser, Y
VO _FourLaser, YLF laser, YAlO_ThreeLaser, Gala
Laser, ruby laser, alexandrite laser,
Ti: a sapphire laser or the like is used. These lasers
In the case of using
Optical beam is collected by the optical system into a linear, rectangular, or elliptical shape.
It is preferable to use a method in which the semiconductor film is irradiated with light. 0.5 ~
Relative to laser light at a speed of about 2000 cm / s
It is preferable that the semiconductor film be moved first and then irradiated. Crystallization conditions
Is the choice of the practitioner, but the amorphous semiconductor film
In order to obtain crystals with a large particle size during crystallization of
Using a solid-state laser capable of oscillation, the second harmonic to the
Preferably, four harmonics are applied. Typically, Nd:
YVO_FourSecond harmonic of laser (fundamental wave 1064nm)
(532 nm) or the third harmonic (355 nm).
Note that the harmonics with respect to the fundamental wave use a nonlinear optical element.
It can be obtained by doing. For example, excimer laser
When using a pulse oscillation frequency of 30 Hz, laser
-Energy density of 100 to 400 mJ / cm^Two(Typically
200-300mJ / cm^Two). In addition, YAG laser
When using the second harmonic, the pulse oscillation frequency
Number 1 to 10 kHz, laser energy density 30
0-600mJ / cm^Two(Typically 350-500mJ / cm^Two)When
Good. And a width of 100 to 1000 μm, for example 4
The laser light condensed linearly at 00 μm
And irradiate it at this time.
(Overlap rate) is set to 80 to 98%.

Next, a gate insulating film 407 covering the island-shaped semiconductor films 402 to 406 is formed. Gate insulating film 407
Uses a plasma CVD method or a sputtering method and has a thickness of 4
The insulating film containing silicon is formed to have a thickness of 0 to 150 nm. In this embodiment, a silicon oxynitride film with a thickness of 120 nm is formed. Needless to say, the gate insulating film is not limited to such a silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a stacked structure. For example, when a silicon oxide film is used, TEOS (Tetraethyl Ortho Silicate) is used by a plasma CVD method.
And O ₂ , a reaction pressure of 40 Pa and a substrate temperature of 300 to
400 ° C., high frequency (13.56 MHz) power density 0.
It can be formed by discharging at 5 to 0.8 W / cm ² .
The silicon oxide film thus produced is
Good characteristics as a gate insulating film can be obtained by thermal annealing at 00 to 500 ° C.

[0108] Then, a first conductive film 408 and a second conductive film 409 for forming a gate electrode are formed over the gate insulating film 407. In the present embodiment, the first conductive film 40
8 is formed of TaN to a thickness of 50 to 100 nm, and the second conductive film 409 is formed of W to a thickness of 100 to 300 nm.

When a W film is formed, it is formed by a sputtering method using W as a target. Alternatively, it can be formed by a thermal CVD method using tungsten hexafluoride (WF ₆ ). In any case, it is necessary to lower the resistance in order to use it as a gate electrode.
It is desirable to set the resistance to Ωcm or less. The resistivity of the W film can be reduced by enlarging the crystal grains. However, when there are many impurity elements such as oxygen in W, the crystallization is inhibited and the resistance is increased. From this, when using the sputtering method,
By using a W target having a purity of 99.9999% and forming a W film with sufficient care so as not to mix impurities from the gas phase during film formation, the resistivity is 9 to 20 μΩc.
m can be realized.

In this embodiment, the first conductive film 408
Is TaN and the second conductive film 409 is W, but each is an element selected from Ta, W, Ti, Mo, Al, and Cu.
Alternatively, it may be formed of an alloy material or a compound material containing the above element as a main component. Alternatively, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus may be used. As a combination other than this embodiment, the first conductive film is formed of tantalum (Ta), the second conductive film is formed of W, and the first conductive film is formed of tantalum nitride (TaN). There is a combination in which the second conductive film is made of Al, the first conductive film is made of tantalum nitride (TaN), and the second conductive film is made of Cu.

Next, resist masks 410 to 41 are used.
5, and a first etching process for forming electrodes and wiring is performed. In this embodiment, the ICP (Inductively
An etching gas is mixed by using a coupled plasma (inductively coupled plasma) etching method, and plasma is generated by applying 500 W of RF (13.56 MHz) power to the coil-type electrode at a pressure of 1 Pa. 100 W of RF (13.56 MHz) power is also applied to the substrate side (sample stage), and a substantially negative self-bias voltage is applied. By appropriately selecting an etching gas, the W film and the TaN film are etched to the same extent.

Under the above-mentioned etching conditions, by making the shape of the resist mask suitable, the ends of the first conductive layer and the second conductive layer are tapered due to the effect of the bias voltage applied to the substrate side. It becomes a taper shape with an angle of 15 to 45 °. In order to perform etching without leaving a residue on the gate insulating film, the etching time may be increased by about 10 to 20%. Since the selectivity of the silicon oxynitride film to the W film is 2 to 4 (typically 3), the exposed surface of the silicon oxynitride film is etched by about 20 to 50 nm by the over-etching process. In this manner, the first shape conductive layers 417 to 422 (the first conductive layers 417 a to 422 a) including the first conductive layer and the second conductive layer are formed by the first etching process.
And second conductive layers 417b to 422b). 41
Reference numeral 6 denotes a gate insulating film, and the first shape conductive layers 417 to
The region not covered by 422 is etched by about 20 to 50 nm to form a thinned region.

Then, a first doping process is performed, and n
An impurity element for imparting a mold is added. (FIG. 21 (B))
The doping may be performed by an ion doping method or an ion implantation method. The condition of the ion doping method is that the dose amount is 1
× 10 ^{13 to} 5 × 10 ¹⁴ atoms / cm ² and an acceleration voltage of 60
It is performed as １００100 keV. An element belonging to Group 15 of the periodic table, typically phosphorus (P) or arsenic (As) is used as the n-type impurity element. Here, phosphorus (P) is used. In this case, the conductive layers 417 to 420 serve as a mask for the impurity element imparting n-type, and the first impurity regions 423 to 426 are formed in a self-aligned manner. The first impurity regions 423 to 426 have 1 × 10 ²⁰ to 1 × 10 ²¹ atomic.
An impurity element imparting n-type is added in a concentration range of / cm ³ .

Next, a second etching process is performed as shown in FIG. Using an ICP etching method, a reactive gas is introduced into the chamber, a predetermined RF power (13.56 MHz) is supplied to the coil-type electrode, and plasma is generated. On the substrate side (sample stage), a lower RF (13.56 MHz)
z) Power is applied, and a lower self-bias voltage is applied than in the first etching process. The W film is anisotropically etched to obtain second shape conductive layers 427 to 432.

Further, as shown in FIG. 21C, a second doping process is performed. In this case, the dose is lower than that of the first doping process, and n is set as a condition of a high acceleration voltage.
Doping with an impurity element for giving a mold. For example, the acceleration voltage is set to 70 to 120 keV and the dose is set to 1 × 10 ¹³ / cm ² , and a new impurity region is formed inside the first impurity region formed in the island-shaped semiconductor film in FIG. Form. The doping is performed in the second shape conductive layers 427 to 430.
Is used as a mask for the impurity element, and the region below the first conductive layers 427a to 430a is doped so that the impurity element is added. Thus, the second impurity regions 433 to 433 overlapping with the first conductive layers 427a to 430a are formed.
437 is formed. The impurity element imparting n-type is the second element.
To a concentration of ^{1 × 10 17 ~1 × 10 18} atomic / cm 3 in the impurity region.

As shown in FIG. 22A, the gate insulating film 41
6 is etched at the same time as the first conductive layer T
Since the aN is etched and receded, third shape conductive layers 438 to 443 (first conductive layers 438a to 443a and second conductive layers 438b to 443b) are formed. 444
Is a gate insulating film, and the third shape conductive layers 438 to 44
Areas not covered by 3 are further etched by about 20 to 50 nm to form thinner areas.

In FIG. 22A, the first conductive layer 43
Third impurity regions 445-44 overlapping with 8a-441a
9 and fourth impurity regions 450 to 454 outside the third impurity region. Thus, the concentration of the impurity element imparting n-type in the third impurity region and the fourth impurity region becomes substantially equal to the concentration of the impurity element imparting n-type in the second impurity region.

Then, as shown in FIG. 22B, the island-shaped semiconductor film 403 forming the p-channel TFT and the island-shaped semiconductor film 406 forming the p-channel TFT have a conductivity type opposite to the one conductivity type. The fourth impurity regions 458 to 461 are formed. Using the third shape conductive layer 439 and the third shape conductive layer 441 as masks for impurity elements, impurity regions are formed in a self-aligned manner. At this time, the island-shaped semiconductor film 402, the island-shaped semiconductor film 404, and the island-shaped semiconductor film 405 forming the n-channel TFT are formed by using a resist mask 455 to 455.
The whole surface is covered with 457. Impurity regions 458-46
Phosphorus is added at different concentrations to each,
By ion doping using diborane (B ₂ H ₆ ), the impurity concentration in each region is set to 2 × 10 ²⁰ to 2
X 10 ²¹ atoms / cm ³ .

Through the above steps, an impurity region is formed in each of the island-shaped semiconductor films. Conductive layers (conductive layers forming gate electrodes) 438 to 441 overlapping with the island-shaped semiconductor film function as gate electrodes of the TFT. 442 functions as a source wiring, and 443 functions as a wiring in a driver circuit.

FIG. 22 is a view for controlling the conductivity type.
As shown in (C), a step of activating the impurity element added to each of the island-shaped semiconductor films is performed. This step is performed by a thermal annealing method using a furnace annealing furnace. In addition, a laser annealing method or a rapid thermal annealing method (RTA method) can be applied. In the thermal annealing method, the oxygen concentration is 1 ppm or less, preferably 0.1 ppm.
The heat treatment is performed at 400 to 700 ° C., typically 500 to 600 ° C. in a nitrogen atmosphere of ppm or less. In this embodiment, the heat treatment is performed at 500 ° C. for 4 hours. However, 438-4
When the wiring material used for 43 is weak to heat, it is preferable to activate after forming an interlayer insulating film (mainly composed of silicon) to protect the wiring and the like.

Further, a heat treatment is performed at 300 to 450 ° C. for 1 to 12 hours in an atmosphere containing 3 to 100% of hydrogen to hydrogenate the island-like semiconductor film. In this step, dangling bonds in the semiconductor film are terminated by thermally excited hydrogen. As another means of hydrogenation,
Plasma hydrogenation (using hydrogen excited by plasma) may be performed.

Then, as shown in FIG. 23, a first interlayer insulating film 472 is formed of a silicon oxynitride film with a thickness of 100 to 200 nm. A second layer made of an organic insulating material thereon;
An acrylic resin film or a polyimide resin film having a thickness of 1.8 μm is formed as the interlayer insulating film 473 of FIG. Next, an etching step for forming a contact hole is performed.

Next, a conductive metal film is formed by a sputtering method or a vacuum evaporation method. This is because a Ti film is formed to a thickness of 50 to 150 nm, a contact is formed with a semiconductor film forming a source or drain region of the island-shaped semiconductor film, and the Ti film is formed.
300-400nm of aluminum (Al) on the film
And a Ti film or titanium nitride (Ti
N) A film was formed with a thickness of 100 to 200 nm to form a three-layer structure.

Then, a source wiring 474 for forming a contact with the source region of the island-shaped semiconductor film in the drive circuit portion.
To 476, and drain wirings 477 to 479 forming a contact with the drain region are formed.

In the pixel portion, the connection electrode 48
0, gate wiring 481, drain electrode 482, electrode 49
Form 2

The connection electrode 480 electrically connects the source wiring 483 and the first semiconductor film 484. Although not shown, the gate wiring 481 is electrically connected to a conductive layer 485 forming a gate electrode through a contact hole.
The drain electrode 482 is electrically connected to a drain region of the first semiconductor film 484. The electrode 492 is electrically connected to the second semiconductor film 493, and makes the second semiconductor film 493 function as an electrode of the storage capacitor 505.

Next, as shown in FIG. 24, using a photosensitive resin film, a photolithography process is performed to form a convex portion 600 with a thickness of 0.32 μm above the source wiring 483.
The photosensitive resin film is made of BPR-107VL manufactured by JSR
A material diluted with GMEA (propylene glycol monomethyl ether acetate) to reduce the viscosity is used. In the top view of the pixel portion, the convex portion is a long and narrow rectangular pattern, and the width of the short axis is 4.0 μm.

Thereafter, as shown in FIGS. 23 and 24, a transparent conductive film is formed on the entire surface, and the pixel electrode 491 is formed by patterning and etching using a photomask.
To form The pixel electrode 491 is formed of the second interlayer insulating film 47.
3, a portion overlapping with the drain electrode 482 and the electrode 492 of the pixel TFT is provided to form a connection structure. Here, the pixel electrode 491 formed on the upper end of the convex portion
Of the first region 601 is set to 1.0 μm.

The material of the transparent conductive film is indium oxide (I
n ₂ O ₃ ) and indium tin oxide alloy (In ₂ O ₃ —S
nO ₂ ; ITO) or the like can be formed by a sputtering method, a vacuum evaporation method, or the like. The etching of such a material is performed using a hydrochloric acid-based solution. However, in particular, since etching of ITO easily generates residues, an indium oxide-zinc oxide alloy (In ₂ O ₃ —ZnO) may be used in order to improve the etching processability. Since the indium zinc oxide alloy has excellent surface smoothness and excellent thermal stability with respect to ITO, it is possible to prevent a corrosion reaction with Al contacting the end face of the drain electrode 482. Similarly,
Zinc oxide (ZnO) is also a suitable material, and zinc oxide (ZnO: Ga) to which gallium (Ga) is added to increase the transmittance and conductivity of visible light can be used.

Thus, an active matrix substrate corresponding to a transmission type liquid crystal display device can be completed.

As described above, the n-channel TFT 5
01, p-channel TFT 502, n-channel TFT
A driver circuit portion including the pixel circuit 503 and a pixel portion including the pixel TFT 504 and the storage capacitor 505 can be formed over the same substrate. In this specification, such a substrate is referred to as an active matrix substrate for convenience (FIG. 23).

The n-channel TFT 501 in the driver circuit portion includes a channel formation region 462, a third impurity region 445 (GOLD region) overlapping with the conductive layer 438 forming a gate electrode, and a fourth impurity formed outside the gate electrode. The semiconductor device includes a region 450 (LDD region) and a first impurity region 423 functioning as a source region or a drain region.
The channel forming region 46 is formed in the p-channel TFT 502.
3. The semiconductor device includes a fifth impurity region 446 overlapping with the conductive layer 439 forming the gate electrode, and a sixth impurity region 451 functioning as a source or drain region. In the n-channel TFT 503, a channel formation region 464, a third impurity region 447 (GOLD region) overlapping with the conductive layer 440 forming a gate electrode, and a fourth impurity region 452 (LDD region) formed outside the gate electrode. And a first impurity region 425 functioning as a source region or a drain region.

In the pixel TFT 504 in the pixel portion, a channel formation region 465, a third impurity region 448 (GOLD region) overlapping with the conductive layer 485 forming a gate electrode, and a fourth impurity region 453 formed outside the gate electrode (LD
D region) and a first impurity region 426 functioning as a source region or a drain region. The semiconductor film 493 functioning as one electrode of the storage capacitor 505 is doped with an impurity element imparting p-type. A storage capacitor is formed by the conductive layer 485 forming the gate electrode and an insulating layer (the same layer as the gate insulating film) therebetween.

The top view of FIG. 25 is indicated by a chain line AA ′ and a chain line B−.
The cross section cut along B ′ is a chain line AA ′ in FIG.
-Corresponds to the cross section cut at B '. A cross section of the top view of FIG. 25 cut along a dashed line CC ′ is a dashed line CC ′ of FIG.
Corresponds to the cross section cut by. 801 to 80 in FIG.
5 is a contact hole.

In the top view of FIG. 25, the protrusion formed above the source wiring has an island-like rectangular shape. However, it is also possible to form a stripe shape in which the protrusions of adjacent pixels are connected.

[Embodiment 2] A part of the manufacturing method of the active matrix substrate manufactured in Embodiment 1 can be applied to a reflection type liquid crystal display device.

First, the steps are performed in accordance with FIGS. 21 to 22 of the first embodiment to obtain the structure shown in FIG.

Then, as shown in FIG. 27, a first interlayer insulating film 472 is formed of a silicon oxynitride film with a thickness of 100 to 200 nm. A second layer made of an organic insulating material thereon;
An acrylic resin film or a polyimide film having a thickness of 1.8 μm is formed as the interlayer insulating film 473 of FIG. Next, an etching step for forming a contact hole is performed.

Next, as shown in FIG. 28, a photolithography process is performed using a photosensitive resin film, and a thickness of 0.32 μm is obtained.
The projection 600 is formed above the source wiring 483. For the photosensitive resin film, BPR-107VL manufactured by JSR
A material whose viscosity is reduced by dilution with EA (propylene glycol monomethyl ether acetate) is used.

Next, as shown in FIGS. 27 and 28, a conductive metal film is formed by a sputtering method or a vacuum evaporation method. This is because a Ti film is formed to a thickness of 50 to 150 nm, a contact is formed with a semiconductor film forming a source or drain region of an island-shaped semiconductor film, and aluminum (Al) is formed on the Ti film by a thickness of 300 to 150 nm. It is formed to a thickness of 400 nm, and a Ti film or a titanium nitride (TiN) film is
A three-layer structure was formed with a thickness of nm.

Then, a source wiring 474 for forming a contact with the source region of the island-shaped semiconductor film in the drive circuit portion.
To 476, and drain wirings 477 to 479 forming a contact with the drain region are formed.

In the pixel portion, the connection electrode 48
0, a gate wiring 481, and a drain electrode 482 are formed. In this embodiment, the drain electrode 482 has a function as a pixel electrode of the reflection type liquid crystal display device. Note that, as shown in FIG. 28, the upper end of the convex portion and the drain electrode 482 overlap. First region 602 of drain electrode
Is 1.5 μm.

The connection electrode 480 electrically connects the source wiring 483 and the first semiconductor film 484. Although not shown, the gate wiring 481 is electrically connected to a conductive layer 485 forming a gate electrode through a contact hole.
The drain electrode 482 is electrically connected to a drain region of the first semiconductor film 484. In addition, the drain electrode 482 is electrically connected to the second semiconductor film 493, and makes the second semiconductor film 493 function as an electrode of the storage capacitor 505.

Regarding the storage capacitance, the second semiconductor film 493 provided for each pixel and the conductive layer 4 forming a gate electrode are formed.
85 is an electrode. The gate insulating film 444 functions as a dielectric film of the storage capacitor. The second semiconductor film 493 has the same potential as the drain electrode 482. The conductive layer 485 forming the gate electrode has the same potential as the gate wiring.

Thus, an active matrix substrate corresponding to a reflection type liquid crystal display device can be completed.

As described above, the n-channel TFT 5
01, p-channel TFT 502, n-channel TFT
A driver circuit portion including the pixel circuit 503 and a pixel portion including the pixel TFT 504 and the storage capacitor 505 can be formed over the same substrate. In this specification, such a substrate is referred to as an active matrix substrate for convenience.

The n-channel TFT 501 in the driver circuit portion includes a channel formation region 462, a third impurity region 445 (GOLD region) overlapping with the conductive layer 438 forming a gate electrode, and a fourth impurity formed outside the gate electrode. The semiconductor device includes a region 450 (LDD region) and a first impurity region 423 functioning as a source region or a drain region.
The channel forming region 46 is formed in the p-channel TFT 502.
3. The semiconductor device includes a fifth impurity region 446 overlapping with the conductive layer 439 forming the gate electrode, and a sixth impurity region 451 functioning as a source or drain region. In the n-channel TFT 503, a channel formation region 464, a third impurity region 447 (GOLD region) overlapping with the conductive layer 440 forming a gate electrode, and a fourth impurity region 452 (LDD region) formed outside the gate electrode. And a first impurity region 425 functioning as a source region or a drain region.

In the pixel TFT 504 in the pixel portion, a channel formation region 465, a third impurity region 448 (GOLD region) overlapping the conductive layer 485 forming the gate electrode, and a fourth impurity region 453 formed outside the gate electrode (LD
D region) and a first impurity region 426 functioning as a source region or a drain region. The semiconductor film 493 functioning as one electrode of the storage capacitor 505 is doped with an impurity element imparting p-type. A storage capacitor is formed by the conductive layer 485 forming the gate electrode and an insulating layer (the same layer as the gate insulating film) therebetween.

The top view of FIG. 29 is indicated by a chain line DD ′ and a chain line E−.
The cross section cut along E ′ is a dashed line DD ′ in FIG.
-Corresponds to the cross section cut at E '. A cross section of the top view of FIG. 29 cut along a dashed line FF ′ is a dashed line FF ′ of FIG.
Corresponds to the cross section cut by.

[Embodiment 3] In this embodiment, a process of manufacturing an active matrix liquid crystal display device from the active matrix substrate manufactured in Embodiment 1 will be described below.
FIG. 26 is used for the description.

First, an active matrix substrate is obtained according to the first embodiment. FIG. 26 is a top view of the pixel portion of the active matrix substrate shown in FIG.
A cross section cut along -C 'is shown. A drive circuit portion 506 and a pixel portion 507 are formed over the active matrix substrate.

First, an alignment film 512 is formed on an active matrix substrate, and a rubbing process is performed. In this embodiment, before forming the alignment film 512, a columnar spacer (not shown) for maintaining a substrate interval was formed at a desired position by patterning an organic resin film such as an acrylic resin film. In this embodiment, a columnar spacer having a height of 4.0 μm was used. Instead of the columnar spacers, spherical spacers (not shown) may be spread over the entire surface of the substrate.

Next, a counter substrate 508 is prepared. The opposite substrate is provided with a color filter in which a coloring layer and a light shielding layer are arranged corresponding to each pixel. Further, a light-shielding layer was provided also in a portion of the drive circuit. A flattening film was provided to cover the color filter and the light shielding layer. Next, a counter electrode 510 made of a transparent conductive film is formed on the flattening film in the pixel portion,
An alignment film 511 was formed on the entire surface of the counter substrate, and rubbing treatment was performed.

Then, the active matrix substrate on which the pixel portion and the driving circuit are formed and the opposing substrate are sealed with a sealing material 513.
Paste in. A filler is mixed in the sealing material 513, and the two substrates are bonded to each other at a uniform interval by the filler and the columnar spacer. Thereafter, a liquid crystal material 514 is injected between the two substrates, and completely sealed with a sealing agent (not shown). As the liquid crystal material 514, a known liquid crystal material may be used. Thus, FIG.
Is completed. Then, if necessary, the active matrix substrate or the opposing substrate is cut into a desired shape. Further, a polarizing plate and the like were appropriately provided using a known technique. Then, an FPC was attached using a known technique.

The liquid crystal display panel manufactured as described above can be used as a display section of various electronic devices.

This embodiment can be combined with the second embodiment.

In this embodiment, the edge of the pixel electrode 491 is formed so as to overlap the convex portion 600 having a height of 0.32 μm. Since the cell gap is 4.0 μm, the height of the projection is 8% of the cell gap. From the graphs of FIG. 9 and FIG. 36, it can be seen that the height of the projection has the effect of reducing disclination and light leakage.

[Embodiment 4] The liquid crystal display device formed by carrying out any one of Embodiments 1 to 3 can be used for various electro-optical devices. That is, the present invention can be applied to all electronic devices in which the electro-optical device is incorporated in a display unit.

Examples of such electronic devices include a video camera, a digital camera, a projector, a head mounted display (goggle type display), a car navigation, a car stereo, a personal computer, a portable information terminal (a mobile computer, a mobile phone, an electronic book, etc.) ). FIG. 30 shows an example of them.
This is shown in FIGS. 31 and 32.

FIG. 30A shows a personal computer, which comprises a main body 2001, an image input section 2002, and a display section 20.
03, a keyboard 2004 and the like. Display unit 2 of the present invention
003 can be applied.

FIG. 30B shows a video camera, which includes a main body 2101, a display portion 2102, an audio input portion 2103, operation switches 2104, a battery 2105, and an image receiving portion 210.
6 and so on. The present invention can be applied to the display portion 2102.

FIG. 30C shows a mobile computer (mobile computer), which includes a main body 2201, a camera section 2202, an image receiving section 2203, operation switches 2204, a display section 2205, and the like. The present invention can be applied to the display portion 2205.

FIG. 30D shows a goggle type display, which comprises a main body 2301, a display section 2302, and an arm section 230.
3 and so on. The present invention can be applied to the display portion 2302.

FIG. 30E shows a player using a recording medium (hereinafter, referred to as a recording medium) on which a program is recorded, and includes a main body 2401, a display section 2402, and a speaker section 240.
3, a recording medium 2404, an operation switch 2405, and the like. This player uses a DVD (D
digital Versatile Disc), CD
And the like, it is possible to perform music appreciation, movie appreciation, games, and the Internet. The present invention can be applied to the display portion 2402.

FIG. 30F shows a digital camera, which includes a main body 2501, a display section 2502, an eyepiece section 2503, operation switches 2504, an image receiving section (not shown), and the like. The present invention can be applied to the display portion 2502.

FIG. 31A shows a front type projector, which includes a projection device 2601, a screen 2602, and the like. The present invention can be applied to the liquid crystal display device 2808 forming a part of the projection device 2601.

FIG. 31B shows a rear type projector, which includes a main body 2701, a projection device 2702, and a mirror 270.
3, including a screen 2704 and the like. Projection device 2 of the present invention
702 can be applied to a liquid crystal display device 2808 which is a part of the liquid crystal display device.

FIG. 31 (C) shows the projection device 2601 and the projection device 2 shown in FIGS. 31 (A) and 31 (B).
702 is a diagram showing an example of the structure of FIG. Projection device 260
1. The projection device 2702 includes a light source optical system 2801, a mirror 2802, mirrors 2804 to 2806, a dichroic mirror 2803, a prism 2807, and a liquid crystal display device 28.
08, a phase difference plate 2809, and a projection optical system 2810. The projection optical system 2810 is configured by an optical system including a projection lens. In the present embodiment, an example of a three-plate type is shown, but there is no particular limitation, and for example, a single-plate type may be used. FIG.
In the optical path indicated by the arrow in 1 (C), the practitioner appropriately
An optical system such as an optical lens, a film having a polarizing function, a film for adjusting a phase difference, and an IR film may be provided.

FIG. 31D shows an example of the structure of the light source optical system 2801 in FIG. 31C. In this embodiment, the light source optical system 2801 includes a reflector 2811, a light source 2812, a lens array 2813, a lens array 2814, a polarization conversion element 2815, and a condenser lens 2816. Note that the light source optical system shown in FIG. 31D is an example and is not particularly limited. For example,
The practitioner may appropriately provide an optical system such as an optical lens, a film having a polarizing function, a film for adjusting a phase difference, and an IR film in the light source optical system.

However, in the projector shown in FIG. 31, a case in which a transmissive electro-optical device is used is shown, and an application example in a reflective electro-optical device is not shown.

FIG. 32A shows a mobile phone,
01, audio output unit 2902, audio input unit 2903, display unit 2904, operation switch 2905, antenna 2906
And so on. The present invention can be applied to the display portion 2904.

FIG. 32B shows a portable book (electronic book), which includes a main body 3001, a display portion 3002, a display portion 3003,
Storage medium 3004, operation switch 3005, antenna 3
006 etc. Display unit 3002, display unit 30
03 can be applied.

FIG. 32C shows a display, which includes a main body 3101, a support 3102, a display portion 3103, and the like.
The present invention can be applied to the display portion 3103. The display of the present invention is particularly advantageous when the screen is enlarged, and is advantageous for a display having a diagonal of 10 inches or more (particularly 30 inches or more).

As described above, the applicable range of the present invention is extremely wide, and can be applied to electronic devices in all fields. Further, the electronic apparatus of the present embodiment can be realized by using a configuration composed of any combination of the first to third embodiments.

[0175]

According to the present invention, there can be provided a liquid crystal display device which can reduce the liquid crystal alignment defects such as disclination and light leakage of the liquid crystal display device when displaying a black level, and have high contrast and good visibility. can do.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating the principle of the present invention.

FIG. 2 is a cross-sectional view showing a simulation model of the present invention.

FIG. 3 is a cross-sectional view showing a simulation result when there is no convex portion.

FIG. 4 is a cross-sectional view showing a simulation result when the height of the protrusion is 0.3 μm.

FIG. 5 is a cross-sectional view showing a simulation result when the height of the protrusion is 0.7 μm.

FIG. 6 is a cross-sectional view showing a simulation result when the height of the protrusion is 1.0 μm.

FIG. 7 is a cross-sectional view illustrating a simulation result when the height of the protrusion is 1.5 μm.

FIG. 8 is a cross-sectional view showing a simulation result when the height of the protrusion is 3.0 μm.

FIG. 9 is a diagram showing a relationship between a height of a convex portion with respect to a cell gap, and widths of light leakage and disclination.

FIG. 10 is a cross-sectional view showing definitions of a horizontal electric field and a vertical electric field.

FIG. 11 is a cross-sectional view showing a simulation result when there is no convex portion.

FIG. 12 is a cross-sectional view illustrating a simulation result when a pixel electrode does not overlap with a protrusion.

FIG. 13 is a cross-sectional view showing a simulation result when there is a pixel electrode on a side of a convex portion.

FIG. 14 is a cross-sectional view showing a simulation result when pixel electrodes are provided on a side portion and an upper end portion of a convex portion.

FIG. 15 is a cross-sectional view showing a simulation result when a pixel electrode is provided on a side portion and an upper end portion of a protrusion.

FIG. 16 is a diagram showing the relationship between the width of a first region of a pixel electrode and the widths of light leakage and disclination.

FIG. 17 is a top view illustrating an example of an embodiment of the present invention.

FIG. 18 is a top view illustrating an example of an embodiment of the present invention.

FIG. 19 is a top view illustrating an example of an embodiment of the present invention.

FIG. 20 is a top view illustrating an example of an embodiment of the present invention.

FIG. 21 is a cross-sectional view illustrating a manufacturing process of an active matrix substrate (Example 1).

FIG. 22 is a cross-sectional view illustrating a manufacturing process of an active matrix substrate (Example 1).

FIG. 23 is a cross-sectional view illustrating a manufacturing process of an active matrix substrate (Example 1).

FIG. 24 is a cross-sectional view illustrating a manufacturing process of an active matrix substrate (Example 1).

FIG. 25 is a top view showing a pixel portion of an active matrix substrate (Example 1).

FIG. 26 is a cross-sectional view illustrating a liquid crystal display device (Example 3).

FIG. 27 is a cross-sectional view illustrating a manufacturing process of an active matrix substrate (Example 2).

FIG. 28 is a cross-sectional view illustrating a manufacturing process of an active matrix substrate (Example 2).

FIG. 29 is a top view showing a pixel portion of an active matrix substrate (Example 2).

FIG. 30 illustrates an example of an electronic device (Example 4).

FIG. 31 illustrates an example of an electronic device (Example 4).

FIG. 32 illustrates an example of an electronic device (Example 4).

FIG. 33 is a view showing electrodes and protrusions of an experimental substrate.

FIG. 34 is a diagram showing a change in liquid crystal alignment depending on a first width of a pixel electrode.

FIG. 35 is a cross-sectional view showing lines of electric force when the projection has a taper.

FIG. 36 is a view showing the relationship between the height of a convex portion with respect to a cell gap and the width of light leakage and disclination.

FIG. 37 is a diagram showing the polarity of a voltage applied to a pixel when performing source line inversion driving.

 ──────────────────────────────────────────────────続 き Continued on the front page F-term (reference) 2H090 HA14 HC12 HD14 MB01 2H092 JB58 KB25 MA05 MA13 NA04 PA08

Claims (18)

[Claims] A first portion formed on the first substrate and selectively provided below the pixel electrode; and a first region of the pixel electrode formed on the pixel electrode so as to overlap an upper end of the projection. A second region of the pixel electrode formed on the side of the protrusion, and a third region of the pixel electrode in contact with the second region of the pixel electrode.
Wherein the distance between the counter electrode formed on the second substrate and the third region of the pixel electrode is not less than 3.0 μm and not more than 4.5 μm, and the height of the projection is not more than 3.0 μm. A liquid crystal display device, wherein the distance is 4.4% or more and 15.6% or less. 2. A projection selectively provided below a pixel electrode formed on a first substrate, and a first region of the pixel electrode formed on the pixel electrode so as to overlap an upper end of the projection. A second region of the pixel electrode formed on the side of the protrusion, and a third region of the pixel electrode in contact with the second region of the pixel electrode.
And the distance between the counter electrode formed on the second substrate and the third region of the pixel electrode is 3.0 μm or less, and the height of the projection is 15. A liquid crystal display device characterized by being at most 6%. 3. A projection selectively provided below a pixel electrode formed on a first substrate, and a first region of the pixel electrode formed on the pixel electrode so as to overlap an upper end of the projection. A second region of the pixel electrode formed on the side of the protrusion, and a third region of the pixel electrode in contact with the second region of the pixel electrode.
And the distance between the counter electrode formed on the second substrate and the third region of the pixel electrode is 3.0 μm or less, and the height of the projection is 6. A liquid crystal display device characterized by being 7% or less. 4. The method according to claim 1, wherein the first substrate has a projection on a flat surface;
The first of the pixel electrodes formed so as to overlap the upper end of the convex portion
And a second region of the pixel electrode formed on the side of the convex portion.
And a third region of the pixel electrode formed on the flat surface, and the distance between the counter electrode formed on the second substrate and the third region of the pixel electrode is 3. A liquid crystal display device having a height of 0 μm or more and 4.5 μm or less, and wherein the height of the projection is 4.4% or more and 15.6% or less of the distance. 5. The method according to claim 1, wherein the first substrate has a projection on a flat surface;
The first of the pixel electrodes formed so as to overlap the upper end of the convex portion
And a second region of the pixel electrode formed on the side of the convex portion.
And a third region of the pixel electrode formed on the flat surface, and the distance between the counter electrode formed on the second substrate and the third region of the pixel electrode is 3. A liquid crystal display device having a height of 0 μm or less and a height of the projections of 15.6% or less of the distance. 6. A first substrate, comprising: a projection on a flat surface;
The first of the pixel electrodes formed so as to overlap the upper end of the convex portion
And a second region of the pixel electrode formed on the side of the convex portion.
And a third region of the pixel electrode formed on the flat surface, and the distance between the counter electrode formed on the second substrate and the third region of the pixel electrode is 3. A liquid crystal display device having a height of 0 μm or less and a height of the projections of 6.7% or less of the distance. 7. A convex portion having a first height and a convex portion having a second height selectively provided under a pixel electrode formed on a first substrate; A first region of the pixel electrode formed so as to overlap an upper end portion of the convex portion having a height of 1 and the convex portion having a second height; and a convex portion having a first height and a second region of the pixel electrode. A second region of the pixel electrode formed on a side portion of the convex portion having a height, and a third region of the pixel electrode in contact with the second region of the pixel electrode; Is relatively higher than the protrusion having the second height, and the distance between the counter electrode formed on the second substrate and the third region of the pixel electrode is 3. 0 μm or more and 4.5 μm or less, and the height of the convex portion having the first height and the convex portion having the second height is 4.4% or more of the distance, A liquid crystal display device characterized by being 15.6% or less. 8. A projection having a first height and a projection having a second height on a flat surface of the first substrate, and a projection having the first height and a second projection having a second height. A first region of the pixel electrode formed so as to overlap the upper end of the convex portion having a height;
A second region of the pixel electrode formed so as to overlap the side of the convex portion having the first height and the convex portion having the second height; and a second region of the pixel electrode formed on the flat surface. 3 region and a counter electrode formed on a second substrate, wherein the convex portion having the first height is relatively higher than the convex portion having the second height, A distance between the counter electrode formed on the second substrate and a third region of the pixel electrode is not less than 3.0 μm and not more than 4.5 μm, and the first protrusion and the second protrusion have the first height. A liquid crystal display device, wherein the height of the convex portion having a height is not less than 4.4% and not more than 15.6% of the distance. 9. A convex portion having a first height and a convex portion having a second height selectively provided below a pixel electrode formed on a first substrate; A first region of the pixel electrode formed so as to overlap an upper end portion of the convex portion having a height of 1 and the convex portion having a second height; and a convex portion having a first height and a second region of the pixel electrode. A second region of the pixel electrode formed on a side portion of the convex portion having a height, and a third region of the pixel electrode in contact with the second region of the pixel electrode; And the distance between the counter electrode formed on the second substrate and the third region of the pixel electrode is 3.0.
μm or less, and the convex portion having the first height and the second
A height of the convex portion having a height of 15.6% or less of the distance. 10. The first substrate on a flat surface of the first substrate.
And a pixel electrode formed so as to overlap with the convex portion having the first height and the convex portion having the second height, and the upper end portion of the convex portion having the first height and the convex portion having the second height. A first region of the pixel electrode, a second region of the pixel electrode formed so as to overlap a side of the convex portion having the first height and a convex portion having the second height, and A third region of the formed pixel electrode and a counter electrode formed on a second substrate, wherein the convex portion having the first height is replaced with the convex portion having the second height. Relatively high, and the distance between the counter electrode formed on the second substrate and the third region of the pixel electrode is 3.0.
μm or less, and the convex portion having the first height and the second
A height of the convex portion having a height of 15.6% or less of the distance. 11. A convex portion having a first height and a convex portion having a second height selectively provided under a pixel electrode formed on a first substrate; A first region of the pixel electrode formed so as to overlap an upper end of the convex portion having a height of 1 and the convex portion having a second height;
And a second region of the pixel electrode formed on the side of the convex portion having the height of the first and second portions, and a third region of the pixel electrode in contact with the second region of the pixel electrode Wherein the convex portion having the first height is relatively higher than the convex portion having the second height, and the counter electrode formed on the second substrate and the pixel electrode 2. The distance to the third area is 3.
A liquid crystal display device having a height of 0 μm or less, and wherein the height of the projection having the first height and the height of the projection having the second height are 6.7% or less of the distance. 12. A first substrate on a flat surface of a first substrate.
And a pixel electrode formed so as to overlap with the convex portion having the first height and the convex portion having the second height, and the upper end portion of the convex portion having the first height and the convex portion having the second height. A first region of the pixel electrode, a second region of the pixel electrode formed so as to overlap a side of the convex portion having the first height and a convex portion having the second height, and A third region of the formed pixel electrode and a counter electrode formed on a second substrate, wherein the convex portion having the first height is replaced with the convex portion having the second height. Relatively high, and the distance between the counter electrode formed on the second substrate and the third region of the pixel electrode is 3.0.
μm or less, and the convex portion having the first height and the second
A height of the convex portion having a height of 6.7% or less of the distance. 13. A projection formed on a flat surface of a first substrate, a side surface of the projection and a pixel electrode formed on the flat surface, and a counter electrode formed on a second substrate. A liquid crystal display device comprising: 14. The liquid crystal display device according to claim 1, wherein a width of the first region of the pixel electrode and the projection overlaps at least 0.5 μm. 15. The liquid crystal display device according to claim 1, wherein a width of the first region of the pixel electrode and the projection is 1.0 μm or more. 16. The pixel device according to claim 1, further comprising a first region of said pixel electrode adjacent to each other at said upper end portion of said convex portion, wherein said first region is adjacent to said first region of said pixel electrode. A liquid crystal display device having a distance of 4.0 μm or less. 17. The pixel device according to claim 1, further comprising a first region of the pixel electrode adjacent to each other at the upper end of the projection, and a first region of the pixel electrode adjacent to the first region of the pixel electrode. A liquid crystal display device having a distance of 2.0 μm or less. 18. The liquid crystal display device according to claim 1, wherein the liquid crystal display device is a video camera, a digital camera, a projector, a head mounted display (goggle type display), a car navigation, a car stereo, a personal computer, and a portable information terminal. (A mobile computer, a mobile phone or an electronic book).