JP2002040455A - Manufacturing method for electrooptical device and electrooptical device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electrooptical device such as a liquid crystal device which can securely reduce operation defects caused by the lateral electric field of an electrooptic substance such as liquid crystal and displays a light image of high quality with high contrast. SOLUTION: The electrooptical device is equipped with a pixel electrode (9a) on a TFT array substrate (10) and a counter electrode (21) on a counter substrate (20). The base surface of the pixel electrode on the TFT array substrate (20) has projection parts (81, 82) in areas facing the gaps between adjacent pixel electrodes. This manufacturing method for the electrooptical device includes a forming process for forming a pattern including wires, TFTs, etc., on the TFT array substrate, a process for flattening the top surface of a laminated body on the substrate including the pattern, and a process for forming the projections by processing the flattened top surface by photolithography and etching.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention belongs to the technical field of electro-optical devices such as liquid crystal devices, and more particularly, to a pixel in which the polarity of a voltage applied to a pixel electrode adjacent in a column direction or a row direction is reversed. A thin film transistor (Th) adopting an inversion driving method of periodically inverting the driving voltage polarity for each row or each pixel column
in Film Transistor (hereinafter appropriately referred to as TFT), which belongs to the technical field of an electro-optical device such as an active matrix driving type liquid crystal device.

[0002]

2. Description of the Related Art In general, in this type of electro-optical device, the voltage polarity applied to each pixel electrode is regulated according to a predetermined rule in order to prevent deterioration of an electro-optical material due to application of a DC voltage and to prevent crosstalk and flicker in a displayed image. The inversion drive method of inversion is adopted. During the display corresponding to the image signal of one frame or field, the pixel electrodes arranged in the odd rows are driven at the positive potential with reference to the potential of the counter electrode and the pixels arranged in the even rows. The electrodes are driven at the negative potential with reference to the potential of the counter electrode, and during the subsequent display corresponding to the image signal of the next frame or field, the pixel electrodes arranged in the even rows are reversed to the positive polarity. And the pixel electrodes arranged in odd rows are driven by a negative potential (that is, while driving the pixel electrodes in the same row with a potential of the same polarity, the potential polarity is changed for each row by a frame or field). The 1H inversion driving method (inverting periodically) is used as an inversion driving method that is relatively easy to control and enables high-quality image display.

A 1S inversion driving method in which pixel electrodes in the same column are driven by a potential of the same polarity and the voltage polarity is inverted in a frame or field cycle for each column is also relatively easy to control and has high quality. It is used as an inversion driving method that enables image display.

Further, a dot inversion driving method has been developed in which the polarity of a voltage applied to each pixel electrode is inverted between pixel electrodes adjacent to each other in both the column direction and the row direction.

[0005]

However, as in the 1H inversion driving method, the 1S inversion driving method, the dot inversion driving method, and the like, the voltage of the adjacent pixel electrode on the TFT array substrate (that is, the 1H inversion driving method). In the system, a voltage applied to pixel electrodes adjacent in the column direction, in the 1S inversion driving system, a voltage applied to pixel electrodes adjacent in the row direction, and in the dot inversion driving system, a pixel electrode adjacent in the row and column directions. Is the opposite polarity)
There is a problem that a lateral electric field (that is, an electric field parallel to the substrate surface or an oblique electric field including a component parallel to the substrate surface) generated between adjacent pixel electrodes occurs. When such a horizontal electric field is applied to an electro-optical material in which a vertical electric field (ie, an electric field in a direction perpendicular to the substrate surface) between the pixel electrode and the counter electrode facing each other is assumed to be applied. In addition, a malfunction of the electro-optical material such as a poor alignment of the liquid crystal occurs, and light leakage or the like occurs in this portion, resulting in a problem that a contrast ratio is reduced. On the other hand, it is possible to cover the region where the horizontal electric field is generated with the light-shielding film. In particular, as the distance between adjacent pixel electrodes is reduced due to the miniaturization of the pixel pitch, such a lateral electric field is increased. Therefore, these problems become more serious as the definition of the electro-optical device becomes higher. I will.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-described problems, and a liquid crystal device capable of reliably reducing an operation failure due to a lateral electric field in an electro-optical material such as a liquid crystal, and displaying a high-contrast, bright, high-quality image. It is an object of the present invention to provide a method of manufacturing an electro-optical device capable of manufacturing an electro-optical device, and the like, and to provide the electro-optical device.

[0007]

According to a method of manufacturing an electro-optical device of the present invention, an electro-optical material is sandwiched between a pair of first and second substrates to solve the above-mentioned problems. And a first pixel electrode group for inversion driving by the
Second period for inversion driving in a second period complementary to the period of
A method of manufacturing an electro-optical device, comprising: a plurality of pixel electrodes including a plurality of pixel electrode groups arranged in a plane on the first substrate; and a counter electrode facing the plurality of pixel electrodes on the second substrate. Forming a pattern including a wiring and an element for driving the pixel electrode on the first substrate;
Flattening the upper surface of the stacked body on the first substrate including the pattern, and performing photolithography and etching on the flattened upper surface to form pixel electrodes adjacent to each other in plan view. Forming a projection in a region to be a gap; and forming the plurality of pixel electrodes.

According to the method of manufacturing an electro-optical device according to the present invention, the electro-optical device according to the manufacturing is complementary to the first pixel electrode group for inversion driving at the first period and the first period. A plurality of pixel electrodes including a second pixel electrode group for inversion driving in the second period are arranged in a plane on the first substrate, and (i) polarities are mutually opposite at each time during the inversion driving. And (ii) adjacent pixel electrodes driven by driving voltages of the same polarity at each time during inversion driving.
These two methods are, for example, the above-described 1H inversion driving method and the 1H inversion driving method.
There is an electro-optical device such as a matrix drive type liquid crystal device adopting an inversion drive system such as the S inversion drive system. Therefore, a horizontal electric field is generated between adjacent pixel electrodes belonging to different pixel electrode groups (that is, adjacent pixel electrodes to which potentials of opposite polarities are applied).

Here, in the present invention, particularly, in the flattening step,
Wiring for driving pixel electrodes (for example, data lines, scanning lines,
A top surface of a stacked body on a first substrate including a pattern including a capacitor line and a device (for example, a TFT for pixel switching, etc.) (for example, an uppermost layer of an uneven surface formed with wiring on an interlayer insulating film) The upper surface of the formed insulating film for planarization is planarized. Subsequently, in the step of forming the projection-forming film, by performing photolithography and etching on the flattened upper surface, a region that is a gap between pixel electrodes adjacent to each other in plan view is formed. Form a convex part. Then, a pixel electrode is formed.

Therefore, the surface serving as the base of the pixel electrode can be formed irrespective of the wiring or element pattern formed thereunder.
In a region where the convex portion is not formed, the surface is positively flattened, and in a region where the convex portion is formed, the surface is positively formed with a convex portion having a predetermined height and a predetermined shape. As a result, the central portion of the pixel electrode located in the opening region of each pixel is formed on the surface which is positively flattened, so that the electro-optical material sandwiched between the pixel electrode and the counter electrode is formed. Malfunctions of the electro-optical material, such as poor alignment of liquid crystal, due to variations in layer thickness are reduced.

At the same time, a convex portion is positively formed by etching in a region serving as a gap between adjacent pixel electrodes. First, the edge of each pixel electrode is positioned on this convex portion. , A vertical electric field generated between each pixel electrode and the counter electrode is relatively compared with a horizontal electric field generated between adjacent pixel electrodes (particularly, pixel electrodes belonging to different pixel electrode groups). Can be strengthened. That is, since the electric field generally becomes stronger as the distance between the electrodes becomes shorter, the edge of the pixel electrode approaches the opposing electrode by the height of the convex portion, and the vertical electric field generated between the two becomes stronger. Second, regardless of whether or not the edge of each pixel electrode is located on this protrusion, the horizontal electric field generated between adjacent pixel electrodes (particularly, pixel electrodes belonging to different pixel electrode groups) is convex. The presence of the portion reduces the volume of the electro-optical material through which the transverse electric field passes, while reducing the volume of the electro-optic material through which the transverse electric field passes, and also reduces the volume of the transverse electric field with respect to the electro-optical material. The effect can be reduced. Therefore, it is possible to reduce the operation failure of the electro-optical material such as the alignment failure of the liquid crystal due to the lateral electric field associated with the inversion driving method. At this time, as described above, the edge of the pixel electrode may or may not be located on the projection, and may be located in the middle of the inclined or substantially vertical side surface of the projection. Is also good.

In particular, the height of the edge of the pixel electrode is adjusted by utilizing the existence of a wiring or an element located below the lower ground of the pixel electrode (a slight pattern shift in a large number of films is combined). Therefore, it is basically difficult to make the height and shape of the concavities and convexities in the finally formed uppermost layer as designed.) It is possible to control the height and shape of the protrusions with much higher accuracy than the technology. . For this reason, the operation failure of the electro-optical material such as the alignment failure of the liquid crystal due to the lateral electric field can be surely reduced, and the reliability of the device can be improved.

Further, the flattening is actively performed even when compared with the case where there is a planar variation in the layer thickness of the electro-optical material due to the existence of the wiring or the element located below the lower ground of the pixel electrode. By using such a surface to significantly reduce such variations in layer thickness, it is possible to reliably reduce malfunctions in the electro-optical material such as poor alignment of liquid crystal due to planar variations in layer thickness. In addition, the size of the light-shielding film for concealing a malfunctioning portion of the electro-optical material can be reduced, so that the aperture ratio of each pixel can be increased without causing image defects such as light leakage.

As a result, it is possible to relatively easily manufacture an electro-optical device such as a liquid crystal device for displaying a high-contrast, bright, high-quality image by reliably reducing an operation defect due to a lateral electric field in an electro-optical material such as a liquid crystal. it can.

It is to be noted that a convex portion may be provided only between adjacent pixel electrodes belonging to different pixel electrode groups in which a horizontal electric field is generated (that is, a pixel electrode to which a potential of the opposite polarity is applied). Adjacent pixel electrodes belonging to the same pixel electrode group where a horizontal electric field hardly occurs (that is, pixel electrodes to which a potential of the same polarity is applied)
The above-described effects of the present invention can be obtained even if no convex portion is provided or a convex portion having a relatively low height is provided between them.

This method is also particularly effective when forming an element using a single crystal semiconductor for the active layer in order to improve the performance of the driving element. Such a single crystal semiconductor layer is
A single crystal layer is formed on a supporting substrate by a method generally called a bonding method. In this bonding, since the surface of the support substrate and the surface of the single crystal layer are flattened and mirror-finished, and the two are joined, it is difficult to freely control the uneven shape after forming the elements and wirings. By flattening the substrate surface and forming the convex portions, shape control becomes easy, and poor liquid crystal alignment can be prevented.

In one embodiment of the method of manufacturing an electro-optical device according to the present invention, the flattening step includes a step of forming an insulating film having a predetermined thickness, and a step of forming a CMP (Chemical Chemistry) on the insulating film having the predetermined thickness.
ical Mechanical Polishing: a step of forming a planarized insulating film by performing a chemical mechanical polishing) process.

According to this aspect, in the step of flattening,
First, an insulating film having a predetermined thickness is formed, and thereafter, a planarized insulating film is formed by performing a CMP process on the insulating film. Therefore, the height and shape of the projection can be controlled relatively easily and accurately.

Alternatively, in another aspect of the method of manufacturing an electro-optical device according to the present invention, the flattening step includes forming a flattened insulating film by applying a fluid insulating film material. Including.

According to this aspect, in the step of flattening,
A planarized insulating film is formed by applying a fluid insulating film material using spin coating or the like. Therefore, the height and shape of the projection can be controlled relatively easily and accurately.

Further, in one embodiment of the method of manufacturing an electro-optical device according to the present invention, the element for driving the pixel electrode is bonded.
It consists of a single crystal semiconductor layer by SOI. Even in such a case, the convex portion of the pixel electrode portion can be formed arbitrarily and with good controllability by the planarization process after forming the element.

Alternatively, in another aspect of the method of manufacturing an electro-optical device according to the present invention, the step of flattening includes a step of forming a groove in which the pattern is embedded in advance.

According to this aspect, in the step of flattening,
Before forming a pattern including wiring and elements, a groove is formed in the first substrate and the interlayer insulating film formed thereon,
Such a pattern is at least partially embedded in the groove. Therefore, the surface serving as the base of the projection can be relatively easily flattened, and as a result, the height and shape of the projection can be relatively easily and accurately controlled.

In another aspect of the method of manufacturing an electro-optical device according to the present invention, in the step of forming the convex portion, the lattice-shaped convex portion is formed along a gap between the adjacent pixel electrodes.

According to this aspect, in the step of forming the protruding portions, the grid-shaped protruding portions are formed along the gaps between the adjacent pixel electrodes. Regardless of whether they are vertically or horizontally arranged in the image display area, the lattice-shaped protrusions can reduce adverse effects due to the lateral electric field during inversion driving.

In this aspect, the step of forming the convex portion includes forming the convex portion having a first height between adjacent pixel electrodes included in different pixel electrode groups, and forming the same pixel electrode. The lattice-shaped protrusions may be formed by forming the protrusions having a second height lower than the first height between adjacent pixel electrodes included in the group.

According to this aspect, in the step of forming the protrusion, the protrusion having the first height (> the second height) is formed between the pixel electrodes in which the lateral electric field is relatively strong. This (that is, by reducing the distance between the edge of the pixel electrode and the counter electrode) relatively increases the vertical electric field. On the other hand, it is sufficient to slightly increase the vertical electric field by forming a projection of the second height between pixel electrodes where almost no horizontal electric field is generated.

According to this aspect, the method further includes a step of forming an alignment film on the plurality of pixel electrodes, and a step of performing a rubbing process on the alignment film in parallel with a step formed by the convex portion having the first height. May be provided.

When the rubbing process is performed on the alignment film thus formed on the convex portion in parallel with the step formed by the relatively higher convex portion, the thickness of the electro-optical material can be reduced. An operation failure of the electro-optical material due to a large variation can be suppressed. That is, in general, when a rubbing process is performed on a step at a right angle, the alignment of the electro-optical material by the rubbed alignment film is disturbed, and the disorder is increased as the step is increased. Therefore, by suppressing the malfunction of the electro-optical material due to the planar variation in the layer thickness of the electro-optical material based on the larger step (the electro-optical material due to the planar variation in the layer thickness due to the electro-optical material based on the smaller step) Since the operation failure of (1) is inherently small without depending on the direction of the rubbing treatment), the operation failure of the electro-optical material based on the step due to the convex portion can be reduced in the entire apparatus.

In another aspect of the method of manufacturing an electro-optical device according to the present invention, the step of forming the convex portion includes forming the convex portion between adjacent pixel electrodes included in different pixel electrode groups. By not forming the projections between adjacent pixel electrodes included in the same pixel electrode group, stripe-shaped projections are formed in a plan view.

According to this aspect, in the step of forming the convex portion, a convex portion is formed between adjacent pixel electrodes included in different pixel electrode groups (that is, where a horizontal electric field is generated), and the same pixel is formed. No convex portion is formed between adjacent pixel electrodes included in the electrode group (that is, almost no horizontal electric field is generated). Therefore, the adverse effect of the horizontal electric field during inversion driving can be reduced by the stripe-shaped convex portions provided in the region where the horizontal electric field is generated.

In this aspect, the method may further include a step of forming an alignment film on the plurality of pixel electrodes, and a step of performing a rubbing process on the alignment film in parallel with a step formed by the projections.

When the rubbing process is performed on the alignment film thus formed on the convex portion in parallel with the step due to the convex portion,
An operation failure of the electro-optical material due to the step can be suppressed. That is, in general, when a rubbing process is performed at right angles to a step, the alignment of the electro-optical material by the rubbed alignment film is disturbed. Therefore, by performing the rubbing process in parallel with the step, the electro-optical material malfunctions due to the step. Can be suppressed.

In another aspect of the method of manufacturing an electro-optical device according to the present invention, in the step of forming the projection, the projection is formed by wet etching.

According to this aspect, since the slope of the step due to the convex portion becomes gentle, the malfunction of the electro-optical material due to the step can be suppressed. That is, in general, the steeper the step, the more disorder occurs in the orientation of the electro-optical material.
If a gentle step is formed by wet etching,
Even if the protrusions having the same height are formed, the operation failure of the electro-optical material due to the step can be reduced.

In another aspect of the method of manufacturing an electro-optical device according to the present invention, in the step of forming the convex portion, the convex portion is formed by dry etching and wet etching after the dry etching.

According to this aspect, a convex portion having a high dimensional accuracy can be formed by dry etching, and a steep step in the convex portion formed by dry etching can be reduced by a subsequent wet etching. Since a step can be formed, it is possible to form a fine protrusion having high positional accuracy and high dimensional accuracy, and to suppress malfunction of the electro-optical material due to the step.

In another aspect of the method of manufacturing an electro-optical device according to the present invention, the step of forming the convex portion includes performing photolithography using a mask used in forming the wiring in the step of forming the pattern. Performing.

According to this aspect, the mask used when forming the wiring by photolithography and the mask used when forming the projections by photolithography are used in common. As a result, manufacturing costs can be reduced.

In this aspect, in the step of forming the convex portion, the convex portion having a width different from the width of the wiring may be formed by using the mask and adjusting an exposure amount.

In this way, the width of the wiring and the width of the projection are shared while using the mask used for forming the wiring by photolithography and the mask used for forming the projection by photolithography. Can be formed as non-identical ones by adjusting the exposure amount, so that the degree of freedom in design can be increased while reducing the manufacturing cost.

In another aspect of the method of manufacturing an electro-optical device according to the present invention, the method further includes a step of forming another convex portion in a region of the second substrate facing a gap between the adjacent pixel electrodes.

According to this aspect, by providing the convex portion also on the second substrate side, the distance between the pixel electrode and the counter electrode in the region where the horizontal electric field is generated is reduced, so that the vertical electric field is relatively strengthened. In addition to this, the presence of the convex portion can weaken the lateral electric field and reduce the effect of the lateral electric field on the electro-optical material, thereby reducing the adverse effect of the lateral electric field.

In this aspect, the method further includes a step of forming another alignment film on the second substrate, and a step of performing a rubbing process on the other alignment film in parallel with the step formed by the other projection. You may.

By subjecting the other alignment film formed on the second substrate to the rubbing process in parallel with the step due to the other projections, it is possible to suppress the malfunction of the electro-optical material due to the step. Can be.

In the aspect in which another projection is formed on the second substrate, the method further includes a step of forming a light shielding film in a region on the second substrate facing a gap between the adjacent pixel electrodes. In the step of forming the other convex part, the other convex part may be formed according to the presence of the light shielding film.

In this way, another convex portion can be formed on the second substrate using the light-shielding film on the second substrate (opposite substrate) which is generally called a black matrix or a black mask (BM). Therefore, it is advantageous in simplifying the manufacturing process and the device configuration as compared with the case where the other convex portions are formed using a dedicated film.

In order to solve the above-mentioned problems, the electro-optical device of the present invention comprises an electro-optical material sandwiched between a pair of first and second substrates, and the electro-optical material is inverted on the first substrate at a first period. A plurality of pixel electrodes arranged in a plane including a first pixel electrode group to be driven and a second pixel electrode group to be inverted and driven in a second period complementary to the first period; and A pattern including wirings and elements for driving the pixel electrodes, and photolithography and etching of the planarized upper surface after planarizing the upper surface of the stacked body on the first substrate including the pattern during a manufacturing process And a convex portion formed in a region serving as a gap between pixel electrodes adjacent to each other as viewed in plan, and a counter electrode facing the plurality of pixel electrodes on the second substrate.

According to the electro-optical device of the present invention, a horizontal electric field is generated between adjacent pixel electrodes belonging to different pixel electrode groups (ie, adjacent pixel electrodes to which potentials of opposite polarities are applied). However, as for the edge of the pixel electrode located in or adjacent to the non-opening region of each pixel, a convex portion is positively formed by etching. First, the edge of each pixel electrode is If it is formed so as to be positioned above, the vertical electric field generated between each pixel electrode and the counter electrode is relatively increased as compared with the horizontal electric field generated between adjacent pixel electrodes. Second, regardless of whether or not the edge of each pixel electrode is located on this protrusion, the transverse electric field generated between adjacent pixel electrodes depends on the dielectric constant of the protrusion due to the presence of the protrusion. The effect of the lateral electric field on the electro-optical material can be reduced by reducing the volume of the electro-optical material through which the lateral electric field passes while being weakened. Therefore, it is possible to reduce the operation failure of the electro-optical material such as the alignment failure of the liquid crystal due to the lateral electric field associated with the inversion driving method. At this time, as described above, the edge of the pixel electrode may or may not be located on the projection, and may be located in the middle of the inclined or substantially vertical side surface of the projection. Is also good.

At the same time, since the central portion of the pixel electrode located in the opening region of each pixel is formed on the surface which is positively flattened, the electric current sandwiched between the pixel electrode and the counter electrode is formed. It is possible to reduce malfunctions of the electro-optic material such as poor alignment of liquid crystal due to variations in the thickness of the optical material. In addition, the size of the light-shielding film for concealing a malfunctioning portion of the electro-optical material can be reduced, so that the aperture ratio of each pixel can be increased without causing image defects such as light leakage.

As a result, it is possible to reliably reduce the operation failure due to the lateral electric field in the electro-optical material such as a liquid crystal, and to perform a high-contrast, bright, high-quality image display.

It should be noted that the present invention provides a transmission type, a reflection type, etc.
It is applicable to various types of electro-optical devices.

The operation and other advantages of the present invention will become more apparent from the embodiments explained below.

[0054]

Embodiments of the present invention will be described below with reference to the drawings. In the following embodiments, the electro-optical device according to the invention is applied to a liquid crystal device.

First, the configuration of the electro-optical device according to the embodiment of the present invention will be described with reference to FIGS.
FIG. 1 is an equivalent circuit of various elements, wirings, and the like in a plurality of pixels formed in a matrix forming an image display area of the electro-optical device. FIG. 2 is a plan view of a plurality of adjacent pixel groups on a TFT array substrate on which data lines, scanning lines, pixel electrodes, and the like are formed. 3 is a sectional view taken along the line AA ′ of FIG. 2, FIG. 4 is a sectional view taken along the line BB ′ of FIG.
FIG. 3 is a sectional view taken along the line CC ′ of FIG. 2. In FIGS. 3 to 5, the scale of each layer and each member is different for each layer and each member in order to make the size recognizable in the drawings.

In FIG. 1, each of a plurality of pixels formed in a matrix forming an image display area of the electro-optical device according to this embodiment has a pixel electrode 9a and a TFT 30 for controlling the switching of the pixel electrode 9a. Are formed, and the data line 6a to which the image signal is supplied is electrically connected to the source of the TFT 30. The image signals S1, S2,..., Sn to be written to the data lines 6a may be supplied line-sequentially in this order, or may be supplied to a plurality of adjacent data lines 6a for each group. good. The scanning line 3 is connected to the gate of the TFT 30.
a is electrically connected to the scanning line 3a at predetermined timings in a pulsed manner with the scanning signals G1, G2,.
Are applied in this order in a line-sequential manner.
The pixel electrode 9a is electrically connected to the drain of the TFT 30, and by closing the switch of the TFT 30 as a switching element for a certain period, the data line 6 is turned off.
The image signals S1, S2,..., Sn supplied from a are written at a predetermined timing. The image signals S1, S2,..., Sn of a predetermined level written in the liquid crystal as an example of the electro-optical material via the pixel electrode 9a are connected to a counter electrode (described later) formed on a counter substrate (described later). For a fixed period of time. The liquid crystal modulates light by changing the orientation and order of the molecular assembly according to the applied voltage level, thereby enabling gray scale display. In the normally white mode, the transmittance for the incident light decreases according to the voltage applied in each pixel unit. In the normally black mode, the light enters according to the voltage applied in each pixel unit. Light transmittance is increased, and light having a contrast corresponding to an image signal is emitted from the electro-optical device as a whole. Here, in order to prevent the held image signal from leaking, a storage capacitor 70 is added in parallel with a liquid crystal capacitor formed between the pixel electrode 9a and the counter electrode.

In FIG. 2, a plurality of transparent pixel electrodes 9 are arranged in a matrix on a TFT array substrate of the electro-optical device.
a (the outline is indicated by a dotted line portion 9a '), and the data line 6a and the scanning line 3a are provided along the vertical and horizontal boundaries of the pixel electrode 9a, respectively. Further, a capacitance line 3b is provided in a stripe shape alongside the scanning line 3a. More specifically, the capacitance line 3b has a main line portion parallel to the scanning line 3a, and a protruding portion protruding upward in the drawing along the data line 6a from a portion of the main line portion intersecting the data line 6a. .

Further, a scanning line 3a is arranged so as to face a channel region 1a 'indicated by a hatched region in the semiconductor layer 1a, which is lower right, and the scanning line 3a functions as a gate electrode. Thus, the scanning line 3a and the data line 6
Pixel switching TFTs 30 each having a scanning line 3a opposed to each other as a gate electrode in a channel region 1a 'are provided at intersections with the pixel region a.

As shown in FIGS. 2 and 3, the data line 6a
Is electrically connected to the high-concentration source region 1d of the semiconductor layer 1a via the contact hole 5. On the other hand,
The pixel electrode 9a is electrically connected to the high-concentration drain region 1e of the semiconductor layer 1a via the contact hole 8.

The pixel potential side capacitor electrode 1f extending from the high-concentration drain region 1e and the portion as the fixed potential side capacitor electrode of the capacitor line 3b are opposed to each other via the insulating thin film 2 as a dielectric film. As a result, the storage capacity 70 is constructed. The capacitance line 3b extends from the image display area where the pixel electrode 9a is arranged to the periphery thereof, is electrically connected to a constant potential source, and has a fixed potential.

In FIG. 3 to FIG. 5, the electro-optical device is
The device includes a transparent TFT array substrate 10 and a transparent opposing substrate 20 disposed opposite to the TFT array substrate 10. The TFT array substrate 10 is made of, for example, a quartz substrate, a glass substrate, or a silicon substrate, and the counter substrate 20 is made of, for example, a glass substrate or a quartz substrate.

The TFT array substrate 10 has a pixel electrode 9a
And an alignment film 16 on which a predetermined alignment process such as a rubbing process is performed is provided on the upper side.
The pixel electrode 9a is made of, for example, a transparent conductive thin film such as an ITO (Indium Tin Oxide) film. The alignment film 16 is made of, for example, an organic thin film such as a polyimide thin film.

On the other hand, a counter electrode 21 is provided on the entire surface of the counter substrate 20, and an alignment film 22 on which a predetermined alignment process such as a rubbing process is performed is provided below the counter electrode 21. I have. The counter electrode 21 is made of, for example, a transparent conductive thin film such as an ITO film. The alignment film 22 is made of an organic thin film such as a polyimide thin film. Further, as shown in FIGS. 3 and 5, the opposing substrate 20 is provided with a light shielding film 23 generally called a black mask or a black matrix (BM) in a non-opening region of each pixel. Therefore, incident light hardly enters the channel region 1a ', the low-concentration source region 1b, and the low-concentration drain region 1c of the semiconductor layer 1a of the pixel switching TFT 30 from the side of the counter substrate 20. Further, the light-shielding film 23 has a function of improving a contrast ratio and preventing color mixture of color materials when a color filter is formed. In the present embodiment, the light-shielding data line 6a made of Al or the like is used to shield a portion along the data line 6a in the non-opening region of each pixel, thereby forming the data line 6a in the opening region of each pixel. May be defined (in this case, a stripe-shaped light-shielding film 23 may be provided along the scanning line 3a), and the non-opening area along the data line 6a may also be defined. The light shielding film 23 provided on the opposing substrate 20 may be configured to provide light shielding redundantly or independently (in this case, a lattice-shaped light shielding film 23 is provided). Instead of or in addition to such light shielding, a laminate on the TFT array substrate 10
A part or all of the opening region of each pixel may be defined by providing a built-in light shielding film made of a high melting point metal film or the like.

As shown in FIGS. 3 to 5, between the TFT array substrate 10 and the opposing substrate 20 configured as described above, where the pixel electrode 9a and the opposing electrode 21 are arranged so as to face each other. A liquid crystal, which is an example of an electro-optical material, is sealed in a space surrounded by a sealing material described later, and a liquid crystal layer 50 is formed. The liquid crystal layer 50 assumes a predetermined alignment state by the alignment films 16 and 22 when no electric field is applied from the pixel electrode 9a. The liquid crystal layer 50 is made of, for example, a liquid crystal in which one or several kinds of nematic liquid crystals are mixed. The sealing material is an adhesive made of, for example, a photocurable resin or a thermosetting resin for bonding the TFT array substrate 10 and the opposing substrate 20 around the periphery thereof, in order to set the distance between the two substrates to a predetermined value. Gap material such as glass fiber or glass beads.

Further, under the pixel switching TFT 30, a base insulating film 12 is provided. The base insulating film 12 is formed on the entire surface of the TFT array substrate 10 so that the surface of the TFT array substrate 10 may be roughened during polishing, or may be stained remaining after cleaning.
It has a function of preventing deterioration of the characteristics of the FT 30.

The pixel switching TFT 30 includes an LD
It has a D (Lightly Doped Drain) structure, and includes a scanning line 3a, a channel region 1a 'of the semiconductor layer 1a in which a channel is formed by an electric field from the scanning line 3a, and a scanning line 3a.
Thin film 2 including a gate insulating film for insulating the semiconductor layer 1a from the semiconductor layer 1a, the low concentration source region 1b and the low concentration drain region 1c of the semiconductor layer 1a, and the high concentration source region 1 of the semiconductor layer 1a.
d and a high-concentration drain region 1e.

On the scanning line 3a, a high concentration source region 1d
Contact hole 5 and high concentration drain region 1 leading to
The first interlayer insulating film 4 in which the contact holes 8 leading to e are opened.

A data line 6a is formed on the first interlayer insulating film 4, and a second interlayer insulating film 7 having a contact hole 8 formed thereon is formed thereon.

In this embodiment, in particular, a third interlayer insulating film 80 is formed on the second interlayer insulating film 7. The third interlayer insulating film 80 extends along the data line 6a when viewed two-dimensionally, and has a bank-shaped convex portion 81 rising vertically from the substrate surface.
(See especially FIG. 4) and a bank-shaped protrusion 82 (see particularly FIG. 5) extending along the scanning line 3a and rising vertically from the substrate surface. The convex portions 81 and 82 form a lattice-shaped convex portion in plan view over the entire image display region along the non-opening region of each pixel. These convex portions 81 and 82 are formed by forming a planarizing insulating film on the second interlayer insulating film 7 as described later, planarizing the planarized insulating film by a CMP process, and then etching the planarized insulating film. And the protrusions 82 are left. That is, the third interlayer insulating film 80 is positively formed flat in the opening region of each pixel.
In the non-opening region of each pixel, it is positively formed in a convex shape. The pixel electrode 9a is provided on the upper surface of the third interlayer insulating film 80 thus configured. In each of the cross-sectional views shown in FIG. 3 to FIG.
The level LV of the flattened surface obtained when performing the P treatment is indicated by a broken line.

In this embodiment, the driving is performed by using the 1H inversion driving method among the various inversion driving methods of the related art described above. As a result, it is possible to perform image display with reduced flicker occurring in the frame or field cycle and particularly reduced vertical crosstalk while avoiding deterioration of the liquid crystal due to the application of the DC voltage.

Referring now to FIG. 6, adjacent pixel electrodes 9 in the 1H inversion driving method employed in this embodiment.
The relationship between the voltage polarity a and the region where the lateral electric field is generated will be described.

That is, as shown in FIG. 6A, during the period of displaying the image signal of the nth (where n is a natural number) field or frame, the liquid crystal indicated by + or-for each pixel electrode 9a. The polarity of the drive voltage is not inverted, and the pixel electrodes 9a are driven with the same polarity for each row. Thereafter, as shown in FIG. 6B, when displaying the image signal of the (n + 1) th field or one frame, the voltage polarity of the liquid crystal drive voltage at each pixel electrode 9a is inverted, and the (n + 1) th field or one frame of the one frame is displayed. During the period of displaying the image signal, the polarity of the liquid crystal drive voltage indicated by + or-is not inverted for each pixel electrode 9a, and the pixel electrodes 9a are driven with the same polarity for each row. Then, the states shown in FIGS. 6A and 6B are repeated at a cycle of one field or one frame, and the driving by the 1H inversion driving method in the present embodiment is performed. As a result, according to the present embodiment, image display with reduced crosstalk and flicker can be performed while avoiding deterioration of the liquid crystal due to the application of the DC voltage. Note that the 1H inversion driving method is advantageous in that there is almost no vertical crosstalk as compared with the 1S inversion driving method.

As can be seen from FIGS. 6A and 6B, in the 1H inversion driving method, the horizontal electric field generation region C1 always has a gap between the pixel electrodes 9a adjacent in the vertical direction (Y direction). It will be near.

In this embodiment, as shown in FIGS. 3 and 5, a convex portion 82 is formed, and the vertical electric field near the edge of the pixel electrode 9a disposed on the convex portion 82 is increased and the horizontal electric field is reduced. To do. More specifically, as shown in FIG. 5, the distance between the vicinity of the edge of the pixel electrode 9 a disposed on the protrusion 82 and the counter electrode 21 is reduced by the step (height) of the protrusion 82. Therefore, in the horizontal electric field generation region C1 shown in FIG. 6, the vertical electric field between the pixel electrode 9a and the counter electrode 21 can be increased. In FIGS. 3 and 5, since the gap between the adjacent pixel electrodes 9a is constant, the magnitude of the lateral electric field that increases as the gap is reduced is also constant. Therefore, the vertical electric field with respect to the horizontal electric field can be strengthened in the horizontal electric field generation region C1 shown in FIG.

Further, the presence of the convex portion 82 made of an insulating film weakens the strength of the horizontal electric field and reduces the liquid crystal portion receiving the horizontal electric field by the amount of replacement by the convex portion 82 where the horizontal electric field exists. The effect of the horizontal electric field on the liquid crystal layer 50 can be reduced.

As a result, by making the vertical electric field more dominant, poor alignment of the liquid crystal due to the horizontal electric field in the horizontal electric field generating region C1 can be prevented.

As a result, according to the present embodiment, focusing on the characteristics of the horizontal electric field generated in the 1H inversion driving method,
In the horizontal electric field generation region C1, by providing the convex portion 82,
By increasing the vertical electric field relatively, the adverse effect of the horizontal electric field is reduced. As described above, by reducing the defective orientation of the liquid crystal due to the lateral electric field, the light shielding film 23 for hiding the defective orientation of the liquid crystal can be small (however, the defective orientation of the liquid crystal due to the step in the convex portion 82 is covered). To hide,
It is desirable to set the width of the light shielding film 23 to be slightly wider than the width of the convex portion 82). Therefore, it is possible to increase the aperture ratio of each pixel without causing image defects such as light leakage (and the like), and finally, it is possible to display a bright and high-quality image with a high contrast ratio.

Further, in the present embodiment, it is preferable that the edge of the pixel electrode 9a is located at the edge in the width direction of the longitudinally extending upper surface of the projection 82. With this configuration, the distance between the pixel electrode 9a and the counter electrode 21 at the edge can be shortened by making maximum use of the height of the projection 82. At the same time, the adjacent pixel electrodes 9 where a horizontal electric field is generated by making the most of the width of the upper surface of the convex portion 82
The interval between a can be widened. Thus, the vertical electric field can be strengthened relative to the horizontal electric field in the horizontal electric field generation region C1 by utilizing the shape of the convex portion 82 very efficiently.

The cross-sectional shape of the above-described projection 82 cut perpendicularly to its longitudinal axis may be, for example, a trapezoid, a triangle,
Semi-circle, semi-ellipse, semi-circle or semi-ellipse diameter whose top is flat, or quadratic or cubic curved trapezoid or triangular whose slope of the side gradually increases toward the top Various shapes are conceivable. Practically, it is desirable to appropriately adopt a cross-sectional shape that can reduce the alignment defect of the liquid crystal caused by the step according to the properties of the liquid crystal.

In the present embodiment, the projections 82 are provided corresponding to the horizontal electric field generation area C1 along the scanning line 3a as described with reference to FIG. 6, but as shown in FIG. 3 and FIG. A projection 81 is provided corresponding to the non-opening area of the pixel along the line 6a. This is in view of the fact that a slight horizontal electric field is generated depending on the image signal also in the non-opening area of the pixel along the data line 6a. However, since the horizontal electric field generated between the horizontally arranged pixel electrodes having the same liquid crystal drive voltage and the same polarity (see FIG. 6) is weak, as can be seen from FIG. Height.
For example, when the thickness of the liquid crystal layer 50 is 3 μm,
2 is set to about 0.5 μm, and the height of the convex portion 81 is set to 0.
It is about 35 μm. However, from the viewpoint of preventing the alignment defect of the liquid crystal in the horizontal electric field generation region C1, the projection 81 can be omitted (that is, only the stripe-shaped projection 82 along the scanning line 3a is provided). Just fine).

In this embodiment, adjacent pixel electrodes 9 are used.
The relationship between the voltage polarity a and the horizontal electric field generation area C2 is shown in FIG. 7 by the 1S inversion driving method (that is, the polarity of the liquid crystal driving voltage changes for each column, and the horizontal electric field generation area C2 is 6
In the case of adopting the method of forming a gap between pixels along line a, the protrusion 81 may be formed higher than the protrusion 82 in the configuration shown in FIGS. 3 to 5 (for example, the layer of the liquid crystal layer 50). When the thickness is 3 μm, the height of the projection 81 is 0.5 μm
, And the height of the projection 82 may be about 0.35 μm). However, from the viewpoint of preventing the alignment defect of the liquid crystal in the horizontal electric field generation region C2, the projection 82 can be omitted (that is, only the stripe-shaped projection 81 along the data line 6a is provided). Just fine).

Alternatively, in this embodiment, in the dot inversion driving method (that is, the polarity of the liquid crystal driving voltage changes for each column and for each row, and the region where the horizontal electric field is generated becomes the data line 6a and the scanning line 3).
In the case of adopting a method of forming a gap between pixels along line a, both the protrusions 81 and the protrusions 82 may be formed higher in the configuration shown in FIGS. 3 to 5 (for example, the liquid crystal layer 50). Is 3 μm, the height of the convex portion 81 is set to 0.1 μm.
The height may be about 5 μm, and the height of the projection 82 may be about 0.5 μm.)

Further, in the 1H inversion driving method according to the present invention, the polarity of the driving voltage may be inverted for each row, or may be inverted for every two adjacent rows or for a plurality of rows. Similarly, in the 1S inversion driving method of the present invention, the polarity of the driving voltage may be inverted for each column, or may be inverted for every two adjacent columns or for each of a plurality of columns. In addition, the polarity of the drive voltage may be inverted for each block including a plurality of pixel electrodes.

In the embodiment described above, the switching TFT 30 includes the channel portion 1a ′, the low-concentration source region 1b and the low-concentration drain region, and the high-concentration source region 1d and the high-concentration drain region 1e formed of a semiconductor material. It has a crystal structure or a single crystal structure. Further, the pixel switching TFT 30 preferably has an LDD structure as shown in FIG. 3, but may have an offset structure in which impurity ions are not implanted into the low-concentration source region 1b and the low-concentration drain region 1c. A self-aligned TFT in which high concentration source and drain regions are formed in a self-aligned manner by implanting impurity ions at a high concentration using a gate electrode formed of part of the line 3a as a mask may be used. In the present embodiment, the TF for pixel switching is used.
Although only one gate electrode of T30 is disposed between the high-concentration source region 1d and the high-concentration drain region 1e, two or more gate electrodes may be disposed between them. If a TFT is configured with a dual gate or triple gate or more as described above, a leak current at a junction between a channel and a source / drain region can be prevented,
The off-state current can be reduced.

Further, even if the present invention is applied to not only the projection type or transmission type liquid crystal device but also the reflection type liquid crystal device, the effect of reducing the alignment defect of the liquid crystal due to the lateral electric field according to the present embodiment can be similarly obtained. Can be

(Manufacturing Process) Next, the TFT constituting the electro-optical device according to the embodiment having the above-described configuration will be described.
The manufacturing process on the array substrate side will be described with reference to FIGS. FIG. 8 is a process diagram showing each layer on the TFT array substrate side in each process corresponding to the BB ′ section of FIG. 2 as in FIG. 4, and FIG. 9 is a process diagram of FIG. 13 is a process drawing shown corresponding to the CC ′ cross section of FIG.

First, as shown in step (a) of FIGS. 8 and 9, a quartz substrate, a hard glass substrate,
On the FT array substrate 10, for example, normal pressure or reduced pressure CVD
TEOS (tetra-ethyl-ortho-silicate) gas, TEB (tetra-ethyl-borate)
NSG, PSG, BSG, BPS using gas, TMOP (tetramethyl oxyfoslate) gas, etc.
A base insulating film 12 made of a silicate glass film such as G, a silicon nitride film, a silicon oxide film or the like and having a thickness of about 500 to 2000 nm is formed. Next, a semiconductor layer is formed on the base insulating film 12. The semiconductor layer has a polycrystalline structure or a single crystal structure. In the case of a polycrystalline semiconductor layer, an amorphous silicon film is formed by low pressure CVD or the like.
The polysilicon film is solid-phase grown by performing an annealing process at a temperature of about 0 ° C. Alternatively, a method in which a polysilicon film is directly formed by a low-pressure CVD method or the like without using an amorphous silicon film can be used. In the case of forming a single crystal semiconductor layer, a bonding method in which a single crystal substrate is bonded to a supporting substrate and then the single crystal substrate side is thinned can be used. Silicon is preferably used as the single crystal semiconductor, but any material that exhibits characteristics as a semiconductor and can form a switching element can be used. In particular, a structure in which such a thin film silicon single crystal layer is formed on an insulating layer has a SOI (Silicon on I
In general, such a method is called a bonding method, and such a substrate is called a bonded SOI substrate.
In this bonding method, a known method using hydrogen ion implantation and annealing is preferably used as one of the techniques for forming a single crystal silicon layer having excellent film thickness uniformity. In this method, hydrogen ions having a specified implantation depth are implanted into a single crystal substrate made of silicon on which a thin film layer is to be formed, and the single crystal silicon substrate is bonded to a TFT array formation substrate, and then 500 to 600 ° C. By performing a degree of annealing, the single crystal silicon substrate is separated while leaving an extremely thin single crystal film on the TFT array formation substrate. The obtained single crystal silicon film has few defects and high quality, and has extremely high uniformity in film thickness.

As another technique for forming a single-crystal silicon layer having excellent film thickness uniformity, a known technique of transferring a single-crystal silicon layer epitaxially grown into a porous silicon layer to an array substrate can be used. In this method, after a single-crystal silicon layer is epitaxially grown on the surface of a silicon substrate whose surface has been made porous by electrolytic polishing, this is bonded to an array substrate, and the fragile porous layer is crushed by physical means such as water jet. It separates the silicon substrate from the single crystal silicon layer. After the division, the residue of porous silicon remaining on the surface of the epitaxial single crystal silicon layer is removed with a high selectivity by an etchant containing HF / H ₂ O ₂ . Thus, the single crystal silicon film transferred onto the array substrate has few defects and high quality, and has extremely high uniformity in film thickness.

Next, a photolithography step, an etching step, and the like are performed on the polysilicon or single crystal silicon film to form a semiconductor layer 1a having a predetermined pattern including the pixel potential side capacitor electrode 1f as shown in FIG.
To form

Next, the insulating thin film 2 including the dielectric film for forming the storage capacitor is formed together with the gate insulating film of the TFT 30 shown in FIGS. 3 to 5 by thermal oxidation or the like. As a result, the thickness of the semiconductor layer 1a is about 30 to 150 nm, preferably about 35 to 50 nm, and the thickness of the insulating thin film 2 is about 20 to 150 nm, preferably about 30 to 150 nm. It is about 100 nm thick. Next, a polysilicon film is deposited to a thickness of about 100 to 500 nm by a low pressure CVD method or the like, and P (phosphorus) is thermally diffused to make the polysilicon film conductive. Thus, the scanning lines 3a and the capacitance lines 3b having a predetermined pattern as shown in FIG. 2 are formed. The scanning line 3a
The capacitor line 3b may be formed of a metal alloy film such as a high melting point metal or a metal silicide, or may be a multilayer wiring in combination with a polysilicon film or the like. Next, a low-concentration source region 1b and a low-concentration drain region 1c, a high-concentration source region 1d and a high-concentration drain region 1e are included by doping impurity ions in two steps of low concentration and high concentration.
A pixel switching TFT 30 having an LDD structure is formed.

In parallel with the step (a) shown in FIGS. 8 and 9, peripheral circuits such as a data line driving circuit and a scanning line driving circuit composed of TFTs are formed in a peripheral portion on the TFT array substrate 10. You may.

Next, as shown in step (b) of FIGS. 8 and 9, for example, at normal pressure or under normal pressure so as to cover the stacked body composed of the scanning lines 3a, the capacitance lines 3b, the insulating thin film 2, and the base insulating film 12. NSG, PS using low pressure CVD method, TEOS gas, etc.
A first interlayer insulating film 4 made of a silicate glass film such as G, BSG, or BPSG, a silicon nitride film, a silicon oxide film, or the like is formed. The first interlayer insulating film 4 is, for example, 1000 to 1000
The thickness is about 2000 nm. Note that, in parallel with or before or after this thermal baking, an annealing process at about 1000 ° C. may be performed to activate the semiconductor layer 1a. Then, a contact hole 5 for electrically connecting the data line 6a shown in FIG. 3 to the high-concentration source region 1d of the semiconductor layer 1a is opened in the first interlayer insulating film 4 and the insulating thin film 2, and scanning is performed. A contact hole for connecting the line 3a or the capacitance line 3b to a wiring (not shown) in the peripheral region of the substrate can be formed in the same process as the contact hole 5. Subsequently, a low-resistance metal film such as Al or a metal silicide film is deposited to a thickness of about 100 to 500 nm on the first interlayer insulating film 4 by a sputtering process or the like, and then a photolithography process, an etching process, and the like are performed. , Data line 6a.

Next, as shown in step (c) of FIGS. 8 and 9, a second interlayer insulating film 7 is formed on the data line 6a.
Further, as shown in FIG. 3, a contact hole 8 for electrically connecting the pixel electrode 9a and the high-concentration drain region 1e is formed by dry etching such as reactive ion etching or reactive ion beam etching or wet etching. Is formed. Subsequently, an insulating film for planarization is formed on the second interlayer insulating film 7 by a normal pressure or low pressure CVD method or a TE method.
NSG, PSG, BSG, BPS using OS gas
It is formed from a silicate glass film such as G, a silicon nitride film, a silicon oxide film, or the like. At this point, the surface of the insulating film for the flattening film has the scanning lines 3 existing thereunder.
a, the capacitance line 3b, the data line 6a and the like have irregularities. Subsequently, a CMP process is performed on the uneven surface to form a flattening film 80c whose surface is located at the level LV. Note that, before the CMP process is performed, the height of the lowest portion on the surface is the highest of the second interlayer insulating film 7 located therebelow so as to be able to be planarized by the CMP process. An insulating film for planarization is formed in a sufficient thickness so as to be higher than the height of the portion. Then, the surface is completely polished by the CMP process until the lowest portion is initially polished, and further polished to such a thickness that the second interlayer insulating film 7 and at least the data line 6a are not exposed. Make it flat. C
Specifically, as the MP processing, for example, a liquid slurry (chemical polishing liquid) containing silica particles is flowed on a polishing pad fixed on a polishing plate, and the surface of the substrate fixed on a spindle is rotated. By doing so, the surface of the flattening film 80c is polished. Before the second interlayer insulating film 7 or the data line 6a is exposed, the polishing process is stopped by time management or by forming an appropriate stopper layer at a predetermined position on the TFT array substrate 10. As a result, the planarization film 80c whose surface is planarized at the position of the level LV is completed. The detection of the surface of the stopper layer in this case includes, for example, a friction detection method for detecting a change in the coefficient of friction when the stopper layer is exposed, a vibration detection method for detecting vibration generated when the stopper layer is exposed, and a stopper layer. It may be performed by an optical method that detects a change in the amount of reflected light when the light is exposed.

Next, as shown in step (d) of FIGS. 8 and 9, the flattening film 80c is subjected to photolithography and etching to form the convex portions 81 and 8.
Regions other than 2 are removed by etching, and as a result, the convex portions 81 and 82 are formed. Therefore, the surface of the third interlayer insulating film 80 excluding the protrusions 81 and 82 is made flat due to the uniformity of the etching. The convex portions 81 and 82
Are formed at the same height, both can be formed simultaneously. Alternatively, if the projections 81 and 82 are formed at different heights, both may be etched separately. For example, when the thickness of the liquid crystal layer 50 is 3 μm,
The etching process is performed so that the height of the projection 82 is about 0.5 μm and the height of the projection 81 is about 0.35 μm. If such etching is performed by wet etching or a combination of dry etching and wet etching, the side surfaces of the projections 81 and 82 can be formed to be gently inclined.

In particular, in this step (d), preferably, photolithography is performed using a mask used in forming a wiring pattern such as the scanning line 3a or the data line 6a in the step (a) or the step (b). As a result, the manufacturing cost can be reduced as compared with the case where dedicated masks are used. In this case, the width of the wiring and the width of the convex portion can be formed to be not the same by adjusting the exposure amount while using the mask in common.

Next, as shown in step (e) of FIGS. 8 and 9, a transparent conductive thin film such as an ITO film is formed on the third interlayer insulating film 80 by sputtering or the like for about 50 to 20 nm.
The pixel electrode 9a is deposited to a thickness of 0 nm and further formed by a photolithography process, an etching process, and the like.
When the electro-optical device is used as a reflection type,
The pixel electrode 9a may be formed from an opaque material having a high reflectance such as Al. Further, an alignment film 16 is formed thereon.
As described above, the rubbing process is preferably performed on the alignment film 16 in parallel with the step formed by the larger convex portion 82.

As described above, according to the manufacturing method of the present embodiment, after the second interlayer insulating film 7 is formed, the flattening film 80c is formed by using the CMP process, so that the substrate surface in the image display area is temporarily formed. After the entire surface is flattened, the projections 81 and the projections 82 are formed by etching, so that the accuracy of the height, the shape, and the dimensions of the projections 81 and 82 can be significantly improved. As a result, in the region where the horizontal electric field is generated, the convex portions 81 and 82 make it possible to relatively easily manufacture a highly reliable liquid crystal device that reliably reduces liquid crystal alignment defects due to the horizontal electric field.

Here, the relationship between the inclination of the side surfaces of the convex portions 81 and 82 and the rubbing direction will be described with reference to FIG.

As shown in FIG. 10 (a), the liquid crystal molecules 50a constituting the liquid crystal layer 50 have been subjected to rubbing in the left-right direction in the figure, and have been subjected to a surface treatment so as to give a predetermined pretilt angle. On 16, a predetermined orientation state is obtained. Then, by applying an electric field according to the image signal, each liquid crystal molecule 50a rotates to the position shown by the broken line in the figure.

At this time, as shown in FIG. 10B, when the liquid crystal molecules 50a constituting the liquid crystal layer 50 have a convex portion which gives an inclination in a direction intersecting the rubbing direction on the ground under the alignment film 16, The alignment state of the liquid crystal molecules 50a is disturbed at the inclined portion. Further, as shown in FIG. 10C, when there is a convex portion that gives a steeper inclination, the disorder of the alignment state of the liquid crystal molecules 50a becomes remarkable.

Therefore, at the time of the etching shown in the step (d) in FIGS. 8 and 9 described above, the projections 81 and 82 are formed by wet etching or a combination of dry etching and wet etching. By forming the projections 81 and 82 by using the method described above, if the step due to the projections 81 and 82 is moderated, poor alignment of the liquid crystal molecules 50c due to the steps can be advantageously reduced. Furthermore, even if the steps are the same, if the rubbing process is performed in a direction parallel to the steps, the disorder of the alignment state of the liquid crystal molecules 50c due to the steps is reduced. Therefore, in this embodiment,
It is advantageous to perform a rubbing process on the alignment film 16 on the TFT array substrate 10 side along the direction of the step formed by the larger one of the lattice-shaped projections 81 and 82. Alternatively, it is more advantageous to perform the rubbing process along the direction of the step formed by the stripe-shaped projections only in the region where the horizontal electric field is generated as described above.

(Modifications) Next, various modifications of the above-described embodiment will be described with reference to FIGS. Here, FIG. 11 is a cross-sectional view of a modification at a location corresponding to the BB ′ cross-section of FIG. 2 as in FIG. 4.
FIG. 12 is a cross-sectional view of another modification at a location corresponding to the BB ′ cross-section of FIG. 2 as in FIG. 4. FIG.
FIG. 16 is a cross-sectional view of still another modification at a location corresponding to the cross section taken along the line CC ′ of FIG. 2, similarly to FIG. 5.

In the modification shown in FIG. 11, instead of flattening the third interlayer insulating film 80 by the CMP processing in the embodiment shown in FIG. 4, the capacitance lines 3b and the data lines in the TFT array substrate 10 are previously prepared. 6a and the like,
The groove 201 is dug by etching or the like,
By embedding the capacitance line 3b, the data line 6a, and the like in the semiconductor device 1, when the second interlayer insulating film 7 is formed, T
The structure is such that the upper surface of the stacked body on the FT array substrate 10 is flattened. Then, on the upper surface of the second interlayer insulating film 7 that has been positively planarized in this way, the convex portion 81 ′ is formed by photolithography and etching, so that the convex portion 81 ′ having a high height, shape, or dimensional accuracy is formed. Can be formed. In this modification, such a groove 201 may be dug in a stripe shape in a direction along the data line 6a, may be dug in a stripe shape in a direction along the scanning line 3a, or It may be dug in a grid along the data line 6a and the scanning line 3a.

In the modification shown in FIG. 12, the edge of the pixel electrode 9a is located above the projection 81 in the embodiment shown in FIG. The projection 81 and the pixel electrode 9a are laid out in a plane such that the edge of the pixel electrode 9a is positioned. Even when formed in this manner, the effect of weakening the lateral electric field due to the presence of the convex portion 81 made of an insulating film, and the effect of the lateral electric field on the liquid crystal layer 50 by replacing the liquid crystal with the convex portion 81 in the region where the lateral electric field exists. The effect of reducing is obtained.

In the modification shown in FIG. 13, instead of forming the projections 82 on the TFT array substrate side in the embodiment shown in FIG. 5, the scanning lines 3a in plan view are provided on the counter substrate 20 side. The protrusions 23a extend along or form a lattice. The third interlayer insulating film 80 'on the TFT array substrate 10 is a flat film subjected to a CMP process. Thus, even when the protrusions 23a are provided on the counter substrate side, the effect of relatively increasing the vertical electric field and weakening the adverse effect of the horizontal electric field can be obtained in the region where the horizontal electric field is generated. When the convex portion 23a is provided on the counter substrate 20 side as in this modification, the convex portion 81 or the convex portion 8 on the TFT array substrate 10 side is used.
2 may be omitted. Alternatively, the convex portion 2 is provided on the counter substrate 20 side.
3a and the projection 8 on the TFT array substrate 10 side.
One or all or a part of the convex portion 82 may be provided. For example, a protrusion in the direction along the scanning line 3a may be provided on the TFT array substrate 10 side, and a protrusion in the direction along the data line 6a may be provided on the counter substrate 20 side. The protrusions along the direction along the data line 6a may be provided on the TFT array substrate 10 side. Here, the direction of the rubbing process on the alignment film 16 on the TFT array substrate 10 side does not generally match the direction of the rubbing process on the alignment film 22 on the counter substrate 20 side (for example, they are orthogonal to each other). Therefore, a stripe-shaped protrusion is formed on the TFT array substrate 10, and a stripe-shaped protrusion is formed on the counter substrate 20 in a direction perpendicular to the stripe-shaped protrusion. If the rubbing process is performed in parallel with the step due to the convex portion, and the rubbing process is performed on the alignment film 22 in parallel with the step due to the convex portion on the counter substrate 20 side, the adverse effect due to the lateral electric field is reduced by the convex portion. It is possible to reduce the malfunction of the electro-optical material due to the step of the part. When a convex portion is formed on the counter substrate 20 side as in this modification, forming the convex portion by forming the light-shielding film 23 thicker is compared with a case where the convex portion is formed using a dedicated film. hand,
The manufacturing process and the device configuration can be simplified.

In the above-described embodiment, the flattening film 80c is flattened by using the CMP process as shown in the step (c) in FIGS. 8 and 9, but without using the CMP process, for example, The flattening film 80c may be formed by applying a fluid insulating film material using spin coating or the like.

(Overall Configuration of Electro-Optical Device) The overall configuration of the electro-optical device in each embodiment configured as described above will be described with reference to FIGS. FIG.
FIG. 15 is a plan view of the TFT array substrate 10 together with the components formed thereon as viewed from the counter substrate 20, and FIG. 15 is a cross-sectional view taken along the line HH ′ of FIG.

In FIG. 14, a sealing material 52 is provided on the TFT array substrate 10 along the edge thereof, and an image display made of, for example, the same or different material as the light shielding film 23 is provided in parallel with the inside of the sealing material 52. A light-shielding film 53 is provided as a frame defining the periphery of the region. Seal material 52
In the area outside the data line, the data line driving circuit 101 for driving the data line 6a by supplying an image signal to the data line 6a at a predetermined timing and the external circuit connection terminal 102
A scanning line driving circuit 104, which is provided along one side of the FT array substrate 10 and drives the scanning line 3a by supplying a scanning signal to the scanning line 3a at a predetermined timing, operates along two sides adjacent to this one side. It is provided. If the delay of the scanning signal supplied to the scanning line 3a does not matter, it goes without saying that the scanning line driving circuit 104 may be provided on only one side. Further, the data line driving circuits 101 may be arranged on both sides along the side of the image display area. Further TFT
On one remaining side of the array substrate 10, a plurality of wirings 105 for connecting between the scanning line driving circuits 104 provided on both sides of the image display area are provided. In at least one of the corners of the counter substrate 20, a conductive material 106 for electrically connecting the TFT array substrate 10 and the counter substrate 20 is provided. And FIG.
As shown in FIG. 14, the counter substrate 20 having substantially the same contour as the sealing material 52 shown in FIG.
It is fixed to the T array substrate 10.

Note that, on the TFT array substrate 10, in addition to the data line driving circuit 101, the scanning line driving circuit 104, etc., a sampling circuit for applying an image signal to the plurality of data lines 6a at a predetermined timing, a plurality of Data line 6a
A precharge circuit for supplying a precharge signal of a predetermined voltage level prior to the image signal, an inspection circuit for inspecting the quality, defects, and the like of the electro-optical device during manufacturing or shipping. Good.

In each of the embodiments described above with reference to FIGS. 1 to 14, instead of providing the data line driving circuit 101 and the scanning line driving circuit 104 on the TFT array substrate 10, for example, TAB (Tape Automated Bonding) The driving LSI mounted on the substrate may be electrically and mechanically connected via an anisotropic conductive film provided on the periphery of the TFT array substrate 10. For example, the TN mode, V
A (Vertically Aligned) mode, PDLC (Polymer D
A polarizing film, a retardation film, a polarizing plate, and the like are arranged in a predetermined direction according to an operation mode such as an ispersed liquid crystal () mode and a normally white mode / normally black mode.

Since the electro-optical device in each of the embodiments described above is applied to a projector, three electro-optical devices are used as light valves for RGB, respectively.
The light of each color separated via the dichroic mirror for RGB color separation is incident on each light valve as projection light. Therefore, in each embodiment, the opposing substrate 20 is not provided with a color filter. However, in a predetermined area facing the pixel electrode 9a, RGB
May be formed on the counter substrate 20 together with the protective film. In this way, the electro-optical device in each embodiment can be applied to a direct-view or reflective color electro-optical device other than the projector.

Further, in the above-described embodiment, the method disclosed in
JP-A-127497, JP-B-3-52611,
JP-A-3-125123, JP-A-8-17110
As disclosed in Japanese Unexamined Patent Application Publication No. 1-105, a light-shielding film made of, for example, a high melting point metal may be provided on the TFT array substrate 10 at a position facing the pixel switching TFT 30 (that is, below the TFT). . If a light-shielding film is also provided below the TFT as described above, a single optical system is configured by combining the back surface reflection (return light) from the TFT array substrate 10 side and a plurality of liquid crystal devices via a prism or the like. In case,
It is possible to prevent a projected light portion or the like that penetrates a prism or the like from another liquid crystal device from being incident on the TFT of the liquid crystal device. Further, a micro lens may be formed on the counter substrate 20 so as to correspond to one pixel. Alternatively, it is also possible to form a color filter layer with a color resist or the like under the pixel electrode 9a facing the RGB on the TFT array substrate 10. In this way, a bright electro-optical device can be realized by improving the efficiency of collecting incident light. Furthermore, a dichroic filter that produces RGB colors using light interference may be formed by depositing a number of interference layers having different refractive indexes on the counter substrate 20. According to the counter substrate with the dichroic filter, a brighter color electro-optical device can be realized.

The present invention is not limited to the above-described embodiment, but can be appropriately modified without departing from the spirit and spirit of the invention, which can be read from the claims and the entire specification. The electro-optical device and the manufacturing method thereof are also included in the technical scope of the present invention.

[Brief description of the drawings]

FIG. 1 is an equivalent circuit of various elements, wiring, and the like provided in a plurality of pixels in a matrix forming an image display area in an electro-optical device according to a first embodiment.

FIG. 2 is a plan view of a plurality of adjacent pixel groups of a TFT array substrate on which data lines, scanning lines, pixel electrodes, and the like are formed in the electro-optical device according to the first embodiment.

FIG. 3 is a sectional view taken along line A-A 'of FIG.

FIG. 4 is a sectional view taken along line B-B 'of FIG.

FIG. 5 is a sectional view taken along line C-C 'of FIG.

FIG. 6 is a schematic plan view of a pixel electrode showing a voltage polarity and a region where a lateral electric field is generated in each electrode in the 1H inversion driving method used in the embodiment.

FIG. 7 is a schematic plan view of a pixel electrode showing a voltage polarity and a region where a lateral electric field is generated in each electrode in the 1S inversion driving method that can be adopted in the embodiment.

FIG. 8 is a process diagram sequentially illustrating a manufacturing process of the electro-optical device according to the embodiment at locations corresponding to a cross section taken along line BB ′ of FIG. 2;

FIG. 9 is a process diagram sequentially illustrating a manufacturing process of the electro-optical device according to the embodiment at locations corresponding to the cross section taken along line CC ′ of FIG. 2;

FIG. 10 is a schematic side view illustrating the relationship between the inclination of a step due to a convex portion and the alignment state of liquid crystal molecules in the electro-optical device of the embodiment.

FIG. 11 is a cross-sectional view of a portion corresponding to a cross section taken along line BB ′ of FIG. 2 according to one modified embodiment.

FIG. 12 is a cross-sectional view of a portion corresponding to a cross section taken along line BB ′ of FIG. 2 in another modified embodiment.

FIG. 13 is a cross-sectional view of a portion corresponding to a cross section taken along line CC ′ of FIG. 2 in still another modified embodiment.

FIG. 14 is a plan view of a TFT array substrate in the electro-optical device according to each embodiment, together with components formed thereon, viewed from a counter substrate side.

FIG. 15 is a sectional view taken along line H-H ′ of FIG. 14;

[Explanation of symbols]

 1a Semiconductor layer 1a 'Channel region 1b Low-concentration source region 1c Low-concentration drain region 1d High-concentration source region 1e High-concentration drain region 1f Pixel electrode-side capacitance electrode 2 Insulating thin film 3a Scanning line 3b Capacitance line 4 First interlayer insulating film 5 Contact hole 6a Data line 7 Second interlayer insulating film 8 Contact hole 9a Pixel electrode 10 TFT array substrate 12 Base insulating film 16 Alignment film 20 Counter substrate DESCRIPTION OF SYMBOLS 21 ... Counter electrode 22 ... Alignment film 23 ... Light shielding film 23a ... Convex part 30 ... TFT50 ... Liquid crystal layer 50a ... Liquid crystal molecule 70 ... Storage capacitance 80 ... Third interlayer insulating film 80a ... Flattening film 81, 82 ... Convex part 201 ... Grooves C1, C2 ... Horizontal electric field generation area

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G09F 9/30 348 G02F 1/136 500 F term (Reference) 2H090 HA04 HC05 HD03 HD14 JA03 JC03 LA01 LA04 MB01 MB05 2H092 JA25 JA46 JB02 JB04 JB24 JB33 JB52 JB56 JB58 KA03 KB22 KB25 MA18 MA31 NA04 PA02 PA06 2H093 NA16 NA32 NC34 NC36 ND35 NE02 NE03 NE04 5C094 AA06 AA10 AA42 AA43 BA03 BA43 CA19 DA15 FA02 FB14 AGB01A03 A039A03A

Claims (18)

[Claims] An electro-optical material is sandwiched between a pair of first and second substrates, and a first pixel electrode group for inversion driving at a first cycle and a first pixel electrode group complementary to the first cycle. A plurality of pixel electrodes including a second pixel electrode group for inversion driving at a second cycle are arranged in a plane on the first substrate and opposed to the plurality of pixel electrodes on the second substrate. Forming a pattern including a wiring and an element for driving the pixel electrode on the first substrate; and forming a pattern on the first substrate including the pattern on the first substrate. A step of flattening the upper surface of the stacked body, and performing photolithography and etching on the flattened upper surface to form a convex portion in a region serving as a gap between pixel electrodes adjacent to each other in plan view. Forming a plurality of pixel electrodes Method of manufacturing an electro-optical device characterized by comprising a step. 2. The step of flattening comprises: forming an insulating film having a predetermined thickness; and performing a CMP (Chemical Mechanical) process on the insulating film having the predetermined thickness.
2. The method of manufacturing an electro-optical device according to claim 1, further comprising the step of forming a planarized insulating film by performing a cal polishing (chemical mechanical polishing) process. 3. The electro-optical device according to claim 1, wherein the flattening step includes a step of forming a flattened insulating film by applying a fluid insulating film material. Device manufacturing method. 4. An element for driving a pixel electrode formed on the first substrate is bonded SOI (Silicon On Insula).
4. The method for manufacturing an electro-optical device according to claim 1, comprising a single crystal semiconductor layer formed by tor). 5. The method according to claim 1, wherein the step of flattening includes a step of forming a groove in which the pattern is buried in advance. 6. The method according to claim 1, wherein the step of forming the convex portion forms the lattice-shaped convex portion along a gap between the adjacent pixel electrodes. The manufacturing method of the electro-optical device according to the above. 7. The step of forming the convex portion includes a step of forming a first region between adjacent pixel electrodes included in different pixel electrode groups.
Is formed, and between the adjacent pixel electrodes included in the same pixel electrode group, the protrusion having a second height lower than the first height is formed. The method of manufacturing an electro-optical device according to claim 6, wherein the lattice-shaped protrusions are formed. 8. The method according to claim 1, further comprising the steps of: forming an alignment film on the plurality of pixel electrodes; and performing a rubbing process on the alignment film in parallel with a step formed by the convex portion having the first height. The method for manufacturing an electro-optical device according to claim 7, wherein: 9. The step of forming the convex portion includes forming the convex portion between adjacent pixel electrodes included in different pixel electrode groups and forming adjacent convex pixels included in the same pixel electrode group. The electro-optical device according to any one of claims 1 to 6, wherein a stripe-shaped projection is formed when viewed in a plan view by not forming the projection between the electrodes. Production method. 10. The method according to claim 1, further comprising: forming an alignment film on the plurality of pixel electrodes; and performing a rubbing process on the alignment film in parallel with a step formed by the projections. Item 10. The method for manufacturing an electro-optical device according to item 9. 11. The method of manufacturing an electro-optical device according to claim 1, wherein in the step of forming the convex portion, the convex portion is formed by wet etching. 12. The electric device according to claim 1, wherein in the step of forming the convex portion, the convex portion is formed by dry etching and wet etching after the dry etching. A method for manufacturing an optical device. 13. The method according to claim 1, wherein the step of forming the protrusion includes a step of performing photolithography using a mask used when forming the wiring in the step of forming the pattern. A method for manufacturing an electro-optical device according to any one of claims 12 to 13. 14. The step of forming the convex portion, wherein the convex portion having a width different from the width of the wiring is formed by using the mask and adjusting an exposure amount. 14. The method for manufacturing an electro-optical device according to item 13. 15. The method according to claim 1, further comprising a step of forming another convex portion in a region of the second substrate facing a gap between the adjacent pixel electrodes.
13. The method for manufacturing an electro-optical device according to claim 1. 16. The method according to claim 16, further comprising: forming another alignment film on the second substrate; and performing a rubbing process on the other alignment film in parallel with a step formed by the another protrusion. The method for manufacturing an electro-optical device according to claim 15, wherein: 17. The method according to claim 17, further comprising: forming a light-shielding film in a region on the second substrate facing a gap between the adjacent pixel electrodes. 2. The method according to claim 1, wherein the other convex portion is formed in accordance with the presence of the second protrusion.
17. The method for manufacturing an electro-optical device according to 5 or 16. 18. An electro-optical material sandwiched between a pair of first and second substrates, a first pixel electrode group for inversion driving at a first cycle on the first substrate, and A plurality of pixel electrodes including a second pixel electrode group for inversion driving at a second period complementary to the first period and arranged in a plane, and a pattern including wirings and elements for driving the pixel electrodes; Pixels planarized by performing photolithography and etching on the planarized upper surface after planarizing the upper surface of the stacked body on the first substrate including the pattern during a manufacturing process; An electro-optical device, comprising: a projection formed in a region serving as a gap between the electrodes; and a counter electrode facing the plurality of pixel electrodes on the second substrate.