JP5222840B2 - Alignment direction control method, liquid crystal display device manufacturing method - Google Patents

Description

  The present invention relates to a liquid crystal display device and a manufacturing method thereof. More specifically, when a liquid crystal display device with a narrow cell gap is formed, manufacturing of a liquid crystal display device with a high yield is prevented by preventing the exudation of sealing materials, bubbles, rubbing streaks, cell gap unevenness, etc., which deteriorate the display quality of the liquid crystal. Is to do.

  In recent years, light and compact liquid crystal display devices such as notebook personal computers and liquid crystal monitor devices have attracted attention. In particular, an active matrix display device that performs liquid crystal alignment control using active elements such as TFT (thin film transistor) and MIM (metal-insulator-metal) can perform high-definition display, and can be used in projectors and direct-view liquid crystal display devices. Widely used.

  Recently, a reflective liquid crystal display device that can be reduced in thickness and weight without a backlight, and a smectic liquid crystal with spontaneous polarization capable of high-speed response (antiferroelectric liquid crystal, ferroelectric liquid crystal, thresholdless liquid crystal, A liquid crystal display device using a liquid crystal composed of a mixture of antiferroelectric liquid crystal and ferroelectric liquid crystal) has been actively developed. In a reflection type liquid crystal display device, a liquid crystal display device using a ferroelectric liquid crystal or the like, as a result of optimizing display characteristics, a narrow cell gap of about 1 to 3 μm is often required.

  In a liquid crystal display device using a conventional TN (twisted nematic) mode, the cell gap is 3 to 5 μm, and the response speed of the liquid crystal takes 5 msec or more at room temperature. However, when displaying a moving image or adopting a field sequential method, this response speed may be insufficient. A further high-speed response is desired and is being developed. There is an attempt to increase the electric field strength by narrowing the cell gap to around 2 μm and to achieve a high-speed response.

As a material for controlling the cell gap of the liquid crystal display device, there is a spacer made of an organic resin such as spherical SiO ₂ (silicon dioxide) or polystyrene. The spacer spraying method includes a dry spraying method in which spacers are sprayed with a stream of nitrogen gas, and a wet spraying method in which a spacer is mixed with a low boiling point solvent such as IPA (isopropyl alcohol) and sprayed on a substrate.

Recently, a spacer obtained by patterning a photosensitive resin into a columnar shape by a photolithography process (referred to as a columnar spacer for convenience) is also used. Further, in a liquid crystal display device using a smectic liquid crystal, a wall-shaped spacer having a function of controlling a cell gap and a function of controlling orientation (referred to as a wall spacer for convenience)
Are also used.

  Further, fillers mixed and used in the sealing material are also used for cell gap control. The filler is made of glass fiber and has a width of 100 to 500 μm. The filler is different from the spacer in that it is in a region where a sealing material is provided and is not used in the pixel region because of its size.

  There are several problems in producing a liquid crystal display device with good display quality by narrowing the cell gap of the liquid crystal display device.

  First, there is a problem of bleeding into the pixel region of the low viscosity component in the sealing material. The diameter of the filler in the sealing material is 4 to 5 μm. In order to narrow the cell gap to 3 μm or less, the filler is compressed. When the filler is greatly compressed, the low-viscosity component and the uncured resin of the sealing material extend to the pixel region, which affects the display quality.

  As shown in FIG. 17A, when the sealing material 1301 is cured by hot pressing, there is an uncured resin of the sealing material and a bleed-out 1302 of a low-viscosity component, and the sealing material spreads to the pixel region 1303.

  In addition, as the cell gap becomes narrower, the liquid crystal injection speed becomes slower. In addition, a liquid crystal display device having a narrow cell gap tends to make it difficult for liquid crystal to enter, particularly in a step region. The portion where the liquid crystal is not injected remains as bubbles, which affects long-term reliability.

  An example of bubbles is shown in FIG. Bubbles 1304 remain in the vicinity of the sealing material 1301 that is separated from the inlet.

  In addition, if there is cell gap unevenness, display quality is impaired by interference fringes and color unevenness. In particular, in a liquid crystal display device with a narrow cell gap, since liquid crystal having a large refractive index anisotropy is used as compared with a widely used cell gap (4 to 5 μm), the cell gap unevenness tends to be uneven in color. Accurate cell gap accuracy is required.

  The white level of the liquid crystal display device is determined by retardation of the liquid crystal layer, that is, Δn × d (Δn: refractive index anisotropy of liquid crystal, d: thickness of liquid crystal layer). If there is cell gap unevenness, retardation will vary and display unevenness will occur. If the cell gap is narrow, the refractive index anisotropy (Δn) of the liquid crystal is increased to increase the white level. Therefore, slight irregularities in the cell gap (d) tend to lead to display irregularities.

  In the case of manufacturing a liquid crystal display device of 3 μm or less, the diameter of the filler mixed with the sealing material is limited, so that it becomes difficult to use a filler that matches the cell gap. In addition, a filler with a special diameter is required, but as the diameter decreases, the price increases several times, and the price of the liquid crystal display device cannot be met.

  Furthermore, since the diameter of the filler in the sealing material is 4-5 μm, which is large with respect to the cell gap, there is a limit to the compression of the filler, and even if a load is applied to the sealing material with a hot press or the like, depending on the case The sealing material may not be crushed and a desired cell gap may not be obtained. If the cell gap is narrowed, it is difficult to form an accurate gap due to the sealing material and filler.

  An example of gap unevenness of the liquid crystal display device is shown in FIG. Due to the gap unevenness, the color 1305 near the center and the color 1306 away from the center change.

  Further, as a problem of the liquid crystal display device, there is a problem of rubbing stripes. The rubbing streaks 1307 parallel to the rubbing direction are formed as shown in FIG.

  As shown in FIG. 16, when the alignment film is rubbed, if there is a step 1201 on the substrate 1200 of the liquid crystal display device, the tip of the rubbing roll is disturbed by the step and the rubbing state changes. The step is dragged downstream in the rubbing direction 1202 to become a rubbing line 1203. In particular, an alignment film having a high pretilt, such as a vertical alignment film, tends to have rubbing streaks.

  In the present invention, two layers of insulating films are formed on the first substrate, and the insulating film corresponding to the region where the sealing material is formed is removed by etching to provide a recess or a step. Further, an organic resin film is applied thereon to flatten the recesses or steps, and the organic resin film is patterned. Then, a spacer is formed in a portion including the region where the sealing material is formed and the display region. Since the spacers have the same height in the substrate due to the planarization effect of the organic resin film, the cell gap is less likely to be uneven when the liquid crystal display device is formed by being bonded to the second substrate. Further, when the uppermost insulating film is etched, the step is not flattened by the insulating film provided on the uppermost insulating film, so that the step can be formed with high accuracy.

The present invention can be used for both a simple matrix type liquid crystal display device and an active matrix type liquid crystal display device. Etching is facilitated by changing the etching rate of the insulating film provided on the first substrate. Formation of a recess or a step is facilitated.
As films having different etching rates, for example, an inorganic insulating film and an organic insulating film can be used in combination.

  As the organic resin material used as the spacer, a material mainly containing any one of polyimide, polyamide, acrylic, and polyvinyl cinnamate can be used.

In particular, in order to satisfactorily flatten the organic resin material used as a spacer, the insulating film is etched so as to form a recess, and the width (L _A ) of the region where the insulating film is etched is the width (L _B ) of the sealing material. On the other hand, it is preferable that L _B +0.1 mm ≦ L _A ≦ L _B +2 mm.

  In addition, by suppressing the thickness of the insulating film to be etched to the minimum necessary, the planarization effect when applying the organic resin film serving as the spacer is enhanced. In general, if the sealing material is 3.0 μm or more, good display without bleeding can be obtained, and if it is 2.5 μm or more, good cell gap control can be performed. It is preferable to adjust the thickness of the insulating film to be etched by limiting the cell gap of the seal formation region to 2.5 μm to 3.0 μm.

  In particular, when the liquid crystal layer is a smectic liquid crystal having spontaneous polarization, if the thickness of the insulating film to be etched is minimized, the formation of a step can be suppressed in a liquid crystal display device having a narrow cell gap. This leads to suppression of the generation of bubbles due to steps. Since smectic liquid crystals having spontaneous polarization can cause uneven alignment due to bubbles, it is important to suppress the formation of steps in this way.

  Further, if no spacer is provided in the display area, alignment defects caused by the spacer can be suppressed.

An organic resin film (A) can be formed on a recess or a step formed by etching an insulating film, and an organic resin film (B) serving as a spacer can be further formed thereon.
When the organic resin film (A) is formed, the concave portion or the taper of the step becomes gentle, and when the rubbing is performed, disturbance of the hair tip due to the step can be reduced. The organic resin film (A) has a thickness that does not flatten the step formed by etching the insulating film.

  Alternatively, a counter substrate having a color filter can be used as a substrate on which a step is provided. A step may be formed by removing the overcoat material of the counter substrate or the overcoat material and the color filter in the region where the seal material is provided. When the cell gap of the display area is 2.5 μm or less, the seepage of the sealing material can be prevented, and such a configuration is effective. If spacers and fillers are not provided in the region where the sealing material is to be formed, the sealing material will absorb unevenness in the sealing material forming region well.

  If no step is provided on the upstream side of the rubbing, the rubbing streaks due to the step can be suppressed. Also in this case, if the spacer and the filler are not provided in the region where the sealing material is formed, the sealing material absorbs unevenness in the sealing material forming region well.

  By this invention, the low-viscosity component and uncured resin outflow in a sealing material accompanying narrowing of a cell gap are suppressed. In addition, a good cell gap is formed by setting the gap in the region where the sealing material is provided to 2.3 to 2.5 μm, preferably 2.9 to 3.0 μm or more.

  Further, according to the present invention, the bubbles in the liquid crystal injection and the rubbing streaks in the rubbing process can be suppressed by reducing the level difference in the seal formation region accompanying the narrowing of the cell gap to the minimum necessary. A uniform cell gap can be obtained by applying a columnar spacer and flattening the step between the region where the sealing material is provided and the pixel region with a configuration in which the formation of the step in the cell gap direction is suppressed in this way.

  When an extremely small cell gap of 1 μm is formed as in the present invention, the step necessary for narrowing the cell gap is obtained by etching only the region where the color filter and overcoat material of the counter substrate are provided with the sealing material. Can be made. Further, when the rubbing streaks due to the steps affect the display quality, it is possible to take non-contact alignment means such as photo alignment.

  In addition, when the rubbing streak is generated in the rubbing process due to the step provided to narrow the cell gap, the rubbing streak is formed by assembling the panel by forming a step away from the upstream side in the rubbing direction for both the counter substrate and the element substrate. A liquid crystal display device without display quality degradation due to the above can be produced.

9 is a cross-sectional view illustrating a manufacturing process of the active matrix display device of Embodiment 1. FIG. 9 is a cross-sectional view illustrating a manufacturing process of the active matrix display device of Embodiment 1. FIG. 9 is a cross-sectional view illustrating a manufacturing process of the active matrix display device of Embodiment 1. FIG. 9 is a cross-sectional view illustrating a manufacturing process of the active matrix display device of Embodiment 1. FIG. FIG. 3 is a cross-sectional view of the active matrix display device of Embodiment 1. The area | region which etches the organic resin film of Embodiment 1. FIG. The area | region which etches the organic resin film compared in Embodiment 1. FIG. Sectional drawing of the active matrix type display apparatus of Embodiment 2. FIG. The relationship between the rubbing direction of Embodiment 4 and the area | region which etches an organic resin film. The relationship between the rubbing direction of Embodiment 5 and the area | region which etches an organic resin film. The counter substrate of Embodiment 2 and the like. The counter substrate compared with Embodiment 2 and that. Dimerization reaction of polyvinyl cinnamate in photo-alignment. Relationship between light irradiation direction and liquid crystal alignment axis in photo alignment. The optical system of the vertical alignment reflection type projector. Relationship between steps and rubbing muscles. Problems with liquid crystal display devices. Application example of active matrix liquid crystal display device of the present invention Application example of active matrix liquid crystal display device of the present invention Application example of active matrix liquid crystal display device of the present invention

[Embodiment 1]
In this embodiment, a liquid crystal display device with a narrow cell gap suppresses the oozing of the sealing material that affects the display quality of the liquid crystal display device. Further, by devising the configuration of the liquid crystal display device, bubbles caused by fine steps and rubbing streaks are suppressed, and at the same time, cell gap unevenness is made difficult to occur.

  The liquid crystal display device of this embodiment is a vertical alignment reflection type projector. Since the vertical alignment reflection type projector is a reflection type liquid crystal display device, it is necessary to make the cell gap smaller than that of the transmission type liquid crystal display device. Although it depends on the refractive index anisotropy of the liquid crystal, a cell gap of 2 to 4 μm, preferably 2 to 3 μm is required.

  Further, the vertical alignment film takes time to inject liquid crystal because the anchoring energy of the alignment film is weak. In particular, in a liquid crystal display device with a narrow cell gap, if there is a step, it is difficult to inject liquid crystal at that portion.

  Further, in a display mode using a birefringence effect such as vertical alignment, cell gap unevenness appears as a change in color. In particular, a liquid crystal display device with a narrow cell gap uses liquid crystal with a large refractive index anisotropy, and thus a small cell gap unevenness is emphasized as a change in color.

  However, with the configuration of the present embodiment, a liquid crystal with a good display quality can be obtained even in the case where bubbles due to rubbing streaks or steps are relatively easily formed and the cell gap uniformity is required as in the vertical alignment reflective liquid crystal display device. A display device can be provided.

  An active element formation method in the configuration of the present embodiment will be described with reference to FIGS. Here, a method for manufacturing the pixel TFT of the pixel portion and the TFT of the driver circuit provided around the pixel portion over the same substrate will be described in detail according to the process.

In FIG. 1A, a substrate 101 is made of polyethylene terephthalate (PET), polyethylene in addition to a glass substrate such as barium borosilicate glass or aluminoborosilicate glass represented by Corning # 7059 glass or # 1737 glass. A plastic substrate having no optical anisotropy such as naphthalate (PEN) or polyethersulfone (PES) can be used. When a glass substrate is used, heat treatment may be performed in advance at a temperature lower by about 10 to 20 ° C. than the glass strain point. Then, a base film 102 such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film is formed on the surface of the substrate 101 on which the TFT is formed in order to prevent impurity diffusion from the substrate 101. For example, a silicon oxynitride film 102a formed from SiH ₄ , NH ₃ , and N ₂ O by a plasma CVD method has a thickness of 10 to 200 nm (preferably 50 to 100 nm), and is similarly formed from SiH ₄ and N ₂ O. A silicon hydride film 102b is stacked to a thickness of 50 to 200 nm (preferably 100 to 150 nm).

The silicon oxynitride film is formed by using a conventional parallel plate type plasma CVD method. The silicon oxynitride film 102a is introduced into the reaction chamber with SiH ₄ as 10 SCCM, NH ₃ as 100 SCCM, and N ₂ O as 20 SCCM. The substrate temperature is 325 ° C., the reaction pressure is 40 Pa, the discharge power density is 0.41 W / cm ² , and the discharge frequency. It was set to 60 MHz.
On the other hand, the silicon oxynitride silicon film 102 b is introduced into the reaction chamber with SiH ₄ as 5 SCCM, N ₂ O as 120 SCCM, and H ₂ as 125 SCCM, and has a substrate temperature of 400 ° C., a reaction pressure of 20 Pa, and a discharge power density of 0.41 W / cm. ^{2. The} discharge frequency was 60 MHz. These films can be formed continuously only by changing the substrate temperature and switching the reaction gas.

The silicon oxynitride film 102a thus manufactured has a density of 9.28 × 10 ²² / cm ³ , 7.13% ammonium hydrogen fluoride (NH ₄ HF ₂ ), and ammonium fluoride (NH ₄ F ) Is a dense and hard film with a slow etching rate of about 63 nm / min at 20 ° C. of a mixed solution containing 15.4% (product name: LAL500, manufactured by Stella Chemifa Corporation). When such a film is used for the base film, it is effective to prevent the alkali metal element from the glass substrate from diffusing into the semiconductor layer formed thereon.

Next, a semiconductor layer 103a having an amorphous structure with a thickness of 25 to 80 nm (preferably 30 to 60 nm) is formed by a known method such as a plasma CVD method or a sputtering method. For example, an amorphous silicon film is formed to a thickness of 55 nm by plasma CVD. The semiconductor film having an amorphous structure includes an amorphous semiconductor film and a microcrystalline semiconductor film, and a compound semiconductor film having an amorphous structure such as an amorphous silicon germanium film may be applied. In addition, the base film 102 and the amorphous semiconductor layer 103a can be formed continuously. For example, as described above, after the silicon oxynitride film 102a and the silicon oxynitride silicon film 102b are continuously formed by the plasma CVD method, the reaction gas is changed from SiH ₄ , N ₂ O, H ₂ to SiH ₄ and H ₂ or If switched to only SiH _{4, the} film can be continuously formed without being exposed to the air atmosphere once. As a result, contamination of the surface of the silicon oxynitride silicon film 102b can be prevented, and variation in characteristics and threshold voltage of the manufactured TFT can be reduced.

  Then, a crystallization step is performed to form a crystalline semiconductor layer 103b from the amorphous semiconductor layer 103a. As the method, a laser annealing method, a thermal annealing method (solid phase growth method), or a rapid thermal annealing method (RTA method) can be applied. When using a glass substrate or a plastic substrate with poor heat resistance as described above, it is particularly preferable to apply a laser annealing method. In the RTA method, an infrared lamp, a halogen lamp, a metal halide lamp, a xenon lamp, or the like is used as a light source. Alternatively, the crystalline semiconductor layer 103b can be formed by a crystallization method using a catalytic element in accordance with the technique disclosed in Japanese Patent Application Laid-Open No. 7-130652. In the crystallization step, it is preferable to first release the hydrogen contained in the amorphous semiconductor layer. After the heat treatment at 400 to 500 ° C. for about 1 hour to reduce the amount of hydrogen contained to 5 atom% or less, the crystallization is performed. This is good because it can prevent the film surface from being rough.

When crystallization is performed by laser annealing, a pulse oscillation type or continuous light emission type excimer laser or argon laser is used as the light source. In the case of using a pulse oscillation type excimer laser, laser annealing is performed by processing laser light into a linear shape. The laser annealing conditions are appropriately selected by the practitioner. For example, the laser pulse oscillation frequency is 30 Hz, and the laser energy density is 100 to 500 mJ / cm ² (typically 300 to 400 mJ / cm ² ). Then, a linear beam is irradiated over the entire surface of the substrate, and the linear beam superposition ratio (overlap ratio) at this time is set to 80 to 98%. In this way, a crystalline semiconductor layer 103b can be obtained as shown in FIG.

The conditions for laser crystallization are appropriately selected by the practitioner. For example, the pulse oscillation frequency of an Nd: YAG laser is 10 kHz, and the laser energy density is 200 to 500 mJ / cm ² (typically 300 to 450 mJ / cm ² ), the amorphous semiconductor layer is crystallized by scanning a linear laser beam in a direction perpendicular to the longitudinal direction (or relatively moving the substrate). The linear laser beam has a line width of 100 to 1000 μm, for example, 400 μm. A slit is provided on the substrate 101 to adjust the length of the linear laser in the longitudinal direction. By providing such a slit, only a part of the amorphous semiconductor layer 103a can be crystallized.

  Using such a linear beam, the same location is irradiated multiple times. Or it irradiates several times, scanning a linear beam. At this time, the linear beam superposition ratio (overlap ratio) is preferably 90 to 99%. Actually, the irradiation pulse is preferably 10 to 40 pulses. By repeatedly irradiating the same region with a high overlay ratio, there is an effect of increasing the crystallinity of the amorphous semiconductor layer 103a. Usually, when the overlay ratio is increased, the processing time becomes longer and the throughput decreases. However, if a YAG laser oscillator pumped with a semiconductor laser is used, the oscillation frequency can be increased as in this embodiment, so that the throughput is not deteriorated. In this way, the crystalline semiconductor layer 103b is formed.

Then, a photomask 1 (PM1) is used over the crystalline semiconductor layer 103b, a resist pattern is formed using a photolithography technique, the crystalline semiconductor layer is divided into island shapes by dry etching, and the island-like semiconductor layers 104 are formed. To 108 are formed. For dry etching, a mixed gas of CF ₄ and O ₂ is used.

In order to control the threshold voltage (Vth) of the TFT, such an island-shaped semiconductor layer is doped with an impurity element imparting p-type at a concentration of about 1 × 10 ^{16 to} 5 × 10 ¹⁷ atoms / cm ^3. It may be added to the entire surface of the semiconductor layer. Examples of impurity elements that impart p-type to semiconductors include boron (B), aluminum (Al), and gallium (Ga).
The elements of Group 1 of the Periodic Table are known. As the method, an ion implantation method or an ion doping method can be used, but an ion doping method is suitable for processing a large-area substrate. In the ion doping method, diborane (B ₂ H ₆ ) is used as a source gas and boron (B) is added. Such implantation of the impurity element is not always necessary and may be omitted. However, this is a technique that is particularly suitable for keeping the threshold voltage of the n-channel TFT within a predetermined range.

The gate insulating film 109 is formed of an insulating film containing silicon with a thickness of 40 to 150 nm by using a plasma CVD method or a sputtering method. For example, it is preferable to form a silicon oxynitride film with a thickness of 120 nm. In addition, a silicon oxynitride film manufactured by adding O ₂ to SiH ₄ and N ₂ O is a preferable material for this application because the fixed charge density in the film is reduced. Needless to say, the gate insulating film is not limited to such a silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a stacked structure (FIG. 1C).

  As shown in FIG. 1D, a heat-resistant conductive layer for forming a gate electrode is formed over the gate insulating film 109. Although the heat-resistant conductive layer may be formed as a single layer, it may have a laminated structure including a plurality of layers such as two layers or three layers as necessary. Such a heat-resistant conductive material is preferably used, for example, a structure in which a conductive layer (A) 110 made of a conductive nitride metal film and a conductive layer (B) 111 made of a metal film are stacked. The conductive layer (B) 111 is an element selected from tantalum (Ta), titanium (Ti), molybdenum (Mo), and tungsten (W), an alloy containing the element as a main component, or an alloy film in which the elements are combined. (Typically, the conductive layer (A) 110 may be formed of tantalum nitride (TaN), tungsten nitride (WN), titanium nitride (TiN) film, nitride). It is made of molybdenum (MoN) or the like. Further, tungsten silicide, titanium silicide, or molybdenum silicide may be applied to the conductive layer (A) 110. In the conductive layer (B) 111, it is preferable to reduce the concentration of impurities contained in order to reduce the resistance. In particular, the oxygen concentration is preferably 30 ppm or less. For example, tungsten (W) was able to realize a specific resistance value of 20 μΩcm or less by setting the oxygen concentration to 30 ppm or less.

The conductive layer (A) 110 may be 10 to 50 nm (preferably 20 to 30 nm), and the conductive layer (B) 111 may be 200 to 400 nm (preferably 250 to 350 nm). When W is a gate electrode, argon (Ar) gas and nitrogen (N ₂ ) gas are introduced by sputtering using W as a target, and the conductive layer (A) 111 is made of tungsten nitride (WN) with a thickness of 50 nm. The conductive layer (B) 110 is formed to a thickness of 250 nm with W. As another method, the W film can be formed by thermal CVD using tungsten hexafluoride (WF ₆ ). In any case, in order to use as a gate electrode, it is necessary to reduce the resistance, and the resistivity of the W film is desirably 20 μΩcm or less. The resistivity of the W film can be reduced by increasing the crystal grains. However, when there are many impurity elements such as oxygen in W, crystallization is hindered and the resistance is increased. Therefore, when sputtering is used, a W target having a purity of 99.9% is used, and the W film is formed with sufficient consideration to prevent impurities from entering the gas phase during film formation. 9-20 μΩcm can be realized.

  On the other hand, when a TaN film is used for the conductive layer (A) 110 and a Ta film is used for the conductive layer (B) 111, it can be similarly formed by sputtering. The TaN film is formed using Ta as a target and a mixed gas of Ar and nitrogen as a sputtering gas, and the Ta film uses Ar as a sputtering gas. In addition, when an appropriate amount of Xe or Kr is added to these sputtering gases, the internal stress of the film to be formed can be relaxed and the film can be prevented from peeling. The resistivity of the α-phase Ta film is about 20 μΩcm and can be used as a gate electrode, but the resistivity of the β-phase Ta film is about 180 μΩcm and is not suitable for a gate electrode. Since the TaN film has a crystal structure close to an α phase, an α phase Ta film can be easily obtained by forming a Ta film thereon. Although not shown, it is effective to form a silicon film doped with phosphorus (P) with a thickness of about 2 to 20 nm under the conductive layer (A) 110. This improves adhesion and prevents oxidation of the conductive film formed thereon, and at the same time, an alkali metal element contained in a trace amount in the conductive layer (A) 110 or the conductive layer (B) 111 is added to the gate insulating film 109. It can be prevented from spreading. In any case, the conductive layer (B) 111 preferably has a resistivity in the range of 10 to 50 μΩcm.

  Next, using the photomask 2 (PM2), resist masks 112 to 117 are formed using the photolithography technique, and the conductive layer (A) 110 and the conductive layer (B) 111 are etched together to form a gate. Electrodes 118 to 122 and a capacitor wiring 123 are formed. The gate electrodes 118 to 122 and the capacitor wiring 123 are integrally formed of 118a to 122a made of a conductive layer (A) and 118b to 122b made of a conductive layer (B) (FIG. 2A).

A method for etching the conductive layer (A) and the conductive layer (B) may be appropriately selected by a practitioner. However, when the conductive layer (A) and the conductive layer (B) are formed of a material containing W as a main component as described above, the method is performed at a high speed. In order to perform etching with high accuracy, it is desirable to apply a dry etching method using high-density plasma. As one method for obtaining high-density plasma, an inductively coupled plasma (ICP) etching apparatus may be used. In the etching method of W using an ICP etching apparatus, _two gases of CF ₄ and Cl ₂ are introduced into the reaction chamber as an etching gas, and the pressure is set to 0.5 to 1.5 Pa (preferably 1 Pa). 200 to 1000 W of high frequency (13.56 MHz) power is applied to At this time, high-frequency power of 20 W is applied to the stage on which the substrate is placed, and the negative ions are charged by self-bias, whereby positive ions are accelerated and anisotropic etching can be performed.
By using an ICP etching apparatus, a hard metal film such as W can obtain an etching rate of 2 to 5 nm / second. Further, in order to perform etching without leaving a residue, overetching is preferably performed by increasing the etching time at a rate of about 10 to 20%. However, it is necessary to pay attention to the etching selectivity with the base at this time. For example, a silicon oxynitride film (gate insulating film 109) for the W film
Therefore, the surface where the silicon oxynitride film was exposed was etched by about 20 to 50 nm and became substantially thin by such an over-etching process.

Then, in order to form an LDD region in the n-channel TFT, an impurity element addition step for imparting n-type (n ⁻ doping step) was performed. Here, an impurity element imparting n-type in a self-aligning manner is added by ion doping using the gate electrodes 118 to 122 as a mask. The concentration of phosphorus (P) added as an impurity element imparting n-type is added in a concentration range of 1 × 10 ^{16 to} 5 × 10 ¹⁹ atoms / cm ³ . In this manner, low-concentration n-type impurity regions 124 to 129 are formed in the island-shaped semiconductor layer as shown in FIG.

Next, in the n-channel TFT, a high-concentration n-type impurity region functioning as a source region or a drain region was formed (n ⁺ doping step). First, using the photomask 3 (PM3), resist masks 130 to 134 were formed, and an impurity element imparting n-type conductivity was added to form high-concentration n-type impurity regions 135 to 140. Ion doping method using phosphorus (P) as an impurity element imparting n-type and using phosphine (PH ₃ ) so that its concentration is in a concentration range of 1 × 10 ²⁰ to 1 × 10 ²¹ atoms / cm ^3. (FIG. 2C).

Then, high-concentration p-type impurity regions 144 and 145 serving as a source region and a drain region are formed in the island-like semiconductor layers 104 and 106 forming the p-channel TFT. Here, an impurity element imparting p-type is added using the gate electrodes 118 and 120 as a mask, and a high-concentration p-type impurity region is formed in a self-aligning manner. At this time, the island-like semiconductor films 105, 107, and 108 forming the n-channel TFT are covered with the resist masks 141 to 143 using the photomask 4 (PM4). The high-concentration p-type impurity regions 144 and 145 are formed by an ion doping method using diborane (B ₂ H ₆ ). The boron (B) concentration in this region is set to 3 × 10 ^{20 to} 3 × 10 ²¹ atoms / cm ³ (FIG. 2D). Phosphorus (P) is added to the high-concentration p-type impurity regions 144 and 145 in the previous step, and the high-concentration p-type impurity regions 144a and 145a are 1 × 10 ²⁰ to 1 × 10 ²¹ atoms / cm ^3. The high-concentration p-type impurity regions 144b and 145b contain 1 × 10 ^{16 to} 5 × 10 ¹⁹ atoms / cm ³ , but the concentration of boron (B) added in this step is 1 There was no problem in functioning as the source region and the drain region of the p-channel TFT by increasing the power from 0.5 to 3 times.

After that, as shown in FIG. 3A, a protective insulating film 146 is formed over the gate electrode and the gate insulating film. The protective insulating film may be formed using a silicon oxide film, a silicon oxynitride film, a silicon nitride film, or a stacked film including a combination thereof. In any case, the protective insulating film 146 is formed from an inorganic insulating material. The thickness of the protective insulating film 146 is 100 to 200 nm. Here, in the case of using a silicon oxide film, tetraethyl orthosilicate (TEOS) and O 2 are mixed by plasma CVD to have a reaction pressure of 40 Pa, a substrate temperature of 300 to 400 ° C., and a high frequency (13.56 MHz). ) It can be formed by discharging at a power density of 0.5 to 0.8 W / cm ² . In the case of using a silicon oxynitride film, SiH _4, N ₂ O, by forming a silicon oxide nitride film, or SiH _4, N ₂ silicon oxynitride film made from O, made from NH ₃ by the plasma CVD method It ’s fine. The production conditions in this case are a reaction pressure of 20 to 200 Pa, a substrate temperature of 300 to 400 ° C., and a high frequency (60 MHz) power density of 0.1 to 1.0 W / cm ² . Alternatively, a silicon oxynitride silicon film formed from SiH ₄ , N ₂ O, and H ₂ may be used. Similarly, the silicon nitride film can be formed from SiH ₄ and NH ₃ by plasma CVD.

  Thereafter, a step of activating the impurity element imparting n-type or p-type added at each concentration is performed. This step is performed by a thermal annealing method using a furnace annealing furnace. In addition, a laser annealing method or a rapid thermal annealing method (RTA method) can be applied. In the thermal annealing method, the oxygen concentration is 1 ppm or less, preferably 0.1 ppm or less in a nitrogen atmosphere at 400 to 700 ° C., typically 500 to 600 ° C. In this example, the temperature is 550 ° C. for 4 hours. Heat treatment was performed. Further, in the case where a plastic substrate having a low heat resistant temperature is used for the substrate 101, it is preferable to apply a laser annealing method (FIG. 3B).

After the activation step, a heat treatment was performed at 300 to 450 ° C. for 1 to 12 hours in an atmosphere containing 3 to 100% hydrogen to perform a step of hydrogenating the island-shaped semiconductor film. This step is a step of terminating dangling bonds of 10 ¹⁶ to 10 ¹⁸ / cm ^{3 in} the island-like semiconductor film by thermally excited hydrogen. As another means of hydrogenation, plasma hydrogenation (using hydrogen excited by plasma) may be performed.

  After the activation and hydrogenation steps are completed, an interlayer insulating film 147 made of an organic insulating material is formed with an average thickness of 1.0 to 2.0 μm. As the organic resin material, polyimide, acrylic, polyamide, polyimide amide, BCB (benzocyclobutene), or the like can be used. For example, when using a type of polyimide that is thermally polymerized after being applied to the substrate, it is formed by baking at 300 ° C. in a clean oven. When acrylic is used, a two-component type is used, and after mixing the main material and the curing agent, applying the entire surface of the substrate using a spinner, preheating at 80 ° C. for 60 seconds with a hot plate. It can be formed by baking at 250 ° C. for 60 minutes in a clean oven.

  Thus, the surface can be satisfactorily flattened by forming the interlayer insulating film with an organic insulating material. In addition, since organic resin materials generally have a low dielectric constant, parasitic capacitance can be reduced. However, it is hygroscopic and is not suitable as a protective film, and thus needs to be used in combination with a silicon oxide film, a silicon oxynitride film, a silicon nitride film, or the like formed as the protective insulating film 146 as in this embodiment.

Thereafter, a resist mask having a predetermined pattern is formed using the photomask 5 (PM5), and contact holes reaching the source region or the drain region formed in each island-shaped semiconductor film are formed. Contact holes are formed by dry etching. In this case, an interlayer insulating film made of an organic resin material is first etched using a mixed gas of CF ₄ , O ₂ , and He as an etching gas, and then the protective insulating film 146 is etched using the etching gas as CF ₄ and O _2. To do. Furthermore, in order to increase the selectivity with respect to the island-shaped semiconductor layer, the contact hole can be satisfactorily formed by switching the etching gas to CHF ₃ and etching the gate insulating film.

  Then, a conductive metal film is formed by sputtering or vacuum deposition, a resist mask pattern is formed by a photomask 6 (PM6), and source wirings 148 to 151 and 157 and drain wirings 153 to 156 and 152 are formed by etching. Form. Although not shown, in this embodiment, this electrode is formed by forming a Ti film with a thickness of 50 to 150 nm, forming a contact with the semiconductor film forming the source or drain region of the island-like semiconductor layer, and the Ti film Overlaid on top, aluminum (Al) was formed to a thickness of 300 to 400 nm to form a wiring (FIG. 3C).

  Thereafter, a second interlayer insulating film 158 made of an organic resin is formed to a thickness of 0.5 to 1.5 μm. As the organic resin, polyimide, acrylic, polyamide, polyimide amide, BCB (benzocyclobutene), or the like can be used. In the present embodiment, 0.5 μm of acrylic resin is applied and baked at 250 ° C.

  An inorganic insulating film 159 is formed thereon with a thickness of 10 nm to 100 nm. The inorganic insulating film may be formed using a silicon oxide film, a silicon oxynitride film, a silicon nitride film, or a stacked film including a combination thereof. In this embodiment, a silicon oxide film is formed with a thickness of 50 nm.

Further, an acrylic resin is applied as the third interlayer insulating film 160 so as to have a thickness of 0.5 μm. Next, the acrylic resin is dry-etched to remove the third interlayer insulating film 160 corresponding to the sealing material formation region. The inorganic insulating film 159 serves as a stopper for dry etching and serves as a standard for detecting the end point. The reason why the organic interlayer film is formed by dividing it into two layers and is removed is to ease the injection because it takes a long time if the step is large with a narrow gap. By etching only the uppermost layer of the interlayer film, the step can be formed with high accuracy.
If the interlayer film is further applied from above, the step is flattened and a desired step cannot be formed. In this embodiment, the interlayer insulating film is further removed. However, if the etching rate is the same, a plurality of interlayer insulating films can be removed.
(FIG. 4 (A)).

  In this embodiment, the interlayer film between the drain wiring and the pixel electrode is etched to form a step in the seal formation region. For example, when the drain electrode also serves as the pixel electrode, the gap between the gate electrode and the drain electrode is formed. The interlayer film may be formed of two or more layers having different etching selection ratios, and the step in the seal formation region may be formed by removing the uppermost layer. Also in this case, if the uppermost interlayer film is etched, it is possible to prevent the step from being flattened by further forming the interlayer film.

Then, a contact hole reaching the drain wiring 152 is formed in the second interlayer insulating film 158, the third interlayer insulating film 160, and the inorganic insulating film 159, and the pixel electrode 161 is formed. The pixel electrode may be a transparent conductive film in the case of a transmissive liquid crystal display device, and may be a metal film in the case of a reflective liquid crystal display device. In this embodiment, indium tin oxide (ITO) is used for a transmissive liquid crystal display device.
A film is formed to a thickness of 100 nm by sputtering (FIG. 4B).

  The manner in which the columnar spacer is formed on the substrate on which the TFT element is formed will be described with reference to FIG. A photosensitive resin is spin-coated to form the columnar spacer 162. JSR "NN700" which is an acrylic resin of a negative photosensitive material is used. By applying “NN700” at a spin rotation speed of 2000 rpm, the height of the columnar spacer after thermosetting becomes 2.5 μm in the pixel region.

  Of course, the material of the columnar spacer 162 does not need to be photosensitive, and it is also possible to pattern the non-photosensitive resin to form a spacer. For example, polyimide, polyamide, acrylic, polyvinyl cinnamate, etc. can be used. In any case, it is desirable to use an organic resin having a flattening effect.

  By the way, when the photosensitive resin is applied, the step due to the film thickness of the third interlayer insulating film 160 is flattened so that the cell gaps in the pixel region, the drive circuit region, and the region where the seal material is provided are substantially equal. This is desirable in order to prevent cell gap unevenness.

  If it demonstrates using FIG. 6, 201 of FIG. 6 shows a glass substrate. The wiring pattern on the glass substrate is omitted. Third interlayer insulating films 203 and 204 are etched on the inorganic insulating film 202 serving as a dry etching stopper. Reference numeral 205 denotes a photosensitive resin. The photosensitive resin becomes a columnar spacer after patterning. There is a columnar spacer 206 in the pixel region 207. There is a columnar spacer 209 in the region 208 where the sealing material is provided.

  The region 210 for etching the third interlayer insulating films 203 and 204 of this embodiment is only around the region 208 where the sealing material is provided. This is to make it easy to flatten the step 211 caused by etching when the photosensitive resin 205 is applied.

  By etching the organic resin film only in and around the region where the sealing material is provided, the flatness of the photosensitive resin is increased, and the columnar spacer 206 provided in the pixel region 207 and the region 208 where the sealing material is provided. The heights of the apexes of the columnar spacers 209 are substantially equal.

In this embodiment, the region to be etched (L _A ) 210 is L _B +0.1 mm ≦ L _A ≦ L _B +6 mm, preferably L _B +0.1 mm ≦ L _A ≦ L _{B with} respect to the region (L _B ) where the sealing material is provided. +2 mm. For example, when the region (L _B ) where the sealing material is provided is 1 mm, the width (L _A ) of the region 610 to be etched with the organic resin is set to the seal formation region (L _B ).
1 mm larger than 2 mm.

A configuration for comparison is shown in FIG. Reference numeral 301 in FIG. 7 denotes a glass substrate. The wiring pattern on the glass substrate is omitted. A third interlayer insulating film 303 is etched on the inorganic insulating film 302 serving as a dry etching stopper. Reference numeral 304 denotes a photosensitive resin. The photosensitive resin becomes a columnar spacer after patterning. There is a columnar spacer 305 in the pixel region 306. There is a columnar spacer 310 in a region 307 where a sealing material is provided. Reference numeral 308 denotes a difference in height between the columnar spacer 305 provided in the pixel region and the columnar spacer 310 provided in the region where the sealing material is provided.
In order to make the cell gap unevenness difficult, the height difference 308 is desirably as small as possible.

  In FIG. 7, the third interlayer insulating film 303 after the etching process is on the pixel region 306 and the driving circuit, and the third interlayer insulating film is etched from the periphery of the region where the sealant is provided to the outside of the liquid crystal display device. ing. A region 309 for etching the third interlayer insulating film is shown.

  That is, as can be seen from the comparison of the cross-sectional views of FIGS. 6 and 7, the step of etching the organic resin film as narrow as possible as shown in FIG. 6 is more reliably flattened when the photosensitive resin is applied. Increases effectiveness. Thereby, the height of the columnar spacers after patterning can be made uniform in the pixel region, the drive circuit region, and the region where the sealing material is provided. Of course, by reducing the viscosity of the organic resin film and increasing the number of coatings, the structure of FIG. 7 can be sufficiently flattened. When the organic resin film is applied twice, the flattening effect of the step becomes high.

  Then, as shown in FIG. 5, the photosensitive resin is irradiated with ultraviolet rays, and columnar spacers 162 are formed by photolithography. The diameter of the columnar spacer 162 is desirably 1 to 10 μm. In the present embodiment, the columnar spacer 162 has a diameter of 2 to 3 μm.

  The columnar spacer 162 is formed on the storage capacitor in the pixel region. In the driving circuit region, the gate electrode is formed on the scanning line. A columnar spacer 162 is also formed in the region where the sealing material is provided to replace the filler.

  After patterning the columnar spacer, it is thermally cured by post-baking. Post bake temperature shall be 250 degreeC. Thus, a columnar spacer having a diameter of 2 to 3 μm is formed. The height of the columnar spacer is 2.5 μm in the pixel region and the drive circuit region, and 3 μm in the region where the sealing material is provided. Columnar spacers are provided on the element substrate sealing material area, the pixel area, and the drive circuit area so that the heights of the apexes are substantially uniform.

  A manufacturing process of the counter substrate is described below. This will be described with reference to FIG.

  On the glass substrate 163, Cr (chromium) is deposited to 120 nm as a black matrix 164 of an inorganic material by sputtering. The black matrix prevents light leakage due to liquid crystal disclination and deterioration of the switching element due to light reaction. The material of the black matrix is not limited to metal, but may be metal oxide or metal nitride. In addition to chromium, the black matrix of inorganic material includes tantalum, chromium oxide, tantalum nitride, and the like. The black matrix of an inorganic material exhibits a high OD value (Optical Density) of 4 to 6 or more even at a thin film thickness of 90 to 300 nm. The formation of a step due to the thickness of the black matrix can be suppressed.

  Next, an indium tin oxide (ITO) film is formed as a transparent conductive film 165 to a thickness of 100 nm by a sputtering method. In order to increase the transmittance of the ITO film by the light interference effect, the thickness of the ITO film is preferably 100 to 140 nm. Thus, the counter substrate of this embodiment is completed.

An alignment film 166 is formed on the element substrate and the counter substrate by an alignment film printing method.
In the present embodiment, a vertical alignment film “SE1211” of Nissan Chemical Industries is printed at 60 nm.
After printing, the alignment film is pre-baked and post-baked.

  Even if the vertical alignment film is not rubbed, the pretilt angle of the liquid crystal can be 90 °, and the liquid crystal is vertically aligned with respect to the alignment film.

  However, when the pretilt angle is 90 °, when the active matrix display device is driven by line inversion, the polarity of the voltage is inverted between adjacent pixels, so that the disclination is easily caused by the lateral electric field. In order to suppress disclination, it is better to rub and set the pretilt angle to 85 ° to 89 °.

  However, the vertical alignment film is likely to have rubbing lines due to rubbing, and the display quality is easily impaired by the rubbing lines. In particular, if there is a step on the rubbing surface, a rubbing streak that has pulled the step will appear.

  In this embodiment, the step is provided by etching the organic resin film in the region where the sealing material of the element substrate is provided, but the step is formed by etching the organic resin film into two layers and etching only one layer. I keep it to the minimum necessary. Moreover, since the counter substrate is made of an inorganic material having a thickness of 100 to 120 nm, there are few steps. For this reason, it has a structure in which the rubbing streaks due to the steps are difficult to come out.

  In this embodiment, the counter substrate and the element substrate are rubbed so that the rubbing direction when the liquid crystal display device is formed is antiparallel.

  A sealant 168 is formed between the pair of substrates. In the present embodiment, a thermosetting epoxy resin Mitsui Chemical's struct bond “XN-21S” is used as the sealing material. The diameter of the filler is a maximum of 5 μm. In the experiment, the seal material of XN-21S collapsed only to 2.5 μm due to the diameter of the filler. In addition, when the cell gap is reduced to 2.5 μm, the low viscosity component in the sealing material easily flows out to the pixel region. It was found that the cell gap that can be formed by “XN-21S” is 2.5 μm or more, and considering the display quality, 3.0 μm or more is desirable in order to suppress the outflow of the low viscosity component of the sealing material.

  In this embodiment, since the cell gap of the pixel region is 2.5 μm and the organic resin film is etched with a thickness of 0.5 μm, the sealing material can be 3.0 μm. For this reason, the outflow of the uncured resin and the low viscosity component in the sealing material can be suppressed, and a desired cell gap can be formed. In order to achieve a configuration in which the level difference is minimized, the seal is set to 3.0 μm, and the level difference is set to 0.5 μm so that the low viscosity component does not flow out.

After pre-baking the sealing material at 90 ° C. for 30 minutes, the counter substrate and the element substrate are bonded together and hot pressing is performed. The pressure of the hot press is 0.3 kgf / cm ² . After hot pressing, cut with a scriber or breaker.

  In the vertical alignment reflection type liquid crystal display device, the retardation (Δnd) of the liquid crystal layer is preferably 0.2 to 0.3 although it depends on the environmental temperature. In this embodiment, since the cell gap is 2.5 μm, Merck negative liquid crystal “MLC2038” having a refractive index anisotropy (Δn) of 0.1 is injected.

  After the liquid crystal 167 is injected, the injection port is sealed with a UV curable resin (not shown), and then the liquid crystal is heated to a temperature equal to or higher than the isotropic phase to perform a realignment process.

  A flexible printed circuit (FPC) (not shown) is attached, and an external signal is input to drive the liquid crystal display device. An electric field is applied to the liquid crystal 167 and the alignment film 166 by the pixel electrode 161 connected to the TFT and the pixel electrode 165 provided on the counter substrate.

  The active matrix display device is completed as described above.

  Check the display quality of the vertical alignment reflective LCD. The vertical alignment reflection type projector liquid crystal display device requires an optical system using a PBS (Polarized Beam Splitter). As shown in FIG. 15 (3), of the light incident on the polarizing beam splitter 1103, the light (S-polarized light 1105) that oscillates horizontally is reflected on the splitter surface 1104 of the polarizing beam splitter 1103, and the S-polarized light 1105 and the vibration direction are reflected. Is perpendicular to the light (P-polarized light 1106).

  FIGS. 15A and 15B show an optical system of a vertical alignment reflection type projector. The light source 1101 was a white light metal halide lamp. The light emitted from the light source 1101 is reflected by the reflector 1102 to become a parallel light beam and enters the polarization beam splitter 1103. Of the light incident on the polarization beam splitter, S-polarized light is reflected by the splitter surface and enters the dichroic prism 1105. White light incident by the dichroic prism is split into light of three colors, red, green, and blue, and is incident on vertical alignment reflective liquid crystal display devices 1106 to 1108. A three-plate optical system that performs color display using three liquid crystal display devices enables high-resolution display.

  In black display, the liquid crystal is vertically aligned, and light incident on the vertically aligned reflective liquid crystal display devices 1106 to 1108 is not optically modulated by the liquid crystal. As shown in FIG. 15 (1), the light reflected from the liquid crystal display device remains S-polarized light, so that S-polarized light is reflected to the light source side by the splitter surface of the polarizing beam splitter. For this reason, light does not enter the screen 1109.

  During white display, a voltage corresponding to a predetermined gradation is applied to the liquid crystal display device. As shown in FIG. 15 (2), the light incident on the vertical alignment reflection type liquid crystal display devices 1106 to 1108 is optically modulated by the liquid crystal to change the polarization state. Therefore, the light reflected from the liquid crystal display device is circular. Polarized light, elliptically polarized light, or P-polarized light. Light is emitted from the polarizing beam splitter 1103 toward the screen 1109 with brightness according to the polarization state. The light emitted from the polarization beam splitter is projected onto the screen 1109 by the projection lens 1110.

  The display is evaluated with the optical system of FIG. Cell gap unevenness and rubbing stripes have no problem in display. Even when the liquid crystal display device is observed, bubbles around the sealing material are not seen because of the structure that can minimize the formation of a step near the sealing material.

  The feature of this embodiment is to first suppress the outflow of uncured resin and low-viscosity components of the sealing material accompanying the narrowing of the cell gap by etching the organic resin film in the region where the sealing material is provided.

  In addition, the feature of the present embodiment is that the step in the region where the sealing material is provided is flattened by the columnar spacer, and the height of the apex of the columnar spacer is made uniform. Since the counter substrate also uses an inorganic film such as a chromium or ITO film having a thin film thickness of 90 to 300 nm, the flatness is good. A uniform cell gap can be obtained by assembling a panel using two substrates having good flatness.

  In addition, the feature of this embodiment is that the organic resin film is formed in two layers and only one layer is etched to minimize the formation of the step. As a result, bubbles caused by steps and rubbing streaks can be suppressed. Furthermore, since the formation of the step is minimized, the step is easily flattened by the column spacer.

  In terms of liquid crystal injection, the structure that suppresses the formation of steps is a display mode in which the anchoring energy of the alignment film is weak and the liquid crystal injection takes a long time, such as vertical alignment, and the liquid crystal viscosity is high and the liquid crystal injection takes a long time. Useful for mode. It is also useful for large liquid crystal display devices where bubbles are likely to remain.

  In addition, smectic liquid crystals having spontaneous polarization are less likely to be injected with liquid crystal and easily form bubbles at the stepped portion. Then, alignment defects spread in the layer direction starting from bubbles, making it difficult to obtain uniform alignment over the entire surface of the liquid crystal display device. In the experiment, even the step of 30 to 370 nm caused by the alignment film (30 to 230 nm) and the transparent electrode (90 to 140 nm), the liquid crystal was not injected well and bubbles were formed depending on the size and injection conditions of the liquid crystal display device. For this reason, the configuration of the present embodiment in which the formation of the step is minimized is useful in a liquid crystal display device using a smectic liquid crystal.

The configuration that minimizes the formation of the level difference in this embodiment is a relatively pre-tilt for display mode that has high pre-tilt and high rubbing stripes, such as vertical alignment, and for disclination measures, in terms of preventing rubbing stripes. (5-10 °)
This is useful for the display mode, where rubbing streaks are likely to occur.

  In terms of preventing a step due to rubbing, it is also possible to apply an organic resin film after the step is formed, and to gently taper the step portion. By applying a gentle taper, the rubbing roll's hair tips are less disturbed and the rubbing streaks can be reduced.

  In an active matrix liquid crystal display device integrated with a drive circuit, in the case of a small panel having a diagonal size of 2 to 3 inches or less, it is possible to provide a spacer only in the region where the drive circuit and the sealing material are formed, and not in the display region. It is. Light leakage due to disorder of the liquid crystal alignment around the spacer can be prevented. When a quartz substrate is used, accurate cell gap control can be performed without providing a material for controlling the gap in the display region.

  When the present embodiment is applied to a liquid crystal display device, it is not necessary to have all the features of the configuration of the present embodiment, and the practitioner may select as appropriate as necessary. In this embodiment, the organic resin film of the element substrate is etched, but a step can be formed by etching the inorganic film.

[Embodiment 2]
In the present embodiment, a method for forming a liquid crystal display device having a uniform cell gap without complicated processes will be described.

  In a liquid crystal display device, there is a case where an operation of setting a filler diameter in a sealing material and a spacer diameter in a pixel region is performed based on a step between the region where the sealing material is provided and the pixel region. However, even if the filler diameter is optimized from the step measurement value due to the accuracy of the measuring apparatus, the cell gap may be uneven.

  However, in this embodiment, no filler or spacer is provided on the sealing material. Therefore, the cell gap of the sealing material is determined by spacers formed in the pixel region and the drive circuit region. For this reason, the cell gap can be prevented from locally becoming thick due to the step caused by the FPC wiring under the seal of the active matrix display device.

  FIG. 8 shows the configuration of the second embodiment. The element substrate is a glass substrate 401, an intrinsic semiconductor layer 402, a semiconductor n-channel region 403, a semiconductor p-channel region 404, a gate insulating film 405, a heat-resistant conductor layer 406, a protective film 407, a first interlayer insulating film 408, and a source wiring. 409 and 411, drain wirings 410 and 412, a second interlayer insulating film 413, a pixel electrode 414, and a columnar spacer 423.

  In the second embodiment, the organic resin film on the counter substrate is etched in the region where the sealing material is provided. For this reason, the interlayer insulating film of the element substrate is not etched for forming the sealing material.

  In this embodiment, the height of the columnar spacer is 1.0 μm. As the columnar spacer material, JSR “NN700” was diluted to lower the viscosity, and spin coating was performed to form a cell gap of 1.0 μm.

  The counter substrate includes a glass substrate 415, a black matrix 416 of an inorganic material, a color filter 417, an overcoat material 418, and a transparent conductive film 419. The characteristics of the counter substrate will be described with reference to FIG.

  As shown in FIG. 11A, a black matrix 702 made of an inorganic material is formed on the glass 701 of the counter substrate. In this embodiment, chrome 120 nm is used.

  A color filter 703 is formed on a black matrix 702 made of an inorganic material. The color filter is made of an organic resin in which a pigment is dispersed. The thickness of the color filter is preferably 0.3 μm to 1.5 μm for the reflective liquid crystal display device, and preferably 0.8 μm to 2.0 μm for the transmissive liquid crystal display device. The color filter performs color display by combining color mosaics of each color. The combination of colors used as the color mosaic is not limited to additive primary colors such as red, blue, and green, but also subtractive primary colors such as cyan, magenta, and yellow.

  In the present embodiment, color display is performed with the three primary colors of additive color mixture of red, blue, and green. As the color filter, a photosensitive acrylic resin is formed in a stripe shape with a thickness of 1.4 to 1.6 μm in order of green, blue, and red. Although not shown, when a black matrix is provided between adjacent color mosaics, color mixing due to overlapping of color mosaics can be prevented.

  The present embodiment is characterized in that at least one of the color mosaic green, red, and blue of the color filter 703 is also formed in the drive circuit 708 region. As a result, at least the driver circuit region 708 and the pixel region 706 are flattened at the same height, and the cell gap unevenness is less likely to occur. Such a configuration is particularly effective for a liquid crystal display device having a large drive circuit area, such as a digital drive panel, among active matrix liquid crystal display devices integrated with a drive circuit.

  An overcoat material 704 is formed on the color filter 703. The thickness of the overcoat material is desirably 0.5 to 5 μm. The overcoat material is a transparent organic resin film such as acrylic or polyimide, and has an effect of flattening fine steps formed by overlapping adjacent color mosaics. In this embodiment, the thickness of the overcoat material is 1 μm.

  An indium tin oxide (ITO) film is formed as a transparent conductive film 705 to a thickness of 100 nm by sputtering, and a resist 709 is patterned.

  After that, as shown in FIG. 11B, the overcoat material 704 in the region 707 where the sealing material is provided is etched together with the transparent conductive film 705 by dry etching. The resist is stripped with a stripper after etching.

  A configuration to be compared with FIG. 11 is shown in FIG. There is no color filter in the driving circuit region 808 of the counter substrate.

  A glass substrate 801 is provided, and a color filter 803 is formed over a black matrix 802 made of an inorganic material. In the present embodiment, color display is performed with the three primary colors of additive color mixture of red, blue, and green. As the color filter, a photosensitive acrylic resin is formed in a stripe shape with a thickness of 1.4 to 1.6 μm in order of green, blue, and red. Although not shown, when a black matrix is provided between adjacent color mosaics, color mixing due to overlapping of color mosaics can be prevented. The color filter is in the pixel area.

An overcoat material 804 is formed on the color filter 803. The thickness of the overcoat material is desirably 0.5 to 5 μm. The overcoat material is a transparent organic resin film such as acrylic or polyimide, and has an effect of flattening fine steps formed by overlapping adjacent color mosaics. In this embodiment, the thickness of the overcoat material is 1 μm.

  As the transparent conductive film 805, an indium tin oxide (ITO) film is formed to a thickness of 100 nm by sputtering, and patterned with a resist.

  Thereafter, only the transparent conductive film 805 is etched on the overcoat material 804 in the region 807 where the sealing material is provided by dry etching.

  In the counter substrate manufactured in this way, a step 809 due to the thickness of the color filter remains between the pixel region 806 and the drive circuit region 808. Cell gap unevenness due to the step 809 is likely to occur. In FIG. 11, the pixel region 706 and the drive circuit region 708 are flat.

  A panel is assembled by combining the counter substrate and the element substrate of FIG. The panel assembly process will be described with reference to FIG. The alignment film 420 is appropriately selected according to the display mode.

  The seal material 422 is made of Mitsui Chemical's struct bond “XN-21F” which is a thermosetting epoxy resin. It is a commercially available material for fine pitch formation, and the maximum diameter of the filler is 4 μm. In the experiment, due to the diameter of the filler, the seal material of XN-21F was crushed only to 2.3 μm. When the cell gap is reduced to 2.5 μm, the low viscosity component in the sealing material easily flows out to the pixel region. That is, it was found that the cell gap that can be formed by “XN-21F” is 2.3 μm or more, and considering the display quality, 2.9 μm or more is desirable.

After pre-baking the sealing material, the counter substrate and the element substrate are bonded together, and hot pressing is performed. The rubbing axes of the counter substrate and the element substrate after bonding cross each other at 90 °. The pressure of the hot press is 0.3 kgf / cm ² . After hot pressing, cut with a scriber or breaker. The liquid crystal 421 is appropriately selected according to the display mode, and the injection port is cured with a UV curable resin after the liquid crystal is injected.

  By etching the 1.0 μm overcoat material 418 and the 1.5 μm color filter 417 in the region where the counter substrate sealant is provided, the cell gap in the region where the sealant is provided is compared with the cell gap in the pixel region in this embodiment. 2.5 μm higher. For a liquid crystal display device having a cell gap of 1.0 μm, the region where the sealing material is provided can be a cell gap of 3.5 μm. Thereby, the low-viscosity component of the sealing material and the outflow of the uncured resin can be suppressed. If the cell gap is 3.5 μm, the filler can be crushed and a cell gap can be formed.

  This embodiment is characterized by a sealing material. Since there is no material for controlling the cell gap such as a filler in the sealing material, the cell gap of the liquid crystal display device is determined by the height of the spacer in the drive circuit region and the pixel region. For this reason, even if a large step is provided in the region where the sealing material is provided, even if there is no complicated work of optimization of the filler diameter, a uniform cell gap is obtained.

  In addition, the structure of this embodiment is characterized by a counter substrate. As shown in FIG. 11, a color filter is also formed in the drive circuit area, and the pixel area and the drive circuit area are flattened to make it difficult to cause cell gap unevenness. ing. Furthermore, since the organic resin film in the region where the sealing material of the counter substrate is provided is etched, no seepage of the sealing material accompanying the narrowing of the cell gap is observed.

In this embodiment, the columnar spacer is used as the spacer. However, the present invention is not limited thereto, and spherical SiO ₂ , organic resin spacer, wall spacer, etc. can be used freely.

  The configuration of the counter substrate of this embodiment can be applied not only to an active matrix display device but also to a simple matrix display device.

[Embodiment 3]
In the present embodiment, a method is disclosed in which a rubbing streak caused by a step is suppressed in a substrate provided with a large step in the region where the seal material is provided due to the reliability of the seal material.

  The configuration of this embodiment will be described below. A substrate shown in FIG. 8 is used as the element substrate and the counter substrate. Each component has already been described in the second embodiment. The counter substrate has a step of 2.5 μm by etching the overcoat material and the color filter in the region where the seal material is provided. As the columnar spacer 423, JSR “NN700” is formed in the pixel region and the driving circuit at a height of 1.0 μm. In the present embodiment, differences from the second embodiment will be described.

  In this embodiment, the alignment of the liquid crystal is controlled by photo-alignment. Photo-alignment is a non-contact process with respect to the alignment film, and causes the alignment film to exhibit the alignment function of the liquid crystal. For this reason, the rubbing nonuniformity resulting from the level | step difference of the area | region which provides a sealing material can be suppressed.

  In the rubbing process of the alignment film, rubbing streaks that cause a step difference of the substrate may appear. However, by using a rubbing-less display mode in combination with liquid crystal orientation control, rubbing streaks due to steps are prevented.

  As the alignment film, polyvinyl cinnamate (PVCi) which is a photosensitive resin is used as an alignment film having a photo-alignment function. The film thickness is 30 nm. Polyvinyl cinnamate is a negative type photoresist, and its molecular structure is changed by a photoreaction to cause a dimerization reaction.

  The dimerization reaction of polyvinyl cinnamate (PVCi) is shown in FIG. The styryl group 901 in the side chain of the polyvinyl cinnamate 900 has a double bond conjugated system extending from the carbonyl group to the benzene ring, and strongly absorbs ultraviolet rays.

  When irradiated with linearly polarized ultraviolet light 902 parallel to the styryl group 901 of the side chain, the side chain absorbs the ultraviolet light, and the carbon-carbon double bond of the styryl group 901 is opened, and polyvinyl cinnamate is formed as in 903. Dimerize.

  Dimerized polyvinyl cinnamate loses the orientation of the liquid crystal. Since the liquid crystal is aligned in the side chain direction of the polyvinyl cinnamate, as a result, the major axis of the liquid crystal is aligned in a direction orthogonal to the polarization direction of the irradiated ultraviolet light.

  In order to photo-align polyvinyl cinnamate, linearly polarized light is irradiated twice on the alignment film as shown in FIG. The first light irradiation is performed from the perpendicular direction to the alignment film to determine the alignment direction of the major axis of the liquid crystal.

  The second irradiation of linearly polarized light is performed obliquely with respect to the alignment film. The pretilt angle of the liquid crystal is determined by the second light irradiation. The major axis of the liquid crystal is aligned in the direction perpendicular to the irradiated linearly polarized light and perpendicular to the irradiated linearly polarized light.

  By irradiating the linearly polarized light in the ultraviolet region in two steps, the alignment axis 1001 of the liquid crystal and the pretilt angle are determined. The alignment direction of the liquid crystal is appropriately selected according to the display mode.

  Examples of ultraviolet light sources include mercury lamps, excimer lasers, and argon ion lasers.

  After photo-alignment, a sealing material is applied. Liquid crystal is injected by performing sealing material temporary firing, substrate bonding, hot pressing, and cutting. After the liquid crystal is injected, an ultraviolet curable material is applied to the injection port, and the liquid crystal injection port is sealed by irradiating with ultraviolet rays. An active matrix display device can be formed by attaching a flexible printed wiring board to a panel.

  A feature of this embodiment is that a step is provided by etching a region where the sealing material is provided in order to prevent the sealing material from bleeding in a liquid crystal display device having a narrow cell gap. Furthermore, in order to prevent rubbing streaks from appearing due to a step, a photo-alignment process is performed.

  As shown in FIG. 8, columnar spacers 423 are formed on the element substrate. However, since the height of the columnar spacers is as small as 1.0 μm, the light irradiation unevenness due to the shadows of the columnar spacers is not so large, and the alignment of the liquid crystal is liquid crystal Uniform in the display device.

  The rubbingless display mode includes not only a photo-alignment method but also an electric field slit control method and an MVA (Multi Vertical Align) mode in which liquid crystals are aligned with fine protrusions in a vertical alignment type liquid crystal display device. In the case of a substrate having a large step such as etching of the region where the sealing material is provided, these rubbing-less modes are also useful for preventing rubbing streaks.

[Embodiment 4]
In the rubbing process of the alignment film, rubbing streaks that drag the steps of the substrate may appear on the substrate. In the present embodiment, a configuration in which a step for narrowing the cell gap does not affect the rubbing process is disclosed.

  In this embodiment, both the counter substrate and the element substrate are provided with a step by etching the organic resin film so as to avoid the upstream direction of the rubbing so that the rubbing streaks due to the step do not cover the pixel region. .

  The configuration of this embodiment will be described with reference to FIG. In FIG. 9, a rubbing direction 502 between the counter substrate 501 and the alignment film, and a region 503 in which an organic resin film is etched to prevent the seal material from bleeding out in a region where the seal material is provided are illustrated. For simplicity, the pixel electrode, the black matrix, the color filter, and the like of the counter substrate are not shown. In order to prevent rubbing streaks due to steps from being applied to the pixel region, the organic resin film is etched away from the upstream side in the rubbing direction 502. In the present embodiment, the color filter 1.0 μm and the overcoat material 1.0 μm are removed in the region 503 to be etched, and there is a step of 2.0 μm.

  The element substrate 504 includes an FPC wiring lead line 505, a gate driver 506, and a source driver 507. A region 509 for etching the organic resin film is provided to avoid the upstream side of the alignment film rubbing direction 508 of the element substrate. In the element substrate, the organic resin film on the FPC wiring side is left to protect the FPC wiring. In this embodiment, 2.0 μm of the organic resin film is removed in the region 509 to be etched, and there is the same step as the counter substrate.

A sealing material 511 is formed on the counter substrate, and the counter substrate and the element substrate are assembled in a panel.
The sealing material 511 after the panel is assembled is in a region 512 having a step of 2.0 μm between the counter substrate and the element substrate. In the rubbing direction of this embodiment, a left-handed twisted TN type liquid crystal display device can be obtained. After the panel is assembled, the FPC 510 is attached to complete an active matrix display device.

  In the present embodiment, the counter substrate and the organic resin film of the element substrate are etched in order to prevent the seal material from bleeding due to the narrowing of the cell gap. Furthermore, the organic film is etched away from the upstream side in the rubbing direction in order to prevent rubbing streaks due to the steps after etching. As a result, a liquid crystal display device with good display quality that is difficult to cause rubbing streaks is formed.

[Embodiment 5]
In the fifth embodiment, a configuration of a liquid crystal display device provided with a step so as to avoid the upstream direction of rubbing to prevent rubbing streaks will be described. In this embodiment, an antiparallel rubbing process is performed on a pair of substrates. The display mode can be applied to a liquid crystal display device that requires antiparallel rubbing treatment, such as a vertical alignment liquid crystal display device, an antiferroelectric liquid crystal display device, and a ferroelectric liquid crystal display device.

  The present embodiment is characterized in that both the counter substrate and the element substrate are not provided with a step due to the etching of the organic resin film in the upstream direction of the rubbing so that the rubbing streaks due to the step do not cover the pixel region. To do.

  The configuration of this embodiment will be described with reference to FIG. In FIG. 10, there is a region 603 in which an organic resin film is etched to prevent the seepage of the sealing material in the rubbing direction 602 of the counter substrate 601 and the alignment film, and the region where the sealing material is provided. For simplicity, the pixel electrode, the black matrix, the color filter, and the like of the counter substrate are not shown. In order to prevent rubbing streaks due to steps from being applied to the pixel region, the organic resin film is etched away from the upstream side in the rubbing direction 602. In the present embodiment, the color filter 1.0 μm and the overcoat material 1.0 μm are removed in the region 603 to be etched, and there is a step of 2.0 μm.

  The element substrate 604 includes an FPC wiring lead line 605, a gate driver 606, and a source driver 607. A region 609 for etching the organic resin film is provided to avoid the upstream side of the rubbing direction 608 of the element substrate alignment film. In the element substrate, the organic resin film on the FPC wiring side is left to protect the FPC wiring. In the present embodiment, in the region 609 to be etched, the organic resin film is removed by 2.0 μm, and there is the same step as the counter substrate.

  A sealant 611 is applied on the counter substrate, and the counter substrate and the element substrate are assembled in a panel. The sealing material 611 after the panel assembly is in a region 612 having a 2.0 μm step between the counter substrate and the element substrate. In the present embodiment, a liquid crystal display device that has been subjected to a rubbing process in antiparallel can be obtained. After the panel is assembled, the FPC 610 is attached to complete the active matrix display device.

[Embodiment 6]
In this embodiment, a semiconductor device incorporating the active matrix liquid crystal display device of the present invention will be described with reference to FIGS.

  Examples of such a semiconductor device include a portable information terminal (electronic notebook, mobile computer, mobile phone, etc.), a video camera, a still camera, a personal computer, a television, and the like. Examples of these are shown in FIGS.

  FIG. 18A illustrates a mobile phone, which includes a main body 9001, an audio output portion 9002, an audio input portion 9003, a display device 9004, operation switches 9005, and an antenna 9006. The present invention can be applied to a display device 9004 including an audio output unit 9002, an audio input unit 9003, and an active matrix substrate.

  FIG. 18B illustrates a video camera which includes a main body 9101, a display device 9102, an audio input portion 9103, operation switches 9104, a battery 9105, and an image receiving portion 9106. The present invention can be applied to the audio input portion 9103, the display device 9102 including the active matrix substrate, and the image receiving portion 9106.

  FIG. 18C illustrates a mobile computer or a portable information terminal, which includes a main body 9201, a camera portion 9202, an image receiving portion 9203, operation switches 9204, and a display device 9205. The present invention can be applied to an image receiving portion 9203 and a display device 9205 including an active matrix substrate.

  FIG. 18D illustrates a head mounted display which includes a main body 9301, a display device 9302, and an arm portion 9303. The present invention can be applied to the display device 9302. Although not shown, it can also be used for other signal control circuits.

  FIG. 18E illustrates a television set including a main body 9401, speakers 9402, a display device 9403, a reception device 9404, an amplification device 9405, and the like. The liquid crystal display device shown in Embodiment 5 and the EL display device shown in Embodiment 6 or 7 can be applied to the display device 9403.

  FIG. 18F illustrates a portable book, which includes a main body 9501, display devices 9502 and 9503, a storage medium 9504, operation switches 9505, and an antenna 9506, and data stored on a minidisc (MD) or DVD, The data received by the antenna is displayed. The display devices 9502 and 9503 are direct-view display devices, and the present invention can be applied to them.

  FIG. 19A illustrates a personal computer which includes a main body 9601, an image input portion 9602, a display device 9603, and a keyboard 9604.

  FIG. 19B shows a player using a recording medium (hereinafter referred to as a recording medium) on which a program is recorded, and includes a main body 9701, a display device 9702, a speaker portion 9703, a recording medium 9704, and operation switches 9705. This apparatus uses a DVD (Digital Versatile Disc), CD, or the like as a recording medium, and can perform music appreciation, movie appreciation, games, and the Internet.

  FIG. 19C illustrates a digital camera which includes a main body 9801, a display device 9802, an eyepiece unit 9803, an operation switch 9804, and an image receiving unit (not illustrated).

  FIG. 20A illustrates a front type projector which includes a display device 3601 and a screen 3602. The present invention can be applied to display devices and other signal control circuits.

  FIG. 20B illustrates a rear projector, which includes a main body 3701, a projection device 3702, a mirror 3703, and a screen 3704. The present invention can be applied to display devices and other signal control circuits.

  Note that FIG. 20C is a diagram illustrating an example of the structure of the projection devices 3601 and 3702 in FIGS. 20A and 20B. The projection devices 3601 and 3702 include a light source optical system 3801, mirrors 3802 and 3804 to 3806, a dichroic mirror 3803, a prism 3807, a liquid crystal display device 3808, a phase difference plate 3809, and a projection optical system 3810. The projection optical system 3810 is composed of an optical system including a projection lens. Although the present embodiment shows a three-plate type example, it is not particularly limited, and for example, a single-plate type may be used. In addition, the practitioner may appropriately provide an optical system such as an optical lens, a film having a polarization function, a film for adjusting a phase difference, or an IR film in the optical path indicated by an arrow in FIG. Good.

  FIG. 20D illustrates an example of the structure of the light source optical system 3801 in FIG. In this embodiment, the light source optical system 3801 includes a reflector 3811, a light source 3812, lens arrays 3813 and 3814, a polarization conversion element 3815, and a condenser lens 3816. Note that the light source optical system illustrated in FIG. 20D is an example and is not particularly limited. For example, the practitioner may appropriately provide an optical system such as an optical lens, a film having a polarization function, a film for adjusting a phase difference, or an IR film in the light source optical system.

162 Columnar spacer 166 Alignment film 167 Liquid crystal 168 Sealing material 201 Glass substrate 202 Inorganic insulating film 203, 204 Third interlayer insulating film 205 after the etching process Photosensitive resin 206 Columnar spacer 207 provided in the pixel region Pixel region 208 Sealing material A region 209 provided with a sealant A columnar spacer 210 provided in a region where a sealing material is provided A region 211 where the third interlayer film is etched A step 301 caused by the third interlayer film A glass substrate 302 An inorganic insulating film 303 A third interlayer insulating film 304 after the etching step Photosensitive resin 305 Columnar spacer 306 provided in the pixel area 306 Pixel area 307 Area where the seal material is provided 308 Column spacer height difference 309 Area where the third interlayer film is etched 310 Columnar spacer provided in the area where the seal material is provided 311 For the third interlayer film Step 417 Color filter 418 Overcoat material 419 Transparent conductive film 420 Alignment film 421 Liquid crystal 422 Seal material 423 Columnar spacers 501 and 601 Counter substrate 502 and 602 Rubbing directions 503 and 603 Regions 504 and 604 in which the organic resin film is etched 505, 605 FPC wiring lead lines 506, 606 Gate drivers 507, 607 Source drivers 508, 608 Rubbing directions 509, 609 of the alignment film 510, 610 FPC to be etched
511, 611 Sealing material 512, 612 Etched region 701, 801 Glass substrate 702, 802 Black matrix 703, 803 of inorganic material Color filter 704, 804 Overcoat material 705, 805 Transparent conductive film 706, 806 Pixel region 707, 807 Seal Regions 708 and 808 where the material is provided Resist 809 Steps 1106 to 1108 Vertical alignment reflective liquid crystal display device 1200 Element substrate 1201 Step 1202 Rubbing direction 1203 Rubbing streak 1301 Sealing material 1302 Sealing material bleed 1303 Pixel region 1304 Bubble 1305 Color tone near the center 1306 Color tone 1307 away from the center

Claims (6)

A first substrate;
A first insulating layer on the first substrate;
A sealant and a plurality of spacers on the first insulating layer;
A photosensitive alignment film on the plurality of spacers;
A second insulating layer on the alignment film;
A second substrate on the second insulating layer,
The plurality of spacers are disposed in the first region,
The sealing material is disposed in a second region surrounding the first region;
The sealing material is disposed between the first insulating layer and the second substrate;
The second insulating layer is selectively removed in the second region;
A method of manufacturing a liquid crystal display device in which no filler or spacer is disposed in the second region,
The method for manufacturing a liquid crystal display device characterized by being performed by irradiating ultraviolet light to the alignment control, pre Sharing, ABS alignment film of the alignment layer. In claim 1 ,
The method for manufacturing a front orientation control of Sharing, ABS alignment film, the liquid crystal display device, characterized in that said ultraviolet from the vertical direction is performed by being irradiated with respect to the front Sharing, ABS alignment film. In claim 1 or claim 2 ,
The method for manufacturing a front orientation control of Sharing, ABS alignment film, the liquid crystal display device in which the ultraviolet obliquely to previous Sharing, ABS alignment film is characterized by being effected by being irradiated. A first substrate;
A first insulating layer on the first substrate;
A liquid crystal, a sealing material, and a plurality of spacers on the first insulating layer;
A photosensitive alignment film on the liquid crystal and the plurality of spacers;
A second insulating layer on the alignment film;
A second substrate on the second insulating layer,
The plurality of spacers are disposed in the first region,
The sealing material is disposed in a second region surrounding the first region;
The sealing material is disposed between the first insulating layer and the second substrate;
The second insulating layer is selectively removed in the second region;
A method of manufacturing a liquid crystal display device in which no filler or spacer is disposed in the second region,
The method for manufacturing a liquid crystal display device comprising said alignment control of the alignment film, it is done by by irradiating ultraviolet rays from an oblique direction with respect to the front Sharing, ABS alignment film determines the pretilt angle of the liquid crystal. A first substrate;
A first insulating layer on the first substrate;
A liquid crystal, a sealing material, and a plurality of spacers on the first insulating layer;
A photosensitive alignment film on the liquid crystal and the plurality of spacers;
A second insulating layer on the alignment film;
A second substrate on the second insulating layer,
The plurality of spacers are disposed in the first region,
The sealing material is disposed in a second region surrounding the first region;
The sealing material is disposed between the first insulating layer and the second substrate;
The second insulating layer is selectively removed in the second region;
A method of manufacturing a liquid crystal display device in which no filler or spacer is disposed in the second region,
The alignment control of the alignment film is as follows:
The orientation direction of the liquid crystal long axis of the liquid crystal were determined by irradiating the first ultraviolet in a direction perpendicular to the front Sharing, ABS alignment film,
Preparation of a liquid crystal display device characterized by being performed by determining the after irradiation of the first ultraviolet, prior Sharing, ABS pretilt angle of the liquid crystal by irradiating the second ultraviolet obliquely to alignment films Method. In any one of Claims 1 thru | or 5 ,
Before Sharing, ABS alignment film, a method for manufacturing a liquid crystal display device which is a material of the negative type.

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