JP2002153646A - Game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent game media from falling out of a game machine by stopping the dispensing of the game media if a front opening member is open. SOLUTION: The CPU of a main board checks to see whether or not a dispensing stopping state is established in which the dispensing of game balls from a ball dispensing device is stopped. If the dispensing stopping state is not established, it then checks to see whether or not a ball absence flag, a full flag or a door opening flag is turned on. If either of the flags is changed into an on state, a command transmission table about commands for designating the dispensing stopping state is set and the process of setting commands is called. During the process of setting commands, the command for designating the dispensing stopping state is output to a dispensing control board. Thus, when the front door of the game machine is open and the door opening flag is turned on, a dispensing control means stops the dispensing of the game balls from the ball dispensing device according to the command of the game control means.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a game machine such as a pachinko game machine or a slot machine in which a game is played according to a player's operation, and more particularly to a game machine having a front opening member that can be opened.

[0002]

2. Description of the Related Art As an example of a gaming machine, when a game medium such as a game ball is fired into a game area by a launching device, and a game medium wins a winning area such as a winning opening provided in the game area, a predetermined number of game media are played. Some prize balls are paid out to players. Further, a variable display unit whose display state can be changed is provided, and when a display result of the variable display unit becomes a predetermined specific display mode, a predetermined game value is provided to the player. There is.

[0003] The game value means that the state of the variable winning ball device provided in the game area of the gaming machine is in a state that is advantageous for a player who is likely to win a hit ball, or is in a state that is advantageous for the player. In other words, the right is to be generated, and the condition for paying out game media as prize balls is likely to be satisfied.

In a first-type pachinko gaming machine having a variable display section for displaying a special symbol, it is generally known that the display result of the variable display section for displaying a special symbol is a combination of predetermined specific display modes. , "Big hit". When a big hit occurs, for example, the big winning opening is opened a predetermined number of times, and the state shifts to a big hit game state in which a hit ball is easy to win. And
In each open period, when a predetermined number (for example, 10) of winning prizes is won, the winning prize opening is closed. The number of opening of the special winning opening is fixed to a predetermined number (for example, 16 rounds). An opening time (for example, 29.5 seconds) is determined for each opening, and if the opening time elapses even if the number of winnings does not reach a predetermined number, the winning opening is closed. Also,
If a predetermined condition (for example, winning in the V zone provided in the special winning opening) is not satisfied at the time of closing the special winning opening, the big hit gaming state ends.

[0005] Further, among the combinations of display modes other than the combination of "big hits", when a part of the display results of the plurality of variable display portions is not yet derived and displayed, it is already definite or temporary. A state in which the display mode of the variable display unit on which the various display results are derived and displayed satisfies the display condition that is a combination of the specific display modes is referred to as “reach”. If the display result of the identification information variably displayed on the variable display unit does not satisfy the condition of "big hit", the result is "missing" and the variable display state ends. A player plays a game while enjoying how to generate a big hit.

When a game ball wins a winning opening provided on the game board, a predetermined number of award balls are paid out. Since the progress of the game is controlled by the game control means mounted on the main board, the number of winning balls based on the winning is determined by the game control means,
It is transmitted to the payout control board on which the payout control means for controlling the payout device is mounted.

Generally, a ball storage tank for storing game balls is provided at an upper portion on the back surface of a game machine, and game balls are supplied from a game store to the ball storage tank of the game machine. Then, inside the gaming machine, the game ball flows down from the ball storage tank along the ball payout path, and prize balls are paid out through a payout device provided in the middle of the ball payout path, and the lower part of the game machine A game ball is paid out to a hitting ball supply tray (upper plate) provided in the game ball. When the game balls are excessively stored in the upper plate, the paid game balls are also stored in the lower plate provided below the upper plate.

[0008]

In the case where an obstacle such as a stoppage of a game ball occurs while a player is playing a game and the game is hindered, the player is disadvantaged. It is necessary for the clerk of the game store or the like to immediately open the front door of the game machine, remove the obstacle, and return to the game possible state. In addition, for example, when a reset switch is installed on the back surface of the gaming machine, the front door is opened when the clerk of the game store needs to operate the reset switch.

If the game balls are paid out when the front door is opened, there is a problem that the game balls are not paid out to the upper plate or the lower plate and may fall out of the gaming machine. is there. If the ball stop member hits the payout hole of the game ball when the front door is opened, the discharge of the game ball is stopped, so that there is no possibility of the game ball spilling, but the payout of the game ball is performed. If continued, a large load is applied to the ball stopping member, and the ball stopping member may be damaged.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problem, and when the front opening member is opened, the payout of the game medium is stopped, and the game medium is moved to the outside of the game machine. It is an object of the present invention to provide a gaming machine capable of preventing falling down.

[0011]

A gaming machine according to the present invention comprises:
A gaming machine in which a player can play a predetermined game, a front opening member openable to the front side of the gaming machine, a detecting unit capable of detecting opening of the front opening member, and a payout of game media. A payout device for performing, a payout control means for controlling the payout device, and a game control means capable of controlling the progress of the game and transmitting a control signal composed of command data for controlling the payout device to the payout control means. A predetermined signal is input to the game control means in response to the detection means detecting the opening of the front opening member, and the game control means pays out the game medium from the payout device in response to the input of the predetermined signal. A dispensing prohibition signal is transmitted to the dispensing control means as a control signal for prohibiting the dispensing control means from performing a dispensing prohibited state in which the dispensing device does not perform dispensing in response to receiving the dispensing prohibition signal. And it features.

[0012] The payout control means receives a payout number signal for designating the number of game media to be paid out as a control signal transmitted from the game control means in accordance with establishment of the payout condition, even if the payout is prohibited. May be configured.

[0013] The payout control means may be configured to update a counter capable of specifying the total number of unpaid game media based on the payout number signal received from the game control means.

The game control means transmits the payout prohibition signal,
It is preferable that the payout number signal is set prior to transmission of a payout number signal for designating the number of game media to be paid out according to establishment of the payout condition.

The game control means transmits the payout prohibition signal,
The number of game media to be paid out according to establishment of the payout condition may be configured to be executed prior to transmission of a specifiable payout number signal.

In particular, the game control means may be configured to store command data indicating the number of game media to be paid out in the transmission data storage area.

After the payout prohibition signal is transmitted by the game control means, when the payout of the game medium from the payout device becomes possible, a payout prohibition release signal is sent to the payout control means as a control signal for releasing the payout prohibition state. The payment control means may be configured to release the payment prohibition state after a lapse of a predetermined period after receiving the payment prohibition release signal.

[0018] Even if the payout control means has a reception data storage area capable of storing a plurality of command data from the game control means at the same time, and is configured to store the received command data in the reception data storage area. Good.

The payout control means is configured to determine whether or not the command data from the game control means is appropriate, and to not store the received command data in the received data storage area if it is determined that the command data is not appropriate. May be.

When the payout control means determines that the command data from the game control means is not appropriate, the payout control means may be configured not to update data such as a write pointer indicating reception of new command data. .

The storage device includes a storage portion capable of storing the game medium paid out from the payout device, and a detecting means capable of detecting that the storage state of the game medium in the storage portion has reached a predetermined state. The signal according to the opening and the signal according to the detection of the predetermined state may be configured to be input to the game control means as a common signal.

A storage operating member that operates according to the storage state of the game medium in the storage section, an opening / closing operation member that operates according to the opening and closing of the front opening member, and a storage operating member that operates according to the operation of the opening / closing operation member. A connection member, and the detection unit may be configured to output a predetermined signal when the operation of the storage operation member is detected.

The gaming machine has a launch mechanism for launching the game medium toward the game area, and a guide storage unit capable of guiding the game medium paid out by the payout device toward the launch mechanism. It may be configured to include a unit.

[0024]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. First, the overall configuration of a pachinko gaming machine, which is an example of a gaming machine, will be described. FIG. 1 is a front view of the pachinko gaming machine 1 as viewed from the front. Here, a pachinko gaming machine is shown as an example of the gaming machine, but the present invention is not limited to the pachinko gaming machine, and may be, for example, a slot machine.

As shown in FIG. 1, the pachinko gaming machine 1 comprises:
It has a glass door frame 2 formed in a frame shape. On the lower surface of the glass door frame 2, there is a hit ball supply tray (upper plate, guidance storage portion capable of guiding game balls toward the firing mechanism) 3. Below the upper plate 3, a surplus ball tray (lower plate) 4 for storing game balls overflowing from the upper plate 3 and a hit ball operation handle (operation knob) 5 for firing a hit ball are provided. Behind the glass door frame 2,
The game board 6 is detachably attached. A game area 7 is provided on the front of the game board 6.

In the vicinity of the center of the game area 7, a variable display section (special symbol display device) 9 for variably displaying a plurality of types of symbols and an ordinary symbol display (ordinary symbol display device) 10 using 7-segment LEDs are provided. A variable display device 8 is provided. In the variable display section 9, for example, "left", "middle",
There are three symbol display areas of "right". Variable display device 8
Is provided with a passage gate 11 for guiding a hit ball. The hit ball that has passed through the passing gate 11 is guided to the starting winning opening 14 via the ball exit 13. In the passage between the passage gate 11 and the ball exit 13, there is a gate switch 12 for detecting a hit ball passing through the passage gate 11. The winning ball that has entered the starting winning port 14 is guided to the back of the game board 6 and detected by the starting port switch 17. In addition, a variable winning ball device 15 that performs opening and closing operations is provided below the starting winning port 14. The variable winning ball device 15 is opened by the solenoid 16.

Below the variable winning ball device 15, there is provided an opening / closing plate 20 which is opened by a solenoid 21 in a specific game state (big hit state). In this embodiment, the opening and closing plate 20 serves as a means for opening and closing the special winning opening. A winning ball that has entered one (V zone) of the winning balls guided from the opening / closing plate 20 to the back of the game board 6 is detected by the V winning switch 22. The winning ball from the opening / closing plate 20 is detected by the count switch 23. At the bottom of the variable display device 8, the number of winning balls entering the starting winning opening 14 is displayed.
A start winning storage display 18 having a plurality of display units is provided. In this example, the start winning prize storage display 18 increases the number of lit display units by one each time there is a starting prize, with the upper limit being four. Then, each time the variable display of the variable display unit 9 is started, the number of the lit display units is reduced by one.

The gaming board 6 is provided with a plurality of winning ports 19 and 24, and the winning of the game balls to the respective winning ports 19 and 24 is determined by setting the corresponding winning port switches 19a and 19a.
19b, 24a and 24b. At the left and right sides of the game area 7, there are provided decorative lamps 25 which are displayed blinking during the game, and at the lower part there is an out port 26 for absorbing hit balls which have not won. In addition, two speakers 27 that emit sound effects are provided at upper left and right sides outside the game area 7. A gaming effect LED 2 is provided on the outer periphery of the gaming area 7.
8a and gaming effect lamps 28b and 28c are provided.

In this example, one of the speakers 27
Prize ball lamp 5 that lights up when there are remaining prize balls near
1 is provided, and near the other speaker 27, a ball-out lamp 52 is provided, which lights up when the supply ball is out. Further, FIG. 1 also shows a card unit 50 that is installed adjacent to the pachinko gaming machine 1 and that allows a ball to be lent by inserting a prepaid card.

The card unit 50 has a usable indicator lamp 151 for indicating whether or not the card is ready for use. If there is a fraction (less than 100 yen) in the balance information recorded in the card, the fraction is displayed. A fraction display switch 152 for displaying on a frequency display LED provided near the upper plate 3,
A link stand direction indicator 153 indicating which side of the card unit 50 corresponds to the pachinko gaming machine 1, a card insertion indicator 154 indicating that a card is inserted in the card unit 50, and a recording medium. And a card unit lock 156 for releasing the card unit 50 when checking the mechanism of a card reader / writer provided on the back surface of the card insertion slot 155. .

A hit ball fired from the hit ball launching device enters the game area 7 through the hitting ball rail, and thereafter, enters the game area 7.
Come down. When a hit ball is detected by the gate switch 12 through the passage gate 11, the number displayed on the symbol display 10 normally changes. When a hit ball enters the starting winning opening 14 and is detected by the starting opening switch 17,
If the change of the symbol can be started, the symbol in the variable display section 9 starts rotating. If it is not possible to start changing the symbol, the start winning memory is increased by one.

The rotation of the image in the variable display section 9 stops when a certain time has elapsed. If the combination of images at the time of stop is a combination of big hit symbols, the game shifts to a big hit game state. That is, the opening / closing plate 20 is opened until a predetermined time elapses or until a predetermined number (for example, 10) of hit balls is won. When the hit ball wins in the specific winning area while the opening and closing plate 20 is being opened and is detected by the V winning switch 22, a continuation right is generated and the opening and closing plate 20 is opened again. The continuation right is generated a predetermined number of times (for example, 15 rounds)
Permissible.

If the combination of images in the variable display section 9 at the time of stoppage is a combination of big hit symbols with probability fluctuation, the probability of the next big hit becomes high. That is, a high probability state, which is more advantageous for the player, is obtained. When the stop symbol on the ordinary symbol display 10 is a predetermined symbol (hit symbol = small hit symbol), the variable winning ball device 15 is opened for a predetermined time. Further, in the high probability state, the probability that the stop symbol on the ordinary symbol display 10 hits the symbol is increased, and the opening time and the number of times the variable winning ball device 15 is opened are increased.

Next, each board disposed on the back of the pachinko gaming machine 1 will be described. As shown in FIG. 2, a ball storage tank 38 is provided on a rear surface of the pachinko gaming machine 1 above a mechanism plate installed in the outer frame 2A, and the pachinko gaming machine 1 is installed on a gaming machine installation island. The game balls are supplied to the ball storage tank 38 from above. The game ball in the ball storage tank 38 passes through the guiding gutter 39 and the prize ball case 40
It leads to a ball dispensing device covered with A.

On the back side of the gaming machine, a variable display control unit 29 for controlling the variable display section 9 and a game control board (main board) 31 on which a game control microcomputer and the like are mounted are installed. A payout control board 37 on which a payout control microcomputer or the like for performing ball payout control is mounted;
And a hit ball launching device that launches a hit ball into the game area 7 using the rotational force of a motor. Furthermore, the decoration lamp 25, the game effect LED 28a, the game effect lamp 28
b, 28c, a lamp control board 35 for sending signals to the prize ball lamp 51 and the ball out lamp 52, a sound control board 70 for controlling the generation of sound from the speaker 27, and a launch control for controlling the hit ball launching device. A substrate 91 is also provided.

Further, DC30V, DC21V, DC1
A power supply board 910 on which a power supply circuit for generating 2V and 5V DC is mounted is provided, and a terminal board 1 provided with terminals for outputting various information to the outside of the gaming machine is provided above.
60 are installed. The terminal board 160 has at least an out-of-ball terminal for introducing and outputting the output of the out-of-ball detection switch, an award ball terminal for externally outputting the award ball number signal, and an externally outputting ball lending number signal. A ball lending terminal is provided. In the vicinity of the center, an information terminal board 34 having terminals for outputting various information from the main board 31 to the outside of the gaming machine is provided. In FIG. 2, signals from the lamp control board 35 and the sound control board 70 are supplied to the game effect LEDs 28a, the game effect lamps 28b and 28c, the prize ball lamp 51, and the ball out lamp 52 provided on the frame side. Although the electric relay board A77 for performing the above is shown, other relay boards are provided as necessary for signal relay.

FIG. 3 is a rear view of the mechanical plate of the pachinko gaming machine 1 as viewed from the rear. The game balls stored in the ball storage tank 38 pass through the guide gutter 39, pass through the ball cut detectors (ball cut switches) 187a and 187b, and pass through the ball supply gutters 186a and 186b as shown in FIG. Dispensing device 97
Leads to. The ball-out switches 187a and 187b are switches for detecting the presence or absence of a game ball in the game-ball passage, and a ball-out detection switch 167 for detecting a shortage of replenishment balls in the ball tank 38 is also provided. Hereafter, ball out switch 18
7a and 187b may be expressed as a ball cutout switch 187.

The game balls paid out from the ball payout device 97 are supplied to the upper plate 3 provided on the front surface of the pachinko gaming machine 1 through the communication port 45. A surplus ball passage 46 communicating with the lower plate 4 provided on the front of the pachinko gaming machine 1 is formed on a side of the communication port 45.

When a large number of prize balls are paid out based on the winning and the upper plate 3 becomes full, and finally, after the game balls reach the communication port 45, further game balls are paid out, the game balls pass through the surplus ball passage 46. After that, it is led to the lower plate 4. When the game balls are further paid out, the sensing lever 47 presses the full tank switch 48 and the full tank switch 48 is turned on. In this state, the rotation of the stepping motor in the ball discharging device 97 stops, the operation of the ball discharging device 97 stops, and the driving of the hitting ball firing device also stops.

Next, the structure of the intermediate base unit installed on the mechanism plate 36 will be described. The intermediate base unit includes the ball supply gutters 186a and 186b and the ball discharging device 9
7 is installed. As shown in FIG. 4, connecting concave protrusions 182 are formed on the upper and lower sides of the intermediate base unit. The connection concave projection 182 connects and fixes the intermediate base unit and the upper base unit and the lower base unit of the mechanism plate 36.

A passage member 18 is provided above the intermediate base unit.
4 is fixed. The ball dispensing device 97 is fixed to a lower portion of the passage body 184. The passage body 184 is a payout ball passage 186 that allows two rows of game balls whose flow direction has been changed left and right by the curve gutter 174 (see FIG. 3) to flow down.
a, 186b. Dispensing ball passages 186a, 186b
On the upstream side of the ball, ball breaking switches 187a and 187b are provided. The ball out switches 187a and 187b
It detects the presence or absence of a game ball in the payout ball passages 186a and 186b, and detects a ball out switch 187a or 187b.
Stops detecting the game ball, the rotation of the payout motor (not shown in FIG. 4) in the ball payout device 97 is stopped, and the ball payout is immobilized.

Note that the ball out switches 187a, 187b
Is locked by a locking piece 188 at a position where it can be detected that about 27 to 28 game balls exist in the payout ball paths 186a and 186b. That is, the out-of-ball switches 187a and 187b are the maximum payout amount of one unit of the prize ball (15 in this embodiment) and the maximum payout amount of one unit of the ball lending (100 yen: 25 in this embodiment).
It is installed in a position where it can be confirmed that the above is secured.

The central portion of the passage body 184 is formed in a shape curved right and left so as to reduce the ball pressure of the game ball flowing down inside. And the payout ball passages 186a, 186b
A stop hole 189 is formed therebetween. The mounting boss provided on the intermediate base unit is fitted into the back surface of the stop hole 189. The set screw is screwed in that state,
The passage body 184 is fixed to the intermediate base unit. Before being screwed, the positioning of the passage body 184 can be performed by a locking projection 185 provided on the intermediate base unit.

A ball dispensing device 97 is provided below the passage body 184.
To supply the game balls to the ball, and in the event of failure, the ball payout device 9
A ball stopping device 190 for stopping the supply of game balls to the game ball 7 is provided. The ball dispensing device 97 installed below the ball stopping device 190 is housed inside a rectangular parallelepiped case 198. Protrusions are provided at four places on the left and right of the case 198. The lower end of the case 198 is fitted into an elastic engagement piece provided at a lower portion of the intermediate base unit with each projection being related to a positioning projection provided on the intermediate base unit.

FIG. 5 is an exploded perspective view of the ball payout device 97. The configuration and operation of the ball payout device 97 will be described with reference to FIG. Ball payout device 97 in this embodiment
, Pays out game balls one by one by rotating a screw 288 by a stepping motor (payout motor) 289. The ball payout device 97 pays out not only premium balls based on winnings but also game balls to be lent.

As shown in FIG. 5, the ball payout device 97
There are two cases 198a and 198b. The ball dispensing device 9 is provided at two places on the left and right of each case 198a, 198b.
7 is provided with an engagement projection 280 that is in contact with a positioning projection provided at the upper part of the installation position. In each case 198a, 198b, a ball supply path 281a,
81b are formed. Ball supply path 281a, 281b
Has curved surfaces 282a and 282b, and has curved surfaces 282a and 282b.
Below the end of 282b, there is a ball feed horizontal path 284a, 2
84b are formed. In addition, ball feed horizontal path 284
Ball discharge passages 283a and 283b are formed at the ends of a and 284b.

The ball supply paths 281a and 281b, the ball feed horizontal paths 284a and 284b, and the ball discharge paths 283a and 283b.
Are formed in front of partition walls 295a and 295b that partition the cases 198a and 198b forward and backward, respectively.
Further, in front of the partition walls 295a and 295b, the ball pressure buffering member 285 is sandwiched between the cases 198a and 198b. The ball pressure buffering member 285 distributes the game balls supplied to the ball payout device 97 to the left and right sides, and
a, 281b.

Further, below the ball pressure buffering member 285, a payout motor position sensor including a light emitting element (LED) 286 and a light receiving element (not shown) is provided. Light emitting element 2
86 and the light receiving element are provided at a predetermined interval. The distal end of the screw 288 is inserted into the space. The ball pressure buffer member 28
When the cases 198a and 198b are attached to each other, the case 5 is completely stored and fixed therein.

The ball feed horizontal paths 284a and 284b have a screw 28 rotated by a payout motor 289.
8 are arranged. The payout motor 289 is fixed to the motor fixing plate 290, and the motor fixing plate 290 is
Fixing grooves 291a, 2 formed behind 5a, 295b
Fits into 91b. In this state, the motor shaft of the dispensing motor 289 projects forward of the partition walls 295a, 295b, so that the screw 288 is fixed forward of the projection. On the outer periphery of the screw 288, a spiral protrusion 288a for moving the game ball placed on the ball feed horizontal path 284a, 284b forward by the rotation of the payout motor 289.
Is provided.

A recess is formed at the tip of the screw 288 so as to house the light emitting element 286, and two notches 292 are formed 180 degrees apart from each other on the outer periphery of the recess. Therefore, while the screw 288 makes one rotation, the light from the light emitting element 286 is
Is detected twice by the light receiving element via the.

That is, the dispensing motor position sensor including the light emitting element 286 and the light receiving element is for stopping the screw 288 at the fixed position and detecting that the dispensing operation has been performed. The wires from the light emitting element 286, the light receiving element, and the payout motor 289 are collectively pulled out to the outside through drawout holes formed below the rear portions of the cases 198a, 198b, and connected to the connector.

The game balls are moved horizontally by ball 284a, 284b.
When the payout motor 289 rotates in a state where the screw 288 is placed on the
The game ball moves forward on the ball feeding horizontal paths 284a and 284b. And finally, ball feed horizontal path 28
4a, 284b from the end of the ball discharge path 283a, 283b
To fall. At this time, the left and right ball feed horizontal paths 284a,
The drop from 284b is performed alternately. That is, every time the screw 288 makes a half turn, one game ball falls from one side. Therefore, every time one game ball falls, light from the light emitting element 286 is detected by the light receiving element.

As shown in FIG. 4, below the ball payout device 97, a ball sorting member (switching member) 311 is provided. The ball distribution member 311 is driven by the distribution solenoid 310. For example, when the solenoid 310 is on, the ball sorting member 311 falls to the right, and when it is off, it falls to the left. Below the distribution solenoid 310, a prize ball count switch 301A and a ball lending count switch 301B are provided by proximity switches. At the time of a prize ball based on winning, the ball distribution member 311 falls to the right, and the game balls from the ball discharge paths 283a and 283b both pass through the prize ball count switch 301A. Also, when lending the ball, the ball sorting member 311 falls to the left side, and the ball discharge path 283
The game balls from a and 283b both pass through the ball lending count switch 301B. Therefore, the ball dispensing device 97
A predetermined number of game media can be paid out by switching the payout flow path between a prize ball and a ball lending time.

As described above, by providing the ball distribution member 311, the game balls that have fallen down the two ball passages are only one of the prize ball count switch 301 A and the ball lending count switch 301 B. Do not pass. Therefore, the number of prize balls or the number of ball lending can be immediately grasped from the detection output of the prize ball count switch 301A and the ball lending count switch 301B without determining whether the ball is a prize ball or a ball lending.

In this embodiment, a ball payout device 97 that pays out game balls by rotation of a stepping motor is used as a ball payout device that pays out game balls by driving an electric drive source. A ball dispensing device having a structure in which a game ball is sent out by a driving source may be used, or a ball dispensing device having a structure in which a stopper is removed by driving an electric drive source such as a solenoid and the game ball is paid out by its own weight may be used. Is also good. In this embodiment, the ball payout device 97 pays out both a prize ball based on a prize ball and a loaned ball based on a loan request, but a payout device may be provided for each.

FIG. 6 is a perspective view showing an example of the pachinko gaming machine 1 in a state in which the frame base 210 and the front door 200 as a front opening / closing member are opened with respect to the outer frame 2A. The frame base 210 is pivotally supported on one side of the outer frame 2A so as to be openable and closable, and almost all of the main components of the pachinko gaming machine 1 are collectively provided on the frame base 200. The main components provided on the frame base 3 include a game board 6, a lower plate 4, a hitting operation handle 5, a mechanism plate 36, and the like. However, in FIG. 6, the game board 6 and the mechanism plate 36 are omitted. Further, in this embodiment, front door 200 includes glass door frame 2 and upper plate portion 220.

The outer frame 2A is provided with a locking piece 320 for locking the hook 321 provided on the frame base 210. The operation lever 32 is provided on the frame base 210.
4, the front door 200 can be unlocked by pressing down the operation lever 324 with the frame base 210 opened.

An out ball communication port 332 communicating with the out port 26 of the game board 6 in the frame base 210 is provided. The frame base 210 has an outlet 3 communicating with the lower plate 4.
31 are provided. The discharge port 331 is provided with a game ball from a surplus ball passage through which a game ball overflowing from the upper plate 3 flows out, a game ball from a foul ball opening provided on a hitting rail of the game board 6, and a ball from the upper plate 3. Take in the game balls that have flowed in from the ball extraction entrance that receives the game balls that have been pulled out,
It is for guiding to the lower plate 4.

When the ball release lever provided in the vicinity of the upper plate 3 is operated, the game balls flow down the ball release path formed inside the upper plate main body, and the game balls descend from the discharge port 331. Guided to dish 4. In addition, the ball removing lever and the like are covered with a cover 340 for removing the ball.

In this embodiment, a detecting means for detecting the opening of the front door 200 as a front opening / closing member is provided at a portion (portion A in FIG. 6) of the frame base 210 in contact with the ball removing cover 340. Door switch 96 is provided. When the front door 200 is opened, the door switch 96 outputs a signal to that effect to the main board 31.

FIG. 7 is an explanatory diagram for explaining a configuration example of the door switch 96 and its operation. In the example shown in FIG. 7, the head 209 of the door switch 96 compresses the spring 211 connected to the rod 213. The rod portion 213 is guided by a guide member 221 provided on the frame base 210 and is movable in the left-right direction in FIG. Frame base 210
On the side, a shaft 222 is provided at the tip of the rod portion 213, and an arm 223 is attached via the shaft 222. Further, a shaft 224 is provided at the other end of the arm 223, and the arm 225 is attached via the shaft 224. The other end of the arm 225 is attached to the crank 214 by a fixing part 226. The crank 214
The guide 227 can move in the vertical direction in FIG. Guide 2 so that crank 214 moves smoothly
A gap is provided between 27 and the crank 214. An arm 228 is attached to the lower part of the crank 214, and a pressing portion 215 is attached to the other end of the arm 228 via a shaft 229. Pressing part 215
Pushes one contact 217 of the switch to the other contact 2
18 is contacted. The pressing portion 215 receives a force in a direction opposite to a direction in which the contact 217 is pressed by the spring 212.

In the state where the front door 200 is closed and the upper plate portion 220 is in contact with the frame base 210, the head 209 of the door switch 96 compresses the spring 211 and compresses the rod portion 213 as shown in FIG. Are in the state of moving rightward in FIG. In that state, the crank 214
225 is pushed up. as a result,
The force (the force in the direction of pressing the contact 217) applied to the pressing portion 215 connected to the tip of the crank 214 via the arm 228 is weak. Therefore, the pressing portion 215 is in a state where the contact 217 is not pressed by the spring 212. In this state, one contact 217 and the other contact 218 are separated. In a state where both contacts 217 and 218 are separated,
For example, the power supply voltage level (+5 V level) is
Is output to

In a state where the front door 200 is opened and the upper plate portion 220 is not in contact with the frame base 210, the spring 211 is extended as shown in FIG. 7B, and the rod portion 213 is moved leftward in FIG. It has been moved to. In that state, crank 2
14 is pushed down by the arms 223 and 225. As a result, the arm 2
The force (the force in the direction of pressing the contact 217) applied to the pressing portion 215 connected via 28 increases. Therefore, the pressing portion 215 is in a state of pressing the contact 217. In this state, one contact 217 and the other contact 218 are in contact. In a state where both contacts 217 and 218 are in contact, for example, a ground level (0 V level) is output to main board 31. The game control means mounted on the main board 31 determines whether or not the voltage level output from the door switch 96 is the power supply level or the ground level.
You can check if is closed.

In the structure shown in FIGS. 7A and 7B, the clamp 2 is moved in accordance with the movement of the rod portion 213 in the left-right direction.
The shaft 222, the arm 223, the shaft 224, and the arm 225 are used as members for moving the 14 in the vertical direction.
Other structures may be used. For example, as shown in FIG. 7C, a disk 230 rotatable around a central axis 231 is provided, and a rod portion 21 is provided in a hole 232 provided in the disk 230.
3 may be fixed. A plurality of holes 23 in the disc 230
By providing 2, the force applied to the pressing portion 215 can be adjusted by changing the mounting position of the rod portion 213 on the disk 230. Therefore, the force applied to the pressing portion 215 can be easily adjusted according to the difference in the structure of the gaming machine (the difference in the attachment position of the door switch 96 or the contact 218).

A full switch 48 for detecting whether the lower plate 4 is full has a structure in which a sensing lever 47 as a pressing portion presses a contact as shown in FIG. Movement of the crank 2
In this case, one contact can be used for both the full tank detection and the opening detection of the front opening member. That is, the crank 214 as a moving member in the detecting means for detecting the opening of the front opening member is moved in accordance with the movement of the member constituting the full tank switch as the detecting means for detecting the predetermined storage state of the game ball. This makes it possible to turn on and off the switch section of the detecting means for detecting the opening of the front opening member. As a result, the game control means can perform the full tank detection and the opening detection of the front opening member by one detection signal. It should be noted that the switch is not limited to the full tank switch, but may be another switch (for example, a ball-out switch 18) for detecting the storage state of the game ball.
The game ball detection according to 7) and the opening detection of the front opening member can be performed at once.

Further, the mechanism shown in FIG. 7 may be installed near the lower plate 4 so that the pressing portion 215 is a component of the full tank switch. That is, when the lower plate 4 is full of game balls, the pressing portion 215 may be pressed to make the contacts 217 and 218 contact. In that case, the front door 2
The rod portion 214 as an opening / closing operation member that operates according to opening and closing of 00 pushes the pressing portion 215 as a storage operation member that operates according to the storage state of the game ball via a crank 214 or the like as a connecting member. Can be. Therefore, when the lower plate 4 is full or the front door 200 is opened, the pressing portion 2
When 15 is pressed, a detection signal is output to the game control means of the main board 31. Therefore, with one mechanism, the front door 20
It is possible to detect the opening of 0 and the fullness of the lower plate 4, and a signal indicating the detection of the opening of the front opening member and a signal indicating the storage state of the game ball can be a common signal.

As described above, according to the configuration in which the detection of the game ball by the switch for detecting the storage state of the game ball and the detection of the opening of the opening member can be performed at the same time, the opening of the front opening member on the main board 31 is performed. When an input unit (for example, a connector) for inputting a detection signal indicating the opening is not provided, a detection signal indicating opening of the front opening member can be input without adding an input unit.

FIG. 8 is a block diagram showing an example of the circuit configuration of the main board 31. FIG. 8 also shows a payout control board 37, a lamp control board 35, a sound control board 70, a firing control board 91, and a symbol control board 80.
The pachinko machine 1 is provided on the main board 31 according to the program.
, A gate switch 12, a starting port switch 17, a V winning switch 22, a count switch 23, and winning port switches 19a, 19b, 24a, 24.
b, a switch circuit 58 for giving signals from the full tank switch 48, the ball out switch 187, the prize ball count switch 301A and the door switch 96 to the basic circuit 53, the solenoid 16 for opening and closing the variable prize ball device 15, and the opening and closing plate 2.
A solenoid 21 for opening and closing the solenoid valve 0 and a solenoid circuit 59 for driving a solenoid 21A for switching a path in the special winning opening in accordance with a command from the basic circuit 53 are mounted.

Although not shown in FIG. 8, the count switch short-circuit signal is also transmitted to the basic circuit 53 via the switch circuit 58.

In accordance with the data supplied from the basic circuit 53, jackpot information indicating occurrence of a jackpot, effective start information indicating the number of start winning balls used to start image display on the variable display section 9, and probability fluctuations have occurred. An information output circuit 64 for outputting an information output signal such as probability change information indicating the fact to an external device such as a hall computer is mounted.

The basic circuit 53 includes a ROM 54 for storing a game control program and the like, a RAM 55 as an example of storage means used as a work memory, a CPU 56 for performing control operations according to the program, and an I / O port unit 5.
7 inclusive. In this embodiment, the ROM 54 and the RAM 5
5 is built in the CPU 56. That is, the CPU 5
Reference numeral 6 denotes a one-chip microcomputer. In addition, 1
The chip microcomputer has at least the RAM 55
And the ROM 54 and the I / O port unit 57 may be external or internal.

Further, the main board 31 is provided with a system reset circuit 65 for resetting the basic circuit 53 when the power is turned on.

A hit ball firing device that hits and fires a game ball is driven by a drive motor 94 controlled by a circuit on a firing control board 91. Then, the driving force of the driving motor 94 is adjusted according to the operation amount of the operation knob 5. That is, the circuit on the firing control board 91 is controlled so that the hit ball is fired at a speed corresponding to the operation amount of the operation knob 5.

In this embodiment, the lamp control means mounted on the lamp control board 35 is used to display the start storage display 18, the gate passage storage display 41 and the decoration lamp 25 provided on the game board. Controls the game and the game effect lamp / LED 28 provided on the frame side.
a, 28b, and 28c, display control of the award ball lamp 51, and the ball out lamp 52 are performed. The display control of the variable display unit 9 for variably displaying special symbols and the ordinary symbol display 10 for variably displaying ordinary symbols is performed by display control means mounted on the symbol control board 80.

FIG. 9 is a block diagram showing components related to payout, such as components of the payout control board 37 and the ball payout device 97. As shown in FIG. 9, the detection signal from the full tank switch 48 is transmitted to the main board 3 via the relay board 71.
1 is input to the I / O port 57. Full tank switch 4
Reference numeral 8 denotes a switch for detecting whether the surplus ball tray 4 is full. In addition, the ball out switch 187 (187a, 187)
The detection signal from b) is also used for the relay board 72 and the relay board 7.
1 is input to the I / O port 57 of the main board 31.

The CPU 56 of the main board 31 checks whether the detection signal from the ball out switch 187 indicates that the ball is out.
Alternatively, when the detection signal from the full tank switch 48 indicates the full tank state, a payout control command (payout stop state designation command) for instructing payout prohibition is output. Upon receiving the payout stop state designation command, the payout control CPU 371 of the payout control board 37 stops the ball payout process.

Also, when the signal from the door switch 96 indicates that the front door 200 is open, the CPU 5 of the main board 31
6 outputs a payout control command for instructing payout prohibition. The signal from the door switch 96 is transmitted to the front door 20.
In the case of indicating the closing of 0, when the detection signal from the out-of-ball switch 187 does not indicate the out-of-ball state and the detection signal from the full tank switch 48 does not indicate the full tank state, the payout is restarted. The payout control command (payable state designation command) is output. When receiving the payout possible state designation command, the payout control board 37
The PU 371 restarts the ball payout process.

Further, the detection signal from the prize ball count switch 301A is input to the I / O port 57 of the main board 31 via the relay board 72 and the relay board 71, and the payout control board via the relay board 72. 37 is input to the input port 372b. Prize ball count switch 301
A is provided in the payout mechanism portion of the ball payout device 97 and detects the actually won prize ball payout balls.

When there is a prize, the payout control board 37 has output ports (ports 0, 1) 570, 571 of the main board 31.
, A payout control command indicating the number of winning balls is input. Output port (output port 1) 571 outputs 8-bit data, and output port 570 outputs a strobe signal (INT signal) as a 1-bit fetch signal. The payout control command indicating the number of winning balls is input to the input buffer circuit 373A.
Through the I / O port 372a. The INT signal is supplied to the payout control C via the input buffer circuit 373B.
It is input to the interrupt terminal of PU 371. Dispensing control C
The PU 371 inputs a payout control command via the I / O port 372a, and drives the ball payout device 97 in accordance with the payout control command to perform award ball payout. In this embodiment, the payout control CPU 371 is a one-chip microcomputer and has at least a RAM.

In the main board 31, the output port 5
Buffer circuits 620 and 68A are provided outside 70 and 571. As the buffer circuits 620 and 68A, for example, 74HC250 and 7HC which are general-purpose CMOS-ICs
4HC14 is used. According to such a configuration, since a signal inputted from the outside to the inside of the main board 31 is blocked, a signal line to which a signal may be given from the payout control board 37 to the main board 31 is further reliably eliminated. be able to. Note that a noise filter may be provided on the output side of the buffer circuits 620 and 68A.

The payout control CPU 371 is connected to the output port 3
A ball lending number signal indicating the number of lending balls is output to the terminal board 160 via 72c. Further, the output port 37
An error signal is output to the error display LED 374 via 2d.

Further, the input port 3 of the payout control board 37
The detection signal from the ball lending count switch 301B is input to 72b via the relay board 72. The ball lending count switch 301B is provided in the payout mechanism portion of the ball payout device 97, and detects the actually paid lending balls.
The drive signal from the payout control board 37 to the payout motor 289 is supplied to the payout motor 28 in the payout mechanism of the ball payout device 97 via the output port 372c and the relay board 72.
9 and the drive signal to the distribution solenoid 310 is
The distribution solenoid 310 in the dispensing mechanism of the ball dispensing device 97 via the output port 372e and the relay board 72.
Conveyed to.

The card unit 50 is equipped with a microcomputer for controlling the card unit. Also,
The card unit 50 is provided with a fraction display switch 152, a connection board direction indicator 153, a card insertion indicator lamp 154, and a card insertion slot 155 (see FIG. 1). A frequency display LED, a ball lending switch, and a return switch provided near the upper plate 3 are connected to the balance display board 74.

The balance display board 74 is used to move the card unit 50
In response to the operation of the player, a ball lending switch signal and a return switch signal are given via the payout control board 37. In addition, the balance display board 74 from the card unit 50
, A card balance display signal indicating the balance of the prepaid card and a ball lending possible display signal are given via the payout control board 37. Between the card unit 50 and the payout control board 37, a connection signal (VL signal) and a unit operation signal (B
RDY signal), ball lending request signal (BRQ signal), ball lending completion signal (EXS signal) and pachinko machine operation signal (P
RDY signal) is input port 372b and output port 3
It is exchanged via 72e.

When the power of the pachinko gaming machine 1 is turned on,
The payout control CPU 371 of the payout control board 37 outputs a PRDY signal to the card unit 50. The card unit control microcomputer outputs a VL signal. The payout control CPU 371 determines the connection state / non-connection state based on the input state of the VL signal. When the card is accepted in the card unit 50 and the ball lending switch is operated to input a ball lending switch signal, the microcomputer for controlling the card unit outputs a BRDY signal to the payout control board 37. When a predetermined delay time has elapsed from this point, the microcomputer for controlling the card unit outputs a BRQ signal to the payout control board 37.

The payout control C of the payout control board 37
When the PU 371 raises the EXS signal to the card unit 50 and detects the fall of the BRQ signal from the card unit 50, it drives the payout motor 289 and pays out a predetermined number of loaned balls to the player. At this time, the distribution solenoid 310 is in a driving state. That is, the ball distribution member 311 is directed to the ball lending side. When the payout is completed, the payout control CPU 371 sets the card unit 5
The EXS signal for 0 falls. Thereafter, if the BRDY signal from the card unit 50 is not in the ON state,
The winning ball payout control is executed.

As described above, all signals from the card unit 50 are input to the payout control board 37. Therefore, regarding the ball lending control, the card unit 5
No signal is input from 0 to the main board 31, and there is no room for a signal to be incorrectly input from the card unit 50 side to the basic circuit 53 of the main board 31. The power supply voltage AC24V used in the card unit 50 is supplied from the payout control board 37.

Further, in this embodiment, the case where the card unit 50 is installed separately from the gaming machine and adjacent to the gaming machine is taken as an example, but the card unit 50 is integrated with the gaming machine. You may. Also, the present invention can be applied to a case where a game ball is lent according to the amount of money when a coin is inserted. That is, the present invention can be applied to a case where the gaming machine only pays out prize balls as payout of game balls.

FIG. 10 is a block diagram showing a configuration example of the power supply board 910. The power supply board 910 includes a main board 31,
Symbol control board 80, sound control board 70, lamp control board 3
5 and is installed independently of the electric component control boards such as the payout control board 37, and generates a voltage used by each electric component control board and mechanical components in the gaming machine. In this example, AC2
4V, VSL (DC + 30V), DC + 21V, DC + 1
Generate 2V and + 5V DC. Further, the capacitor 916 serving as a backup power supply is charged from DC + 5V, that is, a power supply line for driving an IC or the like on each substrate. Note that VSL is generated in the rectifier circuit 912 by rectifying and boosting 24 V AC by a rectifier.
VSL is a solenoid drive power supply.

The transformer 911 converts an AC voltage from an AC power supply to 24V. AC 24V voltage is applied to connector 9
15 is output. Further, the rectifier circuit 912 includes an AC24
A DC voltage of +30 V is generated from V and output to the DC-DC converter 913 and the connector 915. DC-D
C converter 913 includes one or more converters I
C922 (only one is shown in FIG. 10) and VSL
Then, + 21V, + 12V, and + 5V are generated based on the above and output to the connector 915. A relatively large-capacity capacitor 923 is connected to the input side of the converter IC 922. Therefore, when the power supply to the gaming machine from the outside is stopped, the DC voltage such as +30 V, +12 V, +5 V, etc., decreases relatively slowly. As a result, the capacitor 923 plays a role of an auxiliary driving power supply described later.
The connector 915 is connected to, for example, a relay board, and power of a voltage required for each electric component control board and a mechanical component is supplied from the relay board.

However, the power supply board 910 may be provided with each connector leading to each electric component control board, and the power supply board 910 may supply each voltage reaching each board without passing through the relay board. FIG. 10 shows one connector 915 as a representative, but the connectors are provided corresponding to the respective electric component control boards.

+5 V from DC-DC converter 913
The line branches to form a backup + 5V line. A large-capacity capacitor 916 is connected between the backup + 5V line and the ground level. The capacitor 916 is in a storage state with respect to a backup RAM (RAM backed up by a power supply, that is, a backup storage unit that can be in a storage content state even when power supply is stopped) of the electric component control board when power supply to the gaming machine is cut off. Backup power supply that supplies power so that the power can be maintained. Further, a diode 917 for preventing backflow is inserted between the + 5V line and the backup + 5V line. In this embodiment, +5 V for backup is applied to the main board 31 and the payout control board 37.
Supplied to

Note that a battery that can be charged from a +5 V power supply may be used as a backup power supply. In the case of using a battery, a rechargeable battery is used which runs out of capacity when power is not supplied from a + 5V power supply for a predetermined time.

The power supply board 910 has a power supply monitoring I
C902 is mounted. The power supply monitoring IC 902
The VSL voltage is introduced, and the occurrence of the power supply stop is detected by monitoring the VSL voltage. Specifically, when the VSL voltage becomes equal to or lower than a predetermined value (+22 V in this example), the power supply interruption signal is output assuming that the power supply is stopped. The power supply voltage to be monitored is preferably higher than the power supply voltage (+5 V in this example) of the circuit element mounted on each electric component control board. In this example, VSL, which is a voltage immediately after conversion from AC to DC, is used. The power supply cutoff signal from the power supply monitoring IC 902 is supplied to the main board 31, the payout control board 37, and the like.

The predetermined value for the power supply monitoring IC 902 to detect the stop of the power supply is lower than the normal voltage, but is a voltage at which the CPU on each electric component control board can operate for a while. Further, a voltage (+5 V in this example) for driving the circuit elements such as the CPU by the power supply monitoring IC 902.
It is configured to monitor a voltage that is higher than that after the conversion from AC to DC, so that the monitoring range for the voltage required by the CPU can be extended. Therefore, more precise monitoring can be performed. Furthermore, when VSL (+30 V) is used as the monitoring voltage, since the voltage supplied to the various switches of the gaming machine is +12 V, prevention of erroneous switch-on detection upon momentary power interruption can be expected. That is, when monitoring the voltage of the + 30V power supply,
It is possible to detect a drop in the stage before + 12V generated after the generation of + 30V starts to fall.

Therefore, when the voltage of the +12 V power supply drops, the switch output comes to an on state,
If the power supply stop is recognized by monitoring the +30 V power supply voltage that drops earlier than V, it is possible to enter a state of waiting for power supply restart before the switch output turns on, and to detect the switch output.

Further, since the power supply monitoring IC 902 is mounted on the power supply board 910 separate from the electric component control board, the power supply monitoring circuit can supply a power-off signal to the plurality of electric component control boards. No matter how many electrical component control boards need a power-off signal, it is sufficient that only one power supply monitoring means is provided. Therefore, even if each electrical component control means in each electrical component control board performs return control described later, However, the cost of gaming machines does not increase much.

In the configuration shown in FIG. 10, the detection output (power cutoff signal) of the power supply monitoring IC 902 is supplied to the respective electric component control boards (for example, the main board 31 and the payout control signal) via buffer circuits 918 and 919. Although transmitted to the board 37), for example, a configuration in which one detection output is transmitted to the relay board, and the same signal is distributed from the relay board to each electric component control board may be employed. Further, a buffer circuit may be provided according to the number of substrates that require a power-off signal.

FIG. 11 shows the CPU 56 on the main board 31.
It is a block diagram which shows the example of a surrounding structure. As shown in FIG. 11, a power-off signal from a power supply monitoring circuit (power supply monitoring means) of the power supply board 910 is connected to a non-maskable interrupt terminal (XNMI terminal) of the CPU 56. The power supply monitoring circuit is a circuit that monitors a voltage of any one of various DC power supplies used by the gaming machine and detects a power supply voltage drop. In this embodiment, the power supply voltage of VSL is monitored, and when the voltage value becomes equal to or lower than a predetermined value, a low-level power-off signal is generated. VSL is the largest DC voltage among gaming machines, and is +30 V in this example. Therefore, C
The PU 56 can confirm the occurrence of the power supply stop by the interrupt processing.

FIG. 11 also shows a system reset circuit 65. When the power is turned on, the reset IC 651
The output is set to the low level for a predetermined time determined by the capacity of the external capacitor, and the output is set to the high level after the predetermined time has elapsed. That is, the reset signal is raised to a high level to make the CPU 56 operable. The reset IC 651 monitors the power supply voltage VSL, which is the same power supply voltage as the power supply voltage monitored by the power supply monitoring circuit, and determines that the voltage value is a predetermined value (lower than the power supply voltage value at which the power supply monitoring circuit outputs a power-off signal). Value), the output goes low. Therefore, the CPU 56 performs a predetermined power supply stop processing in response to a power-off signal from the power supply monitoring circuit, and then performs a system reset.

As shown in FIG. 11, the reset IC 651
Is input to the NAND circuit 947 and also to the clear terminal of the counter IC 941 via the inverting circuit (NOT circuit) 944. When the input to the clear terminal goes low, the counter IC 941 counts the clock signal from the oscillator 943.
The Q5 output of the counter IC 941 is output to the NOT circuit 9
45, 946 and input to the NAND circuit 947. The Q6 output of the counter IC 941 is input to a clock terminal of a flip-flop (FF) 942.
The D input of the flip-flop 942 is fixed at a high level, and the Q output is input to an OR circuit (OR circuit) 949. The other input of the OR circuit 949 is connected to the NAND circuit 9.
The output of 47 is introduced via NOT circuit 948. The output of the OR circuit 949 is connected to the reset terminal of the CPU 56. According to such a configuration, two reset signals (low-level signals) are supplied to the reset terminal of the CPU 56 when the power is turned on.
Starts operation reliably.

For example, the detection voltage of the power supply monitoring circuit (the voltage at which the power supply cutoff signal is output) is set to +22 V, and the detection voltage for setting the reset signal to low level is set to +9 V. In such a configuration, the power supply monitoring circuit and the system reset circuit 65 are connected to the same power supply VSL.
, The difference between the timing at which the voltage monitoring circuit outputs the power-off signal and the timing at which the system reset circuit 65 outputs the system reset signal can be reliably set to a desired predetermined period. The desired predetermined period is a period from the start of the power supply stop processing in response to the power supply cutoff signal from the power supply monitoring circuit until the power supply stop processing is completely completed.

While power is not supplied from the +5 V power supply, which is the drive power supply of the CPU 56 and the like, at least a part of the RAM is backed up by the backup power supply supplied from the power supply board. Is saved. Then, when the + 5V power supply is restored, a reset signal is issued from the system reset circuit 65, so that the CPU 56 returns to the normal operation state. At that time, since the necessary data is stored in the backup RAM, it is possible to return to the gaming state at the time of the occurrence of the power failure when recovering from a power failure or the like.

In the configuration shown in FIG. 11, two reset signals (low-level signals) are supplied to the reset terminal of the CPU 56 when the power is turned on. However, even if the reset signal rises only once, the reset is ensured. When the CPU to be released is used, reference numerals 941 to 949
The circuit element indicated by is not required. In that case, the output of the reset IC 651 is directly connected to the reset terminal of the CPU 56.

CPU 56 used in this embodiment
Incorporates an I / O port (PIO) and a timer / counter circuit (CTC). PIO is PB0-PB
It has a port of 3 4 bits and 1 byte of PA0 to PA7. The ports PB0 to PB3 and PA0 to PA7 can be set for both input and output.

FIG. 12 and FIG. 13 are explanatory diagrams showing the assignment of output ports in this embodiment. FIG.
As shown in FIG. 2, the output port 0 is an output port for a strobe signal (INT signal) of a control command output to each electric component control board. The 8-bit data of the payout control command output to the payout control board 37 is output from the output port 1, and the 8-bit data of the display control command output to the symbol control board 80 is output from the output port 2. The 8-bit data of the lamp control command output to the lamp control board 35 is output from the output port 3. Then, as shown in FIG. 11, 8-bit data of the sound control command output to the sound control board 70 is output from the output port 4.

The output port 5 is connected to the information output circuit 6
4, various information output signals reaching the information terminal board 34 and the terminal board 160, that is, output data of information related to control are output. From the output port 6, a solenoid 16 for opening and closing the variable winning ball device 15, a solenoid 21 for opening and closing the opening and closing plate 2 of the special winning opening, and a solenoid 21 for switching a path in the special winning opening.
A drive signal for A is output.

As shown in FIG. 12, the payout control board 37,
An output port for outputting each INT signal (payout control signal INT, display control signal INT, lamp control signal INT, and voice control signal INT) output to the symbol control board 80, the lamp control board 35, and the sound control board 70. Output port 0) is different from output ports (output ports 1 to 4) for outputting payout control signals CD0 to CD7, display control signals CD0 to CD7, lamp control signals CD0 to CD7, and audio control signals CD0 to CD7. It is. Therefore,
When outputting the INT signal, the payout control signal CD0
To CD7, display control signals CD0 to CD7, lamp control signals CD0 to CD7 and audio control signals CD0 to CD7 are less likely to be changed. Further, the payout control signals CD0 to CD7, the display control signals CD0 to CD7, the lamp control signals CD0 to CD7, or the sound control signals CD0 to CD0.
When outputting the CD7, the possibility of erroneously changing the INT signal is reduced. As a result, the command from the game control means of the main board 31 to each electric component control board is
It will be sent more reliably. Further, since all the INT signals are output from the output port 0, the load on the INT signal output processing of the game control means is reduced.

FIG. 14 is an explanatory diagram showing bit assignment of an input port in this embodiment. As shown in FIG. 14, bits 0 to 7 of the input port 0 include a winning opening switch 24a, a winning opening switch 24b, a winning opening switch 19a, a winning opening switch 19b, a start opening switch 17, a count switch 23, and a V switch, respectively. The detection signals of the winning switch (specific area switch) 22 and the gate switch 12 are input. Also, bits 0 to 4 of input port 1
, A detection signal of the prize ball count switch 301A, the full tank switch 48, the detection signal of the ball out switch 187, a count switch short-circuit signal, and a signal from the door switch 96 are input.

Next, the operation of the gaming machine will be described. FIG.
5 is a flowchart showing the main processing executed by the CPU 56 on the main board 31. When the power to the gaming machine is turned on, in the main process, the CPU 56
First, necessary initial settings are made.

In the initial setting process, the CPU 56 first sets interrupt prohibition (step S1). Next, the interrupt mode is set to the interrupt mode 2 (step S2), and a stack pointer designated address is set to the stack pointer (step S3). Then, the internal device registers are initialized (step S4). After initializing a built-in device (built-in peripheral circuit) CTC (counter / timer) and PIO (parallel input / output port) (step S5), the RAM is set to an accessible state (step S6).

CPU 5 used in this embodiment
6 has the following three types of modes as maskable interrupt (INT) modes. When an interrupt that can be masked occurs, the CPU 56 automatically sets the interrupt disabled state and saves the contents of the program counter on the stack.

Interrupt mode 0: The built-in device which has issued the interrupt request receives an RST instruction (1 byte) or a CALL instruction (3 bytes).
Byte) on the internal data bus of the CPU. Therefore, the CPU 56 executes the instruction at the address corresponding to the RST instruction or the address specified by the CALL instruction. Upon reset, CPU 56 automatically switches to interrupt mode 0
become. Therefore, when it is desired to set the mode to the interrupt mode 1 or the interrupt mode 2, it is necessary to perform a process for setting the mode to the interrupt mode 1 or the interrupt mode 2 in the initial setting process.

Interrupt mode 1: When an interrupt is accepted,
In this mode, the camera always jumps to the address 0038 (h).

Interrupt mode 2: The address synthesized from the value (1 byte) of the specific register (I register) of the CPU 56 and the interrupt vector (1 byte: least significant bit 0) output from the built-in device is the interrupt address. Mode. That is, the interrupt address is an address indicated by 2 bytes in which the upper address is the value of the specific register and the lower address is the interrupt vector. Therefore, an interrupt process can be set at an arbitrary (albeit skipped) even address. Each built-in device has a function of sending an interrupt vector when making an interrupt request.

Therefore, when the interrupt mode 2 is set, it is possible to easily process an interrupt request from each built-in device, and it is possible to set an interrupt process at an arbitrary position in a program. Will be possible. Further, unlike the interrupt mode 1, it is easy to prepare an interrupt process for each interrupt occurrence factor. As described above, in this embodiment, the CPU 56 is set to the interrupt mode 2 in step S2 of the initial setting process.

When the power supply is stopped, the backup R
It is checked whether or not the data protection processing of the AM area (for example, the power failure occurrence NMI processing such as the addition of parity data) has been performed (step S7). In this embodiment, when an unexpected power supply stop occurs, a process for protecting data in the backup RAM area is performed. The case where such protection processing has been performed is regarded as backup. After confirming that there is no backup, the CPU 56 executes an initialization process.

In this embodiment, the backup RAM
Whether or not there is backup data in the area is confirmed by the state of the backup flag set in the backup RAM area when the power supply is stopped. In this example, FIG.
As shown in FIG. 6, “55H” is stored in the backup flag area.
Indicates that there is a backup (ON state), and that a value other than “55H” is set, indicates that there is no backup (OFF state).

When the backup is confirmed, the CPU 5
Reference numeral 6 performs data check (parity check in this example) of the backup RAM area. If the power is restored after an unexpected power supply stop, the data in the backup RAM area must have been saved, and the check result becomes normal. If the check result is not normal, since the internal state cannot be returned to the state at the time of stopping the power supply, the initialization processing executed at the time of turning on the power other than the recovery from the power failure is executed.

If the check result is normal (step S
8) The CPU 56 performs a game state restoring process for returning the internal state of the game control means and the control state of the electric component control means such as the display control means to the state at the time of stopping the power supply (step S9). Then, the saved value of the PC (program counter) stored in the backup RAM area is set in the PC, and the program returns to that address.

In the initialization process, the CPU 56 first sets R
An AM clear process is performed (step S11). In addition, a predetermined work area (for example, a normal symbol determination random number counter, a normal symbol determination buffer, a special symbol left middle right symbol buffer,
An initial value setting process for setting an initial value to a payout command storage pointer or the like is also performed. Further, a process for initializing the sub-boards (the lamp control board 35, the payout control board 37, the sound control board 70, and the symbol control board 80) is executed (step S13). The process of initializing the sub-board is, for example, a process of outputting an initial setting command. As the initial setting command, for example, there is a payout possible state designation command (in the case of the payout possible state) or a payout stop state designation command (in the case of the payout impossible state) outputted to the payout control board 37.

As a dispensable state, for example, the ball out switch 187 or the full tank switch 48 is turned on, or a signal from the door switch 96 is
There are states that indicate the opening of zero. That is, the CPU 5
6 is a ball out switch 187 or a full tank switch 4
If the switch 8 is on, or if the signal from the door switch 96 indicates that the front door 200 is open, a payout stop state designation command is output to the payout control board 37, and if such a situation is resolved, payout is possible. Outputs the status specification command. Note that the payout possible state designation command (in the case of the payout possible state) or the payout stop state designation command (in the case of the payout impossible state) may be configured to be output also in the game state restoration processing in step S9.

Then, the register of the CTC provided in the CPU 56 is set so that the timer is interrupted periodically every 2 ms (step S14). That is,
A value corresponding to 2 ms is set in a predetermined register (time constant register) as an initial value. Since the interrupt is prohibited in step S1 of the initial setting process, the interrupt is permitted before the initialization process is completed (step S1).
5).

In this embodiment, the built-in C
The TC is set to repeatedly generate a timer interrupt. In this embodiment, the repetition period is set to 2 ms. When a timer interrupt occurs, as shown in FIG. 17, the CPU 56 sets, for example, a timer interrupt flag indicating that a timer interrupt has occurred (step S10).
12).

Execution of initialization processing (steps S11 to S1)
When 5) is completed, the process proceeds to a loop process in which the main process checks whether or not a timer interrupt has occurred (step S17). In the loop, a display random number update process (step S16) is also executed.

The CPU 56 determines in step S17
Upon recognizing that a timer interrupt has occurred, step S2
The game control processing of 1 to S31 is executed. In the game control process, the CPU 56 firstly receives, via the switch circuit 58, the gate sensor 12, the starting port sensor 17, the count sensor 23, and the winning port switches 19a, 19b, 24.
The states of the switches such as a and 24b are input and their states are determined (switch processing: step S21).

Next, various abnormality diagnosis processes are performed by the self-diagnosis function provided inside the pachinko gaming machine 1, and an alarm is issued if necessary according to the result (error process: step S22).

Next, a process for updating each counter indicating a random number for determination, such as a random number for big hit determination used in game control, is performed (step S23). The CPU 56 further includes:
A process for updating a display random number such as a random number for determining the type of stop symbol is performed (step S24).

Further, the CPU 56 performs a special symbol process (step S25). In the special symbol process control, a corresponding process is selected and executed according to a special symbol process flag for controlling the pachinko gaming machine 1 in a predetermined order according to a gaming state. Then, the value of the special symbol process flag is updated during each processing according to the gaming state. Further, a normal symbol process is performed (step S26). In the normal symbol process process, a corresponding process is selected and executed according to a normal symbol process flag for controlling the variable display 10 using the 7-segment LED in a predetermined order. Then, the value of the normal symbol process flag is updated during each process according to the gaming state.

Next, the CPU 56 sets a display control command relating to a special symbol in a predetermined area of the RAM 55 and outputs the display control command (special symbol command control process: step S27). Further, a display control command relating to a normal symbol is set in a predetermined area of the RAM 55, and a process of outputting the display control command is performed (ordinary symbol command control process: step S28).

Further, the CPU 56 performs an information output process of outputting data such as big hit information, start information, and probability fluctuation information supplied to the hall management computer (step S29).

Further, the CPU 56 issues a drive command to the solenoid circuit 59 when a predetermined condition is satisfied (step S30). The solenoid circuit 59 drives the solenoids 16 and 21 in response to the drive command, and brings the variable winning ball device 15 or the open / close plate 20 into an open state or a closed state.

The CPU 56 has switches 17, 23, 19a, and 19 for detecting a winning in each winning opening.
A prize ball process for setting the number of prize balls based on the detection outputs of b, 24a and 24b is executed (step S31). Specifically, a payout control command is output to the payout control board 37 in response to the winning detection. The payout control CPU 371 mounted on the payout control board 37 drives the ball payout device 97 according to the payout control command.

According to the above control, in this embodiment, the game control process is started every 2 ms.
In this embodiment, for example, in the timer interrupt processing, only a flag indicating that an interrupt has occurred is set, and the game control processing is executed in the main processing.
The game control process may be executed by a timer interrupt process.

The main process includes a process for determining whether or not to shift to the game control process. The internal timer of the CPU 56 performs a timer interrupt process based on a timer interrupt that is periodically generated. Since a flag for determining whether or not to shift is set or the like, all of the game control processing is reliably executed. In other words, until all of the game control processes are executed, it is not determined whether or not to shift to the next game control process, so that it is guaranteed that all processes in the game control process are completed. ing.

As described above, in this embodiment, the interrupt mode 2 is set in the CPU 56 having a built-in CTC or PIO in the initial setting process. Accordingly, a periodic timer interrupt process using the built-in CTC can be easily realized. Further, the timer interrupt processing can be set at an arbitrary position on the program. Further, switch detection processing using the built-in PIO can be easily realized by interruption processing. As a result, effects such as simplification of the program configuration and reduction in the number of program development steps can be obtained.

Of the output ports 0 to 6 shown in FIGS. 12 and 13, output ports 0, 1, 2, 3, 4
Is accessed in a special symbol command control process (step S25), a normal symbol command control process (step S27), a prize ball process (step S31) and the like in the game control process. The output port 5 is accessed in information output processing (step S29), and the output port 6 is accessed in special symbol processing (step S25) and ordinary symbol processing (step S26).

Next, a specific example of the switch processing (step S21) in the main processing will be described. In this embodiment, when the on state of the detection signal continues for a predetermined time, it is determined that the switch has been turned on, and the processing corresponding to the switch on is started. A switch timer is used to measure a predetermined time. The switch timer is a 1-byte counter formed in the backup RAM area, and is incremented by 1 every 2 ms when the detection signal from each switch indicates an ON state. As shown in FIG. 18, the switch timers are provided by the number of detection signals (the number of switches to be detected) n. In this embodiment, n = 1
3. In the RAM, the addresses of the switch timers are arranged in the same order as the bit arrangement order of the input ports (the order from the top to the bottom shown in FIG. 14).

FIG. 19 is a flowchart showing a processing example of the switch processing in step S21 in the game control processing. The switch process is first executed in the game control process as shown in FIG. In the switch processing, the CPU 56 first inputs data input to the input port 0 (step S71). Next, "8" is set as the number of processes (step S72), and the address of the switch timer for the winning opening switch 24a is set in the pointer (step S73). Then, a switch check processing subroutine is called (step S74).

FIG. 20 is a flowchart showing a switch check processing subroutine. In the switch check processing subroutine, the CPU 56 sets the port input data, in this case, the input data from the input port 0, as a “comparison value” (step S81). Also,
Set clear data (00) (step S8)
2). Then, the switch timer indicated by the pointer (the address of the switch timer is set) is loaded (step S83), and the comparison value is shifted to the right (from the upper bit to the lower bit) (step S8).
4). The data of the input port 0 is set as the comparison value. Then, in this case, the detection signal of the winning opening switch 24a is pushed out by the carry flag.

If the value of the carry flag is "1" (step S85), that is, if the detection signal of the winning opening switch 24a is on, the value of the switch timer is incremented by 1 (step S87). If the value after the addition is not 0, the added value is returned to the switch timer (steps S88 and S8).
9). When the value after the addition becomes 0, the added value is not returned to the switch timer. That is, if the value of the switch timer has already reached the maximum value (255), the value is not increased further.

If the value of the carry flag is "0", that is, if the detection signal of the winning opening switch 24a is off, clear data is set in the switch timer (step S86). That is, if the switch is off, the value of the switch timer returns to zero.

Thereafter, the CPU 56 increments the pointer (address of the switch timer) by 1 (step S90) and decrements the number of processes by 1 (step S91). If the number of processes has not become zero, the process returns to step S82. Then, the processing of steps S82 to S92 is repeated.

The processes of steps S82 to S92 are repeated for the number of processes, that is, eight times. In the meantime, the detection signals of the switches input to the 8 bits of the input port 0 are sequentially turned on or off. A check process is performed, and if it is in the ON state, the value of the corresponding switch timer is increased by one.

[0145] The CPU 56 executes the step S of the switch processing.
At 75, the data input to the input port 1 is input. Next, "5" is set as the number of processes (step S76), and the address of the switch timer for the winning ball count switch 301A is set in the pointer (step S77). Then, a switch check processing subroutine is called (step S78).

In the switch check processing subroutine,
Since the above-described processing is executed, steps S82 to S9 are performed.
2 is repeated for the number of processes, that is, five times. In the meantime, a process of sequentially checking whether or not the switch detection signal input to the 5 bits of the input port 1 is on or off is performed. If it is in the ON state, the value of the corresponding switch timer is increased by one.

In this embodiment, since the game control process is started every 2 ms, the switch process is also executed once every 2 ms. Therefore, the switch timer is incremented by 1 every 2 ms.

FIGS. 21 to 24 are flowcharts showing an example of the prize ball processing in step S31 in the game control processing. In this embodiment, in the prize ball process, it is determined whether or not the winning opening switches 19a, 19b, 24a, 24b, the count switch 23, and the starting opening switch 17 have been reliably turned on. Is output to the payout control board 37,
Further, it is determined whether or not the full tank switch 48, the out-of-ball switch 187, and the door switch 96 have been reliably turned on, and if turned on, control is performed such that a predetermined payout control command is output to the payout control board 37. Processing is performed.

In the prize ball processing, the CPU 56 first
It is checked whether the wait counter is operating (step S150). As a weight counter, for example, R
A predetermined area of AM55 is used. For example, if the value of the weight counter is not 0, the CPU 56 determines that the operation is in operation.

If the wait counter is not operating, C
The PU 56 sets “1” as the offset of the input determination value table (Step S151), and sets “9” as the offset of the address of the switch timer (Step S152). The offset “1” in the input determination value table (see FIG. 26) means that the second data “50” in the input determination value table is used. Further, since each switch timer is arranged in the same order as the bit order of the input port shown in FIG. 14, the offset “9” of the address of the switch timer indicates that the switch timer corresponding to the full switch 48 is designated. Means Then, the switch-on check routine is called (step S).
153).

The input determination value table is a table in which a determination value is set for each switch to determine how many consecutive ONs have been detected to determine that the switch has been turned ON.
This is the M area. FIG. 26 shows a configuration example of the input determination value table. As shown in FIG. 26, in the input determination value table, “2”, “50”, “250”, “30”,
Determination values of “250” and “1” are set. Also,
In the switch-on check routine, the judgment value set at the address determined by the start address of the input judgment value table and the offset value is compared with the value of the switch timer determined by the start address of the switch timer and the offset value. If so, for example, a switch-on flag is set.

An example of the switch-on check routine is shown in FIG. In the switch-on check routine, when the value of the switch timer corresponding to the full tank switch 48 matches the full tank switch-on determination value "50", the switch-on flag is set (step S154). (Step S
155). Although not explicitly shown in FIG. 21, when the value of the switch timer corresponding to the full tank switch 48 becomes 0, the full tank flag is reset.

The CPU 56 sets “2” as the offset of the input judgment value table (step S15).
6), “0A (H)” is set as the offset of the address of the switch timer (step S157). The offset “2” in the input determination value table means that the third data “250” in the input determination value table is used. Further, since each switch timer is arranged in the same order as the bit order of the input port shown in FIG. 14, the offset “0A (H)” of the address of the switch timer is designated by the switch timer corresponding to the out-of-ball switch 187. Means to be done. Then, the switch-on check routine is called (step S158).

In the switch-on check routine,
If the value of the switch timer corresponding to the out-of-ball switch 187 matches the out-of-ball switch-on determination value "250", the switch-on flag is set (step S1).
59), a ball out flag is set (step S16)
0). Although not explicitly shown in FIG. 21, a switch-off timer corresponding to the out-of-ball switch 187 is prepared, and when its value reaches 50, the out-of-ball flag is reset.

Further, the CPU 56 sets "1" as an offset of the input judgment value table (step S16).
1), “0D (H)” is set as the offset of the address of the switch timer (step S162). The offset “1” in the input judgment value table means that the third data “2” in the input judgment value table is used. Further, since the switch timers are arranged in the same order as the bit order of the input port shown in FIG. 14, the switch timer corresponding to the door switch 96 is designated as the offset “0D (H)” of the address of the switch timer. Means that Then, the switch-on check routine is called (step S163).

In the switch-on check routine,
If the value of the switch timer corresponding to the door switch 96 matches the door switch on determination value "2", the switch on flag is set (step S164), and the door open flag is set (step S165). Although not explicitly shown in FIG.
Is reset, the door open flag is reset. Further, when the signal from the door switch 96 indicates that the door is closed, if the state continues for a predetermined period (for example, 3 seconds), it may be recognized that the front door 200 is closed. In that case, a switch-off timer for the door switch 96 is prepared, and if the signal from the door switch 96 indicates that the door is closed, the value of the switch-off timer is incremented by 1 and the value of the switch-off timer is increased to a predetermined value (the predetermined period is 3). When it becomes 1500 in the case of seconds, it is recognized that the front door 200 is closed. When the front door 200 is opened, the payout of the game ball is stopped, and furthermore, the launch of the game ball and the progress of the game are stopped. If it is configured to recognize that the door 200 has been closed, after it is detected that the door has been securely closed,
The payout of game balls, the launch of game balls, and the game can be resumed.

Then, the CPU 56 checks whether or not the payout of the game balls from the ball payout device 97 is stopped (step S181). The payout stop state is a state after the payout stop state designation command is output to the payout control board 37. If it is not in the payout stop state, it is confirmed whether or not the above-mentioned ball-out state flag, full tank flag or door open flag has been turned on (step S182).

When either of them changes to the ON state,
The command transmission table for the payout stop state designation command is set (step S183), and the command set processing is called (step S184). Step S18
In 3, the head address of the command transmission table (ROM) storing the payout control command of the payout stop state designation command is set as the address of the command transmission table. In the command transmission table relating to the payout stop state designation command, INT data to be described later, data of the first byte of the payout control command, and data of the second byte of the payout control command are set. Then, in the command set processing, output processing of a payout control command based on the contents of the command transmission table and the like is executed. Note that in step S182, when any one of the flags is already in the on state and the other flag is in the on state, the processing in steps S183 and S184 is not performed.

If the dispensing is stopped, it is checked whether all of the out-of-ball state flag, the full tank flag, and the door opening flag have been turned off (step S18).
5). When all are turned off, a predetermined initial value is set in the wait counter (step S186).

When it is confirmed in step S150 that the wait counter is operating, the CPU 56
The value of the wait counter is decremented by 1 (step S187),
When the value of the wait counter becomes 0 (step S19)
1) A command transmission table relating to the payable state designation command is set (step S192), and a command set process is called (step S193). In step S192, a command transmission table (RO) storing a payout control command of the payable state designation command is stored.
The head address of M) is set as the address of the command transmission table. The command transmission table relating to the payable state designation command includes INT data described later,
The first byte data of the payout control command and the second byte data of the payout control command are set.

With the above control, the ball-out state flag,
One of a full tank flag and a door open flag
When at least one of the flags is turned on, that is, when all of the flags are turned off (a state in which the state can be shifted to a payable state), a payable state designation command is output immediately. Instead, after a wait time corresponding to the initial value set in the wait counter, the payout possible state designation command is output. For example, it is conceivable that a sufficient amount of game balls has not yet been replenished in the replenishment path for game balls even when the ball out switch 187 is changed from the on state to the off state. The time required for replenishing an appropriate amount of game balls is secured.

It is to be noted that the processing of step S186 is executed only when all of the out-of-ball state flag, the full tank flag, and the door open flag are turned off from the state in which only the out-of-ball state flag is on. You may. That is, the wait time may be set only when the out-of-ball condition is resolved.

Further, the CPU 56 sets "0" as an offset of the input judgment value table (step S12).
1), "0" is set as the offset of the address of the switch timer (step S122). The offset “0” of the input judgment value table means that the first data of the input judgment value table is used. Further, since each switch timer is arranged in the same order as the bit order of the input port shown in FIG. 14, the offset “0” of the address of the switch timer specifies the switch timer corresponding to the winning opening switch 24a. Means Also, “4” is set as the number of repetitions (step S123).
Then, the switch-on check routine is called (step S124).

In the switch-on check routine,
The CPU 56 sets the start address of the input determination value table (see FIG. 26) (Step S101). And
An offset is added to the address (step S10).
2) The switch-on determination value is loaded from the address after the addition (step S103).

Next, the CPU 56 sets the start address of the switch timer (step S104), adds an offset to the address (step S105), and loads the value of the switch timer from the address after the addition (step S106). Since each switch timer is arranged in the same order as the bit order of the input port shown in FIG. 14, the value of the switch timer corresponding to the switch is loaded.

Then, the CPU 56 compares the value of the loaded switch timer with the switch-on determination value (step S107). If they match, a switch-on flag is set (step 108).

In this case, in the switch-on check routine, if the value of the switch timer corresponding to the winning opening switch 24a matches the switch-on determination value "2", the switch-on flag is set (step S1).
25). Then, the switch check-on routine is executed for the initially set number of repetitions while updating the address offset of the switch timer (step S130) (steps S128 and S129).
After all, the winning opening switches 19a, 19b, 24a, 24b
, The value of the corresponding switch timer is compared with the switch-on determination value “2”.

When the switch-on flag is set, "10" is set in the ring buffer as the number of award balls to be paid out (step S126). Then, 10 is added to the value stored in the total prize ball storage buffer (step S12).
7). When data is written to the ring buffer, the write pointer is incremented. When data is written to the last area of the ring buffer, the write pointer is updated to point to the first area of the ring buffer.

The total prize ball number storage buffer is a buffer for storing the cumulative value of the prize ball number instructed to the payout control means (however, it is decremented when the payout is made).
It is formed in the backup RAM. In this embodiment, when data is written to the ring buffer, an addition process is performed on the stored value of the total prize balls storage buffer, but a payout control command indicating the number of prize balls to be paid out is output to the output port. At the time of output, addition processing may be performed on the value stored in the total prize ball storage buffer.

Next, the CPU 56 sets “0” as an offset of the input judgment value table (step S13).
1), "4" is set as the offset of the address of the switch timer (step S132). The offset “0” of the input judgment value table means that the first data of the input judgment value table is used. Further, since each switch timer is arranged in the same order as the bit order of the input port shown in FIG. 14, the offset “4” of the address of the switch timer indicates that the switch timer corresponding to the starting port switch 17 is designated. Means Then, the switch-on check routine is called (step S1).
33).

In the switch-on check routine,
If the value of the switch timer corresponding to the starting port switch 17 matches the switch-on determination value "2", the switch-on flag is set (step S134). When the switch-on flag is set, "6" is set in the ring buffer as the number of award balls to be paid out (step S).
135). Further, 6 is added to the value stored in the total prize ball storage buffer (step S136).

Next, the CPU 56 sets “0” as an offset of the input judgment value table (step S22).
1), “5” is set as the offset of the address of the switch timer (step S222). The offset “0” of the input judgment value table means that the first data of the input judgment value table is used. Further, since the switch timers are arranged in the same order as the bit order of the input port shown in FIG. 14, the offset “5” of the address of the switch timer indicates that the switch timer corresponding to the count switch 23 is designated. means. Then, the switch-on check routine is called (step S).
223).

In the switch-on check routine,
If the value of the switch timer corresponding to the count switch 23 matches the switch-on determination value "2", the switch-on flag is set (step S224). When the switch-on flag is set, "15" as the number of award balls to be paid out is set in the ring buffer (step S225). Also, 15 is added to the value stored in the total prize ball storage buffer (step S226).

If data exists in the ring buffer (step S227), the contents of the ring buffer pointed to by the read pointer are set in the transmission buffer (step S228), and the value of the read pointer is updated (step S227). It is updated to point to the next area) (step S229), a command transmission table relating to the number of winning balls is set (step S230), and the command set processing is called (step S231). The operation of the command set processing will be described later in detail. Step S
At 230, the head address of the command transmission table (ROM) in which the payout control command related to the number of winning balls is stored is set as the address of the command transmission table. In the command transmission table relating to the number of winning balls, INT data described later, data of the first byte of the payout control command, and data of the second byte of the payout control command are set. However, "8"
0 (H) "is set.

As described above, when trying to output a payout control command instructing the number of winning balls from the game control means to the payout control board 37, the address setting of the command transmission table relating to the number of winning balls and the setting of the transmission buffer are performed. Is performed.
Then, a payout control command is output to the payout control board 37 based on the command transmission table relating to the number of winning balls and the setting contents of the transmission buffer by the command set processing. In step S227, whether or not there is data can be confirmed based on the difference between the write pointer and the read pointer. However, a counter indicating the number of unprocessed data in the ring buffer is provided, and data is stored according to the count value. It may be confirmed whether or not.

If the content of the total prize balls buffer is not 0, that is, if there is still a prize ball remaining, the CPU
56 turns on the award ball payout flag (step S23).
2, S233).

When the award ball paying flag is on (step S234), the CPU 56 monitors the number of award balls actually paid out from the ball payout device 97 and stores the total number of award ball storage buffers. A winning ball number subtraction process of subtracting the value is performed (step S235). When the award ball payout flag changes from on to off, the lamp control board 35
In response, a lamp control command for instructing lighting of the prize ball lamp 51 is output.

In this embodiment, even if the payout is stopped (steps S181 and S185), step S121 is executed.
To S136 and S221 to S231 are executed. That is, the game control means can output the payout control command for instructing the number of winning balls even in the payout stop state. That is, a control signal for instructing the number of winning balls is transmitted to the payout control means even in the payout stop state, and when the payout stop state is released, the payout ball payout can be started earlier. Also, in the prize ball processing started every 2 ms, steps S121 to S136 are performed.
And Step S1 rather than the processing of S221 to S231.
Since the processes of 81 to S184 are executed first, the payout stop state designation command is output with higher priority than the payout control command for instructing the number of winning balls.

Next, a method of transmitting a control command from the game control means to each electric component control means will be described. From game control means to each electric component control board (sub board)
When a control command is to be output to the host, the start address of the command transmission table is set. FIG.
(A) is an explanatory view showing a configuration example of a command transmission table. One command transmission table is composed of three bytes, and INT data is set in the first byte. In the command data 1 of the second byte, MODE data which is command data of the first byte of the control command is set. Then, EXT data which is command data of the second byte of the control command is set in the command data 2 of the third byte.

Although the EXT data itself may be set in the command data 2 area, the command data 2
May be set to data for specifying an address of a table in which EXT data is stored. For example, if bit 7 (work area reference bit) of command data 2 is 0, EX
Indicates that the T data itself is set. Such EXT data is data in which bit 7 is 0.
In this embodiment, if the work area reference bit is 1, it indicates that the contents of the transmission buffer are used as EXT data. If the work area reference bit is 1, the other 7 bits may be configured to indicate that it is an offset for specifying the address of the table in which the EXT data is stored.

FIG. 27B is an explanatory diagram showing an example of the configuration of INT data. Bit 0 in the INT data indicates whether a payout control command should be output to the payout control board 37 or not. If bit 0 is "1", it indicates that a payout control command should be output. Therefore, the CPU 56
For example, in the award ball processing (step S31 of the main processing), “01 (H)” is set in the INT data. Also,
Bit 1 in the INT data is the symbol output control board 80
Indicates whether a display control command should be output. If bit 1 is "1", it indicates that a display control command should be output. Accordingly, the CPU 56 sets “02 (H)” in the INT data in, for example, the special symbol command control process (step S27 of the main process).

Bits 2 and 3 of the INT data are bits indicating whether or not to output a lamp control command and a sound control command, respectively. In process processing or the like, INT data, command data 1 and command data 2 are set in the command transmission table pointed to by the pointer. When outputting these commands, the corresponding bit of the INT data is set to “1”, and MOD is added to command data 1 and command data 2.
E data and EXT data are set.

In this embodiment, a ring buffer and a transmission buffer are prepared for the payout control command as shown in FIG. In the prize ball processing, when the prize ball payout condition is satisfied, the number of prize balls according to the satisfied condition is sequentially set in the ring buffer. When outputting a payout control command relating to the number of winning balls, one piece of data is transferred from the ring buffer to the transmission buffer. In the example shown in FIG. 27C, data corresponding to 12 payout control commands can be stored in the ring buffer.

FIG. 28 is an explanatory diagram showing an example of a command form of a control command output from the main board 31 to another electric component control board. In this embodiment, the control command has a 2-byte configuration, the first byte represents MODE (classification of command), and the second byte represents EXT (type of command). The first bit (bit 7) of MODE data is always "1", and the first bit (bit 7) of EXT data is always "0". As described above, the control command serving as the control signal to the electric component control board includes a plurality of command data (in this example, two command data).
, And can be distinguished from each other by the first bit. The command form shown in FIG. 28 is an example, and another command form may be used. For example, the control command as a control signal may be composed of one command data or three or more command data. FIG. 28 illustrates a payout control command (a control command constituted by command data for controlling the payout device) output to the payout control board 37, but a control command output to another electric component control board is illustrated. Have the same configuration.

FIG. 29 shows an 8-bit control signal CD0 to CD constituting a control command for each electric component control means.
FIG. 7 is a timing chart showing a relationship between the signal No. 7 and an INT signal. As shown in FIG. 29, when the period indicated by A elapses after the MODE or EXT data is output to the output port (any one of the output ports 1 to 4), the CPU 56 outputs the data output. INT which is a signal indicating
Set the signal to high level. When the period indicated by B elapses therefrom, the INT signal is set to the low level. Furthermore, if there is data to be output next,
After the MODE data is output, the data of the second byte is output to the output port after a period indicated by C. Regarding the data of the second byte, the periods of A and B are the same as the case of the first byte. Thus, the capture signal is MODE
And EXT data.

The period A is a period for the CPU 56 to prepare for command output, that is, a period required for processing for setting an output command in the buffer, and a period for stabilizing data on the control signal line. In other words, after the control signals CD0 to CD7 are output on the control signal line, an INT signal is output as a capture signal after a predetermined period (period A: part of the off-output period) has elapsed. Also,
The period B (ON output period) is a period for stabilizing the INT signal. The period C (a part of the off-output period) is a period set so that the electric component control means can reliably take in data. In periods B and C,
The data on the signal line does not change. That is, the data output is maintained until the periods B and C elapse.

In this embodiment, a payout control command to the payout control board 37, a display control command to the symbol control board 80, a lamp control command to the lamp control board 35, and a sound control command to the sound control board 70 are: It is output using the same command transmission processing routine (common module). Therefore, the period of B and C, that is, the period from the rise of the INT signal for the first byte to the start of the output of the second byte of data, is longer than the reception processing time of the electric component control means which takes the longest time for the command reception processing. Is also set to be longer.

Each electric component control means detects that the INT signal has risen, and starts a process of fetching 1-byte data by, for example, an interrupt process.

Since the periods B and C are longer than the reception processing time of the electric component control means which takes the longest time for the command reception processing, the game control means controls the command transmission processing for each electric component control means by the common module. However, any of the electric component control means can reliably receive the control command from the game control means.

In this embodiment, the CPU 56 sets (1
1.776 / 2) MHz. Specifically, 138 states (1 state = [2 / 11.776] μs) are applied in the period A, 82 states are applied in the period B, and 251 states are applied in the period C. Therefore, the periods B and C are longer than the period A. That is, the CPU 56 is ready to output the next data after a predetermined period has elapsed after executing the INT signal output processing, and the predetermined period (the period of B and C) is I
It is longer than the period (period A) from the output of data before the NT signal output process to the start of the output of the INT signal.
As described above, the period A is a stabilization period in the command signal line, and the periods B and C are periods for securing the time required for the receiving side to capture data. Therefore, by making the period A shorter than the periods B and C, it is possible to obtain the effect that the receiving-side electric component control unit can reliably receive the command, and to complete the output of one command. This also has the effect of shortening the time required.

FIG. 30 is an explanatory diagram showing an example of the content of the payout control command. In the example shown in FIG.
Command F of ODE = FF (H) and EXT = 00 (H)
F00 (H) is a payout control command (payout possible state designation command) that specifies a payable state. MODE =
FF (H), command FF01 of EXT = 01 (H)
(H) is a payout control command for specifying a payout stop state (payout stop command: payout stop state designation command).
The command F0XX (H) of MODE = F0 (H)
Is a payout control command as a payout number command for specifying the number of winning balls. "XX" which is EXT indicates the number of payouts. Note that the payout possible state designation command corresponds to a payout restart command.

When the payout control means receives the payout control command of FF01 (H) from the game control means of the main board 31, the payout control means stops the prize ball payout and ball lending.
When the payout control command of (H) is received, it becomes possible to pay out prize balls and lend a ball. Further, when a payout control command specifying the number of winning balls is received, prize ball payout control according to the number specified by the received command is performed.

The payout control command is output only once so that the payout control means can recognize it. Recognizable means that the level of the INT signal changes in this example, and is output only once so as to be recognizable. In this example, it means that the INT signal is output once each in the first and second bytes of the payout control signal. Accordingly, the INT signal is output only once in a pulse form (rectangular wave form).

Control commands to each electric component control board are
When outputting to the corresponding output port (output ports 1 to 4), any one of the bits 0 to 3 of the output port 0 becomes "1" (high level) for a predetermined period. Correspond to the bit arrangement at the output port 0. Therefore, when outputting a control command to each electric component control board, it is possible to easily output an INT signal based on the INT data.

FIG. 31 is a flowchart showing an example of the command setting process (steps S184, S193, S231). The command set process includes a command output process for outputting command data and an INT signal output process for outputting an INT signal. In the command setting process, the CPU 56 first saves the address of the command transmission table (the contents of the pointer as the transmission signal instruction means) in a stack or the like (step S33).
1). Then, the INT data of the command transmission table pointed to by the pointer is loaded into the argument 1 (step S).
332). Argument 1 is input information for a command transmission process described later. Further, the address indicating the command transmission table is incremented by 1 (step S333). Therefore, the address indicating the command transmission table matches the address of the command data 1.

Therefore, the CPU 56 sets the command data 1
Is read and set as argument 2 (step S334).
The argument 2 also becomes input information for a command transmission process described later. Then, a command transmission processing routine is called (step S335).

FIG. 32 is a flowchart showing a command transmission processing routine. In the command transmission processing routine, the CPU 56 first sets the data set in the argument 1, ie, the INT data, in the work area determined as the comparison value (step S351).
Next, the number of transmissions = 4 is set in the work area determined as the number of processes (step S352). Then, the address of the port 1 for outputting the payout control signal is set to the IO address (step S353). In this embodiment, the address of port 1 is the address of an output port for outputting a payout control signal. The addresses of ports 2 to 4 are the addresses of output ports for outputting display control signals, lamp control signals, and audio control signals.

Next, the CPU 56 shifts the comparison value one bit to the right (step S354). It is determined whether or not the carry bit has become 1 as a result of the shift processing (step S355). The fact that the carry bit has become 1 means that the rightmost bit in the INT data is “1”.
It means that it was. In this embodiment, four shift processes are performed. For example, when it is specified that a payout control command should be output, the carry bit becomes 1 in the first shift process.

When the carry bit becomes 1, the data set in the argument 2, in this case, the command data 1 (ie, MODE data) is output to the address set as the IO address (step S3
56). When the first shift process is performed, the port 1 address is set in the IO address. At this time, the MODE data of the payout control command is
Is output to

Next, the CPU 56 sets the IO address to 1
While adding (step S357), 1 is subtracted from the number of processes (step S358). If the port 1 is indicated before the addition, the IO address is set to the address of the port 2 by the addition processing for the IO address. Port 2 is a port for outputting a display control command. Then, the CPU 56 checks the value of the number of processes (step S359), and if the value is not 0,
It returns to step S354. The shift process is performed again in step S354.

In the second shift processing, the value of bit 1 in the INT data is pushed out, and the carry flag becomes "1" or "0" according to the value of bit 1. Therefore,
A check is made to determine whether output of the display control command is specified. Similarly, in the third and fourth shift processes, it is checked whether it is specified that a lamp control command and a sound control command should be output. As described above, when each shift process is performed, the IO address corresponding to the control command (payout control command, display control command, lamp control command, sound control command) checked by the shift process is included in the IO address. Is set.

Therefore, when the carry flag becomes "1", the corresponding output port (port 1 to port 4)
Output the control command. That is, a single common module can perform a process of transmitting a control command to each electric component control unit.

As described above, since it is determined only to the shift process to which electric component control means the control command is to be output, it is determined to which electric component control means the control command is to be output. Processing has been simplified.

Next, the CPU 56 reads the contents of the argument 1 storing the INT data before the start of the shift processing (step S360), and outputs the read data to the port 0 (step S361). In this embodiment,
The port 0 address is a port for outputting an INT signal for each control signal.
To 4 are a payout control INT signal and a display control IN, respectively.
A port for outputting a T signal, a lamp control INT signal, and a voice control INT signal. In the INT data, the bit corresponding to the output bit of the INT signal corresponding to the control command (payout control command, display control command, lamp control command, sound control command) output in the processing of steps S351 to S359 becomes “1”. Has become. Therefore, the INT signal corresponding to the control command (dispensing control command, display control command, lamp control command, sound control command) output to any of the ports 1 to 4 becomes high level.

Next, the CPU 56 sets a predetermined value in the weight counter (step S362), and decrements by one until the value becomes 0 (steps S363 and S36).
4). This process is a process for setting the period B shown in FIG. When the value of the wait counter becomes 0, clear data (00) is set (step S36).
5), and outputs the data to port 0 (step S3)
66). Therefore, the INT signal becomes low level. Then, a predetermined value is set in the weight counter (step S3).
62), and decrement by 1 until the value becomes 0 (steps S368, S369). This process is a process for setting the period C shown in FIG. However, the actual period of C is the time created in steps S367 to S369, and the subsequent processing time (if MODE data is output at this time, the time required for control required until EXT data is output). ) Is added. Thus, by setting the period of C,
Even if commands are output continuously, a predetermined period is set between the completion of output of one command and the start of output of the next command. Can easily identify the breaks in successive commands, and each command is reliably received.

Accordingly, the value set in the wait counter in step S367 is such that the period of C is a period sufficient for all the electric component control means to receive the control command to reliably execute the command receiving process. Value. The value set in the wait counter is such that the period of C is
This value is longer than the time required for the processing in steps S357 to S359 (corresponding to the period A). A
If it is desired to make the period A longer, a wait process for creating the period A (for example, a process of setting a predetermined value in the weight counter and performing subtraction until the value of the weight counter becomes 0) is performed.

As described above, the MODE data of the first byte of the control command is output. Therefore, CPU5
6, step S336 shown in FIG. 31 adds 1 to the value indicating the command transmission table. Therefore, the area of the command data 2 in the third byte is specified. The CPU 56
The contents of the indicated command data 2 are loaded into the argument 2 (step S337). Further, it is determined whether the value of bit 7 (work area reference bit) of the command data 2 is “0” (step S339). If it is not 0, the contents of the transmission buffer are loaded into argument 2 (step S341). If the extended data is used when the value of the work area reference bit is "1", the start address of the command extended data address table is set in the pointer, and the command data is stored in the pointer. The address is calculated by adding the values of bit 6 to bit 0 of 2. Then, the data of the area indicated by the address is loaded into the argument 2.

Since data that can specify the number of prize balls is set in the transmission buffer, the data is set in the argument 2. If the extended data is configured to be used when the value of the work area reference bit is “1”, the command extended data address table contains EXT data that can be output to the electric component control means. It is set sequentially. Therefore, the value of the work area reference bit is “1”.
If so, the EXT data in the command extension data address table corresponding to the contents of the command data 2 is loaded into the argument 2.

Next, the CPU 56 calls a command transmission processing routine (step S342). Therefore, M
EXT at the same timing as when outputting ODE data
Data is output.

As described above, the 2-byte control command (dispensing control command, display control command, lamp control command, sound control command) is transmitted to the corresponding electric component control means. When the electric component control means detects the rise of the INT signal, the control command fetch process is started. In any of the electric component control devices, a new signal from the game control means is output before the fetch process is completed. There is no output on the line. That is, a reliable command receiving process is performed in each electric component control unit. In addition, each electric component control means is IN
The control command capturing process may be started at the falling edge of the T signal. Also, the polarity of the INT signal may be reversed from that shown in FIG.

In this embodiment, in the prize ball processing, when the prize ball payout condition is satisfied, data capable of specifying the number of prize balls is stored in a ring buffer capable of storing a plurality of data at the same time. Is output, the data in the ring buffer area pointed to by the read pointer is transferred to the transmission buffer. Therefore,
Even if a plurality of prize ball payout conditions are satisfied at the same time, the data that can specify the number of prize balls based on the satisfaction of those conditions is stored in the ring buffer, so that the command output processing based on the satisfaction of each condition is executed without any problem. You.

Further, in this embodiment, both a payout stop state designation command or a payout possible state designation command and a command indicating the number of prize balls can be output in one prize ball process. That is, a plurality of control signals can be output within one control period activated every 2 ms. In this embodiment, a plurality of ring buffers are prepared for each control command (display control command, lamp control command, sound control command, payout control command) to each control means. When data capable of specifying a control command is set in the ring buffer of the control command, the lamp control command, and the sound control command, a plurality of display control commands, lamp control commands, and sound control commands are processed in one command control process. May be configured to be output. That is, a plurality of control commands can be output simultaneously (meaning in one main processing start cycle). Since the output timings of these control commands occur simultaneously during the progress of the game effect, it is convenient to be configured in this way. However, since the payout control command is generated regardless of the progress of the game effect, generally, the payout control command is not output simultaneously with the display control command, the lamp control command, and the sound control command.

FIG. 33 is a flowchart showing an example of the prize ball number subtraction processing. In the prize ball number subtraction process, C
The PU 56 first loads the value stored in the total prize balls storage buffer (step S241). Then, it is determined whether or not the stored value is 0 (step S242). If it is 0, the process ends.

If it is not 0, the switch timer for the prize ball count switch is loaded (step S243), and the loaded value is compared with the ON determination value (in this case, "2") (step S244). If they match (step S24
5) Assuming that the prize ball count switch 301A has certainly turned on, that is, one game ball has surely
7 is subtracted from the value stored in the total prize ball storage buffer (step S246).

Further, the value of the award ball information counter is incremented by 1 (step S247). If the value of the prize ball information counter is 10 or more (step S248), the value of the prize ball information output counter is incremented by 1 (step S24).
9), the value of the prize ball information counter is reduced by -10 (step S)
250). The value of the prize ball information output counter is as shown in FIG.
Is referred to in the information output process (step S29) in the main process shown in (1), and if the value is 1 or more, one pulse is output as a prize ball signal (bit 7 of the output port 5: see FIG. 13). Therefore, in this embodiment, 10
Each time one gaming ball is paid out as a prize ball, one prize ball signal is output outside the gaming machine.

When the value stored in the total prize ball storage buffer becomes 0 (step S251), the paying ball payout flag is cleared (step S252) to notify that there is no remaining prize ball. After setting command data indicating turning off of the prize ball lamp 51 in the command transmission table for the lamp control command (step S253), a lamp control command transmission process is executed (step S254).

Next, as an example of the case where the control command receiving process is performed in the electric component control means other than the game control means, a case where the payout control command receives the payout control command will be described.

FIG. 34 is a block diagram showing an example of a configuration around the payout control CPU 371. As shown in FIG. 34, a power supply cutoff signal from a power supply monitoring circuit (power supply monitoring means) of the power supply board 910 is connected to a non-maskable interrupt terminal (XNMI terminal) of the payout control CPU 371 via a buffer circuit 960. I have. Therefore, the payout control CPU 37
1 can confirm the occurrence of power supply stoppage due to the non-maskable interrupt processing.

CLK / TRG of payout control CPU 371
The INT signal from the main board 31 is connected to the two terminals. When a clock signal is input to the CLK / TRG2 terminal, the value of the timer counter register CLK / TRG2 incorporated in the payout control CPU 371 is counted down. When the register value becomes 0, an interrupt occurs. Therefore, the timer counter register CLK / TRG
If the initial value of 2 is set to "1", an interrupt occurs in response to the input of the INT signal.

The payout control board 37 is also equipped with a system reset circuit 975. In this embodiment,
Reset IC 97 in system reset circuit 975
Reference numeral 6 indicates that when the power is turned on, the output is set to the low level for a predetermined time determined by the capacity of the external capacitor, and the output is set to the high level after the predetermined time has elapsed. Also, reset IC 9
The monitor 76 monitors the power supply voltage of VSL, and sets the output to a low level when the voltage value falls below a predetermined value (for example, +9 V). Therefore, when the power supply is stopped, the signal from the reset IC 976 becomes low level, and the payout control CPU
371 is system reset.

The predetermined value for the reset IC 976 to detect the stop of power supply is lower than the normal voltage, but is a voltage at which the payout control CPU 371 can operate for a while. Further, the reset IC 976 is connected to the payout control CPU 3.
Since it is configured to monitor a voltage higher than the voltage required by 71 (+5 V in this example), the monitoring range for the voltage required by the payout control CPU 371 can be expanded. Therefore, more precise monitoring can be performed.

While power is not supplied from the + 5V power supply, at least a part of the built-in RAM of the payout control CPU 371 is backed up by connecting the backup power supply supplied from the power supply board to the backup terminal. The contents are saved even if the power is turned off. Then, when the + 5V power supply is restored, a reset signal is issued from the system reset circuit 975, so that the payout control CPU 371 returns to the normal operation state. At that time, since the necessary data has been backed up,
Upon recovery from a power failure or the like, it is possible to return to the payout control state at the time of the power failure.

In the configuration shown in FIG. 34, when power is turned on, system reset circuit 975 outputs a low level for a period determined by the capacitance of the capacitor, and then outputs a high level. That is, the reset release timing is only once. However, the main substrate 31 shown in FIG.
As in the case of the above, a circuit configuration that generates a plurality of reset release timings may be used.

FIG. 35 is an explanatory diagram showing the assignment of output ports in this embodiment. As shown in FIG. 35, the output port C (address 00H) is connected to the payout motor 2
The output port of the drive signal output to 89. Also,
Output port D (address 01H) is 7 segment LE
This is an output port of a display control signal output to the error display LED 374 which is D. The output port E (address 02H) is an output port for outputting a drive signal output to the distribution solenoid 310 and an EXS signal and a PRDY signal to the card unit 50.

FIG. 36 is an explanatory diagram showing bit assignment of input ports in this embodiment. As shown in FIG. 36, the input port A (address 06H) is an input port for receiving an 8-bit payout control signal of the payout control command output from the main board 31. Further, detection signals of the prize ball count switch 301A, the ball lending count switch 301B, and the motor position sensor are input to bits 0 to 2 of the input port B (address 07H), respectively. In bits 3 to 5, the BRDY signal, the BRQ signal, and the VL signal from the card unit 50 are input.

FIG. 37 is a flowchart showing the main processing of the payout control CPU 371. In the main processing,
The payout control CPU 371 first makes necessary initial settings. That is, the payout control CPU 371 first sets interrupt prohibition (step S701). Next, the interrupt mode is set to the interrupt mode 2 (step S702), and a stack pointer designated address is set to the stack pointer (step S703). The payout control CPU 37
1 initializes a built-in device register (step S704), and initializes CTC and PIO (step S704).
After performing step 705), the RAM is set in an accessible state (step S706).

In this embodiment, one channel of the built-in CTC is used in the timer mode. Therefore,
In the internal device register setting process in step S704 and the process in step S705, a register setting for setting a channel to be used to the timer mode, a register setting for permitting interrupt generation, and a register for setting an interrupt vector The settings are made. Then, the interruption by the channel is used as a timer interruption. When it is desired to generate a timer interrupt every 2 ms, for example, a value corresponding to 2 ms is set in a predetermined register (time constant register) as an initial value.

The interrupt vector set for the channel set in the timer mode (channel 3 in this embodiment) corresponds to the start address of the timer interrupt processing. Specifically, the start address of the timer interrupt processing is specified by the value set in the I register and the interrupt vector. In the timer interrupt process, the timer interrupt flag is set, and when it is detected in the main process that the timer interrupt flag is set, the payout control process is executed. That is, in the timer interrupt process, a setting for executing the payout control process, which is an example of the electrical component control process, is performed.

[0229] Another one of the built-in CTCs (channel 2 in this embodiment) is used as an interrupt generation channel for receiving a payout control command from the game control means. Is used in the counter mode. Therefore, in the setting processing of the internal device register in step S704 and the processing in step S705, the register setting for setting the channel to be used to the counter mode, the register setting for permitting the interrupt generation, and the interrupt vector setting are performed. Is set.

The interrupt vector set for the channel (channel 2) set to the counter mode corresponds to the head address of the command reception interrupt process described later. Specifically, the start address of the command reception interrupt processing is specified by the value set in the I register and the interrupt vector.

In this embodiment, the payout control CPU 3
At 71, the interrupt mode 2 is set. Therefore, the built-in CT
An interrupt process based on the count-up of C can be used. Further, it is possible to set an interrupt processing start address according to the interrupt vector transmitted by the CTC.

The interrupt based on the count up of the channel 2 (CH2) of the CTC is an interrupt generated when the value of the timer counter register CLK / TRG2 becomes "0". Therefore, for example, in step S705, the timer counter register C as a specific register
The initial value “1” is set in LK / TRG2. further,
The count value of the timer counter register CLK / TRG2 as a specific register is decremented by -1 at the rise or fall of the signal input to the CLK / TRG2 terminal. You can make a selection.

In this embodiment, the setting is made such that the count value of the timer counter register CLK / TRG2 is decremented by one at the rise of the signal input to the CLK / TRG2 terminal. Also, CTC channel 3 (CH
The interrupt based on the count-up of 3) is an interrupt that is generated when the internal clock (system clock) of the CPU is counted down and the register value becomes “0”, and is used as a 2 ms timer interrupt described later. In particular,
The register value of CH3 is subtracted in 1/256 cycle of the system clock. In step S705, a value corresponding to 2 ms is set as an initial value in the register of CH3.

The priority of the CTC interrupt based on the count-up of CH2 is higher than the priority of the interrupt based on the count-up of CH3. Therefore, when the count-up occurs at the same time, an interrupt based on the count-up of CH2,
That is, the interrupt that triggers the execution of the command reception interrupt process has priority.

The payout control CPU 371 checks whether backup data exists in the payout control backup RAM area (step S70).
7). That is, for example, similarly to the processing of the CPU 56 of the main board 31, it is determined whether or not backup data exists by determining whether or not the backup flag set when the power supply is stopped is in the set state. If the backup flag is set, it is determined that there is backup data.

After confirming that there is a backup, the payout control CPU 371 checks the data in the backup RAM area (parity check in this example). If the power is restored after an unexpected power supply stop, the data in the backup RAM area must have been saved, and the check result becomes normal. If the check result is not normal, since the internal state cannot be returned to the state at the time of stopping the power supply, the initialization processing executed at the time of turning on the power other than the recovery from the power failure is executed.

If the check result is normal (step S
708), the payout control CPU 371 performs a payout state restoring process for returning the internal state to the state at the time of stopping the power supply (step S709). Then, the process returns to the address indicated by the PC (program counter) stored in the backup RAM area.

In the initialization processing, the payout control CPU 371
Performs RAM clear processing first (step S71).
1). A CTC provided in the payout control CPU 371 so that a timer interrupt is periodically performed every 2 ms.
Are set (step S712). That is, a value corresponding to 2 ms is set in a predetermined register (time constant register) as an initial value. Since the interrupt is prohibited in step S701 of the initial setting process, the interrupt is permitted before the initialization process is completed (step S713).

In this embodiment, the payout control CPU 3
The built-in CTC 71 is set to repeatedly generate a timer interrupt. In this embodiment, the repetition period is 2
ms. And when a timer interrupt occurs,
As shown in FIG. 38, the payout control CPU 371 sets, for example, a timer interrupt flag indicating that a timer interrupt has occurred (step S721). FIG. 38 clearly shows that the interrupt is permitted (step S72).
0) In the 2 ms timer interrupt processing, the interrupt is first set to the permission state. That is, since the interrupt is permitted during the 2 ms timer interrupt process, the payout control command receiving process based on the input of the INT signal can be preferentially executed.

The payout control CPU 371 determines in step S7
At 24, when it is detected that the timer interrupt flag has been set, the payout control process from step S751 is executed. According to the above control, in this embodiment, the payout control process is started every 2 ms. In this embodiment, only the flag is set in the timer interrupt processing, and the payout control processing is executed in the main processing. However, the payout control processing may be executed in the timer interrupt processing.

In the payout control process, the payout control CPU
371 is the input port 37 via the relay board 72 first.
It is determined whether or not the prize ball count switch 301A and ball lending count switch 301B input to 2b are turned on (switch processing: step S751).

Next, the payout control CPU 371 performs processing such as checking the signal input state from a sensor (for example, a motor position sensor for detecting the number of revolutions of the payout motor 289) to determine the state of the sensor. Input determination processing: Step S752). The payout control CPU 371 further analyzes the received payout control command and executes processing according to the analysis result (command analysis execution processing: step S75).
3).

Next, the payout control CPU 371 sets the payout stop state if the payout stop state designation command has been received from the main board 31, and releases the payout stop state if the payout possible state designation command has been received (step S3). Step S7
54). Further, a prepaid card unit control process is performed (step S755).

Next, the payout control CPU 371 performs control to pay out the lent ball in response to the ball lending request (step S756). At this time, the payout control CPU 371 sets the ball distribution member 311 to the ball lending side by the distribution solenoid 310.

Further, the payout control CPU 371 performs a prize ball control process of paying out the prize balls of the number stored in the total number storage (step S757). At this time, the payout control CPU 371 sets the ball distribution member 311 to the winning ball side by the distribution solenoid 310. And output port 3
A drive signal is output to the payout motor 289 in the payout mechanism of the ball payout device 97 via the relay board 72c and the relay board 72, and payout motor control processing for rotating the payout motor 289 by a predetermined number of revolutions is performed (step S758). .

In this embodiment, the delivery motor 2
A stepping motor is used as 89, and a 1-2 phase excitation method is used to control them. Therefore,
Specifically, in the payout motor control processing, eight types of excitation pattern data are repeatedly output to the payout motor 289. In this embodiment, each excitation pattern data is output for 4 ms.

Next, error detection processing is performed, and a predetermined display is made on the error display LED 374 according to the result (error processing: step S759).

The output port C is accessed in the payout motor control processing (step S758) in the payout control processing. The output port D is accessed in an error process (step S759) in the payout control process.
The output port E is accessed in the ball lending control process (step S756) and the prize ball control process (step S757) in the payout control process.

FIG. 39 is an explanatory diagram showing an example of use of the RAM incorporated in the payout control CPU 371. In this example,
In the backup RAM area, a total number storage (for example, 2 bytes) and a rental ball number storage are respectively formed.
The total number storage is a counter that stores the total number of unpaid prize balls. The lent ball number storage is a counter that stores the number of unpaid lent balls.

When the payout control CPU 371 receives the payout control command indicating the number of prize balls from the game control means in the prize ball control processing (step S757), the payout control CPU 371 stores the specified number in the total number storage. Increase. In the ball lending control process (step S756), the content is increased in the lending ball number storage by one unit (for example, 25) each time a ball lending request signal is received from the card unit 50. Further, the payout control CPU 3
71 is a prize ball count switch 3 in the prize ball control processing.
When 01A detects one prize ball payout, the value of the total number storage is reduced by one, and when the ball lending count switch 301B detects one rental ball payout in the ball lending control processing, the value of the stored lending ball number storage is reduced by one.

Therefore, the number of unpaid prize balls and the number of loaned balls are equal to the number of backup RAs that can hold the contents for a predetermined period.
It will be stored in the M area. Therefore, even if an unexpected power supply stop such as a power failure occurs, if the power supply is restarted within a predetermined period, the prize ball processing and the ball lending processing stored in the backup RAM area can be continued. Therefore, the disadvantage given to the player can be reduced.

In this embodiment, the payout of game balls is executed in units of 25 balls. That is, if the total number storage or the storage of the number of balls to be lent has 25 or more number storages, the ball lending control process (step S756) and the prize ball control process (step S757) or the payout motor control process (step S758) A time for paying out 25 game balls is set, and the payout motor 289 is rotated for that time. However, if there is less than 25 pieces stored in the total number storage or the rental ball number storage,
A time for paying out the stored number of game balls is set, and the payout motor 289 is rotated by that time. When the payout stop state designation command is received from the main board 31 and the payout is stopped, the payout motor 289 for paying out the game balls does not start rotating.

FIG. 40 is an explanatory diagram showing an example of the configuration of a receiving buffer for storing the payout control command received from the main board 31. In this example, a ring buffer type receiving buffer capable of storing six payout control commands having a 2-byte configuration is used. Therefore, the reception buffer is constituted by a 12-byte area of the fixed command buffers 1 to 12. Then, a command reception number counter indicating in which area the received command is stored is used. The command reception number counter takes a value from 0 to 11.

FIG. 41 is a flowchart showing a payout control command receiving process by the interrupt process. An INT signal for payout control from the main board 31 is supplied to a payout control CPU 371.
Are input to the CLK / TRG2 terminal. Therefore, when the INT signal from the main board 31 rises, the payout control CPU 371 is interrupted, and the payout control command receiving process shown in FIG. 41 is started. The payout control CP
U371 is a CPU having a structure in which, when an interrupt occurs, a maskable interrupt does not further occur unless the interrupt is permitted by software.

Here, the command reception processing of the payout control means will be described, but the same command reception processing is executed in the display control means, the lamp control means, and the sound control means. In this embodiment, CLK /
The initialization was performed such that the value of the timer counter register CLK / TRG2 is decremented by 1 when the input of the TRG2 terminal rises, that is, the initialization was performed such that an interrupt occurs at the rise of the INT signal. CLK / TRG
When the input of two terminals falls, the timer counter register C
Initial setting may be performed such that the value of LK / TRG2 is set to −1. In other words, initialization may be performed such that an interrupt occurs at the falling edge of the INT signal. Therefore, if an interrupt is generated at the level change timing (edge) of the pulse-shaped (rectangular wave) INT signal as the capture signal, the edge may be a rising edge or a falling edge. Good.

In the payout control command receiving process, the payout control CPU 371 first saves each register in the stack (step S850). Next, the input port 3 assigned to the input of the payout control command data
72a (see FIG. 9) (step S)
851). Then, it is confirmed whether or not this is the first byte of the payout control command having the 2-byte structure (step S8).
52). Whether it is the first byte or not is confirmed by whether or not the first bit of the received command is “1”. The leading bit should be “1” in the MODE byte (first byte) of the payout control command having a 2-byte configuration (see FIG. 27). Therefore, if the first bit is “1”, the payout control CPU 371 determines that the valid first byte has been received, and stores the received command in the confirmed command buffer indicated by the command reception number counter in the reception buffer area (step S85
3).

If it is not the first byte of the payout control command, it is confirmed whether or not the first byte has already been received (step S854). Whether or not the data has already been received is confirmed based on whether or not valid data is set in the reception buffer (fixed command buffer).

If the first byte has already been received,
It is checked whether the first bit of the received 1 byte is “0”. And if the first bit is “0”,
Assuming that the valid second byte has been received, the received command is stored in the fixed command buffer indicated by the command reception number counter +1 in the reception buffer area (step S855). The first bit should be “0” in the EXT byte (second byte) of the payout control command having a 2-byte configuration (see FIG. 27).

If the confirmation result in step S854 indicates that the first byte has not been received, the first bit of the data received as the second byte is "0".
If not, the process ends. Therefore, when a command whose first bit is “1” is received as the first byte, the command is discarded without being stored in the finalized command buffer as invalid. That is, the payout control means makes a proper determination as to whether or not the command data constituting the payout control command received from the game control means is proper, and when it is determined that the command data is not proper, a fixed command buffer as a ring buffer Does not store command data.

In that case, the payout control CPU 371
Does not update the command reception number counter. That is, when the payout control means determines that the command data from the game control means is not appropriate, the payout control means does not update the data indicating the reception of new command data (the command reception number counter in this example).

When the second byte of command data is stored in step S855, 2 is added to the command reception number counter (step S856). Then, it is checked whether or not the command reception counter is 12 or more (step S857), and if it is 12, the command reception number counter is cleared (step S858). After that, the saved register is restored (step S859),
Finally, interrupt permission is set (step S859).

During the command reception interruption processing, interruption is prohibited. As described above, the interrupt is permitted during the 2 ms timer interrupt process. Therefore, if a command reception interrupt occurs during the 2 ms timer interrupt, the command reception interrupt process is executed with priority. You. Further, even if a 2 ms timer interrupt occurs during the command reception interrupt process, the interrupt process is kept waiting. As described above, in this embodiment, the processing priority of the command reception processing from the main board 31 is high. Further, since no other interrupt processing is executed during the command reception processing, the maximum time required for the command reception processing is determined. It is difficult to estimate the longest time required for the command receiving process if the configuration is such that another interrupt process can be executed during the command receiving process. Since the maximum time required for the command receiving process is determined, a period C in the command sending process of the game control means (see FIG. 29).
Can be accurately determined.

The payout control command has a 2-byte structure, and includes a first byte (MODE) and a second byte (EX).
T) is configured to be immediately distinguishable on the receiving side.
In other words, the receiving side can immediately detect whether the data as MODE or the data as EXT has been received by the first bit. Therefore, as described above, it can be easily determined whether or not appropriate data has been received.

In this embodiment, in the command reception interrupt processing, control for storing a received command in a buffer is performed. However, a command analysis execution processing (see FIG. 43) and a payout state setting processing (see FIG. 43) described later. 44) may be executed in the command reception interrupt process. As described above, when the command reception interrupt processing is executed even before the command determination processing for determining the command in the buffer, the command determination is also quickly executed.

FIG. 42 is a flowchart showing an example of the switch processing in step S751. In the switch processing, the payout control CPU 371 checks whether or not the award ball count switch 301A indicates the ON state (step S751a). If it indicates the ON state, the payout control CPU 371 increments the winning ball count switch ON counter by one (step S751b). The prize ball count switch on counter includes the prize ball count switch 30.
This is a counter for counting the number of times the 1A ON state is detected.

Then, the value of the prize ball count switch on counter is checked (step S751c), and if the value is 2, it is determined that one prize ball has been paid out. When determining that one prize ball has been paid out, the payout control CPU 371 decrements the prize ball non-payout counter (the number of prize balls stored in the total number storage) (step S751d).

If it is confirmed in step S751a that the prize ball count switch 301A is not on, the payout control CPU 371 clears the prize ball count switch on counter (step S751e). In this embodiment, the ball rental count switch 3
It is checked whether 01B indicates the ON state (step S751f). If it indicates the ON state, the payout control CPU 371 increments the ball lending count switch ON counter by one (step S751g). The ball rental count switch on counter is a ball rental count switch 301
This is a counter for counting the number of times the ON state of B is detected.

Then, the value of the ball lending count switch on counter is checked (step S751h), and if the value is 2, it is determined that one lending ball has been paid out. If it is determined that one loaned ball has been paid out, the payout control CPU 371 determines the number-of-lent-ball-unpaid-number counter (number of loaned balls stored in the number-of-lent-ball storage).
Is incremented by 1 (step S751i).

If it is determined in step S751f that the ball lending count switch 301B is not on, the payout control CPU 371 clears the ball lending count switch on counter (step S751j).

FIG. 43 is a flowchart showing an example of the command analysis execution processing in step S753. In the command analysis execution processing, the payout control CPU 371
It is checked whether there is a received command in the confirmed command buffer area (step S753a). If there is a received command, it is confirmed whether or not the received payout control command is a payout control command for specifying the number of winning balls (step S753b). The payout control CPU 37
1 makes a determination in step S753b on the received command stored at the address in the confirmed command buffer area pointed to by the read pointer as the control signal indicating means. After the determination, the value of the read pointer is incremented by one. If the address pointed to by the read pointer exceeds the address of the fixed command buffer 12 (see FIG. 40), the value of the read pointer is updated to point to the fixed command buffer 1.

If the received payout control command is a payout control command for specifying the number of prize balls, the number specified by the payout control command is added to the total number storage (step S753c). That is, the payout control CPU 371
Stores the number of prize balls included in the payout control command sent from the CPU 56 of the main board 31 in the backup RAM area (total number storage).

It is to be noted that the payout control CPU 371 performs the reception command shift processing in the command reception number counter and the confirmed command buffer area if necessary.

FIG. 44 is a flowchart showing an example of the payout stop state setting process in step S754. In the payout stop state setting process, the payout control CPU 371
First, it is checked whether the wait counter is operating (step S801). As the weight counter, for example, a predetermined area of the RAM is used. Dispensing control CP
U371 determines that the operation is in progress if the value of the wait counter is not 0, for example.

If the wait counter is not operating, it is confirmed whether or not there is a received command in the confirmed command buffer area (step S802). If there is a received command in the confirmed command buffer area, it is checked whether the received payout control command is a payout stop state designation command (step S803). If the command is the payout stop state designation command, the payout control CPU 371 sets the payout stop state (step S804).

If it is determined in step S803 that the received command is not a payout stop state designation command, it is checked whether the received payout control command is a payout possible state designation command (step S806). If the command is a payable state designation command, a predetermined initial value (binary 1001 in this example) is set in the weight counter (step S806).

If it is confirmed in step S801 that the wait counter is operating, the payout control CP
U371 decrements the value of the weight counter (step S810), and when the value of the weight counter becomes 0 (step S811), cancels the payout stop state (step S812). When the payout stop state is released, the rotation of the payout motor 289 for paying out the game balls can be restarted.

With the above control, when the payout possible state designation command is received in the payout stop state, the payout stop state is not immediately released and the payout processing is restarted, but the payout processing is restarted. After a corresponding wait time, the payout suspension state is released and the payout process is restarted. For example, a ball out switch 187
It is conceivable that a sufficient amount of game balls has not yet been replenished in the replenishment path for game balls even when the game ball is switched from the on state to the off state. The time required for replenishment is secured. Therefore, when the payout process is restarted, the payout of the game balls is started smoothly. The payout state setting process is 2m
Since the processing is executed every s, the wait counter is set to 1001 (D) as an initial value, so that the payout process can be resumed after the elapse of the wait time of 2002 ms from the reception of the payout possible state designation command. However, the wait time may be set to another value according to the difference in the structure of the gaming machine.

In the case where the payout control command is outputted from the game control means for each cause of stop and restart of the payout, the step is executed only when the payout control command indicating the elimination of running out of balls is received. The processing of S806 may be executed. That is, the wait time may be set only when the out-of-ball condition is resolved.

FIG. 45 is a flowchart showing an example of the prepaid card unit control processing in step S755. In the prepaid card unit control process, the payout control CPU 371 checks whether or not the VL signal input from the card unit control microcomputer has been detected (step S755a). If the VL signal has not been detected, the VL signal non-detection counter is incremented by 1 (step S755b). The payout control CPU 37
1 checks whether the value of the VL signal non-detection counter is 125 in this example (step S755c). If the value of the VL signal non-detection counter is 125, the payout control CP
U371 stops the emission control signal output to the emission control board 91 and stops the drive motor 94 (step S7).
55d).

By the above processing, 125 times (2 ms ×
(125 = 250 ms) If the OFF of the VL signal is detected continuously, the state is set to the ball firing prohibited state.

If the VL signal has been detected in step S755a, the payout control CPU 371 clears the VL signal non-detection counter (step S755e). If the output of the firing control signal has been stopped (step S755f), the payout control CPU 371 starts outputting the firing control signal to the firing control board 91 to make the drive motor 94 operable (step S755g). .

FIGS. 46 and 47 show steps S756 and S756.
It is a flowchart which shows an example of the ball lending control process.
In this embodiment, the maximum value of the number of consecutive payouts is one unit of the lending ball (for example, 25), but the maximum value of the number of consecutive payouts may be another number.

In the ball lending control process, the payout control CP
The U371 confirms whether or not the lending ball is being paid out (step S511). If the lending ball is being paid out, the process shifts to a ball lending process shown in FIG. Whether or not the ball is being paid out is determined based on the state of a ball lending process flag described later. If the ball is not being paid out, it is confirmed whether or not the prize ball is being paid out (step S512). Whether or not a prize ball is being paid out is determined by the state of a prize ball processing flag described later.

[0284] If neither a loaned ball is being paid out nor a prize ball is being paid out, the payout control CPU 371 checks whether or not a ball lending request has been issued from the card unit 50 (step S5).
13). If there is a request, the ball lending process flag is turned on (step S514), and 25 (the number of ball lending units: 100 yen here) is set in the lending ball number storage in the backup RAM area (step S515). Then, the payout control CPU 371 turns on the EXS signal (step S516). Further, the distributing solenoid 310 is driven to set the ball distributing member 311 below the ball dispensing device 97 to the ball lending side (step S517). Further, the payout motor 289 is turned on (step S51).
8) Then, the processing shifts to the ball lending process shown in FIG. However, in the payout stop state, the execution of the process of turning on the payout motor 289 is waited until the payout stop state is released.

[0285] Turning on the payout motor 289
Strictly speaking, the BRQ signal is turned off to indicate that the card unit 50 has recognized the reception. Further, the ball lending process flag is set in the backup RAM area.

FIG. 47 is a flowchart showing processing during lending a ball in the payout control processing by the payout control CPU 371. In the ball lending process, if the payout motor 289 is not on, it is turned on. In this embodiment,
In the switch processing in step S751, it is checked whether or not the game balls have been paid out based on the detection output of the ball lending count switch 301B. Therefore, in the ball lending control processing, the subtraction of the storage of the number of lending balls is not performed. In the ball lending control process, the payout control CPU 371 confirms whether or not the ball lending pass time is being passed (step S519). If it is not during the lending ball passage waiting time, the lending ball is paid out (step S520), and it is determined whether or not the driving of the payout motor 289 should be terminated (whether one unit of the dispensing operation has been completed) (step S521). ). Specifically, it is confirmed whether or not the rotation corresponding to the predetermined number of payouts has been completed. When the rotation corresponding to the predetermined number of payouts is completed, the payout control CPU 371 stops driving the payout motor 289 (step S522), and sets a rental ball passage waiting time (step S523).

In the ball lending process in step S520, the on / off state of the payout motor position sensor is monitored by a timer. If the on state or the off state continues for a predetermined time or more, the payout control CPU 371 sets the payout motor It is determined that a ball biting error has occurred.

If it is determined in step S519 that the waiting time for passing a lent ball is present, the payout control CPU 371 checks whether the waiting time for passing a lent ball has ended (step S52).
4). The lending ball passing waiting time is the time from when the last payout ball is paid out by the payout motor 289 to when it passes through the ball lending count switch 301B. When confirming the end of the waiting time for passing a lending ball, since all lending balls for lending have been paid out, it is necessary to indicate to the card unit 50 that the next lending ball lending request can be accepted. The EXS signal is turned off (step S525). In addition, the distribution solenoid is turned off (step S5).
26), the ball lending processing flag is turned off (step S5)
27). If the last payout ball has not passed through the ball lending count switch 301B before the passage of the ball lending wait time, a ball lending path error is determined. Also,
In this embodiment, the prize ball and the ball lending are performed by the same payout device.

After the EXS signal indicating acceptance of the ball lending request is turned off and the BRQ signal which is the ball lending request signal is turned on again within a predetermined period, the ball lending without turning off the sorting solenoid and the payout motor is performed. The processing may be continued. That is, a predetermined unit (100 yen unit in this example)
Instead of performing the ball lending process every time, the ball lending process may be performed continuously.

[0290] The contents of the stored number of lent balls are retained by the backup power supply of the power supply board 910 for a predetermined period even if the power of the gaming machine is turned off. Therefore, when the power is restored during the predetermined period, the payout control CPU 371 can continue the ball lending process based on the contents of the lending ball number storage.

FIGS. 48 and 49 show steps S757.
It is a flowchart which shows an example of the award ball control processing. In this example, the maximum value of the number of continuous payouts is the same as one unit of the lending ball (for example, 25), but the maximum value of the number of continuous payouts may be another number.

In the prize ball control processing, the payout control CPU
The 371 checks whether or not the rental ball is being paid out (step S531). Whether or not the ball is being paid out is determined based on the state of the ball lending process flag. If the ball is not being paid out, it is confirmed whether or not the prize ball is being paid out (step S).
532) If the prize ball is being paid out, the processing shifts to the processing during the prize ball shown in FIG. Whether or not a prize ball is being paid out is determined by a state of a prize ball processing flag described later.

If neither a loaned ball is being paid out nor a prize ball is being paid out, the payout control CPU 371 checks whether there is a ball lending preparation request from the card unit 50 (step S).
533). Whether or not there is a ball lending preparation request is performed by confirming whether the BRDY signal input from the card unit 50 is on (requested) or off (no request).

If there is no ball lending preparation request from the card unit 50, the payout control CPU 371 checks whether or not the number of prize balls (the number of unpaid prize balls) stored in the total number memory is not zero (see FIG. 4). Step S534). If the number of award balls stored in the total number memory is not 0, the award ball control CP
U371 turns on the award ball processing flag (step S5).
35) It is checked whether or not the value of the total number storage is 25 or more (step S536). The award ball processing flag is set in the backup RAM area.

The number of prize balls stored in the total number storage is 2
If it is 5 or more, the payout control CPU 371 sets a 25 payout operation to output a drive signal to the payout motor 289 so as to rotate the payout motor 289 until 25 game balls are paid out. (For example, setting of the time required for dispensing 25 pieces or dispensing motor 2 according to the dispensing of 25 pieces)
The setting of the number of steps to be given to 89 is performed (step S537). If the number of prize balls stored in the total number memory is not 25 or more, the payout control CPU 371 drives the payout motor 289 to rotate the payout motor 289 until all game balls stored in the total number memory are paid out. Is set (for example, setting of the time required for the payout of the number or the number of steps to be given to the payout motor 289 in accordance with the payout of the number) (step S538). ). Next, the payout motor 289 is turned on (step S538). However, in the payout stop state, the execution of the process of turning on the payout motor 289 is waited until the payout stop state is released. Since the distribution solenoid is off, the ball distribution member below the ball payout device 97 is set to the winning ball side. Then, the processing shifts to a processing during payout of prize balls in a prize ball control processing shown in FIG.

FIG. 49 is a flowchart showing an example of processing during a winning ball in the payout control processing by the payout control CPU 371. In the prize ball control processing, the payout motor 289
Turn on if is not on. In the present embodiment, in the switch processing of step S751, it is determined whether or not the payout of the game ball has been performed based on the detection output of the prize ball count switch 301A. Is not done. In the processing during the prize ball, the payout control CPU 371 checks whether or not the prize ball passage waiting time is in progress (step S540). If it is not during the waiting time for passing a prize ball, a prize ball is paid out (step S
541), should the drive of the payout motor 289 be terminated (2
It is determined whether or not a predetermined number of payout operations of 5 or less than 25 have been completed (step S542). Specifically, it is confirmed whether or not the rotation corresponding to the predetermined number of payouts has been completed. When the rotation corresponding to the predetermined number of payouts is completed, the payout control CPU 371 sets the payout motor 289
Is stopped (step S543), and the waiting time for passing the winning ball is set (step S544). The prize ball passing waiting time is a time from when the last payout ball is paid out by the payout motor 289 to when it passes through the prize ball count switch 301A.

If it is determined in step S540 that the waiting time for passing a prize ball is in progress, the payout control CPU 371 checks whether or not the waiting time for passing a prize ball has ended (step S545).
The time point when the waiting time for passing the prize ball ends is determined in step S537
Alternatively, all the prize balls set in step S538 have been paid out. Therefore, the payout control CPU 371
Turns off the award ball processing flag if the award ball passage waiting time has expired (step S546). If the last payout ball has not passed through the prize ball count switch 301A before the prize ball passage waiting time has elapsed, it is determined that a prize ball path error has occurred.

Note that, in this embodiment, step S5
11. Although the ball lending is given priority over the prize ball processing by the determination in step S531, the prize ball processing may be given priority over the ball lending.

The contents of the total number storage and the number of lent balls storage are retained by the backup power supply of the power supply board 910 for a predetermined period even if the power supply to the gaming machine is cut off. Therefore, when the power supply is restored during the predetermined period, the payout control CPU
371 can continue payout processing based on the contents of the total number storage.

The payout control CPU 371 manages the number of prize balls instructed from the main board 31 as the total number in the prize ball number storage, but for each prize ball number (for example, 15, 10 or 6).
). For example, a number counter corresponding to each prize ball number is provided, and when a payout number designation command is received, the number counter corresponding to the number designated by the command is incremented by one. When the prize ball payout corresponding to the number counter is performed, the number counter is decremented by one (in this case, the subtraction processing is performed in the payout control processing).
Also in this case, each number counter is formed in the backup RAM area. Therefore, even if the power of the gaming machine is turned off, if the power is restored during the predetermined period, the payout control CPU 371
Can continue the award ball payout process based on the content of each number counter.

As described above, in this embodiment, when the front door 200 is opened, the game control means mounted on the main board 31 detects the fact via the door switch 96. Then, the game control means sends a payout control command for stopping the payout processing to the payout control board 3.
7 is output. When receiving the payout control command for stopping the payout process, the payout control means mounted on the payout control board 37 performs control to stop the game ball payout from the ball payout device 97. Therefore, when the front door 200 is opened, the game balls paid out from the ball payout device 97 are prevented from falling out.

Further, in this embodiment, after the game control means for controlling the overall progress of the game recognizes that the front door 200 has been opened, it instructs the payout control means to stop the payout processing. Therefore, the payout of the game balls does not stop before the game control means knows, and there is no hindrance to the progress of the game.

[0303] The payout control means is provided with an I
Upon detecting that the NT signal has risen, the process of capturing 1-byte data is started by, for example, an interrupt process. Since a receiving ring buffer area (in this example, a fixed command buffer) capable of storing a plurality of payout control commands is provided, the next payout control command is received, and the next payout is performed before control based on the command is started. Even if a control command is received,
It does not mean that it is not received by the payout control means.

As shown in the flow charts of FIGS. 21 to 24, the game control means is configured to be able to execute the command setting process of step S231 even in the payout stop state (step S181). Have been.
Therefore, even when the payout is stopped, a payout control command indicating the number of payouts is output to the payout control means when a prize is detected.

The payout control means starts the interrupt processing even when the payout is stopped, so that the payout control means can receive the payout control command even when the payout is stopped. And while the payout is stopped, the payout process according to the received payout control command is stopped, but since a receiving ring buffer area (fixed command buffer) capable of storing a plurality of payout control commands is provided,
The payout control command output from the game control means does not disappear in the payout control means. Even if the payout is stopped, the activation of the command analysis execution processing shown in FIG. 43 is not prohibited, so that the content of the total number storage is updated based on the data indicating the number of winning balls in the confirmed command buffer. .

In the payout control means, a command reception number counter is used as address indicating means for indicating in which area of the receiving ring buffer area (in this example, the fixed command buffer) the output command is to be stored. Therefore, it is easy to determine which area should be used.

[0307] Also in the game control means, data capable of specifying a transmission command is stored in a buffer of a ring buffer format (see FIG. 27C). However, FIG.
As shown in the flowcharts of FIGS. 1 to 24, as for the payout control command, the payout control command indicating the number of winning balls is stored in a buffer of a ring buffer format (steps S126, S135, S225), but the payout is stopped. The payout control command relating to the designation and the payout control command relating to the designation of the payable state are not stored in the buffer of the ring buffer format. When the payout control command indicating the number of winning balls is stored in the buffer of the ring buffer format, only the command data related to the number of winning balls corresponding to the EXT data is stored. In this embodiment, the MODE data is “F0” regardless of the number of award balls.
(H) "(see FIG. 30), the command transmission control does not become complicated even if only the prize ball number corresponding to the EXT data is stored.

In the flowcharts of FIGS. 21 to 24, the check on the payout stop state is executed before the check on the switch on the winning opening.
Within one processing period of ms, the payout control command related to the payout stop state designation and the payout control command related to the payable state designation are output with priority. That is, an important control signal, such as a signal for instructing the operation stop / restart of the electric component, whose processing based on the signal is preferably started earlier is transmitted earlier within one control period. In addition,
The payout control command related to the payout stop state designation and the payout control command related to the payable state designation may be stored in a buffer of a ring buffer format similarly to the payout control command indicating the number of winning balls. Even with such a configuration, if the check on the payout stop state is executed before the check on the winning opening switch, the payout control command on the payout stop state designation and the payout control command on the payable state designation are output with priority. Is done.

Further, within one processing period of 2 ms, a payout control command for specifying the payout stop state or a payout control command for specifying the payable state and a payout control command for specifying the number of winning balls are both sent to the payout control board 37. Output is enabled. That is, it is possible to output a payout control command within one processing period for a plurality of controls having different occurrence factors (in this example, control related to payout stop and control related to winning ball payout). As shown in the flowcharts shown in FIGS. 21 to 24, only one payout control command for designating the number of winning balls can be output within one processing period.

Further, as an example of control different from the control relating to the stoppage of payout and the control relating to the payout of award balls, the cause of occurrence is different.
Error detection control, ball clogging detection control by game control means, and other control related to the ball payout device 97 may be performed. When those controls are also performed, the game control means,
If each control is configured to be able to output one payout control command (for example, a command indicating occurrence of an error, a command indicating release of clogged ball) within one processing period,
Again, a plurality of payout control commands (each having a different occurrence factor) can be output within one processing period.

As described above, the game control means notifies the payout stop to the payout control means by one type of command (payout stop state designation command). Alternatively, the payout stop may be notified to the payout control means by a different payout control command.

[0312] Further, in the game control means, a pointer (read pointer) is used as an address instructing means for indicating which area of the ring buffer format data is to be used. Therefore, it is easy to determine which area data is used to output the control command.

[0313] Further, in a gaming machine in which a game is played in accordance with an operation of a player and a game medium is paid out, a game control means for controlling the progress of the game is provided by a payout control means for controlling a payout device. When the game control means detects that the payout can be resumed in the payout stop state when the payout is stopped and restarted by the command, the payout is performed after a predetermined wait time. Is output to the payout control means for instructing the resumption of the payment (see FIG. 22).

Further, when receiving the command for instructing the resumption of the payout, the payout control means restarts the payout processing after a predetermined wait time (see FIG. 44). Therefore, as shown in FIG. 50, after the game control means detects that the payout is enabled, the time of the sum of the wait time created by the game control means and the wait time created by the payout control means elapses. Then, the payout of the game medium from the payout device is restarted.

For example, when the shortage of the game medium is detected in the game medium supply path provided at the upper part of the payout apparatus, the payout is stopped, and thereafter, the state is returned to the state where the payout is possible. Since it is conceivable that the supply of the game medium to the payout device is not sufficient, if the payout process is restarted immediately, there is a possibility that a situation in which the payout cannot be performed again may occur.

However, if a wait time is provided as in the above embodiment, a sufficient amount of game media is supplied to the payout device when the payout from the payout device is resumed. Such inconvenience does not occur.

In the above embodiment, since the payout control means also creates the wait time, it is possible to prevent the game control means from consuming memory. In other words, in order to create a wait time, it is common to form a software counter using a memory and create the wait time using the counter. The memory area increases. However, if the payout control means is configured to create the wait time as in the above embodiment, the capacity of the memory in the game control means for creating the wait time can be reduced. This is also true for the payout control means.

By the way, in the above embodiment, when the door switch 96 and the full switch 48 are provided independently, the detection signal of the door switch 96 is input to the main board 31 independently. Alternatively, a signal corresponding to the logical sum of the detection signal and the detection signal of another switch may be input to the main board 31. FIG. 51A shows how the detection signal of the door switch 96 is independently input to the main board 31, and FIG. 51B shows the logic of the detection signal of the door switch 96 and the detection signal of the full switch 48. The state where a signal corresponding to the sum is input to the main substrate 31 is shown. That is,
An open signal of the detecting means for detecting the opening of the front opening member and a detection signal of the full tank switch 48 which is an example of a detecting means for detecting a predetermined storage state of the game medium are input to the game control means as one detection signal. You.

In the configuration as illustrated in FIG.
The input port assignment is as shown in FIG. That is, the input port is reduced by one bit as compared with the example shown in FIG. The switch processing executed by the CPU 56 of the main board 31 is as shown in the flowchart of FIG. In the process shown in FIG. 53, the number of processes “5” is set in step S76 in the process shown in FIG. 19, whereas the number of processes “4” is set in step S76A. The other processing is the same as the processing shown in FIG. Since "4" is set as the number of processes, the number of calls of the switch check process routine (step S78) is reduced. That is, the processing time of the switch processing is shortened.

A part of the winning ball processing executed by the CPU 56 of the main board 31 is as shown in the flowcharts of FIGS. 54 and 55. That is, in the prize ball processing shown in FIGS. 21 to 24, the processing for detecting the opening of the door switch 96 in steps S161 to S165 is executed, but in this embodiment, such processing is performed. No processing is required. Further, in the prize ball processing shown in FIGS. 21 to 24, steps S182 and S185
, The door open flag is also checked, but in this embodiment, such a check is unnecessary. Therefore, the processing time of the prize ball processing is shortened. Also,
Since the door open flag is not required, RAM consumption is also reduced. Other processes in the prize ball process are shown in FIGS.
Is the same as the processing in the prize ball processing shown in FIG.

In this embodiment, a signal corresponding to the logical sum of the detection signal of the door switch 96 and the detection signal of the full tank switch 48 is used. The detection signal of the door switch 96 and the detection signal of the ball out switch 187 may be connected so that a signal corresponding to the logical sum of the detection signal of the switch 187 and the detection signal of the switch 187 is used.

The pachinko gaming machine 1 according to each of the above-described embodiments mainly uses the variable display section 9 based on the start winning.
Is a first-class pachinko gaming machine in which a predetermined game value can be given to a player when a stop symbol of a special symbol variably displayed becomes a predetermined symbol combination. A second-type pachinko gaming machine in which a predetermined game value can be given to a player when there is a prize in a predetermined area of an object, and a stop symbol of a symbol variably displayed based on a start prize is a combination of a predetermined symbol. The present invention can be applied to a third-type pachinko gaming machine in which a predetermined right is generated or continued when a prize for a predetermined electric accessory to be opened is obtained.

Further, the present invention is not limited to the pachinko game machine in which the game medium is a game ball, and the present invention can be applied to a slot machine or the like if an electric component for paying out the game medium is provided.

FIG. 56 is a front view of the front door of one example of the slot machine as viewed from the front. As shown in FIG. 56, in the slot machine 500, a game panel 501 corresponding to a game board of the pachinko game machine 1 is detachably mounted near the center. Also, near the center of the game panel 501,
A variable display area 502 for variably displaying a plurality of types of symbols is provided. On the left side of the variable display area 502, a single bet lamp 503, a double bet lamp 504, and a triple bet lamp 505 are provided. On the right side of the variable display area 502, a game over lamp 506, a replay lamp 507, a weight lamp 508, a start lamp 509, and a medal insertion instruction lamp 510 are provided.

Below the variable display area 502 are provided a 7-segment LED credit indicator 511, a 7-segment LED game count indicator 512, and a 7-segment LED payout indicator 513. In this embodiment, the variable display area 502 includes
There are three symbol display areas, "left", "middle", and "right", and symbol display reels 514a, 514b, 514c are provided corresponding to the respective symbol display areas.

An operation table 520 provided with various input switches for the player to perform various operations is provided below the game panel 501. Operation table 5
BET switch 521 for betting (betting) coins one by one on the back side of 20, and BET coins by the maximum number (for example, three) that can be bet in one game
A MAXBET switch 522, a settlement switch 523, and a coin insertion slot 524 are provided.
The coin inserted into the coin insertion slot 524 is detected by an inserted coin sensor (not shown). In this example,
Each time a coin is inserted from the coin insertion slot 524, the numerical value displayed on the credit indicator 511 is increased by one, for example, up to 50 coins. Then, each time the BET switch 521 is pressed and one coin is bet, the numerical value displayed on the credit indicator 511 is reduced by one. In addition, every time the MAXBET switch 522 is pressed and three coins are bet, the numerical value displayed on the credit indicator 511 is reduced by three.

On the front side of the operation table 520, a start switch 525, a left reel stop switch 526
a, a middle reel stop switch 526b, a right reel stop switch 526c, and a coin jam clearing switch 527 are provided. Lamps 528a and 528b are provided on the left and right sides of the operation table 520, respectively. A title panel 530 that is detachably attached is provided below the operation table 520. On the title panel 530, the model name of the slot machine is drawn. A speaker 531 for outputting a sound effect or the like is provided below the title panel 530.
Further, a coin storage plate 532 is provided below the title panel 530 to store more coins than the number that can be stored internally (for example, 50).

At the top of the game panel 501, there is provided a panel 540 which is detachably attached. In the vicinity of the center of the panel 540, an LCD (liquid crystal display) 541 for notifying a player of a game method, a game state, and the like is provided. For example, when a winning occurs, an image in which the character performs a predetermined operation is displayed on the LCD 541 to notify the player that a winning flag described later is set. On the upper part of the panel 540, lamps 542, 543, and 544 for notifying various information are provided. In addition, on the left and right sides outside the panel 540, two sound effects are emitted.
Two speakers 545a and 545b are provided. Further, game effect lamps 550, 551, 552, 553 are provided around the outside of the game panel 501.

FIG. 57 is a front view of the gaming frame (housing) of the slot machine as viewed from the front. FIG. 58 is a back view of the front door of the slot machine as viewed from the back. As shown in FIG. 57, a coin payout device 580 that pays out coins to a coin payout exit 581 is provided at a lower portion of the housing. Further, as shown in FIG. 58, a see-through panel 501A is provided at the center of the front door. In addition, the transparent panel 50
A coin exit 582 is provided slightly below 1A to the coin payout device 580, and a payout coin inlet 584 into which coins from the coin payout device 580 flow is provided in the middle of a coin passage 583 leading to the coin storage tray 532. ing.

In such a gaming machine, payout control means for controlling the coin payout device 580 is provided separately from game control means such as a game control CPU for controlling the progress of the game. In a case where the coin payout device 580 is controlled in accordance with a command from the control means to pay out a predetermined number of coins,
The present invention can be applied. That is, a detection means such as a door switch capable of outputting an opening signal indicating the opening of the front door is provided, an output of the detection means is input to the game control means, and a coin from the coin payout device 580 is input in response to the input of the opening signal. A payout stop command is output to the payout control means as a control signal for instructing the payout to stop.

When the payout control means receives the payout stop command, it stops paying out coins from the coin payout device 580. As a result, coins as game media are prevented from spilling out of the gaming machine.

Even if the payout control means is not provided separately and the game control means is configured to directly control the coin payout device 580, the game control means may be operated in response to an opening signal indicating opening of the front door. The payout of coins may be stopped. Alternatively, an opening signal indicating the opening of the front door may be input to the power supply board, and the power supply to the payout drive motor may be stopped according to the opening signal. Further, an opening signal indicating the opening of the front door may be used as an error cancellation signal. In other words, after the coin has run out and the payout has stopped, the game clerk or the like opens the door and refills the coin,
The payout and the game may be restarted by recognizing that the error has been released by closing the door.

[0333]

According to the first aspect of the present invention, a predetermined signal is input to the game control means in response to the detection of the opening of the front opening member by the detection means.
A payout prohibition signal for prohibiting the payout of the game medium from the payout device in response to the input of the predetermined signal is transmitted to the payout control means, and the payout control means responds to the payout prohibition signal by the payout device. Since the payout is prohibited so that the payout is not executed, the payout of the game medium does not stop without the processing by the game control means, and the state of the gaming machine is managed by the game control means. In addition, when the front opening member is opened, the payout of the game medium is stopped when the front opening member is opened, so that when the work related to the opening of the front opening member is performed by a game clerk or the like, the payout of the game medium is continued. The troublesomeness can be eliminated.

In the invention according to claim 2, the payout control means outputs a payout number signal, which specifies the number of game media to be paid out, transmitted from the game control means in response to satisfaction of the payout condition, in a payout prohibited state. Since it is configured to be able to receive even the data indicating the number of payouts during the stoppage of payout does not stay in the game control means,
The burden on the storage area of the game control means can be reduced.

In the invention according to claim 3, since the payout control means is configured to update the counter capable of specifying the total number of unpaid game media based on the received payout number signal, the payout is stopped. The data indicating the number of payouts does not stay in the game control means, and the load on the storage area of the game control means can be reduced. Further, the payout number command received by the payout control means during the stoppage of the payout is not left unprocessed and is not overwritten by the next received payout number command or the like, so that reliable payout control is realized.

In the invention according to claim 4, since the game control means is configured to execute transmission of the payout prohibition signal prior to transmission of the payout number signal, it is important to determine whether or not payout is possible. Information can be notified to the dispensing control means early, and the operation of the dispensing device can be stopped early when an abnormality occurs, or the operation of the dispensing device can be restarted early when the abnormality is resolved.

In the invention according to claim 5, the game control means has a transmission data storage area capable of storing a plurality of command data at the same time, and stores the command data to be transmitted to the payout control means in the transmission data storage area. Since the control signal for controlling the payout device can be easily processed, even if the output timing of the control signal is simultaneously generated in the game control means, the command data relating to the control signal is generated. Is prevented from being erased before output.

[0338] According to the sixth aspect of the present invention, since the game control means is configured to store the command data indicating the number of game media to be paid out in the transmission data storage area, the game media generated frequently. The command data indicating the number can be easily processed, and the game control means can prevent the command data that can specify the number of game media to be paid out from being erased before output. In particular, even if the game control means simultaneously generates the output timing of the control signal indicating the number of payouts, it is possible to prevent the command data related to the control signal from being erased before output.

According to the seventh aspect of the present invention, since the payout control means is configured to release the payout prohibition state after a lapse of a predetermined period after receiving the payout prohibition release signal, the abnormality can be surely resolved. Payment is resumed from. In particular, since the predetermined period is set in the payout control means, the load on the game control means for restarting the payout after the abnormality is surely resolved is reduced.

[0340] In the invention described in claim 8, the payout control means includes:
It has a reception data storage area capable of storing a plurality of command data from the game control means at the same time, and is configured to store the received command data in the reception data storage area. Is delayed, since the command data is stored in the reception data storage area, the command data can be reliably recognized.

According to the ninth aspect of the present invention, the payout control means determines whether or not the command data from the game control means is proper, and if not, stores the received command data in the received data. Since it is configured not to be stored in the area, it is prevented that the payout control is performed based on an inappropriate control signal, and more accurate payout control is realized.

According to the tenth aspect, when the payout control means determines that the command data from the game control means is not appropriate, the payout control means does not update the data indicating the reception of new command data. Therefore, it is prevented that incorrect command data is left in the data storage area due to the reception of inappropriate command data, for example, and more reliable payout control is realized.

According to the eleventh aspect of the present invention, a storage portion capable of storing the game medium paid out from the payout device, and a detecting means capable of detecting that the storage state of the game medium in the storage portion has reached a predetermined state. And a signal according to the opening of the front opening member and a signal according to the detection of the predetermined state are configured to be input to the game control means as a common signal. For example, the predetermined processing of the payout prohibition processing can be performed based on the input signal, and the load on the game control means accompanying the signal input processing can be reduced. Further, it is not necessary to add an input unit for signal input on the board on which the game control means is mounted.

According to the twelfth aspect of the invention, the storage operation member that operates according to the storage state of the game medium in the storage section, the opening / closing operation member that operates according to the opening / closing of the front opening member, and the opening / closing operation member operating A connection member for operating the storage operation member in response to the detection signal, and the detection means is configured to output a predetermined signal when the operation of the storage operation member is detected. For example, the predetermined process of the payout stop process can be performed based on the two input signals, and the load on the game control means accompanying the signal input process can be reduced. In addition, it is possible to detect the storage state of the game medium and the open / close state of the front opening member with one mechanism, and it is not necessary to add an input unit for signal input on the board on which the game control means is mounted. There is also the effect of being good.

[0345] According to the thirteenth aspect of the present invention, the gaming machine has a firing mechanism for firing the game medium toward the game area, and a guiding storage portion capable of guiding the game medium paid out by the payout device toward the firing mechanism. However, since the front opening member includes the guidance storage section, it is possible to prevent a large amount of game media from being scattered outside the gaming machine when the guidance storage section is opened.

[Brief description of the drawings]

FIG. 1 is a front view of a pachinko gaming machine viewed from the front.

FIG. 2 is an explanatory view showing each substrate provided on the back surface of the pachinko gaming machine.

FIG. 3 is a rear view of the mechanical panel of the pachinko gaming machine as viewed from the rear.

FIG. 4 is a front view showing a configuration around an intermediate base unit installed on a mechanism plate.

FIG. 5 is an exploded perspective view showing a ball payout device.

FIG. 6 is a perspective view showing an example of a pachinko gaming machine with a frame base and a front door opened.

FIG. 7 is an explanatory diagram illustrating a configuration example of a door switch and an operation thereof.

FIG. 8 is a block diagram showing a circuit configuration of a game control board (main board).

FIG. 9 is a block diagram showing components related to a prize ball, such as components of a payout control board and a ball payout device.

FIG. 10 is a block diagram illustrating a configuration example of a power supply board.

FIG. 11 is a block diagram illustrating a configuration example around a CPU on a main board.

FIG. 12 is an explanatory diagram showing an example of bit assignment of an output port.

FIG. 13 is an explanatory diagram showing an example of bit assignment of an output port.

FIG. 14 is an explanatory diagram showing an example of bit assignment of an input port.

FIG. 15 is a flowchart illustrating a main process executed by a CPU on a main board.

FIG. 16 is an explanatory diagram showing an example of a relationship between a backup flag and whether or not to execute a game state restoration process.

FIG. 17 is a flowchart showing a 2 ms timer interrupt process.

FIG. 18 is an explanatory diagram showing an example of forming a switch timer in a RAM.

FIG. 19 is a flowchart illustrating an example of a switch process.

FIG. 20 is a flowchart illustrating an example of a switch check process.

FIG. 21 is a flowchart illustrating an example of a prize ball process.

FIG. 22 is a flowchart illustrating an example of a prize ball process.

FIG. 23 is a flowchart illustrating an example of a prize ball process.

FIG. 24 is a flowchart illustrating an example of a prize ball process.

FIG. 25 is a flowchart showing a switch-on check process.

FIG. 26 is an explanatory diagram showing a configuration example of an input determination value table.

FIG. 27 is an explanatory diagram illustrating a configuration example of a command transmission buffer.

FIG. 28 is an explanatory diagram illustrating an example of a command form of a control command.

FIG. 29 is a timing chart showing a relationship between an 8-bit control signal and an INT signal which constitute a control command.

FIG. 30 is an explanatory diagram showing an example of the content of a payout control command.

FIG. 31 is a flowchart illustrating an example of a command set process;

FIG. 32 is a flowchart showing a command transmission processing routine.

FIG. 33 is a flowchart illustrating an example of a winning ball number subtraction process.

FIG. 34 is a block diagram illustrating a configuration example around a payout control CPU for power supply monitoring and power supply backup.

FIG. 35 is an explanatory diagram showing an example of bit assignment of an output port.

FIG. 36 is an explanatory diagram showing an example of bit assignment of an input port.

FIG. 37 is a flowchart showing a main process executed by a CPU in a payout control board.

FIG. 38 is a flowchart showing a 2 ms timer interrupt process.

FIG. 39 is an explanatory diagram showing one configuration example of a RAM in the payout control means.

FIG. 40 is an explanatory diagram showing a configuration example of a reception buffer.

FIG. 41 is a flowchart illustrating an example of a command receiving process of a payout control CPU.

FIG. 42 is a flowchart illustrating an example of a switch process.

FIG. 43 is a flowchart illustrating an example of a command analysis execution process.

FIG. 44 is a flowchart illustrating an example of a payout stop state setting process.

FIG. 45 is a flowchart illustrating an example of a prepaid card unit control process.

FIG. 46 is a flowchart illustrating an example of a ball lending control process.

FIG. 47 is a flowchart illustrating an example of a ball lending control process.

FIG. 48 is a flowchart illustrating an example of a winning ball control process.

FIG. 49 is a flowchart illustrating an example of a winning ball control process.

FIG. 50 is a timing chart showing an example of a wait time created by the game control means and the payout control means.

FIG. 51 is a block diagram for explaining another embodiment.

FIG. 52 is an explanatory diagram showing an example of bit assignment of an input port in another embodiment.

FIG. 53 is a flowchart showing a switch process in another embodiment.

FIG. 54 is a flowchart showing a prize ball process in another embodiment.

FIG. 55 is a flowchart showing a prize ball process in another embodiment.

FIG. 56 is a front view of the slot machine as viewed from the front.

FIG. 57 is a front view of the game frame of the slot machine viewed from the front.

FIG. 58 is a back view of the front door of the slot machine as viewed from the back.

[Explanation of symbols]

 31 game control board (main board) 37 payout control board 56 CPU 96 door switch 97 ball payout device 200 front door (front open member) 301A winning ball count switch 301B ball lending count switch 371 payout control CPU

Claims (13)

[Claims] 1. A gaming machine in which a player can play a predetermined game, a front opening member openable to the front side of the gaming machine, and a detecting means capable of detecting opening of the front opening member. A payout device for paying out game media; a payout control means for controlling the payout device; and a payout control unit configured to control a progress of a game and to control a payout control signal including command data for controlling the payout device. A game control means capable of transmitting to the means, a predetermined signal is input to the game control means in response to the detection means detecting opening of the front opening member, and the game control means Depending on the signal input,
A payout prohibition signal is transmitted to the payout control means as a control signal for prohibiting the payout of the game medium from the payout apparatus, and the payout control means performs the payout control by receiving the payout prohibition signal. A gaming machine characterized in that a payout is prohibited in which payout is not executed. The payout control means outputs a payout number signal, which is a control signal transmitted from the game control means in response to satisfaction of the payout condition and specifies the number of game media to be paid out, even if the payout is prohibited. Claim 1 capable of receiving
The gaming machine described. 3. The gaming machine according to claim 2, wherein the payout control means updates a counter capable of specifying the total number of unpaid game media based on the payout number signal received from the game control means. 4. The game control means executes transmission of a payout prohibition signal prior to transmission of a payout number signal designating the number of game media to be paid out according to satisfaction of a payout condition. The gaming machine according to claim 3. 5. The game control means has a transmission data storage area capable of storing a plurality of command data at the same time, and stores command data to be transmitted to the payout control means in the transmission data storage area. The gaming machine according to claim 4. 6. The game machine according to claim 5, wherein the game control means stores command data indicating the number of game media to be paid out in the transmission data storage area. 7. A game control means for controlling a payout prohibition release signal as a control signal for releasing a payout prohibition state when a payout device can pay out game media after transmitting a payout prohibition signal. Sending to the means, the payout control means, after receiving the payout prohibition release signal,
The gaming machine according to claim 1, wherein the payout prohibition state is released after a lapse of a predetermined period. 8. The payout control means has a reception data storage area capable of storing a plurality of command data from the game control means at the same time, and stores the received command data in the reception data storage area. The gaming machine according to claim 7. 9. The payout control means determines whether or not the command data from the game control means is appropriate, and does not store the received command data in the received data storage area if it determines that the command data is not appropriate. 8. The gaming machine according to 8. 10. The payout control means determines whether or not command data from the game control means is appropriate, and does not update data indicating reception of new command data if it determines that the command data is not appropriate. The gaming machine according to claim 1. 11. A storage unit capable of storing game media paid out from a payout device, and a detecting unit capable of detecting that a storage state of the game media in the storage unit has reached a predetermined state. The gaming machine according to claim 1, wherein a signal according to the opening of the opening member and a signal according to the detection of the predetermined state are input to the game control unit as a common signal. 12. A storage operation member that operates according to the storage state of the game medium in the storage section, an opening and closing operation member that operates according to opening and closing of a front opening member, and the storage operation according to operation of the opening and closing operation member. 12. The gaming machine according to claim 11, further comprising: a connection member that operates the member, wherein the detection unit outputs a predetermined signal when the operation of the storage operation member is detected. 13. A gaming machine having a launching mechanism for launching a game medium toward a game area, and a guide storage unit capable of guiding the game medium paid out by the payout device toward the launching mechanism. The gaming machine according to claim 1, wherein the game machine includes the guidance storage unit.