JP2002123424A5 - - Google Patents

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Publication number
JP2002123424A5
JP2002123424A5 JP2001247482A JP2001247482A JP2002123424A5 JP 2002123424 A5 JP2002123424 A5 JP 2002123424A5 JP 2001247482 A JP2001247482 A JP 2001247482A JP 2001247482 A JP2001247482 A JP 2001247482A JP 2002123424 A5 JP2002123424 A5 JP 2002123424A5
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JP
Japan
Prior art keywords
storage
storage area
pointer
memory unit
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001247482A
Other languages
English (en)
Japanese (ja)
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JP3872968B2 (ja
JP2002123424A (ja
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Publication date
Priority claimed from US09/675,021 external-priority patent/US6473845B1/en
Application filed filed Critical
Publication of JP2002123424A publication Critical patent/JP2002123424A/ja
Publication of JP2002123424A5 publication Critical patent/JP2002123424A5/ja
Application granted granted Critical
Publication of JP3872968B2 publication Critical patent/JP3872968B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2001247482A 2000-09-28 2001-08-16 コンピュータ・システムにおいてメモリを動的に再割当てするシステムおよび方法 Expired - Fee Related JP3872968B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US675021 2000-09-28
US09/675,021 US6473845B1 (en) 2000-09-28 2000-09-28 System and method for dynamically updating memory address mappings

Publications (3)

Publication Number Publication Date
JP2002123424A JP2002123424A (ja) 2002-04-26
JP2002123424A5 true JP2002123424A5 (cg-RX-API-DMAC7.html) 2004-09-24
JP3872968B2 JP3872968B2 (ja) 2007-01-24

Family

ID=24708745

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001247482A Expired - Fee Related JP3872968B2 (ja) 2000-09-28 2001-08-16 コンピュータ・システムにおいてメモリを動的に再割当てするシステムおよび方法

Country Status (2)

Country Link
US (1) US6473845B1 (cg-RX-API-DMAC7.html)
JP (1) JP3872968B2 (cg-RX-API-DMAC7.html)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6771595B1 (en) * 1999-08-31 2004-08-03 Intel Corporation Apparatus and method for dynamic resource allocation in a network environment
US6959370B2 (en) * 2003-01-03 2005-10-25 Hewlett-Packard Development Company, L.P. System and method for migrating data between memories
JP4451733B2 (ja) 2004-06-30 2010-04-14 富士通マイクロエレクトロニクス株式会社 半導体装置
US7266651B1 (en) 2004-09-07 2007-09-04 Sun Microsystems, Inc. Method for in-place memory interleaving and de-interleaving
US7318114B1 (en) 2004-10-29 2008-01-08 Sun Microsystems, Inc. System and method for dynamic memory interleaving and de-interleaving
US20080052368A1 (en) * 2006-08-28 2008-02-28 Sony Ericsson Mobile Communications Ab System and method to shuffle and refill content
TWI369611B (en) * 2008-08-14 2012-08-01 Asustek Comp Inc Main board and interface control method for memory slot thereof
CN109032791B (zh) 2012-08-22 2022-10-21 汞王国资产有限公司 多核架构中的资源分配
US9218314B2 (en) 2013-02-01 2015-12-22 International Business Machines Corporation Boosting remote direct memory access performance using cryptographic hash based approach
WO2015130314A1 (en) 2014-02-28 2015-09-03 Hewlett-Packard Development Company, L.P. Mapping mode shift
WO2016159930A1 (en) * 2015-03-27 2016-10-06 Hewlett Packard Enterprise Development Lp File migration to persistent memory
US10684954B2 (en) 2015-04-02 2020-06-16 Hewlett Packard Enterprise Development Lp Page cache on persistent memory
US11416395B2 (en) 2018-02-05 2022-08-16 Micron Technology, Inc. Memory virtualization for accessing heterogeneous memory components
US10782908B2 (en) 2018-02-05 2020-09-22 Micron Technology, Inc. Predictive data orchestration in multi-tier memory systems
US11099789B2 (en) 2018-02-05 2021-08-24 Micron Technology, Inc. Remote direct memory access in multi-tier memory systems
US12135876B2 (en) 2018-02-05 2024-11-05 Micron Technology, Inc. Memory systems having controllers embedded in packages of integrated circuit memory
US10880401B2 (en) * 2018-02-12 2020-12-29 Micron Technology, Inc. Optimization of data access and communication in memory systems
US11210092B2 (en) * 2018-03-06 2021-12-28 International Business Machines Corporation Servicing indirect data storage requests with multiple memory controllers
US10877892B2 (en) 2018-07-11 2020-12-29 Micron Technology, Inc. Predictive paging to accelerate memory access
US10852949B2 (en) 2019-04-15 2020-12-01 Micron Technology, Inc. Predictive data pre-fetching in a data storage device

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59157887A (ja) 1983-02-28 1984-09-07 Hitachi Ltd 情報処理装置
US4833604A (en) * 1986-01-13 1989-05-23 International Business Machines Corporation Method for the relocation of linked control blocks
US5230045A (en) 1986-11-12 1993-07-20 Xerox Corporation Multiple address space system including address translator for receiving virtual addresses from bus and providing real addresses on the bus
DE69033438T2 (de) * 1989-04-13 2000-07-06 Sandisk Corp., Santa Clara Austausch von fehlerhaften Speicherzellen einer EEprommatritze
US5255270A (en) * 1990-11-07 1993-10-19 Emc Corporation Method of assuring data write integrity on a data storage device
JPH079632B2 (ja) * 1991-06-18 1995-02-01 インターナショナル・ビジネス・マシーンズ・コーポレイション アドレス変換装置および方法
US5369616A (en) * 1992-10-30 1994-11-29 Intel Corporation Method for assuring that an erase process for a memory array has been properly completed
US5404485A (en) * 1993-03-08 1995-04-04 M-Systems Flash Disk Pioneers Ltd. Flash file system
US5485595A (en) * 1993-03-26 1996-01-16 Cirrus Logic, Inc. Flash memory mass storage architecture incorporating wear leveling technique without using cam cells
US5388083A (en) * 1993-03-26 1995-02-07 Cirrus Logic, Inc. Flash memory mass storage architecture
US5479638A (en) * 1993-03-26 1995-12-26 Cirrus Logic, Inc. Flash memory mass storage architecture incorporation wear leveling technique
US5835743A (en) * 1994-06-30 1998-11-10 Sun Microsystems, Inc. Application binary interface and method of interfacing binary application program to digital computer
US5761695A (en) 1995-09-19 1998-06-02 Hitachi, Ltd. Cache memory control method and apparatus, and method and apparatus for controlling memory capable of interleave control
US6014724A (en) * 1995-10-27 2000-01-11 Scm Microsystems (U.S.) Inc. Flash translation layer block indication map revision system and method
US5835954A (en) 1996-09-12 1998-11-10 International Business Machines Corporation Target DASD controlled data migration move
US5963970A (en) * 1996-12-20 1999-10-05 Intel Corporation Method and apparatus for tracking erase cycles utilizing active and inactive wear bar blocks having first and second count fields
US5832493A (en) * 1997-04-24 1998-11-03 Trimble Navigation Limited Flash file management system
US6000006A (en) * 1997-08-25 1999-12-07 Bit Microsystems, Inc. Unified re-map and cache-index table with dual write-counters for wear-leveling of non-volatile flash RAM mass storage
US5848026A (en) * 1997-12-08 1998-12-08 Atmel Corporation Integrated circuit with flag register for block selection of nonvolatile cells for bulk operations

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