JP2002123192A - Electrooptical device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To increase light resistance and to efficiently produce cumulative capacity employing relatively simple laminated structure for an electrooptical device such as a liquid crystal device. SOLUTION: On a TFT array substrate (10) of the device, pixel electrodes (9a), a TFT (30) connected to the electrodes, a scanning line (3a) connected to the TFT, a capacitive line (300) which is made up with the same layer of the scanning line, an interlayer insulation film (41) which is laminated on the capacitive line and the scanning line and an intermediate electrically conductive layer (80) which is laminated on the film are provided. The layer (80) consists of a light shielding electrically conductive film and includes a second capacitive electrode which are placed opposite to a first capacitive electrode that is a portion of the capacitive line across the interlayer insulation film and a light shielding section that at least covers the scanning line partially from the top through the interlayer insulation film. The film is formed so that the film thickness between the first capacitive electrode and the second capacitive electrode is made thinner than that between the scanning line and the light shielding section.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention belongs to the technical field of an electro-optical device of an active matrix drive system, and particularly to a storage capacitor for holding a potential written in a pixel electrode and a thin film transistor for pixel switching.
m Transistor (hereinafter, appropriately referred to as TFT) in a laminated structure on a substrate, and belongs to the technical field of an electro-optical device and a method of manufacturing the same.

[0002]

2. Description of the Related Art In an electro-optical device of a TFT active matrix drive type, various wirings such as scanning lines, data lines, and capacitance lines and T for pixel switching are provided in an image display area.
In order to prevent light leakage in the area where the FT or the like is arranged, a stripe-shaped or lattice-shaped light-shielding film is formed in this area, or various wirings and the like are formed of the light-shielding film. Defines the non-opening area of each pixel in a grid. In addition, in this type of electro-optical device, when incident light is applied to a channel region of a TFT provided in each pixel, a current (light leak current) is generated by light excitation, and the characteristics of the TFT change. In particular, in the case of an electro-optical device for a light valve of a projector, since the intensity of incident light is high, it is important to shield the channel region of the TFT and its peripheral region from incident light.
Conventionally, therefore, the channel region or its channel region is formed by a light-shielding film that defines a non-opening region of each pixel provided on the opposing substrate, or by a light-shielding data line such as Al (aluminum) that passes over the TFT. The surrounding area is configured to be shielded from light.

In general, in this type of electro-optical device, when a scanning signal is supplied to a gate electrode of a TFT via a scanning line, the TFT is turned on, and an image signal supplied via a data line is supplied. Is supplied to the pixel electrode via the source and the drain of the TFT. Since the supply of such an image signal is performed only for a very short time for each pixel electrode via each TFT, the voltage of the image signal supplied via the TFT is much longer than the time during which the TFT is turned on. In general, a storage capacitor is added to each pixel electrode in parallel with a liquid crystal capacitor in order to maintain the voltage for a long time.

Furthermore, in this type of electro-optical device, when the interlayer distance between the pixel electrode and the TFT is long, it is necessary to avoid the technical difficulty of connecting the two with one small contact hole. Also, a technology has been developed in which an island-shaped relay layer is provided and two small-diameter contact holes are used to connect the two via the relay layer. In particular, the importance of the presence of such a relay layer has been emphasized as the electro-optical device has been improved in definition or the pixel pitch has been reduced in order to meet the general demand for higher quality display images in recent years. .

[0005]

As described above, the brightness,
With the introduction of various technologies to improve the contrast ratio, definition, etc., the number of conductive films and the number of interlayer insulating films laminated on the TFT array substrate have been increasing, and the laminated structure constructed on the substrate has It is becoming ever more complex.

[0006] On the other hand, a simple structure is fundamentally superior to a laminated structure and a manufacturing process on a TFT array substrate from various viewpoints such as reduction in size and weight of the device, improvement in reliability of the device, and cost reduction. For this reason, for example, at least two of various conductive films such as a conductive film forming a storage capacitor as described above, a light-shielding film covering a TFT and a scanning line, and a relay layer relaying a pixel electrode to a TFT are formed of the same conductive film. Or it is desired to suppress the increase in the total number of conductive films in the stacked structure by forming the same insulating film as the insulating film for interlayer insulating such a conductive film.

However, according to the above-mentioned conventional technique, for example, the dielectric film of the storage capacitor must be thin in order to increase the storage capacity. On the other hand, if the interlayer distance between the TFT or the scanning line and the light shielding film that shields them is too small, the time constant of the scanning line increases due to the parasitic capacitance generated between them, and the signal delay occurs, and the potential fluctuation of the light shielding film. Causes adverse effects on signals on the scanning lines. In addition, the relay layer is directly connected to the drain of the TFT, and its potential varies as the pixel electrode potential, and on the other hand, there are various restrictions such as that the capacitance line must have a fixed potential. As a result, any two (or more) of the conductive film and the insulating film that constitute the light-shielding film, the storage capacitor, the relay layer, and the like are formed of the same film to avoid complication of the laminated structure on the substrate. Is actually very difficult due to various inconveniences and restrictions.

As described above, according to the prior art, in order to improve the light resistance and to create a storage capacitor, the number of conductive films must be increased and the laminated structure must be complicated. If an attempt is made to avoid an increase in the number of conductive films and a complicated laminated structure, there is a problem in that image quality must be degraded at the expense of light resistance and storage capacity to some extent.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and an electro-optical device which has excellent light resistance and can efficiently produce a storage capacitor while adopting a relatively simple laminated structure, and manufacturing thereof. It is an object to provide a method.

[0010]

In order to solve the above-mentioned problems, an electro-optical device according to the present invention comprises, on a substrate, a pixel electrode, a thin film transistor connected to the pixel electrode, and a scanning line connected to the thin film transistor. A first electrode portion of a storage capacitor formed of the same layer as the scanning line and added to the pixel electrode; an interlayer insulating film stacked on the first electrode portion and the scanning line; A light-shielding portion that includes a second electrode portion of the storage capacitor that is stacked and faces the first electrode portion with the interlayer insulating film interposed therebetween and that covers the scanning line at least partially from above through the interlayer insulating film; And an intermediate conductive layer including:
The film thickness between the electrode portion and the second electrode portion is formed smaller than the film thickness between the scanning line and the light shielding portion.

According to the electro-optical device of the present invention, by performing switching control of the pixel electrode by the thin film transistor connected to the pixel electrode, it is possible to perform driving by the active matrix driving method. The scanning line is covered from above by a light-shielding portion of the intermediate conductive layer via an interlayer insulating film. That is, the light shielding performance for the incident light in this portion can be sufficiently enhanced by light reflection or light absorption in the light shielding portion. Therefore, the non-opening area of each pixel in the direction along the scanning line can be defined by the light shielding portion. Further, when the gate electrode of the thin film transistor is formed of a part of the scanning line, at least the channel region of the thin film transistor can be shielded from light by the light-shielding portion, and a change in transistor characteristics due to generation of a light leakage current in the thin film transistor can be reduced. The intermediate conductive layer is made of an opaque or translucent light-shielding conductive film so as to fulfill such a light-shielding function, and has a property of at least partially reflecting or absorbing light.

On the other hand, a first electrode portion formed of the same layer as the scanning line and a second electrode portion of the intermediate conductive layer are arranged to face each other with an interlayer insulating film interposed therebetween, and the interlayer insulating film functions as a dielectric film. , Storage capacity is built.

Here, from the viewpoint of increasing the storage capacitance, the thinner the interlayer insulating film as the dielectric film of the storage capacitor, the better, as long as no defect occurs in the film. On the other hand, the interlayer insulating film between the scanning line and the light-shielding portion is preferably thicker from the viewpoint of reducing the parasitic capacitance between them. Therefore, the requirements for the thickness of the interlayer insulating film in such a laminated structure are contradictory from these two viewpoints.
It is difficult to meet both requirements. However, in the present invention, by forming the thickness of the interlayer insulating film portion between the first electrode portion and the second electrode portion to be smaller than the thickness of the interlayer insulating film portion between the scanning line and the light shielding portion, These two conflicting requirements can be met at the same time. That is, the storage capacitance can be increased by reducing the thickness of a portion of the interlayer insulating film that functions as a dielectric film of the storage capacitance. At the same time, the thickness of the portion of the interlayer insulating film interposed between the light-shielding portion and the scanning line is set to such an extent that the parasitic capacitance between them has little or no practical effect on the scanning signal supplied to the scanning line. The scanning lines can be covered with a light shielding portion made of the same intermediate conductive layer as the second electrode portion, while the thickness is increased. The thickness of the thick portion and the thickness of the thin portion of the interlayer insulating film are set according to actual device specifications, respectively.
In any case, the scanning having the function of reducing the parasitic capacitance by relatively reducing the thickness of the interlayer insulating film between the first electrode portion and the second electrode portion having a function as a dielectric film of the storage capacitor. The effect of the present invention is exerted by relatively increasing the thickness of the interlayer insulating film between the line and the intermediate conductive layer.

As a result, a relatively large storage capacitance can be formed in a limited non-opening area of each pixel, and at the same time, the scanning lines and the parasitic capacitance between the scanning lines can be reduced while the scanning lines and the scanning lines can be reduced. The channel region below the gate electrode, which is a part of the scanning line, can be reliably shielded from light by the light shielding portion.
Moreover, the second electrode portion and the light-shielding portion of these storage capacitors are formed of the same film as the intermediate conductive layer, and the dielectric film of the storage capacitor, the light-shielding portion, and the interlayer insulating film interposed between the scanning lines are formed of the same film. Since the first electrode portion and the scanning line, which are part of the capacitance line, are formed of the same film, the number of conductive films and the number of insulating films in the stacked structure on the substrate is suppressed from increasing. Therefore, while avoiding the complexity of the laminated structure and manufacturing process on the substrate,
At the same time as increasing the storage capacity, light leakage near the scanning line is reduced, and furthermore, the light leakage current in the thin film transistor is reduced, so that a high contrast image and a high quality image can be finally displayed.

In one embodiment of the electro-optical device according to the present invention, the intermediate conductive layer further includes a relay section for relay-connecting the thin film transistor and the pixel electrode.

According to this aspect, the intermediate conductive layer further includes, in addition to the above-described second electrode portion and light-shielding portion, a relay portion for relay-connecting the thin film transistor and the pixel electrode. In this way, when the relay section is used, when the interlayer distance between the thin film transistor and the pixel electrode is long, it is possible to avoid the technical difficulty of connecting them with one contact hole and to connect the two via the relay section. One or two or more contact holes can be connected. In the present invention, these three portions made of the intermediate conductive layer may all be formed continuously with each other and have the same potential. Alternatively, any one of these three parts may be cut off from the other two parts, or all three parts may be cut off from each other. Further, even when the intermediate conductive layer does not include a relay portion,
These two portions made of the intermediate conductive layer may be formed continuously with each other to have the same potential, or may be formed separately from each other.

In another aspect of the electro-optical device according to the present invention, the first electrode portion is composed of a part of a capacitance line arranged in parallel with the scanning line, and the second electrode portion is connected to the pixel electrode. It is composed of a connected pixel potential side capacitance electrode.

According to this aspect, the scanning lines and the capacitance lines are arranged in parallel on the substrate, and the first electrode portion, which is a part of the capacitance lines, is connected to the second electrode as the pixel potential side capacitance electrode. The storage capacitor is constructed by being arranged opposite to the storage unit. Therefore, it is possible to construct a storage capacitor in a plane area along the scanning line while suppressing the parasitic capacitance between the scanning line and the light shielding portion.

In another aspect of the electro-optical device of the present invention, the light-shielding portion is disposed on a portion where at least the scanning line functions as a gate electrode of the thin-film transistor.

According to this aspect, by covering the gate electrode of the thin film transistor from above with the light shielding portion, at least the channel region can be shielded from light, and the occurrence of light leakage current in the thin film transistor can be reduced.

However, in the present invention, it goes without saying that the light-shielding portion of the intermediate conductive layer may be arranged on a portion of the scanning line that does not function as a gate electrode, and the gate electrode is formed separately from the scanning line. Alternatively, it may be connected to the scanning line for each pixel.

In another aspect of the electro-optical device of the present invention, another inter-layer insulating film laminated on the intermediate conductive layer and an inter-layer insulating film laminated on the other inter-layer insulating film and intersecting with the scanning line and A data line connected to the thin film transistor.

According to this aspect, while the image signal and the scanning signal are supplied to the thin film transistor through the data line and the scanning line, respectively, the switching of the pixel electrode is controlled by the thin film transistor, whereby the driving by the active matrix driving method can be performed. .

In this aspect, the intermediate conductive layer has an island-like shape including a first portion extending along the scanning line for each pixel and a second portion bent from the first portion and extending along the data line. It may be configured to have a planar shape.

According to this structure, in the plane area along the scanning line, the scanning line can be shielded by using the first portion as a light shielding portion, and the first portion is used as the second electrode portion. , It is possible to build up a storage capacity. In addition, by forming the second portion as the second electrode portion in a region along the data line, a storage capacitor can be formed. Therefore, the storage capacity can be increased by increasing the area for forming the storage capacity. The planar shape of the intermediate conductive layer including the first portion and the second portion extending crossing each other in this manner is more specifically, for example, T-shaped, L-shaped, or cross-shaped.

In another aspect of the electro-optical device according to the present invention, the intermediate conductive layer comprises a film containing a high melting point metal.

According to this aspect, the light-shielding portion can function well and the second electrode portion can function well by the intermediate conductive layer made of the film containing the high melting point metal. As a film containing a high melting point metal, for example, Ti
(Titanium), Cr (Chromium), W (Tungsten), T
A simple metal, an alloy, a metal silicide, a polysilicide containing at least one of high-melting metals such as a (tantalum), Mo (molybdenum), and Pb (lead), and a laminate of these are included. Further, such an intermediate conductive layer may be composed of a single layer film or a multilayer film containing at least one film containing a high melting point metal film.

In another aspect of the electro-optical device according to the present invention, the intermediate conductive layer is formed of a multilayer film having a silicon film laminated on a lower side.

According to this aspect, of the multilayer film constituting the intermediate conductive layer, light is absorbed by the silicon film laminated on the lower side, so that light shielding performance can be improved. In particular, since such a silicon film is located on the lower side, in a double-plate type projector using a plurality of the electro-optical devices as a light valve, the light reflected from the back surface of the substrate and the light emitted from another light valve are combined optically. It is also possible to at least partially absorb and remove return light such as projection light that penetrates the system. Further, it is possible to at least partially absorb and remove the internally reflected light obtained by reflecting the incident light obliquely incident on the substrate on the inner surface of the electro-optical device with the silicon film. In addition, with a silicon film, the contact resistance with the semiconductor layer of the thin film transistor can be reduced.

In the above-described embodiment including the capacitance line, the capacitance line may be configured to be partially wired in a region where the interlayer insulating film is formed thin.

According to this structure, when the capacitance line includes the first electrode as described above, the storage capacitance can be increased, and the planar region where the capacitance line is formed can be flattened. Therefore, the pixel electrode portion formed in this region is flattened, and it is also possible to reduce malfunctions of the electro-optical material such as poor alignment of liquid crystal near this region.

In the above-described embodiment having the data line, the data line may be partially wired in a region where the interlayer insulating film is formed thin.

According to this structure, the plane area where the data lines are formed can be flattened. Therefore, the pixel electrode portion formed in this region is flattened, and it is also possible to reduce malfunctions of the electro-optical material such as poor alignment of liquid crystal near this region.

In another aspect of the electro-optical device according to the present invention, the interlayer insulating film is thinly formed between the first electrode portion and the second electrode portion and between the scanning line and the light shielding portion. And a single-layer film formed thickly.

According to this aspect, the thickness of the interlayer insulating film made of a single-layer film is formed thin between the first electrode portion and the second electrode portion, and thick between the scanning line and the light shielding portion. By forming them, it is possible to simultaneously increase the storage capacitance and reduce the parasitic capacitance between the scanning line and the light shielding portion as described above.

In another aspect of the electro-optical device according to the present invention, the interlayer insulating film is formed from a first film between the first electrode portion and the second electrode portion, and is provided between the scanning line and the light shielding portion. And a multilayer film formed from the first film and the second film.

According to this aspect, the portion of the interlayer insulating film serving as the dielectric film of the storage capacitor is formed from the first film, so that the thickness is the thickness of the first film. In contrast,
The portion interposed between the scanning line and the light-shielding portion includes the first film and the second film.
Since it is formed from a film, its thickness is the total film thickness of the first film thickness and the second film thickness. Therefore, the former can be made thinner than the latter with a relatively simple configuration.

In the aspect in which the interlayer insulating film is formed of a multilayer film, the first film may be arranged below the second film.

According to this structure, the interlayer insulating film in the region where the second film is removed and the first film is exposed may be used as the portion as the dielectric film of the storage capacitor. As a result, the portion of the storage capacitor as a dielectric film is
It can be made thinner than the part interposed between the scanning line and the light shielding part.
Further, the film thickness between the two can be controlled relatively easily.

Note that the first film may be arranged above the second film.

In the aspect in which the interlayer insulating film is formed of a multilayer film, the first film is formed of a silicon nitride film, and the second film is formed of a silicon nitride film.
The film may be composed of a silicon oxide film.

With this structure, the silicon nitride film becomes a dielectric film of the storage capacitor. However, the silicon nitride film has a higher dielectric constant than the silicon oxide film and is dense and can be formed very thin. This is advantageous in increasing the storage capacity. In addition, by forming a silicon oxide film in addition to the silicon nitride film in a portion interposed between the scanning line and the light-shielding portion, the thickness of the interlayer insulating film can be increased. In addition, since the silicon nitride film has high water resistance and high moisture resistance, entry of moisture and moisture into the semiconductor layer can be effectively prevented. Thus, the life of the semiconductor layer and the electro-optical device can be extended.

According to another aspect of the invention, there is provided a method of manufacturing an electro-optical device for manufacturing an electro-optical device according to an aspect of the present invention, wherein the above-described interlayer insulating film comprises a single-layer film. A method of forming the thin film transistor, the scan line and the first electrode unit on the substrate, and forming the interlayer insulating film on the scan line and the first electrode unit, Forming the intermediate conductive layer on the interlayer insulating film; and forming the pixel electrode above the intermediate conductive layer, wherein the step of forming the interlayer insulating film includes the step of forming the single-layer film. An etching step of forming the light-shielding portion thinly in a region overlapping with the first electrode portion by controlling an etching time for the first electrode portion.

According to one manufacturing method of the electro-optical device of the present invention, in the etching step included in the step of forming the interlayer insulating film, light is shielded in a region overlapping the first electrode portion by controlling the etching time for the single layer film. The part is formed thin. On the other hand, by not etching the interlayer insulating film in a region where the second electrode portion does not overlap, a portion interposed between the scanning line and the light shielding portion is left thick. Therefore, the electro-optical device of the present invention can be manufactured relatively easily.

Another method of manufacturing an electro-optical device according to the present invention relates to a mode in which the above-described interlayer insulating film is formed of a multilayer film in which a first film is disposed below a second film in order to solve the above-mentioned problems. A method of manufacturing an electro-optical device for manufacturing an electro-optical device according to the present invention, comprising: forming the thin film transistor, the scanning line, and the first electrode unit on the substrate; Forming the interlayer insulating film on the portion, forming the intermediate conductive layer on the interlayer insulating film, and forming the pixel electrode above the intermediate conductive layer, The step of forming an interlayer insulating film includes forming the first film from a film having a high etching selectivity and forming the second film from a film having a low etching selectivity, and forming the second film in a region overlapping with the first electrode portion. Etching away the second film Containing both an etching process to leave the first layer.

According to another manufacturing method of the electro-optical device of the present invention, in the etching step included in the step of forming the interlayer insulating film, the first film is formed from a film having a high etching selectivity and the second film is formed. By forming a film having a low etching selectivity and etching away the second film in a region overlapping the first electrode portion and leaving the first film, a thin interlayer insulating film is formed in a region overlapping the first electrode portion. I do. On the other hand, by not etching the first film and the second film in the region where the second electrode portion does not overlap, a portion interposed between the scanning line and the light shielding portion is left thick. Therefore, it is easy to stop the etching particularly when the first film is exposed, so that the thickness control of the thin portion is simple, and the electro-optical device of the present invention can be manufactured relatively easily.

The operation and other advantages of the present invention will become more apparent from the embodiments explained below.

[0048]

Embodiments of the present invention will be described below with reference to the drawings. In the following embodiments, the electro-optical device of the present invention is applied to a liquid crystal device.

First, the configuration of the pixel portion of the electro-optical device according to the embodiment of the present invention will be described with reference to FIGS. FIG. 1 is an equivalent circuit of various elements, wiring, and the like in a plurality of pixels formed in a matrix forming an image display area of the electro-optical device. FIG. 2 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which data lines, scanning lines, pixel electrodes, and the like are formed. FIG. 3 is a sectional view taken along line AA ′ of FIG. In FIG. 3, the scale of each layer and each member is made different so that each layer and each member have a size recognizable in the drawing.

In FIG. 1, each of a plurality of pixels formed in a matrix forming an image display area of the electro-optical device according to the present embodiment has a pixel electrode 9a and a TFT 30 for controlling the switching of the pixel electrode 9a. Are formed, and the data line 6a to which the image signal is supplied is electrically connected to the source of the TFT 30. The image signals S1, S2,..., Sn to be written to the data lines 6a may be supplied line-sequentially in this order, or may be supplied to a plurality of adjacent data lines 6a for each group. good. The scanning line 3 is connected to the gate of the TFT 30.
, Gm are electrically connected to the scanning line 3a in a pulsed manner at a predetermined timing.
Are applied line-sequentially in this order.
The pixel electrode 9a is electrically connected to the drain of the TFT 30. By closing the switch of the TFT 30 serving as a switching element for a certain period, the data line 6a is turned off.
The image signals S1, S2,..., Sn supplied from a are written at a predetermined timing. The image signals S1, S2,..., Sn of a predetermined level written in the liquid crystal as an example of the electro-optical material via the pixel electrode 9a are connected to a counter electrode (described later) formed on a counter substrate (described later). For a certain period of time. The liquid crystal modulates light by changing the orientation and order of the molecular assembly depending on the applied voltage level, thereby enabling gray scale display. In the normally white mode, the transmittance for the incident light decreases according to the voltage applied in each pixel unit, and in the normally black mode, the light enters according to the voltage applied in each pixel unit Light transmittance is increased, and light having a contrast corresponding to an image signal is emitted from the electro-optical device as a whole. Here, in order to prevent the held image signal from leaking, a storage capacitor 70 is added in parallel with a liquid crystal capacitor formed between the pixel electrode 9a and the counter electrode. Storage capacity 70
Includes a fixed-potential-side capacitance electrode formed of a part of the capacitance line 300, and a pixel-potential-side capacitance electrode connected to the drain side of the TFT 30 and the pixel electrode 9a.

In FIG. 2, a plurality of transparent pixel electrodes 9 are arranged in a matrix on a TFT array substrate of the electro-optical device.
a (the outline is indicated by a dotted line portion 9a ′), and a data line 6a, a scanning line 3a, and a capacitance line 300 are provided along the vertical and horizontal boundaries of the pixel electrode 9a.

The data line 6a is electrically connected to a source region described later in the semiconductor layer 1a made of, for example, a polysilicon film via the contact hole 5. Further, the scanning line 3a is arranged so as to face the channel region 1a 'indicated by a fine hatched region in the semiconductor layer 1a which is lower right in the figure, and the scanning line 3a functions as a gate electrode. As described above, at the intersections of the scanning lines 3a and the data lines 6a, the pixel switching TFTs 30 in which the scanning lines 3a are opposed to each other as gate electrodes in the channel region 1a 'are provided.
Is provided.

The capacitance line 300 has a main line portion extending substantially linearly along the scanning line 3a, and a protruding portion projecting upward in FIG. 2 along the data line 6a from a portion intersecting the data line 6a.

In particular, as shown in FIG.
and the intermediate conductive layer 80 laminated above the capacitor line 300 with the first interlayer insulating film 41 interposed between the second electrode portion 80a of the storage capacitor 70, the pixel electrode 9a, and the high-concentration drain region 1e of the semiconductor layer 1a. And a light-shielding portion 80c that covers the scanning line 3a from above. As shown in FIG. 2, the intermediate conductive layer 80 extends from the TFT 30 to the right along the scanning line 3a and the capacitor line 300 and extends up and down from the TFT 30 for each pixel. It extends to just before Hall 5,
The upper side extends to a position just before the contact hole 5 of the adjacent TFT 30).

As shown in FIG. 3, the first interlayer insulating film 41 formed as a base of the intermediate conductive layer 80 is thinned in a thinned region 41s indicated by a rough hatched region rising to the right in FIG. The intermediate conductive layer 80 on the thinned region 41s serves as the second electrode unit 80a and the relay unit 80b. Conversely, the intermediate conductive layer 80 on the non-thinned region forms the light shielding portion 80c that covers the scanning line 3a from above.
It has been.

The second electrode portion 80a is a pixel potential side capacitor electrode connected to the pixel electrode 9a, and is composed of a part of the capacitor line 300 via the thinned first interlayer insulating film 41 as a dielectric film. It is arranged to face the fixed potential side capacitance electrode. Thereby, the first storage capacitor 70-1 of the storage capacitors 70.
Has been built. Here, in particular, the first interlayer insulating film 41
The capacitance value of the first storage capacitor 70-1 can be increased in accordance with the degree of film thickness reduction.

The present embodiment further includes a third electrode portion 1f as another pixel potential side capacitor electrode composed of the semiconductor layer 1a extending from the high-concentration drain region 1e of the semiconductor layer 1a. The portion 1f and the fixed potential side capacitor electrode (first electrode portion) composed of a part of the capacitor line 300 are opposed to each other via an insulating thin film 2 made of the same film as the gate insulating film of the TFT 30 as a dielectric film. , The second storage capacitor 70-2 of the storage capacitor 70 is constructed. That is,
In this embodiment, the storage capacitor 70 has a structure in which a plurality of storage capacitors connected in parallel are stacked three-dimensionally in a direction perpendicular to the TFT array substrate 10, A first storage capacitor 70-1 is constructed above the potential-side capacitance electrode (first electrode portion), and a second storage capacitor is formed below the fixed potential-side capacitance electrode (first electrode portion) which is a part of the capacitance line 300. The capacity 70-2 is constructed.

The relay section 80b is connected to the high-concentration drain region 1e of the semiconductor layer 1a through the contact hole 8a and to the pixel electrode 9a through the contact hole 8b. That is, the pixel electrode 9a is electrically connected to the high-concentration drain region 1d of the semiconductor layer 1a via the relay section 80b. By using the relay section 80b in this way, even if the interlayer distance between the pixel electrode 9a and the semiconductor layer 1a is long, for example, about 2000 nm, the comparison can be made while avoiding the technical difficulty of connecting the two with one contact hole. Two or more series contact holes 8a and 8b having a very small diameter
As a result, the two can be connected well, the aperture ratio of the pixel can be increased, and it is also useful to prevent the penetration of the etching when the contact hole is opened.

The light shielding portion 80c is connected to the scanning line 3a and the TFT 3
By covering 0 from above via the first interlayer insulating film 41, the non-opening region of each pixel along the scanning line 3a is defined, and the channel region 1a 'of the TFT 30 and its periphery are shielded from light. This prevents the characteristics of the TFT 30 from changing due to the occurrence of a light leakage current. Here, in particular, an increase in the parasitic capacitance between the scanning line 3a and the light shielding portion 80c can be suppressed according to the thickness of the first interlayer insulating film 41.

As shown in FIG. 3, such a first interlayer insulating film 41 is formed of a multilayer film, and more specifically, includes a silicon nitride film 41a and a silicon oxide film 41b. Among them, the silicon nitride film 41a is, for example, 200
nm or less, and a silicon oxide film 41b
Is a film having a thickness of, for example, about 300 nm or more. Then, the first interlayer insulating film 41 in the thinned region 41s shown in FIG. 2 is made of only the silicon nitride film 41a, and its thickness is the same as the thickness of the silicon nitride film 41a. On the other hand, the first interlayer insulating film 41 in the non-thinned region includes a silicon nitride film 41a and a silicon oxide film 4a.
1b, the thickness of the silicon nitride film 4
1a and the total thickness of the silicon oxide film 41b. Therefore, the silicon nitride film 41a, which is a thinned portion of the interlayer insulating film 41 functioning as a dielectric film of the first storage capacitor 70-1, is formed of a thin film having a high dielectric constant. From the viewpoint of increasing the first storage capacitor 70-1, the thinner the better, the better the reliability of the film can be obtained. The thickness of each of the silicon nitride film 41a and the silicon oxide film 41b may be appropriately set according to the actual device specifications. In any case, the function of the first storage capacitor 70-1 as a dielectric film is provided. The thickness of the portion having the function of reducing the parasitic capacitance between the scanning line 3a and the light-shielding portion 80c is relatively increased.

When the first interlayer insulating film 41 is configured in this manner, the silicon nitride film 41 has a higher dielectric constant, is denser and can be formed very thin as compared with the silicon oxide film 41b.
Since a becomes the dielectric film of the first storage capacitor 70-1, it is very advantageous in increasing the first storage capacitor 70-1. In addition, since the silicon nitride film 41a has high water resistance and high moisture resistance, it is possible to effectively prevent moisture and moisture from entering the semiconductor layer 1a. Thus, the reliability of the electro-optical device during continuous energization can be significantly improved. However,
The thinned first interlayer insulating film 41 functioning as a dielectric film of the first storage capacitor 70-1 is formed by HTO
It is also possible to use a silicon oxide film such as a film or an LTO film.

In this embodiment, in particular, the second electrode portion 80a,
Intermediate conductive layer 80 including relay portion 80b and light shielding portion 80c
Is made of a light-shielding conductive film. That is, the intermediate conductive layer 80
Has the necessary conductivity as the second electrode portion 80a and the relay portion 80b, and also has the light blocking property required as the light blocking portion 80c. For example, the intermediate conductive layer 80 is made of an opaque or translucent light-shielding conductive film, and has a property of at least partially reflecting or absorbing light. The second electrode unit 80
It is needless to say that the light-shielding film also functions as the light-shielding film in the region of the relay portion 80a and the relay portion 80b.

On the other hand, as shown in FIG. 3, below the TFT 30 on the TFT array substrate 10,
1a are provided in a lattice shape.

The intermediate conductive layer 80 including the lower light-shielding film 11a and the light-shielding portion 80c is preferably made of, for example, Ti, C
a simple metal, an alloy, a metal silicide, including at least one of refractory metals such as r, W, Ta, Mo, and Pb;
It is made of polysilicide, an opaque conductive film in which these are laminated, and the like. Alternatively, it is formed of a semi-transmissive film such as a light-absorbing silicon film.

In this embodiment, in particular, the non-opening area of each pixel is defined by the light-shielding portion 80c or the lower light-shielding film 11a in the direction along the scanning line 3a, so that the opposing substrate 20
The upper light-shielding film can be at least partially omitted. This makes it possible to manufacture an electro-optical device with high device reliability, in which the variation in transmittance is greatly reduced irrespective of the bonding accuracy of the two substrates.

As shown in FIGS. 2 and 3, the data line 6a
Is electrically connected to the high-concentration source region 1d of the semiconductor layer 1a through the contact hole 5, but an island-shaped relay portion is provided between the data line 6a and the high-concentration source region 1d. It is also possible to connect the two via two contact holes by relaying. Such a relay portion may be formed simultaneously from the same film as the intermediate conductive layer 80, or may be formed separately from a different conductive film.

The capacitance line 300 is preferably connected to the pixel electrode 9a.
Is extended from the image display area in which it is arranged to the periphery thereof, and is electrically connected to a constant potential source to have a fixed potential. As such a constant potential source, a scanning line driving circuit (described later) for supplying a scanning signal for driving the TFT 30 to the scanning line 3a and a data line driving circuit for controlling a sampling circuit for supplying an image signal to the data line 6a. A constant potential source such as a positive power supply or a negative power supply supplied to a circuit (described later) or a constant potential supplied to the counter electrode 21 of the counter substrate 20 may be used.
Further, the potential fluctuation of the lower light-shielding film 11a is also T
To avoid adverse effects on FT30,
As with the capacitance line 300, it is preferable to extend from the image display area to the periphery and connect to the constant potential source.

In FIG. 3, the electro-optical device has a transparent T
It includes an FT array substrate 10 and a transparent counter substrate 20 disposed opposite to the FT array substrate. The TFT array substrate 10
For example, a quartz substrate, a glass substrate, a silicon substrate,
The opposite substrate 20 is made of, for example, a glass substrate or a quartz substrate.

The TFT array substrate 10 has a pixel electrode 9a
And an alignment film 16 on which a predetermined alignment process such as a rubbing process is performed is provided on the upper side.
The pixel electrode 9a is made of, for example, a transparent conductive film such as an ITO (Indium Tin Oxide) film. The alignment film 16 is made of, for example, an organic film such as a polyimide film.

On the other hand, a counter electrode 21 is provided on the entire surface of the counter substrate 20, and an alignment film 22 on which a predetermined alignment process such as a rubbing process is performed is provided below the counter electrode 21. I have. The counter electrode 21 is made of, for example, a transparent conductive film such as an ITO film. The alignment film 22 is made of an organic film such as a polyimide film.

The opposing substrate 20 may be provided with a lattice-shaped or stripe-shaped light-shielding film. By adopting such a configuration, incident light from the opposing substrate 20 side is formed by the light shielding film on the opposing substrate 20 together with the intermediate conductive layer 80 and the data line 6a covering the scanning line 3a and the TFT 30 from above as described above. Channel region 1a 'or low concentration source region 1b
And intrusion into the low-concentration drain region 1c can be more reliably prevented. Further, the light-shielding film on the counter substrate 20 functions to prevent a temperature rise of the electro-optical device by forming at least a surface to be irradiated with incident light with a highly reflective film. The light-shielding film on the opposing substrate 20 is preferably formed so as to be located inside the light-shielding layer composed of the capacitance line 300 and the data line 6a in plan view. As a result, the light-shielding film on the opposing substrate 20 can provide such effects of light-shielding and temperature rise prevention without lowering the aperture ratio of each pixel.

The space between the TFT array substrate 10 and the opposing substrate 20 having the pixel electrode 9a and the opposing electrode 21 configured as described above is disposed in a space surrounded by a sealing material described later. Liquid crystal, which is an example of an electro-optical material, is sealed, and a liquid crystal layer 50 is formed. The liquid crystal layer 50 holds the alignment film 1 in a state where no electric field is applied from the pixel electrode 9a.
A predetermined orientation state is taken by 6 and 22. Liquid crystal layer 50
Is composed of, for example, a liquid crystal in which one or several kinds of nematic liquid crystals are mixed. The sealing material is used for bonding the TFT array substrate 10 and the opposing substrate 20 around them.
For example, it is an adhesive made of a photocurable resin or a thermosetting resin, and a gap material such as glass fiber or glass bead for mixing the distance between the two substrates to a predetermined value is mixed.

Further, under the pixel switching TFT 30, a base insulating film 12 is provided. Base insulating film 1
2 has a function of interlayer insulating the TFT 30 from the lower light-shielding film 11a, and is formed on the entire surface of the TFT array substrate 10 so that the surface of the TFT array substrate 10 can be roughened at the time of polishing or stains remaining after cleaning. T for pixel switching
It has a function of preventing deterioration of characteristics of the FT 30.

In FIG. 3, the pixel switching TFT
Reference numeral 30 denotes an LDD (Lightly Doped Drain) structure, and includes a scanning line 3a and a channel region 1 of a semiconductor layer 1a in which a channel is formed by an electric field from the scanning line 3a.
a ', an insulating thin film 2 including a gate insulating film for insulating the scanning line 3a from the semiconductor layer 1a, a low-concentration source region 1b and a low-concentration drain region 1c of the semiconductor layer 1a, a high-concentration source region 1d of the semiconductor layer 1a, and a high-concentration source region. It has a concentration drain region 1e.

On the scanning line 3a and the capacitor line 300 made of the same conductive polysilicon film or the like, the first interlayer insulating film 41 having a multilayer structure as described above is formed. Contact hole 5 leading to region 1d
And a contact hole 8a leading to the high-concentration drain region 1e.

The intermediate conductive layer 80 is formed on the first interlayer insulating film 41.
Are formed thereon, and contact holes 8 respectively leading to the relay portion 80b and the high-concentration source region 1d are formed thereon.
A second interlayer insulating film 42 in which b and the contact hole 5 are respectively formed is formed.

The data lines 6a are formed on the second interlayer insulating film 42, and the third interlayer insulating film 4 having a contact hole 8b leading to the relay portion 80b is formed thereon.
3 are formed. The pixel electrode 9a is provided on the upper surface of the third interlayer insulating film 43 configured as described above.

As described above, according to the present embodiment,
By reducing the thickness of the portion of the first interlayer insulating film 41 that functions as the dielectric film of the first storage capacitor 70-1, the first
The storage capacity 70-1 can be increased. At the same time, the thickness of the portion of the first interlayer insulating film 41 interposed between the light-shielding portion 80c and the scanning line 3a has almost no adverse effect on the scanning signal and the like that is supplied by the parasitic capacitance between the two. Alternatively, the scanning lines 3a and the TFTs 30 can be shielded from above by the light shielding portions 80c, while the thickness is reduced to such a degree that the surface is not practically used.
A portion having a different function, that is, a second electrode portion 80a, a relay portion 80b, and a light shielding portion 80c is formed from the same conductive film as the intermediate conductive layer 80, and the capacitor line 300 including the first electrode portion and the scanning line are formed. 3a is made of the same conductive film,
The dielectric film of the first storage capacitor 70-1 and the portion of the interlayer insulating film 41 interposed between the light shielding portion 80c and the scanning line 3a are made of the same film, and the dielectric film of the second storage capacitor 70-2 and the TFT 3
Since the gate insulating film of No. 0 is made of the same insulating thin film 2 and the third electrode portion of the second storage capacitor 70-2 is made of the same film as the semiconductor layer of the TFT 30, the conductive film in the laminated structure on the TFT array substrate 10 The increase in the number and the number of insulating films is suppressed as much as possible.

In addition, in this embodiment, in particular, most of the data lines 6a and the capacitance lines 300 are formed in the region where the first interlayer insulating film 41 is thinned (see FIG. 2). The flattening of the underlying surface of the pixel electrode 9a located above can be promoted. Therefore, poor alignment of the liquid crystal due to unevenness in the thickness of the liquid crystal layer 50 can be reduced. Further, the scanning line 3 is formed in a region where the first interlayer insulating film 41 is not thinned.
Since a is formed, the underlying surface of the pixel electrode 9a rises like a bank in a region along the scanning line 3a (see FIG. 3). Therefore, in order to prevent the deterioration of the liquid crystal due to the application of the DC voltage and to prevent the flicker in the display image, the voltage applied to the liquid crystal is inverted for each pixel group along the scanning line 3a for each field or frame of the image signal. When the electro-optical device is driven by the scanning line inversion driving method, the adverse effect of the horizontal electric field generated between the vertically adjacent pixel electrodes 9a can be reduced. More specifically, by reducing the distance between the edge of the pixel electrode 9a and the opposing electrode 21 by the amount of the bank-like swelling in the region where the horizontal electric field is generated in the scanning line inversion driving method, the vertical electric field between the two is reduced. Strengthen locally. As a result, the lateral electric field can be relatively weakened, and poor alignment of the liquid crystal in the region where the lateral electric field is generated can be reduced.

In the embodiment described above, the TFT array substrate 10, the base insulating film 12, the first interlayer insulating film 41, the second
At least one of the interlayer insulating film 42 and the third interlayer insulating film 43 is provided with a groove, and the scanning line 3a and the data line 6 are formed in the groove.
a, the surface of the third interlayer insulating film 43 serving as a base of the pixel electrode 9a may be planarized by embedding a wiring or an element such as the TFT 30. With this configuration, it is possible to finally reduce image defects such as defective alignment of the liquid crystal due to the steps. Alternatively, a step on the upper surface of the third interlayer insulating film 43 or the second interlayer insulating film 42 may be formed by CMP (Chemical Mechanical Polishing).
The flattening process may be performed by polishing with a shinging process or the like, or by flattening using an organic or inorganic SOG.

In the embodiment described above, the pixel switching TFT 30 preferably has an LDD structure as shown in FIG. 3, but does not implant impurities into the low-concentration source region 1b and the low-concentration drain region 1c. An impurity may be implanted at a high concentration using an offset structure, or using a gate electrode formed of a part of the scanning line 3a as a mask.
A self-aligned TFT that forms high-concentration source and drain regions in a self-aligned manner may be used. Further, in the present embodiment, a single gate structure in which only one gate electrode of the pixel switching TFT 30 is disposed between the high-concentration source region 1d and the high-concentration drain region 1e, but two or more gate electrodes are provided therebetween. It may be arranged. In this way, TF is required for dual gate or triple gate or more.
When T is formed, a leak current at a junction between the channel and the source / drain region can be prevented, and a current in an off state can be reduced.

(Modifications) Next, various modifications of the embodiment configured as described above will be described with reference to FIGS. Here, FIG. 4 is a partially enlarged cross-sectional view of the electro-optical device showing a cross-sectional structure of the storage capacitor 70 in one modification, and FIG. 5 shows a cross-sectional structure of the storage capacitor 70 in another modification. FIG. 6 is a partially enlarged cross-sectional view of the electro-optical device, and FIG. 6 is a partially enlarged cross-sectional view of the electro-optical device showing a cross-sectional structure of a scanning line 3a and a light shielding portion 80a according to still another modification.

In the modification shown in FIG. 4, the first interlayer insulating film 41 is formed of a single-layer film. Other configurations are the same as those of the embodiment shown in FIGS. In the first interlayer insulating film 41 in this modification, the portion of the first storage capacitor 70-1 that becomes the dielectric film is locally thinned by, for example, controlling the etching time. On the other hand, the capacitance line 30
By not etching in areas that do not overlap with zero,
The scanning line 3a and the light shielding portion 80c of the first interlayer insulating film 41
The portion interposed therebetween is made relatively thick.

In the modification shown in FIG. 5, in the laminated structure of the first interlayer insulating film 41, the silicon nitride film 41a 'is laminated on the upper side and the silicon oxide film 41b' is laminated on the lower side. Other configurations are the same as those of the embodiment shown in FIGS. The first interlayer insulating film 41 in this modification is formed, for example, by forming a silicon oxide film 41 b ′ on the capacitor line 30.
0, the silicon nitride film 41a '
Are stacked, the portion of the first storage capacitor 70-1 which will be a dielectric film is thinned.

In the modification shown in FIG. 6, the intermediate conductive layer 80
Consists of a multilayer film in which a silicon film 80a1 is laminated on the lower side and a high melting point metal film 80a2 is laminated on the upper side. Other configurations are the same as those of the embodiment shown in FIGS. With such a configuration, the upper refractory metal film 80a2 in the light shielding portion 80a formed of the intermediate conductive layer 80 is formed.
Thereby, light shielding performance can be improved by mainly reflecting light. Further, the light shielding performance can be improved by absorbing light by the lower silicon film 80a1. In particular, since such a silicon film 80a1 is located on the lower side, return light coming from below in the figure can be at least partially absorbed and removed. In addition, the silicon film 80a1 can at least partially absorb and remove the internal reflected light and the multiple reflected light, which are the incident light obliquely incident on the TFT array substrate 10 reflected on the inner surface of the electro-optical device. In addition, the silicon film 80a1
If so, the contact hole 8a in the relay portion 80b
Contact resistance with the semiconductor layer 1a can be reduced.

(Manufacturing Process of Electro-Optical Device) Next, the TFT constituting the electro-optical device according to the embodiment of the present invention will be described.
The manufacturing process on the array substrate side will be described with reference to FIGS. FIGS. 7 and 8 show each layer on the TFT array substrate side in each step, as in FIG.
It is a process drawing shown corresponding to -A 'cross section.

First, as shown in step (1) of FIG. 7, a TFT is formed on a TFT array substrate 10 by using a thin film forming technique.
Along with 30, a second storage capacitor 70-2 is formed.

More specifically, first, a TFT array substrate 10 such as a quartz substrate, a hard glass substrate, or a silicon substrate is prepared. Subsequently, a light-shielding film 11a having a predetermined plane pattern as shown in FIG. 2 is formed thereon by forming a light-shielding film made of a high melting point metal by sputtering or the like, and then performing a photolithography step, an etching step, and the like. I do. Subsequently, for example, TE or TE pressure is applied by normal pressure or low pressure CVD.
OS (tetra-ethyl-ortho-silicate) gas, T
EB (Tetra ethyl boat rate) gas, TMOP
(Tetra-methyl-oxy-foslate) gas, etc., a silicate glass film such as NSG, PSG, BSG, BPSG, etc., a silicon nitride film or a silicon oxide film, etc. Membrane 12
To form Next, low pressure CVD is performed on the base insulating film 12.
The polysilicon film is grown in solid phase by forming an amorphous silicon film and performing heat treatment. Alternatively, a polysilicon film may be directly formed by a low pressure CVD method or the like without passing through the amorphous silicon film. next,
A photolithography process,
The semiconductor layer 1 having a predetermined pattern including the third electrode portion 1f as shown in FIG.
a is formed. Then, by thermal oxidation, etc., the TFT
The insulating thin film 2 including the dielectric film for forming the second storage capacitor 70-2 is formed together with the gate insulating film 30. As a result, the thickness of the semiconductor layer 1a is about 30 to 150 nm, preferably about 35 to 50 nm, and the thickness of the insulating thin film 2 is about 20 to 150 nm, preferably about 30 to 150 nm. ~
The thickness is 100 nm. Next, a polysilicon film is deposited to a thickness of about 100 to 500 nm by a low pressure CVD method or the like, and after this polysilicon film is made conductive, a predetermined pattern as shown in FIG. The scanning line 3a and the capacitance line 300 are formed. The scanning line 3a and the capacitance line 300 may be formed of a metal alloy film such as a high melting point metal or a metal silicide, or may be a multilayer wiring in combination with a polysilicon film or the like.
Next, by doping impurities in two steps of low concentration and high concentration, the pixel switching of the LDD structure including the low concentration source region 1b and the low concentration drain region 1c, the high concentration source region 1d and the high concentration drain region 1e is performed. TFT
Form 30.

Then, a silicon nitride film 41a is deposited to a relatively small thickness of about 200 nm or less by a low pressure CVD method, a plasma CVD method, or the like. This silicon nitride film 41a
Is set relatively thin in accordance with the device specifications so that a sufficient storage capacity can be provided to the first storage capacitor 70-1.

Incidentally, in parallel with the above step (1), peripheral circuits such as a data line driving circuit and a scanning line driving circuit composed of TFTs may be formed in a peripheral portion on the TFT array substrate 10.

Next, in step (2) of FIG.
Oxide film 41b, such as a high-temperature silicon oxide film (HTO film), having a thickness of about 300 nm
It is deposited to a relatively thick thickness of about the above. The thickness of the silicon oxide film 41b is set relatively large according to the device specifications so that the adverse effect due to the parasitic capacitance between the light shielding portion 80c and the scanning line 3a does not surface.

Next, as shown in step (3) of FIG.
Silicon oxide film 41 in the thinned region 41s shown in FIG.
a is removed by dry etching such as reactive ion etching or reactive ion beam etching or wet etching. Thereby, the silicon nitride film 41b is exposed in the thinned region 41s. The etching that is stopped at the stage where the silicon nitride film 41a is exposed is more effective than the silicon oxide film 41b.
Since 1a has a higher selection ratio, it can be controlled relatively easily. In parallel with this, a part 5 'of the contact hole 5 as shown in FIGS. 2 and 3 is opened in the silicon oxide film 41b. At this stage, the first interlayer insulating film 41 thinned in the thinned region 41s is completed.

Next, as shown in step (4) of FIG. 7, the exposed silicon nitride film 41a is subjected to dry etching such as reactive ion etching, reactive ion beam etching or the like or wet etching to increase the height of the semiconductor layer 1a. A contact hole 8a for connecting the concentration drain region 1e and the relay portion 80b is opened.

Next, as shown in step (5) of FIG. 7, a metal such as Ti, Cr, W, Ta, Mo and Pb, and a metal alloy film such as metal silicide are further deposited thereon by sputtering. Then, a conductive film having a thickness of about 50 to 500 nm is formed, and a photolithography process, an etching process, and the like are performed on the conductive film to form an intermediate conductive film of a predetermined pattern including the second electrode portion 80a, the relay portion 80b, and the light shielding portion 80c. The layer 80 is formed. Therefore, the first electrode portion of the capacitor line 300 and the second electrode portion 80a which is a part of the intermediate conductive layer 80 are formed by thinning the first interlayer insulating film 41 (that is, only the silicon nitride film 41). The first storage capacitor 70-1 is disposed opposite to the first storage capacitor 70-1 via a dielectric film. As a result, the first storage capacitor 70-1 and the second storage capacitor 7
0-2 are connected in parallel with the first electrode portion that is a part of the capacitance line 300, thereby completing the storage capacitor 70 having a three-dimensional structure. Incidentally, the intermediate conductive layer 80 forming the storage capacitor 70 may be a multilayer film in combination with polysilicon.

Next, as shown in step (6) of FIG. 8, the intermediate conductive layer 80 and the first interlayer insulating film 41 are covered by, for example, normal pressure or reduced pressure CVD, TEOS gas, or the like.
A second interlayer insulating film 42 made of a silicate glass film such as NSG, PSG, BSG, BPSG, etc., a silicon nitride film, a silicon oxide film or the like and having a thickness of about 500 to 1500 nm;
To form At this time, the second interlayer insulating film 42
Thermal calcination is performed at a temperature of 00 ° C. or higher. Incidentally, a heat treatment at about 1000 ° C. may be performed in parallel with or before or after this thermal baking to activate the semiconductor layer 1a.

Next, in step (7) of FIG. 8, the data line 6a and the high-concentration source region 1d of the semiconductor layer 1a are electrically connected by dry etching or wet etching such as reactive ion etching or reactive ion beam etching. A contact hole 5 is formed. At this time, contact holes for connecting the scanning lines 3a and the capacitance lines 300 to wirings (not shown) in the peripheral region of the substrate are also provided.
Holes can be opened by the same process.

Next, in step (8) of FIG. 8, a low-resistance metal film such as Al or a metal silicide film is formed on the second interlayer insulating film 42 by sputtering or the like for about 100 to 500 nm.
After being deposited to a thickness of m, a data line 6a having a predetermined pattern is formed by a photolithography process, an etching process, or the like.

Next, as shown in step (9) of FIG. 8, a normal pressure or low pressure CVD method or a TEO
NSG, PSG, BSG, BPSG using S gas etc.
A third interlayer insulating film 43 made of a silicate glass film, a silicon nitride film, a silicon oxide film, or the like and having a thickness of about 500 to 1500 nm is formed. Further, a contact hole 8 for electrically connecting the pixel electrode 9a and the high-concentration drain region 1e is formed by dry etching such as reactive ion etching, reactive ion beam etching, or wet etching. Subsequently, a transparent conductive film such as an ITO film is deposited on the third interlayer insulating film 43 by sputtering or the like to a thickness of about 50 to 200 nm, and further, a pixel electrode is formed by a photolithography step, an etching step, and the like. 9a is formed. When the electro-optical device is used as a reflection type, the pixel electrode 9a may be formed from an opaque material having a high reflectance such as Al.

As described above, according to the manufacturing method of the present embodiment, in the steps (1) to (3) for forming the first interlayer insulating film 41, the lower film is made of a silicon nitride film having a high etching selectivity. 41a and the upper film is formed from a silicon oxide film 41b having a low etching selectivity,
In the formation region of the first storage capacitor 70-1 on the capacitance line 300,
By removing the silicon oxide film 41b by etching and leaving the silicon nitride film 41a, the first interlayer insulating film 41 is formed thin in this region. On the other hand, the capacitance line 300
By not etching the silicon oxide film 41b and the silicon nitride film 41a in a region that does not overlap with the above, a portion interposed between the scanning line 3a and the light shielding portion 80c is left thick. Thus, the above-described electro-optical device of the present invention can be manufactured relatively easily.

(Overall Configuration of Electro-Optical Device) The overall configuration of the electro-optical device in the embodiment configured as described above will be described with reference to FIGS. 9 and 10. FIG. FIG. 9 shows TF
FIG. 10 is a plan view of the T array substrate 10 together with the components formed thereon as viewed from the counter substrate 20 side.
It is HH 'sectional drawing of FIG.

In FIG. 9, a sealing material 52 is provided on the TFT array substrate 10 along the edge thereof.
In parallel with the inside, a light-shielding film 53 is provided as a frame that defines the periphery of the image display area 10a. A data line driving circuit 101 for driving the data line 6a by supplying an image signal to the data line 6a at a predetermined timing and an external circuit connection terminal 10 are provided outside the sealing material 52.
2 is provided along one side of the TFT array substrate 10, and supplies a scanning signal to the scanning line 3a at a predetermined timing to drive the scanning line 3a so as to drive the scanning line 3a.
Are provided along two sides adjacent to this one side.
If the delay of the scanning signal supplied to the scanning line 3a does not matter, it goes without saying that the scanning line driving circuit 104 may be provided on only one side. Further, the data line driving circuits 101 may be arranged on both sides along the side of the image display area 10a. Further, on one remaining side of the TFT array substrate 10, the scanning line driving circuits 104 provided on both sides of the image display area 10a are provided.
A plurality of wirings 105 for connecting between them are provided.
In at least one of the corners of the opposing substrate 20, a conductive material 106 for electrically connecting the TFT array substrate 10 and the opposing substrate 20 is provided. Then, as shown in FIG. 10, the opposite substrate 20 having substantially the same contour as the sealing material 52 shown in FIG. 9 is fixed to the TFT array substrate 10 by the sealing material 52.

Note that, on the TFT array substrate 10, in addition to the data line driving circuit 101, the scanning line driving circuit 104, etc., a sampling circuit for applying an image signal to a plurality of data lines 6a at a predetermined timing, a plurality of Data line 6a
A precharge circuit for supplying a precharge signal of a predetermined voltage level prior to the image signal, an inspection circuit for inspecting the quality, defects, and the like of the electro-optical device during manufacturing or shipping. Good.

In the embodiment described above with reference to FIGS. 1 to 10, instead of providing the data line driving circuit 101 and the scanning line driving circuit 104 on the TFT array substrate 10, for example, a TAB (Tape Automated bonding) substrate The drive LSI mounted thereon may be electrically and mechanically connected via an anisotropic conductive film provided on the periphery of the TFT array substrate 10. For example, TN (Twisted) is provided on each of the side of the opposite substrate 20 on which the projected light is incident and the side of the TFT array substrate 10 on which the emitted light is emitted.
Nematic) mode, VA (Vertically Aligned) mode, PDLC (Polymer Dispersed Liquid Crystal) mode and other operation modes, and normally white mode / normally black mode, depending on the polarizing film, retardation film, polarizing plate, etc. They are arranged in a predetermined direction.

Since the electro-optical device in the embodiment described above is applied to a projector, three electro-optical devices are used as light valves for RGB, and each light valve has a dichroic for RGB color separation. The light of each color decomposed via the mirror is respectively incident as projection light. Therefore, in each embodiment, the opposing substrate 20 is not provided with a color filter. However, an RGB color filter may be formed on the opposing substrate 20 in a predetermined area facing the pixel electrode 9a together with the protective film. In this way, the electro-optical device in each embodiment can be applied to a direct-view or reflective color electro-optical device other than the projector. Further, a micro lens may be formed on the counter substrate 20 so as to correspond to one pixel. Alternatively, it is also possible to form a color filter layer with a color resist or the like under the pixel electrode 9a facing the RGB on the TFT array substrate 10. By doing so, a bright electro-optical device can be realized by improving the light collection efficiency of incident light. Furthermore, the counter substrate 2
A dichroic filter that produces RGB colors using light interference may be formed by depositing many interference layers having different refractive indices on the zero. According to the counter substrate with the dichroic filter, a brighter color electro-optical device can be realized.

The present invention is not limited to the above-described embodiment, but can be appropriately modified without departing from the spirit and spirit of the invention which can be read from the claims and the entire specification. The electro-optical device and the manufacturing method thereof are also included in the technical scope of the present invention.

[Brief description of the drawings]

FIG. 1 is an equivalent circuit of various elements, wiring, and the like provided in a plurality of pixels in a matrix forming an image display area in an electro-optical device according to an embodiment of the present invention.

FIG. 2 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which data lines, scanning lines, pixel electrodes, and the like are formed in the electro-optical device of the embodiment.

FIG. 3 is a sectional view taken along line A-A ′ of FIG. 2;

FIG. 4 is a cross-sectional view showing the vicinity of a storage capacitor according to a modification.

FIG. 5 is a cross-sectional view around a storage capacitor according to another modification.

FIG. 6 is a cross-sectional view of the vicinity of a light-shielding portion and a TFT according to another modification.

FIG. 7 is a process chart (1) illustrating a manufacturing process of the electro-optical device according to the embodiment.

FIG. 8 is a process diagram (part 2) illustrating a process for manufacturing the electro-optical device of the embodiment.

FIG. 9 is a plan view of a TFT array substrate in the electro-optical device according to the embodiment together with components formed thereon viewed from a counter substrate side.

FIG. 10 is a sectional view taken along line H-H ′ of FIG. 9;

[Explanation of symbols]

 1a ... semiconductor layer 1a '... channel region 1b ... low-concentration source region 1c ... low-concentration drain region 1d ... high-concentration source region 1e ... high-concentration drain region 1f ... third electrode unit 2 ... insulating thin film 3a ... scanning line 6a ... data Line 5, 8a, 8b Contact hole 9a Pixel electrode 10 TFT array substrate 11a Lower light-shielding film 12 Base insulating film 16 Alignment film 20 Counter substrate 21 Counter electrode 22 Alignment film 30 TFT 41 1st interlayer insulating film 41a ... silicon nitride film 41b ... silicon oxide film 42 ... 2nd interlayer insulating film 43 ... 3rd interlayer insulating film 50 ... liquid crystal layer 70 ... storage capacitance 70-1 ... 1st storage capacitance 70-2 ... 2 storage capacitor 80 ... intermediate conductive layer 80a ... second electrode part 80b ... relay part 80c ... light shielding part 300 ... capacitance line

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 2H092 GA29 JA24 JA46 JB22 JB51 JB69 KB25 MA17 NA21 NA25 NA27 RA05 5C094 AA42 AA43 AA44 AA45 BA03 CA19 DA13 EA03 EA04 EA07 EA10 FB19 GB01 5F110 AA06 AA12 DD03 DD02 DD02 DD02 EE04 EE05 EE09 EE14 EE28 EE45 FF02 FF23 GG02 GG13 GG24 GG25 GG47 HJ12 HJ23 HL02 HL04 HL05 HL06 HL23 HM15 NN03 NN04 NN23 NN24 NN35 NN44 NN46 NN54 NN72 NN73 Q01Q19 Q19Q

Claims (16)

[Claims] 1. A pixel electrode, a thin film transistor connected to the pixel electrode, a scan line connected to the thin film transistor, and a storage capacitor formed of the same layer as the scan line and added to the pixel electrode on a substrate. A first electrode unit, an interlayer insulating film stacked on the first electrode unit and the scanning line, and stacked on the interlayer insulating film and facing the first electrode unit via the interlayer insulating film. An intermediate conductive layer including a second electrode portion of the storage capacitor and a light-shielding portion that covers the scanning line from above at least partially through the interlayer insulating film. An electro-optical device, wherein a film thickness between one electrode portion and the second electrode portion is formed smaller than a film thickness between the scanning line and the light shielding portion. 2. The electro-optical device according to claim 1, wherein the intermediate conductive layer further includes a relay unit that relay-connects the thin film transistor and the pixel electrode. 3. The first electrode section is composed of a part of a capacitance line arranged in parallel with the scanning line, and the second electrode section is composed of a pixel potential side capacitance electrode connected to the pixel electrode. The electro-optical device according to claim 1, wherein: 4. The electro-optical device according to claim 1, wherein the light shielding unit is arranged at least on a portion where the scanning line functions as a gate electrode of the thin film transistor. apparatus. 5. An inter-layer insulating film laminated on the intermediate conductive layer, and a data line laminated on the other inter-layer insulating film and intersecting with the scanning line and connected to the thin film transistor. The electro-optical device according to claim 1, further comprising: 6. The island-shaped planar shape including a first portion extending along the scanning line for each pixel and a second portion bent from the first portion and extending along the data line for each pixel. The electro-optical device according to claim 5, comprising: 7. The electro-optical device according to claim 1, wherein the intermediate conductive layer is made of a film containing a high melting point metal. 8. The electro-optical device according to claim 1, wherein the intermediate conductive layer is formed of a multilayer film in which a silicon film is stacked on a lower side. 9. The electro-optical device according to claim 3, wherein the capacitance line is partially wired in a region where the interlayer insulating film is formed thin. 10. The electro-optical device according to claim 5, wherein the data line is partially wired in a region where the interlayer insulating film is formed thin. 11. The interlayer insulating film is a single-layer film formed thin between the first electrode portion and the second electrode portion and thick between the scanning line and the light-shielding portion. The electro-optical device according to claim 1, wherein: 12. The inter-layer insulating film is formed of a first film between the first electrode portion and the second electrode portion, and is formed between the scanning line and the light shielding portion. 2. A multi-layer film comprising two films.
The electro-optical device according to any one of items 0 to 10. 13. The electro-optical device according to claim 12, wherein the first film is disposed below the second film. 14. The electro-optical device according to claim 12, wherein the first film is made of a silicon nitride film, and the second film is made of a silicon oxide film. 15. A method of manufacturing an electro-optical device for manufacturing the electro-optical device according to claim 11, wherein: forming the thin film transistor, the scanning line, and the first electrode unit on the substrate; Forming the interlayer insulating film on the scanning line and the first electrode unit; forming the intermediate conductive layer on the interlayer insulating film; forming the pixel electrode above the intermediate conductive layer The step of forming the interlayer insulating film includes an etching step of forming the light-shielding portion thin in a region overlapping with the first electrode portion by controlling an etching time of the single-layer film. Of manufacturing an electro-optical device. 16. A method for manufacturing an electro-optical device for manufacturing the electro-optical device according to claim 13, wherein: forming the thin film transistor, the scanning line, and the first electrode unit on the substrate; Forming the interlayer insulating film on the scanning line and the first electrode unit; forming the intermediate conductive layer on the interlayer insulating film; forming the pixel electrode above the intermediate conductive layer And forming the interlayer insulating film, wherein the first film is formed from a film having a high etching selectivity and the second film is formed from a film having a low etching selectivity. A method for manufacturing an electro-optical device, comprising: an etching step of etching away the second film in a region overlapping one electrode portion and leaving the first film.