JP2002108288A - Liquid crystal driving method, liquid crystal driving device and liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem that charging time to a pixel lacks, charging lacks and it becomes a flickering cause when one horizontal scanning period is short. SOLUTION: A plurality of lengths for one horizontal scanning periods are given. When a charging polarity is minus, one horizontal scanning period is shortened. When charging polarity is plus, one horizontal scanning period is prolonged.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display control technique in a liquid crystal display device, and more particularly to a technique suitable for an active matrix liquid crystal display device in which flicker is suppressed and high quality image quality is realized.

[0002]

2. Description of the Related Art In a liquid crystal display device, AC driving is an essential condition in order to prevent the composition of the liquid crystal from being decomposed and to secure an operating life. Therefore, the driving is performed by inverting the polarity of the voltage applied to the liquid crystal every predetermined period. Therefore, when displaying the same gradation, there are a case where a pixel is charged with a positive polarity and a case where a pixel is charged with a negative polarity. Hereafter, “+ polarity” indicates that the potential of the signal charging the pixel is higher than the previous frame, and “− polarity” indicates that the potential of the signal charging the pixel is lower than the previous frame. I do.

The resolution of a liquid crystal display device is SXGA (128
In the case of (0 × 1024 pixels) or less, one horizontal scanning period is about 15 μs or more. Therefore, in the active matrix, sufficient time for charging the pixels can be secured, and insufficient charging does not occur. However, UXGA (1600 × 1200
If the resolution becomes higher than (pixel), the time for one horizontal scanning period becomes about 10 μs or less, and the time required for charging the pixel is insufficient, resulting in insufficient charging, resulting in a problem that the image quality is deteriorated. This is shown in FIG. In FIG. 13, T1 is one horizontal scanning period, Vd1 is a pixel potential, V
s represents a source line potential, Vcom represents a common electrode potential, and ΔV represents a charging error. Vs and Vd1 when charging with + polarity
And a potential difference ΔV is generated, resulting in insufficient charging. Therefore, conventionally, a plurality of scanning lines (hereinafter, referred to as gate lines) are simultaneously selected to precharge the pixels, and a measure for insufficient charging has been taken by a method of substantially extending the selection time per line. This situation is shown in FIGS. 8, 9, 14 and 15. FIG. 8 shows a pixel arrangement when the pixel polarity is the same from the first line to the last line.
Is the drive waveform in that case. In the case of the pixel polarity arrangement shown in FIG. 8, as shown in the method of FIG. 9, the gate is turned on from one line before to precharge the pixel. On the other hand, FIG.
In the pixel polarity arrangement shown in FIG. 4, pixels having the same polarity are arranged every other line, so that the scanning line selection pulse is also turned on for each line as shown in FIG. This is referred to as a first conventional method. Alternatively, JP-A-62-55
694.

[0004]

As described above, if the time of one horizontal scanning period is short, insufficient charging of the pixel occurs. Therefore, it is necessary to take measures such as precharging the pixel. However, the first conventional method is effective in the case of a driving method in which adjacent scanning lines are charged with the same polarity, such as frame inversion driving and column inversion driving. In the driving method in which the polarity changes to “+, −, +, −,...” For each scanning line as shown in FIG.
In order to perform precharge with the same polarity, the jump simultaneous selection drive is performed, so that the gate line drive waveform is temporarily turned off. For this reason, the thin film transistor (hereinafter referred to as TFT) has a higher O
The time for N was reduced, and the precharge effect was weakened.
This becomes more serious as the time of one horizontal scanning period becomes shorter, and becomes more serious in the case where charging is performed with a positive polarity rather than a negative polarity.

The reason lies in the nature of the TFT generally used as a switching element of an active matrix liquid crystal display device. TFTs have the property that the larger the potential difference between the gate and the source, the more current can flow between the source and the drain. Therefore, the amount of current that the TFT can flow differs between the case where the pixel potential is charged with the + polarity and the case where the pixel potential is charged with the-polarity. Therefore, the time required to complete the charging of the pixel to the desired potential with the positive polarity is longer than the time required to complete the charging to the desired potential with the negative polarity.

As described above, when one horizontal scanning period is shortened, when the same gray scale is charged with a positive polarity and a negative polarity,
Positive polarity tends to cause insufficient charging, which becomes a residual DC component, causing a luminance difference between charging polarities, and causing flicker.

[0007]

According to a first aspect of the present invention, the same gray scale is displayed because the time until the completion of charging is different between the case of charging with a positive polarity and the case of charging with a negative polarity. However, in order to solve the problem that a luminance difference occurs between the positive polarity and the negative polarity and flicker occurs, a plurality of gate lines transmitting a scanning signal and a plurality of source lines transmitting an image signal are provided on a substrate. A switching element connected to a gate line and a source line corresponding to each intersection of the plurality of gate lines and the plurality of source lines, and the source via the switching element. A driving device for driving a liquid crystal display device provided with a pixel electrode connected to a line, and having a plurality of lengths of a horizontal scanning period to prevent a situation in which a pixel potential differs depending on a charging polarity, It is obtained so as to suppress the occurrence of Ricca.

According to a second aspect of the present invention, in order to realize the first aspect of the present invention, a plurality of gate lines transmitting a scanning signal and a plurality of source lines transmitting an image signal are formed on a substrate. A switching element connected to a gate line and a source line corresponding to each intersection of the plurality of gate lines and the plurality of source lines, and the source line via the switching element. And a pixel electrode connected to the liquid crystal display device. The driving device has two lines of storage means (hereinafter referred to as a line memory) capable of storing a video signal for one line. It is configured.

According to a third aspect of the present invention, in order to realize the first aspect of the present invention, a plurality of gate lines transmitting a scanning signal and a plurality of source lines transmitting an image signal are formed on a substrate. A switching element connected to a gate line and a source line corresponding to each intersection of the plurality of gate lines and the plurality of source lines, and the source line via the switching element. A driving device for driving a liquid crystal display device provided with a pixel electrode connected to a line memory, wherein a line memory capable of performing a writing operation and a reading operation at independent arbitrary timings is provided for one line. It is configured to have.

According to a fourth aspect of the present invention, in order to realize the first aspect of the present invention, a plurality of gate lines for transmitting a scanning signal and a plurality of source lines for transmitting an image signal are provided on a substrate. A switching element connected to a gate line and a source line corresponding to each intersection of the plurality of gate lines and the plurality of source lines, and the source line via the switching element. And a pixel electrode connected to the liquid crystal display device. The driving device drives the liquid crystal display device and has a storage unit (hereinafter, referred to as a frame memory) capable of storing a video signal for one screen. .

According to a fifth aspect of the present invention, in order to realize the first aspect of the present invention, a plurality of gate lines transmitting a scanning signal and a plurality of source lines transmitting an image signal are formed on a substrate. A switching element connected to a gate line and a source line corresponding to each intersection of the plurality of gate lines and the plurality of source lines, and the source line via the switching element. And a function of changing the output polarity of a driving device for driving the source line of the liquid crystal display device provided with a pixel electrode connected to the pixel electrode at an arbitrary timing.

In a sixth aspect of the present invention, a luminance measuring means for measuring the luminance of a liquid crystal panel is provided in order to realize an optimum flicker adjustment according to each liquid crystal panel in implementing the first aspect of the present invention. A luminance analyzing unit that analyzes luminance information measured by the luminance measuring unit; a liquid crystal driving device control unit that instructs to adjust a horizontal scanning period based on the information analyzed by the analyzing unit; A liquid crystal driving device having a function of changing the horizontal scanning period based on the control signal transmitted by the means, and automatically controlling the horizontal scanning period so as to minimize flicker at any position on the screen. Adjust the length of
A storage means for recording information of one horizontal scanning period at the time of adjustment and a screen position at that time is provided.

The seventh invention of the present application provides a scanning signal for driving a liquid crystal display device based on information on the length of a horizontal scanning period that minimizes flicker measured by the sixth invention of the present application. A plurality of gate lines for transmitting and a plurality of data lines for transmitting an image signal are provided so as to be orthogonal to each other, and a gate line corresponding to each intersection of the plurality of gate lines and the plurality of data lines. A driving device for driving a liquid crystal display device provided with a switching element connected to a data line, and a pixel electrode connected to the data line via the switching element, comprising a storage unit, It has means for reading information stored in the storage means, and has a function of changing a pixel charging time for each line based on the read information.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to FIGS.

(Embodiment of the First Invention of the Present Application) FIG. 1 is a diagram showing drive waveforms of a source line and a gate line and timings of pixel potentials suitable for implementing the first invention of the present application.

In FIG. 1, Vd represents a pixel potential, Vs represents a source line potential, and Vcom represents a counter electrode potential. In FIG. 1, when the potential applied to the liquid crystal is higher than Vcom, the polarity is positive, and when the potential is lower than Vcom, the polarity is negative. In the future, + polarity
The case where the potential of the signal charging the pixel is higher than that of the previous frame is referred to, and the term “−polarity” indicates the case where the potential of the signal charging the pixel is lower than that of the previous frame.

The amount of current that can flow through the TFT is proportional to the potential difference Vgs between the gate potential and the source potential. Therefore, +
In the case of charging by polarity, Vgs decreases with time, and the amount of current that can flow through the TFT also decreases with time. On the other hand, when the battery is charged with the negative polarity, Vgs increases with time, and the amount of current that can flow through the TFT also increases with time. Therefore, when the charging polarity is negative, the more the Vd approaches Vs, the more current can flow through the TFT, so that the charging time can be shortened. However, when the charge polarity is + polarity, as Vd approaches Vs, the amount of current that can flow through the TFT decreases, so that the charge time is longer than in the case of -polarity. If there is a potential difference between Vd and Vs when the gate of the TFT is turned off, the pixel is in an insufficiently charged state. Therefore, in order to obtain good image quality without insufficient charging, Vd is set at the point when the gate of the TFT is turned off.
= Vs. However, when the time of one horizontal scanning period is short, there is a problem that the charging time is insufficient and charging is insufficient. As described above, the time until Vd = Vs is different between the case of charging with the positive polarity and the case of charging with the negative polarity, and a longer charging time is required for the positive polarity. Can afford. Therefore, in the present invention, the charging time in the negative polarity is shortened, and the surplus time is allocated to the charging in the positive polarity. For that purpose, it is necessary to change the time of one horizontal scanning period depending on the polarity. Hereinafter, a method of changing the charging time according to the polarity using T1 to T3 will be described. In the future, the ratio of the positive and negative polarity charging times at which flicker is minimized will be referred to as the “optimal ratio”. At the time of detection of the optimum ratio, starting from the state of T2 = T3, gradually
Should be shortened and T3 should be lengthened.

T1 is one horizontal scanning period determined by the timing of an externally input video signal. In a normal liquid crystal driving method, one horizontal scanning period is T1 in any polarity. T2 and T3 are one horizontal scanning period having a different length from T1. T2 is one horizontal scanning period when writing the positive polarity, and is longer than T1.
Further, T3 is one horizontal scanning period when writing a negative polarity, and is shorter than T1. The relationship among T1, T2, and T3 is expressed by the following equations (1) and (2), respectively.

T1 <T2 (1) T1> T3 (2) It is the ON time of the gate that determines the charging time. FIG.
, Vg1 to Vg5 are scanning line driving waveforms (hereinafter referred to as gate driving waveforms) for driving 1 to 5 lines, respectively. At the timing when Vg1, Vg3, and Vg5 are turned on, the pixel is charged to the negative polarity, and thus Vg1, Vg
3. The ON period of Vg5 is T3. Vg2, Vg
At the timing when g4 is turned on, the pixel is charged to the positive polarity, and thus the ON periods of Vg2 and Vg4 are T2. As described above, one horizontal scanning period is longer when charging the positive polarity, and one horizontal scanning period is shorter when writing the negative polarity, and the positive and negative polarities are set within the two horizontal scanning periods (2 × T1). By changing the ratio of charging time and allocating extra time other than the time required for negative polarity charging to positive polarity charging, flicker-free good image quality can be obtained without charging shortage at any polarity. Can be In addition, even if one horizontal scanning period is short and charging is insufficient in any of the positive and negative polarities, flicker can be reduced by adjusting the ratio of the positive and negative charging times. Can be suppressed.

FIG. 2 shows, by way of example, a pixel polarity arrangement in which the pixel polarity is inverted every other line. FIG. 3 shows a scanning line driving waveform when this is driven by using the first invention of the present application. Incidentally, reference numeral 21 denotes a pixel. As described above, the scanning time of the negative polarity line is short, and the scanning time of the positive polarity line is long.
2. The relationship between the lengths of T3 is as shown in the following equation (3).

T2 + T3 = 2 × T1 (3) In this case, the charging does not become insufficient in any of the positive polarity and the negative polarity, and the occurrence of flicker can be suppressed. When determining the ratio of T2 and T3 irrespective of the pixel polarity arrangement, white, black,
A pattern that repeats white and black may be displayed and adjusted so that flicker is minimized.

FIG. 4 shows, as another example, a pixel polarity arrangement obtained by modifying the polarity arrangement of a so-called dot inversion drive in which the polarity is inverted up and down, left and right for each pixel. FIG.
However, in this arrangement, there is a line in which the pixel polarity changes to + and-in the horizontal direction, so that the effect of reducing flicker is further enhanced. In FIG. 4, A is a line having the same polarity in one horizontal row, B is a line in which the polarity is inverted every horizontal dot as “+, −, +, −”, C is a line in which the polarity of A is inverted, and D is a polarity of B. Is a line obtained by inverting the line.
The four lines A to D are repeated as one block. With such a polar arrangement, there is a line in which the polarity is reversed in both the horizontal and vertical directions within one frame.
The flicker is further reduced as compared with the polarity arrangement shown in FIG.
If the position of the group is shifted for each frame, flicker is further reduced.

FIG. 5 shows a scanning line driving waveform when driving the pixel arrangement of FIG. In FIG.
T5 represents a scanning line selection period of each line. The lengths of T1 to T3 are as described above.
T4 is a scanning line selection period when the line A is selected. The length of T4 may be set arbitrarily within the range shown by the following equation (4).

2 × T1 >> = T4 >> = T1 (4) Further, the timing of turning on the gate of the line corresponding to the period T4 is set to overlap with the period when the previous line D is on, and the timing of turning off the gate is set to the previous line. May be set to after T1 has elapsed since is turned off. In short, it is sufficient to precharge with the data of the previous line. Note that the overlapping period may be arbitrarily determined.

T5 is a drive waveform for scanning the B line. When driving this line, the gate is turned ON by T1 earlier than the original timing, and the line is precharged with the data of the previous line. As a result, the gate is continuously turned ON for 2 × T1, so that this line can be sufficiently charged.

Since the line C has all the negative polarity in one horizontal row,
The gate ON time is T3.

The scanning line selection period of the upper line of the line D is T3, and the remaining time can be used. Therefore, the scanning line selection period is set to T2. In this manner, good image quality without flicker can be obtained.

The optimum ratio of T2 and T3 varies depending on the position in the screen due to variations in TFT characteristics and differences in distance from the source driver and the gate driver. If the ratio between T2 and T3 is continuously changed according to the screen position, flicker can be reduced uniformly in the plane. According to this method, the optimum adjustment can be performed so that flicker can be minimized at any position on the screen without depending on variations in TFT characteristics and variations in the source driver and the gate driver. The effect of suppressing flicker is higher than the method of performing flicker adjustment.

In all the driving methods described in the present application, the output timing from the source driver to the source line is synchronized with the gate ON. Alternatively, the output timing to the source line may be slightly shifted in consideration of the rounding of the gate waveform due to the load capacitance of the gate line without completely synchronizing.

The present invention is particularly effective in a large-sized liquid crystal display device, and the liquid crystal mode is effective in IPS mode, TN mode, OCB mode, and MVA mode.

The change of the optimum ratio depending on the position in the screen can also be used as a guide when designing a TFT. Here, the ratio between the charging time in the positive polarity and the charging time in the negative polarity is defined as in the following equation (5), and this is referred to as a “charging ratio”.

When the optimum ratio is detected, T2 = T3
It is sufficient to gradually shorten T2 and lengthen T3 from the state described above.

Charge ratio = (Charge time with negative polarity) / (Charge time with positive polarity) (5) Now, the charge ratio is measured at a certain screen position, and when the charge ratio is large, charging with the positive polarity is performed. It can be said that the difference between the time and the charging time in the negative polarity is small, and the charging time has a margin. In other words, at that position, there is room for the charging capability of the TFT. On the other hand, when the charging ratio is small, the difference between the charging time in the positive polarity and the charging time in the negative polarity is large, and it can be seen that the charging time in the positive polarity is insufficient. Therefore, it is understood that it is necessary to increase the current capability of the TFT at that position.

Also, the present invention can be used as a design guideline when the capacitance value of the storage capacitor Cst arranged between the pixel electrode and the common electrode is changed according to the screen position. In this case as well, the relationship between the screen position and the charging ratio is measured, and at a position where the charging ratio is high, the capacitance of Cst may be reduced in order to reduce the load on the TFT.

(Second to Fourth Embodiments of the Present Application) FIG.
FIG. 4 is a configuration diagram of a liquid crystal driving device suitable for carrying out the second invention of the present application. In order to implement the first invention of the present application, it is necessary to change the timing of outputting video data from the source driver to the liquid crystal panel. Therefore, an operation of temporarily storing a video signal input from the outside and reading it at an arbitrary timing. is necessary. Therefore, it is necessary to have a storage unit for storing the video signal inside the driving device. The second invention of the present application relates to a configuration of a storage unit in a liquid crystal driving device and a driving method thereof.

In FIG. 6, reference numeral 61 denotes a controller and a controller for controlling storage means, a source driver, and a gate driver;
Is a selector for selecting and outputting one input signal from a plurality of output destinations, and 63 is a selector for selecting one from a plurality of input signals.
Selectors for selecting and outputting one of them, 64 and 65 are storage means capable of storing video signals for one line, 66 is a source driver, 67 is a gate driver, 6
8 is a liquid crystal display, 69 is a video signal input terminal, and 610 is a timing control signal for the source driver. According to the second invention of the present application, by having a line memory for two lines inside as described above, it is possible to output video data from the source driver to the liquid crystal panel at an arbitrary timing.

Hereinafter, the operation of the liquid crystal driving device according to the present configuration will be described with reference to FIGS. FIG. 7 shows the timing relationship between the write operation and the read operation to the line memory.

In FIG. 7, DE is a data enable signal indicating the valid period of the video signal. The period when DE is at the H level (hereinafter referred to as H) is a period during which the video signal is valid.
An L level (hereinafter referred to as L) is an invalid period, that is, a blank period.

The WRITE1 and WRITE2 signals are write control signals for the line memory 64 and the line memory 65, respectively. Each line memory performs a write operation when the corresponding WRITE signal is H.

When a video signal is input from outside and the DE signal is H
, WRITE1 first switches to H, and the line memory 64 starts a write operation in synchronization with the DE. At this time, the selector 62 has switched the connection destination to the line memory 64. When the video signal for one line ends, the DE signal switches to L and enters a horizontal retrace period, WRITE1 also switches to L, and the write operation of the line memory 64 ends.

Next, when the video signal of the second line is input and the DE signal is switched to H again, WRITE2 becomes H
, And the line memory 65 starts the write operation. At this time, the selector 62 has also switched the connection destination to the line memory 65. Then, when the video signal for one line is completed, the DE signal is switched to L and a horizontal retrace period is entered similarly to the first line, WRITE2 is also switched to L, and the write operation of the line memory 65 is completed.

By repeating the above operation, a video signal is written to the line memory 64 and the line memory 65 alternately for each line.

Next, the read operation will be described. RE
AD1 and READ2 are read control signals for the line memory 64 and the line memory 65, respectively. R
When EAD1 and READ2 are at the H level, the corresponding line memories perform the read operation. The read operation is performed in the line memory opposite to the line memory in which the write operation is performed.

Now, assuming that the first line is charged with a positive polarity and the second line is charged with a negative polarity, the line memory 64
After the end of the write operation (i.e., after the fall of WRITE1), the READ1 signal rises and the line memory 64 starts the read operation after the time of RDT1. R
The length of DT1 is such that the falling timing of WRITE2 is R
It can be arbitrarily determined as long as the range is before the rising timing of EAD1. After the read operation of the line memory 64 is completed, the line memory 65 starts the read operation. The read start timing is the time when the time of RDT2 has elapsed after the fall of WRITE2. If RDT1 <RDT2, then +
Depending on the polarity and the polarity, the charging time in the negative polarity can be lengthened.

The data read from the line memory is
Transferred to the source driver each time. After the transfer of all the video signals for one line is completed, the LP signal for instructing the source driver to perform digital / analog conversion (hereinafter referred to as D / A conversion) is switched to H for several clocks. Are D / A converted in the source driver. Then, in synchronization with the fall of LP, the source driver outputs the D / A converted video signal to the liquid crystal panel. If the output timing of the LP signal is output in synchronization with the falling edges of the READ1 and READ2 signals as shown in FIG.
Only by changing the timing of the AD2 signal, the length of one horizontal scanning period can be changed in accordance with the polarity for charging the pixel.

POL indicates the polarity of the signal output from the source driver to the liquid crystal panel. Here, the H level indicates + polarity and the L level indicates-polarity.

RDclk (read clock)
Alternatively, a clock having a frequency different from the external input clock (asynchronous clock) may be used. Examples of the RDclk clock generation unit include, but are not limited to, a unit using a quartz oscillator and a unit using a ceramic oscillator. Further, the frequency of RDclk may be arbitrarily set as long as the read operation of the line ends after the write end timing of the video signal for one line, that is, the fall timing of DE. As described above, when the clock frequency of RDclk is higher than that of the input clock, the read time from the line memory can be reduced as compared with the case where the read operation is performed using the same clock as the external input clock. The change range of the ratio between the polarity charging time and the negative polarity charging time can be widened. Providing a plurality of RDclk clock generation units having different frequencies can cope with a case where the clock frequency of the input video signal changes over a wide range.

Note that a PLL is used to generate the read clock.
(Phase Locked Loop) may be used. In this case, since the write clock to the memory, that is, the ratio between the frequency of the synchronous clock of the video signal and the frequency of the read clock is constant, the read operation can overtake the write operation even if the clock frequency of the video signal changes. There is no. Also in the case of using the PLL, the frequency of the read clock is arbitrarily set if the read operation of the line is completed after the write end timing of the video signal for one line, that is, the fall timing of DE. Good.

As described above, by providing the line memories for two lines inside, it becomes possible to store and read out video data input from the outside at an arbitrary timing. This makes it possible to change one horizontal scanning period to T2 or T3, as described in the first invention of the present application. As described above, the configuration using the memory that cannot perform the write operation and the read operation at the same time has been described. However, the memory that cannot perform the write operation and the read operation at the same time can be obtained at low cost as a general-purpose memory. ,
A configuration using this is effective in reducing the cost of the system.

As described in the third invention of the present application,
As a storage unit, a write operation and a read operation can be performed at arbitrary independent timings, and a storage unit having a video signal input terminal and an output terminal independently (hereinafter, referred to as a FIFO memory). May be used. FIG. 10 shows a configuration diagram of a liquid crystal driving device suitable for carrying out the third invention of the present application when a FIFO memory is used. 10, reference numeral 101 denotes an input terminal for inputting a video signal from the outside, 102 denotes a FIFO memory, 103 denotes a source driver, 104 denotes a controller, 105 denotes a gate driver, and 68 denotes a liquid crystal panel. By using the FIFO memory, one horizontal scanning period can be changed to T2 or T3.

Also, by using a FIFO memory, it is possible to perform a write operation and a read operation to the memory at the same time, it is not necessary to have a selector for switching the connection destination of the video signal, and the control circuit for the memory can be simplified. I can do it. Further, since the memory control circuit can be simplified, the gate scale of the LSI can be reduced, and the development period and cost of the controller can be reduced. Even when using FIFO memory,
The same effect as the configuration using the line memory for two lines can be obtained. Further, the use of the FIFO memory has an effect that the memory capacity can be reduced to one line and the memory capacity can be reduced.

As described in the fourth invention of the present application,
As the storage means, a frame memory may be used. By using a frame memory, one horizontal scanning period can be reduced to T
2 or T3. In addition, by using the frame memory, it is possible to allocate the vertical blanking period to the pixel charging time. This gives T2 + T3,
This can be realized by making the length longer than 2 × T1. Specifically, the frequency of the read clock from the memory may be lower than the frequency of the write clock. The configuration using the frame memory is almost the same as the configuration shown in FIG. In FIG. 10, reference numeral 102 denotes a FIFO memory.
The liquid crystal driving device according to the invention can be realized.

(Embodiment of the Fifth Invention of the Present Application) The fifth invention of the present application shows a configuration of a source driver suitable for implementing the first invention of the present application. The present invention makes it possible to control the output polarity of the source driver at an arbitrary timing for each output terminal. Hereinafter, description will be made with reference to FIG.

In FIG. 11, reference numeral 111 denotes an input terminal for inputting a video signal from the outside. 112 and 113 are line memories capable of storing video signals for one line, and 114 is a P
A selector for switching an output signal according to an OL signal, 11
5 and 116 are D / A converters, and 117 and 118 are POL signal input terminals for specifying the output polarity for the selector. For example, a positive polarity may be output if the POL signal is H, and a negative polarity may be output if the POL signal is L. Hereafter, 1
The signal input from 17 is called POL1, and the signal input from 118 is called POL2. POL1 and P
OL2 is connected to selectors arranged at every other output stage of the source driver, so that the output polarity from the source driver can be selected for every other output terminal. Reference numerals 119, 1110, 1111, and 1112 denote output terminals for outputting analog signals to the liquid crystal display device. Reference numeral 1113 denotes an input terminal of an LP signal for instructing transfer of a video signal from the line memory 112 to the line memory 113. When LP is switched to H, the selector 114 sets the output to a high impedance state at the same time as passing the video signal from the line memory 112 to 113, and when the LP is switched from H to L, the selector 114 Resumes output.

The operation from the input of the video signal to the output to the liquid crystal display device is as follows. First, the video signal input from the input terminal 111 is stored in the line memory 1
12 is stored. When the LP signal is switched to H, the line memory 112 transfers the stored video signal to the line memory 113. The video signal passed to the line memory 113 is converted into an analog signal by D / A converters 115 and 116. Where D /
The A converter 115 has a positive polarity, and the D / A converter 11
6 are converted to negative polarities, respectively. And the selector 114
Switches the output polarity according to POL1 and POL2,
Video signals are output from output terminals 119-1112. P
If the same signal is input to OL1 and POL2, the outputs have the same polarity in all the rows. Also, by inverting the signals input to POL1 and POL2, the polarity can be changed for each output channel. For example, H for POL1 and P for
When L is input to OL2, output terminals 1112, 1110
Outputs a positive polarity, and output terminals 1111 and 119 output a negative polarity.

With the above configuration, the output polarity of the source driver can be arbitrarily specified every other source, and the pixel polarity arrangement shown in FIGS. 2 and 4 can be realized.

Further, by arranging the selector at the output destination of the D / A converter, the output polarity can be changed at any timing only by switching the POL signal.
T2, which is one horizontal scanning period when charging to + polarity, and-
The ratio of T3, which is one horizontal scanning period when charging with polarity, can be arbitrarily set.

(Embodiment of the Sixth Invention and the Seventh Invention of the Present Application) The sixth invention of the present application relates to the ratio of the time for charging to the positive polarity and the time for charging to the negative polarity in accordance with the characteristics of the liquid crystal display device The present invention relates to a liquid crystal display device for optimizing the above for each liquid crystal display device. Due to variations in the manufacturing process, etc., the optimum ratio of the charging time of the positive polarity and the optimum time of the negative polarity may be different even in the liquid crystal display device manufactured under the same conditions. Therefore, if the optimum ratio is automatically measured, the information is recorded in the storage unit, and the liquid crystal display device is driven based on the information recorded in the storage unit, optimal driving for each liquid crystal display device can be realized. . This will be described below with reference to FIG.

In FIG. 12, reference numeral 121 denotes a liquid crystal display device, and reference numeral 122 denotes a luminance measuring means. Brightness measuring means 12
2, the luminance of the liquid crystal display device 121 is measured, and luminance information 127 measured by the luminance measuring means 122 is output to the control device 124. The luminance information from the luminance measuring means 122 and the polarity information 125 from the controller 126 are input to the control device 124. Also, the liquid crystal driving means 1
26, the current polarity information 125
, The polarity information 125 is output. Further, the control device 124 has a storage means, and receives the luminance information 127
At the same time, the polarity information 125 at that time can be stored. This makes it possible to detect the difference between the luminance when charged with the positive polarity and the luminance when charged with the negative polarity. The control device 124 feeds back the charging time instruction information 128 to the controller 126 so as to change the ratio of the charging time in the positive polarity and the charging time in the negative polarity so that the luminance difference information is minimized. The positions at which the luminance is measured may be changed arbitrarily to detect the optimum ratios according to the positions in the screen. Then, the controller 126 changes the charging ratio according to the information fed back from the control device 124 and drives the liquid crystal display device 121. This makes it possible to automatically detect the optimum ratio at which flicker is minimized uniformly in the screen.

The measured optimal ratio information is stored in the storage means 123, and the controller 126 has a function of reading the stored information.
If the pixel charging time is changed according to the optimum ratio read from the storage unit 123, driving optimized for each liquid crystal display can be performed, and flicker can be suppressed to the maximum. As the storage means, a storage means using a semiconductor may be used. For example, there are EPROM, EEPROM, flash memory, SRAM and the like. Further, a device using magnetism may be used. For example, magnetic tape, magnetic disk,
There are magnetic films and the like. Alternatively, a device using light may be used. For example, there are optical disks, optical tapes, optical films, and the like.

Further, the variation in the current-voltage characteristics (IV characteristics) of the TFT within the screen can be grasped from the measured optimum ratio information and position information, and are fed back as parameters for determining the conditions of the manufacturing process. Thus, there is an effect that optimum TFT manufacturing conditions can be found.

Further, there is an effect that a condition as to how the storage capacity Cst should be distributed in the screen can be found from the measured optimum ratio information and position information.

As described in the seventh invention of the present application,
The liquid crystal driving device is provided with a unit for reading information stored in the storage unit, and reads out the information recorded in the storage unit, and changes the charging ratio for each line according to the information, thereby displaying each liquid crystal display. Driving optimized for the device can be performed, and flicker can be reduced to the maximum irrespective of product variations. As described in the section of the sixth embodiment of the present invention, the storage means may be anything using a semiconductor, using magnetism, or using light. Preferably, the storage means is non-volatile. The format of the information to be stored may be any format as long as the relationship between the line position and the optimum ratio can be understood. For example, information may be arranged in two vertical columns, one column may be a line position, and the other column may be an optimal ratio at the line position. Then, when driving the liquid crystal display device, T2 and T2 are determined according to the position information and the optimum ratio information read from the storage means.
By changing the time of No. 3, it is possible to drive the liquid crystal display device at an optimal charging rate, and to reduce flicker.

[0064]

As described above, according to the first aspect of the present invention, by changing one horizontal scanning period depending on the positive and negative polarities, it is possible to suppress the shortage of the charge state in both the positive and negative polarities. In addition, there is no charge error between the polarities, and good image quality without flicker can be obtained.

According to the second aspect of the present invention, one horizontal scanning period can be changed to T2 or T3 between the case of charging with the + polarity and the case of charging with the-polarity.
A general-purpose memory can be used by using a configuration that uses a memory that cannot perform the write operation and the read operation at the same time, and the general-purpose memory can be obtained at low cost.
This is effective for reducing the cost of the system.

According to the third aspect of the present invention, one horizontal scanning period can be changed to T2 or T3 between the case of charging with the + polarity and the case of charging with the-polarity.
In addition, a write operation and a read operation to the memory can be performed at the same time, a selector for switching the connection destination of the video signal is not required, and a control circuit for the memory can be simplified. Further, since the memory control circuit can be simplified, the gate size of the LSI can be reduced, and there is an effect that the development period and cost of the controller can be reduced.

According to the fourth aspect of the present invention, one horizontal scanning period can be changed to T2 or T3 in the case of charging with the positive polarity and the case of charging with the negative polarity.
Also, the vertical retrace period can be used for the charging time, and there is an effect that a longer charging period can be secured.

Further, by combining any of the second or third invention or the fourth invention of the present application with the fifth invention of the present application, the ratio of the charging time in the positive polarity to the charging time in the negative polarity can be reduced. It can be changed arbitrarily.
One horizontal scanning period can be changed depending on the polarity. Charging shortage can be suppressed regardless of whether the polarity is positive or negative, and there is no charge error between the polarities, and good image quality without flicker can be obtained.

Further, according to the sixth aspect of the present invention, it is possible to detect the optimum charging rate, that is, the optimum rate for the liquid crystal display device, and to store the information. Also, from the relationship between the detected charging rate and the position,
It can be used as a guideline in designing and manufacturing a liquid crystal display device, and has an effect that flicker can be reduced from the design stage.

According to the seventh aspect of the present invention, the optimal charging rate, that is, the optimal rate, of the liquid crystal display device detected and recorded by the sixth aspect of the present invention is read out, and the liquid crystal display device is read out at the read optimal rate. The liquid crystal display device can be driven at an optimal charging rate, and the flicker can be reduced.

[Brief description of the drawings]

FIG. 1 is a diagram showing a liquid crystal driving waveform according to a first embodiment of the present invention and a state of charging time of a pixel.

FIG. 2 is a diagram showing an example of arrangement of pixel polarities suitable for driving using the first embodiment of the present invention;

FIG. 3 is a diagram showing a gate line drive waveform when the pixel polarity arrangement shown in FIG. 2 is driven.

FIG. 4 is a diagram showing an example of an arrangement of pixel polarities suitable for driving using the first embodiment of the present invention;

FIG. 5 is a diagram showing a gate line driving waveform when the pixel polarity arrangement shown in FIG. 4 is driven.

FIG. 6 is a diagram showing a configuration of a liquid crystal driving device according to a second embodiment of the present invention.

FIG. 7 is a diagram showing an operation of the liquid crystal driving device according to the second embodiment of the present invention;

FIG. 8 is a diagram showing an example of a pixel polarity arrangement in which one column has the same polarity;

FIG. 9 is a diagram showing a drive waveform when precharging the polarity arrangement shown in FIG. 8;

FIG. 10 is a diagram showing a configuration of a liquid crystal driving device according to a second embodiment of the present invention.

FIG. 11 is a diagram showing the operation of the liquid crystal driving device according to the second embodiment of the present invention.

FIG. 12 is a block diagram of a liquid crystal display device according to a seventh embodiment of the present invention.

FIG. 13 is a diagram showing a state in which insufficient charging has occurred when driven by a conventional driving method.

FIG. 14 is a diagram showing a pixel polarity arrangement in which pixels of the same polarity are arranged every other line.

FIG. 15 is a diagram showing a driving waveform when precharging the pixel polarity arrangement shown in FIG. 8;

[Explanation of symbols]

Vg1 Gate driving waveform Vg2 Gate driving waveform Vg3 Gate driving waveform Vg4 Gate driving waveform Vg5 Gate driving waveform T1 One horizontal scanning period T2 according to the conventional driving method T2 One horizontal scanning period T1 when + polarity is charged according to the first invention of the present application. According to the first invention of the present application, one horizontal scanning period T4 for charging the negative polarity T4, one horizontal scanning period for driving the line C in FIG. 4, and one horizontal scanning period for driving the line D in FIG. Scanning period Vcom Counter electrode potential Vs Source line potential Vd1 Pixel electrode potential Vd2 Pixel electrode potential 21 Pixel 41 Pixel A A is a line in which one row has the same polarity B +,-, +,-and a line whose polarity is inverted every horizontal dot for one line C A line in which the polarity of A is inverted D Line in which the polarity of DB is inverted 61 Controller 62 Selector 63 Selector 64 line memory 65 line memory 66 source driver 67 gate driver 68 liquid crystal display 69 video signal input terminal 610 timing control signal WRclk write clock DE signal indicating valid period of video signal WRITE1 write control signal to memory WRITE2 memory Write control signal READ1 Read control signal to memory READ2 Read control signal to memory RDclk Read clock LP Control signal to output analog signal to source driver POL Signal indicating current charging polarity Fg Gate dry shift Clock 101 Video signal input terminal 102 FIFO memory 103 Source driver 104 Controller 105 Gate driver 111 Video signal input terminal 112 Line memory 113 Line memory 114 Selector 115 D / A converter 116 D / A converter 117 POL signal input terminal 1 118 POL signal input terminal 2 119 Analog signal output terminal 1110 Analog signal output terminal 1111 Analog signal output terminal 1112 Analog signal output terminal 1113 LP signal input Terminal 121 Liquid crystal display device 122 Brightness measuring means 123 Storage means 124 Control means 125 Polarity information 126 Liquid crystal driving means 127 Brightness information 128 Charging time instruction information ΔV Potential difference between Vs and Vd1 141 Pixel 142 Pixel 151 Gate shift clock 152 Gate drive Waveform

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G09G 3/20 623 G09G 3/20 623P 631 631M F-term (Reference) 2H093 NA16 NA34 NA43 NA55 NB16 NB21 NC09 NC16 NC24 NC29 NC34 NC35 ND10 NH15 NH16 5C006 AA16 AC22 AC28 AF42 AF44 BB16 BC22 BF05 BF24 FA23 5C080 AA10 BB06 DD06 EE29 FF11 GG12 JJ02 JJ04

Claims (41)

[Claims] 1. A plurality of gate lines for transmitting a scanning signal and a plurality of source lines for transmitting an image signal are provided on a substrate so as to be orthogonal to each other, and the plurality of gate lines and the plurality of sources are provided. Driving for driving a liquid crystal display device provided with a switching element connected to a gate line and a source line, and a pixel electrode connected to the source line via the switching element, corresponding to each intersection with the line; What is claimed is: 1. A liquid crystal driving device, comprising: a plurality of lengths of horizontal scanning periods. 2. The method according to claim 1, wherein the length of the horizontal scanning period is longer when the potential of the signal charging the pixel is higher than the previous frame than when the potential is lower than the previous frame. The liquid crystal driving device as described in the above. 3. A pixel polarity arrangement includes a horizontal line having the same polarity (referred to as A), a line whose polarity is inverted for each pixel (referred to as B), and the horizontal line having the same polarity. (A) is a line having an opposite polarity (this is called a C line), and a line (B) whose polarity is inverted for each pixel is a line having an opposite polarity (this is called D). And the lines A to D are represented by A, B, C, D, A, B,
The liquid crystal driving device according to claim 1, wherein C, D, ... are repeated. 4. The liquid crystal driving device according to claim 3, wherein the positions of A, B, C, and D change for each frame. 5. A plurality of gate lines for transmitting a scanning signal and a plurality of source lines for transmitting an image signal are provided on a substrate so as to be orthogonal to each other, and said plurality of gate lines and a plurality of sources are provided. Driving for driving a liquid crystal display device provided with a switching element connected to a gate line and a source line, and a pixel electrode connected to the source line via the switching element, corresponding to each intersection with the line; A liquid crystal drive device, comprising: two lines of storage means capable of storing a video signal for one line. 6. The liquid crystal driving device according to claim 5, wherein a plurality of types of lengths of the horizontal scanning period are provided. 7. The frequency of the synchronous clock signal for reading the video signal stored in the storage means is the same as the frequency of the synchronous clock signal of the video signal input from the outside. Item 6. A liquid crystal driving device according to item 5. 8. The frequency of a synchronous clock signal for reading a video signal stored in a storage means is different from the frequency of a synchronous clock signal of an externally input video signal. Item 6. A liquid crystal driving device according to item 5. 9. The liquid crystal driving device according to claim 5, wherein the frequency of the synchronous clock signal for reading the video signal stored in the storage means automatically changes according to the frequency of the external input clock. apparatus. 10. The liquid crystal driving device according to claim 5, wherein one or more read clock generation means are provided inside. 11. A plurality of gate lines for transmitting a scanning signal and a plurality of source lines for transmitting an image signal are provided on a substrate so as to be orthogonal to each other, and said plurality of gate lines and a plurality of source lines are provided. Driving for driving a liquid crystal display device provided with a switching element connected to a gate line and a source line, and a pixel electrode connected to the source line via the switching element, corresponding to each intersection with the line; An apparatus, in which a write operation and a read operation can be performed at arbitrary independent timings, and has storage means for one line of a video signal which has independent input terminals and output terminals for the video signal. A liquid crystal drive device characterized by the above-mentioned. 12. The liquid crystal driving device according to claim 11, wherein the liquid crystal driving device has a plurality of lengths of the horizontal scanning period. 13. The frequency of a synchronous clock signal for reading a video signal stored in a storage means is the same as the frequency of a synchronous clock signal of an externally input video signal. Item 12. A liquid crystal driving device according to item 11. 14. The frequency of a synchronous clock signal for reading a video signal stored in a storage means is different from the frequency of a synchronous clock signal of an externally input video signal. Item 12. A liquid crystal driving device according to item 11. 15. The liquid crystal driving device according to claim 11, wherein the frequency of the synchronous clock signal for reading the video signal stored in the storage means automatically changes according to the frequency of the external input clock. apparatus. 16. The liquid crystal driving device according to claim 11, wherein one or more read clock generation means are provided inside. 17. A plurality of gate lines for transmitting a scanning signal and a plurality of source lines for transmitting an image signal are provided on a substrate so as to be orthogonal to each other, and said plurality of gate lines and a plurality of source lines are provided. Driving for driving a liquid crystal display device provided with a switching element connected to a gate line and a source line, and a pixel electrode connected to the source line via the switching element, corresponding to each intersection with the line; What is claimed is: 1. A liquid crystal driving device, comprising: a storage unit capable of storing a video signal for one screen. 18. The liquid crystal driving device according to claim 17, wherein a plurality of types of lengths of the horizontal scanning period are provided. 19. The frequency of a synchronous clock signal for reading a video signal stored in a storage means is the same as the frequency of a synchronous clock signal of a video signal input from the outside. Item 18. A liquid crystal driving device according to item 17. 20. A frequency of a synchronous clock signal for reading a video signal stored in a storage means is different from a frequency of a synchronous clock signal of an externally input video signal. Item 18. A liquid crystal driving device according to item 17. 21. The liquid crystal driving device according to claim 17, wherein the frequency of the synchronous clock signal when reading the video signal stored in the storage means automatically changes according to the frequency of the external input clock. apparatus. 22. The liquid crystal driving device according to claim 17, wherein at least one read clock generation means is provided inside. 23. A plurality of gate lines for transmitting a scanning signal and a plurality of source lines for transmitting an image signal are provided on a substrate so as to be orthogonal to each other, and said plurality of gate lines and a plurality of source lines are provided. A liquid crystal display device provided with a switching element connected to a gate line and a source line and a pixel electrode connected to the source line via the switching element corresponding to each intersection with the line, What is claimed is: 1. A liquid crystal display device for driving lines, wherein an output polarity can be changed at an arbitrary timing. 24. An output terminal having at least one digital / analog conversion means therein.
A liquid crystal display device according to claim 23. 25. The liquid crystal display device according to claim 23, wherein the output section has a selector, and an output polarity can be arbitrarily designated from the outside for each terminal. 26. A plurality of gate lines for transmitting a scanning signal and a plurality of source lines for transmitting an image signal are provided on a substrate so as to be orthogonal to each other, and said plurality of gate lines and a plurality of source lines are provided. A liquid crystal display device provided with a switching element connected to a gate line and a source line and a pixel electrode connected to the source line via the switching element corresponding to each intersection with the line, What is claimed is: 1. A liquid crystal display device, comprising: a plurality of output terminals; 27. The liquid crystal display device according to claim 26, wherein the liquid crystal display device has two or more output signal polarity designation terminals. 28. A luminance measuring means for measuring luminance of the liquid crystal display device, a luminance analyzing means for analyzing luminance information measured by the luminance measuring means, and a horizontal scanning period based on the information analyzed by the luminance analyzing means. A liquid crystal driving device control means for instructing to adjust the position, and a liquid crystal driving device having a function capable of changing a horizontal scanning period based on a control signal transmitted by the liquid crystal driving device control means. Automatically detects the length of the horizontal scanning period such that flicker is minimized at an arbitrary position, and outputs the information of the detected optimal horizontal scanning period as position information at that time,
A liquid crystal display device comprising: a recording unit capable of recording in a storage unit together with temperature information. 29. The liquid crystal display device according to claim 28, wherein said storage means is a storage means using a semiconductor. 30. The liquid crystal display device according to claim 28, wherein said storage means is storage means using magnetism. 31. The liquid crystal display device according to claim 28, wherein said storage means is a storage means using light. 32. The liquid crystal display device according to claim 28, wherein said storage means is nonvolatile. 33. A plurality of gate lines for transmitting a scanning signal;
A plurality of data lines for transmitting image signals are provided so as to be orthogonal to each other, and switching corresponding to each intersection between the plurality of gate lines and the plurality of data lines is performed. A driving device for driving a liquid crystal display device provided with a pixel element and a pixel electrode connected to the data line via the switching element, comprising a storage unit, and information stored in the storage unit. A liquid crystal driving device, comprising: means for reading out pixel data; and a function of changing a pixel charging time for each line based on the read out information. 34. The liquid crystal driving device according to claim 33, wherein said storage means is a storage means using a semiconductor. 35. The liquid crystal driving device according to claim 33, wherein the storage means is a storage means using magnetism. 36. The liquid crystal driving device according to claim 33, wherein said storage means is a storage means using light. 37. The liquid crystal driving device according to claim 33, wherein said storage means is non-volatile. 38. A plurality of gate lines for transmitting a scanning signal and a plurality of source lines for transmitting an image signal are provided on a substrate so as to be orthogonal to each other, and said plurality of gate lines and a plurality of sources are provided. A method for driving a liquid crystal display device provided with a switching element connected to a gate line and a source line and a pixel electrode connected to the source line via the switching element corresponding to each intersection with the line. And a plurality of types of lengths of the horizontal scanning period. 39. The method according to claim 39, wherein the length of the horizontal scanning period is longer when the potential of the signal charging the pixel is higher than in the previous frame than when it is lower than in the previous frame. The liquid crystal driving method described. 40. A pixel polarity arrangement includes a line having the same polarity in one horizontal line (this is referred to as A), a line in which the polarity is inverted for each pixel (this is referred to as B), and a line having the same polarity in one horizontal line. (A) is a line having an opposite polarity (this is called a C line), and (B) is a line whose polarity is inverted for each pixel.
And lines having opposite polarities (hereinafter referred to as D), and the lines A to D are denoted by A, B, C, D, A, B,
40. The method of claim 39, wherein C, D,... Are repeated.
3. The liquid crystal driving method according to 1. 41. The liquid crystal driving method according to claim 40, wherein the positions of A, B, C and D change for each frame.