JP2002074667A - Disk drive device and calibration method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To permit efficient data recording operation without lowering accessibility while appropriate recording power is obtained. SOLUTION: When write sequence is started (S100-S103), the recording operation at a sector unit is normally finished (S104), and further when a calibration flag is not raised (S105), the data recorded on a calibration sector are reproduced (S111) to calculate (S112) an asymmetric value. Then, the present state (appropriateness of recording power) is discriminated (S116) on the basis of the asymmetric value, and the power calibration is carried out (S117) when the recording power is not adequate and the power calibration should be immediately carried out. Thus, after the recording at the sector unit is performed, the present state is discriminated and the power calibration is carried out step by step at need.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a disk drive device for performing a calibration for optimally reproducing / recording data on a magneto-optical disk, an optical disk, or the like.

[0002]

2. Description of the Related Art For example, a magneto-optical disk such as an MO (Magnet Optical), a DVD-RW (Digital Versatile Disc), etc.
-Rewritable), CD-ROM (Compact Disc Read Onl)
y Memory) or FD (Floppy Dis
Magnetic disks such as c) are each configured as a removable recording medium corresponding to a drive device that can perform recording / reproduction on each disk. Therefore, the user can perform recording / reproduction by selectively loading a required disk into the drive device.

[0003]

By the way, in a drive device corresponding to the above-mentioned removable disk, it is required to perform recording / reproduction in a stable state with respect to an unspecified large number of disks to be loaded. However, in general, discs are subject to recording, playback, recording, reproduction, etc. due to manufacturing variations, manufacturing environment, and recording / reproduction temperatures.
Variations occur in the characteristics of the servo and the like. Similarly,
Also on the drive device side, there are variations in the characteristics of recording, reproduction, and servo. Therefore, in order for the drive device to perform recording / reproduction on a certain disk in a stable state, recording / reproduction is repeatedly performed on a predetermined area (for example, a calibration area) of the disk, and the result is obtained. It is necessary to adjust various settings for performing recording / reproduction based on the amplitude of the reproduced signal and the like. Such adjustment processing is called calibration. In a drive device, when a disk that requires calibration is loaded, perform calibration first, and then
For example, operations such as recording / reproduction are performed.

However, it takes a relatively long time to perform the calibration. Therefore, even if a command to execute recording / reproduction is received from an external device such as a host computer when the calibration is being performed, for example, immediately after the disk is loaded or when the temperature in the drive device changes, the calibration is performed. After the end of the operation, the recording / reproducing operation is performed. That is, the process of the drive device itself is delayed by performing the calibration. However, in some cases, recording and reproduction can be performed without any problem without actually performing calibration. Also in such a case, performing the calibration has an advantage that the system margin increases. Therefore, it is desired to efficiently execute calibration according to the situation.

[0005]

SUMMARY OF THE INVENTION In order to solve such a problem, the present invention provides an identification information setting means which can set identification information indicating whether or not to execute a power calibration sequence; Recording control means capable of executing a write sequence for performing recording for each predetermined unit of data on a recording medium, and recording capable of recording supplied data based on the recording control means Means, a reproducing means capable of reproducing data recorded by the recording means, and, in a write sequence executed by the recording control means, when data recording of a predetermined unit is normally completed, A reproduction control means capable of executing reproduction of data recorded in a calibration area of the recording medium on the basis of When the reproduction of the data recorded in the calibration area is completed normally, an asymmetry calculation unit for obtaining the asymmetry of the data, and a power calibration sequence based on the asymmetry calculated by the asymmetry calculation unit. The disk drive device includes a determination unit that determines whether or not to execute the calibration, and a calibration execution control unit that can execute a part of the power calibration sequence based on the determination result of the determination unit.

[0006] Also, reproduction control means for executing a read sequence for reproducing data for each predetermined unit, reproduction means for reproducing the data based on the reproduction control means, A determining unit for determining whether or not the data reproduction for each predetermined unit has been normally completed when the sequence is being executed; and calibrating a gain level of the reproducing unit based on a result of the determination by the determining unit. A disk drive device is provided with calibration execution control means capable of executing a part of the sequence.

[0007] As a calibration method, a step of executing a write sequence for recording supplied data on a recording medium in predetermined units, a step of reproducing data recorded on the recording medium, Under the state of being executed, when the data recording of the predetermined unit is normally completed, a step of reproducing the data recorded in the calibration area based on the identification information,
When the reproduction of the data recorded in the calibration area is completed normally, a step of obtaining an asymmetry of the data, and a step of determining whether to execute a power calibration sequence based on the asymmetry, A step of executing a power calibration sequence based on the result of the determination.

A step of executing a read sequence for reproducing the data recorded on the recording medium for each predetermined unit; and, if the read sequence is being executed, whether the reproduction of the predetermined unit of data has been normally completed. Determining whether the data is read or not, and performing a calibration of a gain level when reading data recorded on the recording medium based on a result of the determination.

According to the present invention, a power calibration sequence for obtaining an appropriate recording laser power is divided, incorporated into a write sequence, and executed progressively. Data can be efficiently recorded without impairing accessibility.

In addition, since a calibration sequence for obtaining an appropriate gain level at the time of data reproduction is divided and incorporated into a read sequence and is progressively executed, the access sequence can be obtained while obtaining an appropriate gain level. Data can be efficiently reproduced without impairing the data.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below in the following order. 1. 1. Configuration of disk drive device 2. Viterbi decoding method Viterbi decoder 4. 4. Various evaluation values obtained from the amplitude reference value Power calibration 6. 6. Write sequence of the present embodiment VGA calibration Read sequence of this embodiment

1. FIG. 1 shows a configuration of a disk drive device according to the present embodiment. Note that this block diagram mainly shows a processing system for a recording / reproducing signal, and there are some other parts omitted from the servo system. Further, in the present embodiment, a disk drive device corresponding to, for example, a rewritable magneto-optical disk (MO disk) as a recording medium is taken as an example.

The recording / reproducing / erasing of information is performed by the operation of the optical pickup 7 and the magnetic head 5 while the disk 6 (MO disk) serving as the recording medium is rotated by the spindle motor 9 in the drive device. . Position control of the optical pickup 7 and the magnetic head 5 during recording / reproducing / erasing (seek, tracking servo,
The thread servo), the focus servo of the laser beam from the optical pickup 7, and the rotation servo of the spindle motor 9 are performed by a servo system (not shown).

A drive controller (hereinafter, referred to as a controller) 2 serves as a master controller of the drive device and controls various operations and communicates with the host computer 1. That is, the controller 2 controls the operation of recording the supplied data on the disk 6 in response to the recording instruction from the host computer 1, and also reads the requested data from the disk 6 in response to the instruction from the host computer 1. Control of the transfer to the host computer 1. The controller 2 also has a function of encoding and decoding data.

The CPU 3 is a part for controlling each part for a recording / reproducing operation based on an instruction from the controller 2, and performs, for example, various controls on the RF block 20 of the reproducing system. Further, in the present embodiment, it is possible to count the number of reproduction / recording errors, count the number of executions of various calibrations, or set a calibration flag as identification information indicating that calibration has been completed normally. Will be able to. Therefore, the CPU 3 has a configuration including a storage unit that can store the count value and the identification information. The storage means may be provided separately from the CPU 3.

At the time of recording, the controller 2 receives user data to be recorded in accordance with a command from the host computer 1 and encodes the data based on the user data as an information word, for example, an RLL as a code word.
Generate a (1,7) code. This code word is recorded data W
The data is supplied to the LPC 4 as DATA. Controller 2
Performs operations such as a decoding process described later, control of each mode such as recording, reproduction, and erasing, and communication with the host computer 1 in addition to such a process. Note that RLL code (run-length limited code) is RLL.
In the recording data encoded by (1, 7), the code interval is 2T to 8T.

The LPC 4 generates a laser drive signal (drive pulse) so as to execute laser output from the optical pickup 7 at each of reproduction, recording, and erasing. This drive pulse is APC (Auto Power C
and a drive section (hereinafter, APC) 10 to apply a current corresponding to a drive pulse to the laser diode by the APC 10, thereby performing laser output from the laser diode in the optical pickup 7. Further, the APC 10 performs feedback control so as to keep the laser level at a predetermined value.

As described above, the LPC 4 and APC 10 control the laser power of the optical pickup 7 in accordance with the supplied recording data to form a pit row on the disk 6 rotated by the spindle motor 9. Thus, recording is performed. For example, in the case of a drive device corresponding to a rewritable magneto-optical disk (MO disk), a pit row having a magnetic polarity is formed on the disk 6. In this case, the magnetic head 5 applies a bias magnetic field to the disk 6. In addition, write-once discs (WO
In the case of a drive device corresponding to a so-called abrasive type (perforated type) disk which is an RM disk, an embossed pit row is formed by a laser beam. In the case of a write-once disk (WORM disk), which is a drive device corresponding to a so-called alloy type disk, a pit row is formed by causing a change in the reflectance of the disk recording surface by laser light. Further, in the case of a drive device corresponding to a phase change type disk, a phase change pit row is formed by a laser beam.

In the pit train, mark edge recording as described later is performed in accordance with a precode output generated as described later based on the recording data. A method for associating each pit to be formed with each pit in a precode output generated as described later based on the recording data will be described with reference to FIG. A recording method in which pits are formed for, for example, "1" and no pits are formed for "0" during precode output is referred to as a mark position recording method. On the other hand, a recording method in which the polarity inversion at the boundary of each pit in the precode output expressed by the edge of each pit corresponds to, for example, “1” is referred to as a mark edge recording method. At the time of reproduction, the boundary of each pit in the reproduction signal is recognized according to a read clock DCK generated as described later.

The laser output level at the time of reproduction and at the time of recording, that is, the drive pulse value of the laser output from the LPC 4 is set, for example, in accordance with an instruction from the CPU 3. Therefore, the controller 2 can change the recording laser power and the reproduction laser power by instructing the CPU 3.

Data is read by the reproducing system shown in FIG. 1 for a verify operation at the time of reproduction (at the time of normal reproduction and at the time of write and verify in which data is read immediately after recording to verify proper recording (verify)). ), The following operation is performed under the control of the controller 2 and the CPU 3.

The controller 2 receives the RGATE signal, PGA
The TE signal is supplied to the LPC 4 and the RF block 20,
The playback operation is controlled. That is, the controller 2 is an RGA
The TE signal and the PGATE signal instruct the LPC 4 to continuously emit light with the laser power as the reproduction level, and also instruct the RF block 20 to perform a reproduction process. In addition, a switching process corresponding to an area on the disk 6 (an emboss pit area and a magneto-optical area in a sector to be described later) is executed by the PGATE signal.

At the time of reproduction, first, LPC 4
A laser drive pulse is generated according to the E signal, and a laser output for a reproducing operation is executed from the optical pickup 7. The optical pickup 7 irradiates the magneto-optical disk 6 with laser light, and receives reflected light generated thereby. Further, various signals are generated by arithmetic processing of signals according to the amount of reflected light. That is, it is a reproduction RF signal, a focus error signal, a tracking error signal, and the like (not shown).

The reproduced RF signal is supplied to the filter unit 11 after the gain is adjusted by the variable gain amplifier 8 in the RF block 20. The gain setting in the variable gain amplifier 8 is performed by a control signal from the CPU 3. For example, the gain setting is changed according to the RF signal level that varies depending on the type and characteristics of the disk so that an RF signal optimal for reproduction signal processing is obtained. In the figure, an arrow C indicates a transmission / reception system of a control signal with the CPU 3. With this transmission / reception system, the CPU 3
Control of parameter setting of each unit is performed.

There are two types of reproduction RF signals supplied from the optical pickup 7 to the variable gain amplifier 8, so-called sum signals and difference signals, and switching processing is performed according to the area in the sector according to the PGATE signal. . That is, the reproduced data of the portion where the embossed pit is formed is processed for the sum signal, and the reproduced data of the portion where the pit row is magneto-optically recorded is processed for the difference signal. The reflected light information includes a focus error signal, a tracking error signal, and the like in addition to the reproduction RF signal corresponding to the reproduction data. The focus error signal and the tracking error signal are used for controlling a servo system (not shown).

Here, a format of a sector which is a unit when recording / reproducing with respect to the disk 6 according to FIG. 3 will be described. The header is a read-only area (pit area) in which so-called embossed pits are preformatted and recorded. As shown in FIG.
Other than the header, that is, the section from the transition area TA1 to the transition area TA2 is an MO area where magneto-optical recording is enabled.

FIG. 3A shows the number of bytes in each area. One sector consists of a 64-byte header, a 1-byte transition area TA1, a 17-byte ALPC gap, and a 27-byte ALPC gap. VF03, 4 byte sync, 2498 byte data field, 2 byte postamble PA2, 21 byte buffer, 1 byte
It is divided into a byte transition area TA2.

FIG. 3B shows a 64-byte header in an enlarged manner. The header includes a sector mark SM (8 bytes), VFO1 (26 bytes), and an address mark AM1.
(1 byte), address ID1 (5 bytes), VFO2
(16 bytes), address mark AM2 (1 byte),
Address ID2 (5 bytes) and postamble PA
1 (one byte) is arranged in order.

The sector mark SM is a mark for identifying the start of a sector, and a pattern not occurring in the (1-7) RLL code is formed by embossing. The VFO field in one sector indicates the VFO (Variable Frequency) in the PLL section of the disk drive device.
ency oscillator) to synchronize the VFO
1, VFO2 and VFO3. That is, these are P
This is an LL pull-in area. And the VFO is in the pit area
1 and VFO2 are formed by embossing. The VF03 is provided in the MO area as shown in FIG. 3A, and is magneto-optically recorded when a recording operation is performed on the sector.

In VFO1 and VFO2, a signal of a predetermined pattern for performing PLL pull-in (generation of a reproduction clock) for reading data (address) in the header is recorded. On the other hand, in the VFO 3, a signal of a predetermined pattern for performing PLL pull-in (generation of a reproduction clock) for reading data recorded in the MO area is recorded. For example, the VFO 3 has a pattern (2T pattern) in which channel bits “0” and “1” alternately appear. Therefore, assuming that the time corresponding to the time length of one channel bit is T, a reproduced signal whose level is inverted every 2T is obtained when the VFO field is reproduced.

The address marks AM1 and AM2 are used to provide byte synchronization to the device for subsequent addresses ID1 and ID2, respectively, and have a predetermined pattern. Each of the addresses ID1 and ID2 has, as identification information of the sector, an address of the sector, that is, information of a track number and a sector number, and a CRC byte for error detection of the information. Each of the 5-byte addresses ID1 and ID2 is address information of a sector, and these are the same data. That is, the address is recorded twice in one sector.

The postamble PA1 in the header and the PA2 in the MO area each have a predetermined pattern.

As shown in FIG. 3C, a 2-byte logical track number, a 1-byte sector number, and a 2-byte CRC are assigned to the 5-byte addresses ID1 and ID2, respectively.

In FIG. 3 (a), the ALPC gap area provided via the transition area TA1 following the header secures the time required for the apparatus to complete the processing after reading the header and stores the VFO3 after the header. It is provided for the purpose of tolerance of positional deviation, a test of laser power at the time of recording, and the like.

The sink (4 bytes) is provided for the device to obtain byte synchronization for the subsequent data field, and has a predetermined bit pattern. The data field is provided for recording user data, and becomes 2498 bytes by recording error detection and correction parities in addition to the user data. In the data field, a resync pattern for synchronization is arranged at a predetermined position. The buffer field is used as a tolerance for electrical or mechanical errors.

The filter section 11 shown in FIG.
It comprises a boost circuit for the F effective band, a low-pass filter for performing noise cut, a waveform equalizer for performing waveform equalization, and the like. The input signal is equalized so that a partial response characteristic suitable for the Viterbi decoding method performed by the Viterbi decoder 13 is obtained.
The output of the filter unit 11 is supplied to an A / D converter 12.

The output of the filter unit 11 is also supplied to the PLL unit 14. The PLL unit 14 generates a read clock DCK based on the supplied signal. This P
The LL unit 14 is configured to detect a phase error by using a signal of a constant frequency recorded on the disk 6, for example. The read clock DCK is output from the controller 2, A
/ D converter 12, Viterbi decoder 13, and the like. The operation for decoding the reproduction data in the controller 2, the A / D converter 12, and the Viterbi decoder 13 is performed at a timing according to the read clock DCK. A / D
The converter 12 receives the reproduction clock DCK from the PLL unit 14.
A / D conversion is performed on the output of the filter unit 11 to output a reproduced signal value z [k].

The Viterbi decoder 13 outputs a reproduced signal value z [k]
, The decoded data DD is generated by the Viterbi decoding method. The decoded data DD is a maximum likelihood decoded sequence for the recording data recorded as described above.
Therefore, if there is no decoding error, the decoded data D
D matches the recording data. The Viterbi decoder 13 includes a branch metric block (BMC) 132, an add compare select block (ACS) 133, a status memory unit (SMU) 134, and a merge block 135. These will be described later. The Viterbi decoder 13 also includes a shift register 131 and an amplitude reference value adaptation unit (RAA) 136. The output of the A / D converter 12 is also supplied to a shift register 15, and after a predetermined delay time is given by the shift register 131, an amplitude reference value adaptation unit (RAA) 1
36. These operations will also be described later.

The decoded data DD obtained by the Viterbi decoder 13 is supplied to the controller 2. As described above, the recording data is a codeword generated from user data by encoding such as channel encoding. Therefore, if the decoding error rate is sufficiently low, the decoded data D
D can be regarded as recording data as a codeword. The controller 2 reproduces user data and the like by performing decoding processing corresponding to the above-described encoding such as channel encoding on the decoded data DD. For example, (1-
7) Perform RLL decoding processing, ECC decoding processing (error correction processing), and the like. The decoded data (such as user data) is transferred to the host computer 1 as reproduction data. At the time of reproduction, if no reproduction data is obtained for a certain sector as decoding NG, the controller 2 controls so as to execute a reproduction retry to that sector.

The RAA 136 performs an adaptive update process of the amplitude reference values c000 to c111 as described later. For the RAA 136, the CPU 3 refers to the amplitude reference values c000 to c111 calculated for updating and uses them for calculating various evaluation values, for example, asymmetry values, amplitude values, and the like as described later. Have been able to.

2. Viterbi decoding method Hereinafter, a Viterbi decoding method performed by the Viterbi decoder 13 will be described. As described above, the user data is converted into a codeword as recording data by various encoding methods. An appropriate encoding method is adopted according to the properties of the recording medium and the recording / reproducing method. FIG.
In the disk drive device shown in (1), in block encoding, an RLL (Run Length Limited) encoding method for limiting the number of “0” s between “1” and “1” is used. A Viterbi decoding method can be used to decode a reproduction signal reproduced from data recorded by a combination of such an RLL encoding method and the above-described mark edge recording method.

Such an RLL encoding method can meet the conditions required for the encoding method from two viewpoints of improving the recording density and ensuring the stability of the reproducing operation. First, as described above, the mark edge recording method associates "1" in a precode output generated as described later based on recording data with the inversion of the polarity represented by the edge of each pit. "
As the number of "0" s between "1" and "1" is increased, the number of pits recorded per l pits can be increased, and the recording density can be increased.

On the other hand, the reproduction clock DCK necessary for adjusting the operation timing of the reproduction system is, as described above,
It is generated by the PLL section 14 based on the reproduction signal.
For this reason, in the recording data, "1" and "1"
When the number of 0 "s is increased, the operation of the PLL unit 14 becomes unstable during the reproducing operation, so that the entire reproducing operation becomes unstable.

Considering these two conditions, "1"
The number of “0” s between “1” and “1” needs to be set within an appropriate range that is neither too large nor too small. Regarding the setting of the number of “0” in the recording data, R
The LL encoding method becomes effective.

By the way, as shown in FIG.
In the combination of the LL (1,7) encoding method and the mark edge recording method, at least one "1" is inserted between "1" and "1" in the precode output generated based on the recording data.
Since 0 ”is included, the minimum inversion width (RLmin) is 2. When such an encoding method with the minimum inversion width of 2 is used, it is affected by intersymbol interference, noise, and the like. As a method of decoding recorded data from a reproduced signal,
As described later, a 4-level 4-state (6-level 4-state) Viterbi decoding method can be applied.

As described above, the reproduction signal is subjected to the waveform equalization processing by the filter unit 11. Such a waveform equalization process performed as a preceding stage of the Viterbi decoding method includes:
A partial response method that actively uses intersymbol interference is used. The waveform equalization characteristics used at this time are:
From the partial response characteristics generally represented by (1 + D) n, the linear recording density and MTF (Mod
ulation transfer function). For the data recorded by the combination of the RLL (1,7) encoding method and the mark edge recording method described above,
The waveform equalization processing using R (1,2,1) is a preceding stage of the 4-value 4-state Viterbi decoding method.

As shown in FIG. 4, in the mark edge recording method, prior to actual recording on a magneto-optical disk or the like, precoding based on the recording data encoded by the RLL encoding or the like is performed. Assuming that the recording data sequence at each time point k is a [k] and the precode output based on this is b [k], the precoding is performed as follows. b [k] = mod2 {a [k] + b [k-1]} (1) Such a precode output b [k] is actually recorded on the disk 6.

When such recorded data is reproduced, the waveform equalization characteristic P performed by the waveform equalizer in the filter unit 11 is obtained.
The waveform equalization processing at R (1, 2, 1) will be described. However, in the following description, the waveform equalization characteristic is PR (B, 2A, B) without normalizing the signal amplitude. The value of the reproduced signal when noise is not taken into account is denoted by c [k]. Further, an actual reproduced signal including noise (that is, a reproduced signal reproduced from the disk 6) is denoted by z [k].

PR (B, 2A, B) indicates that the contribution of the amplitude at the time point k to the value of the reproduced signal at a certain time point k is 2A times the amplitude value. The contribution of the amplitude is B times the amplitude of the signal at each point in time. Therefore, the maximum value of the value of the reproduction signal is a case where a pulse is detected at any of the time points k−1, k, and k + 1. In such a case, the maximum value of the reproduction signal is as follows.

B + 2A + B = 2A + 2B The minimum value of the reproduced signal is 0. However, in the actual handling, A + B of the DC component is used as c [k].
The following is used by subtracting c [k] = B * b (k-2) + 2A * b (k-1) + B * b [k] -AB (2)

Therefore, the reproduction signal c [k] when noise is not considered takes any one of A + B, A, -A, and -AB. In general, as one of the methods for indicating the properties of a reproduced signal, a pattern obtained by superimposing a large number of reproduced signals in units of, for example, five points is called an eye pattern. FIG. 5 shows an example of an eye pattern of an actual reproduced signal z [k] which has been subjected to waveform equalization processing under PR (B, 2A, B) in a recording / reproducing apparatus to which the present invention can be applied. From FIG. 5, the reproduced signal z [k] at each time point
Has a variation due to noise, but is approximately A +
It can be confirmed that any one of B, A, -A, and -AB is obtained. As described later, A + B, A, -A, -AB
Is used as an identification point.

The outline of the Viterbi decoding method for decoding the reproduced signal subjected to the above-described waveform equalization processing is as shown in steps 1 to 3. Step: All possible states are specified based on the encoding method and the recording method for the recording medium. Step: Starting from each state at a certain time point, all possible state transitions at the next time point, and the recording data a [k] and the reproduction signal value c [k] when each state transition occurs are specified. . Note that all states and state transitions specified as a result of the step and the state and {recorded data value a [k] / reproduction signal value c [k]} when each state transition occurs are schematically shown. This is a state transition diagram as shown in FIG. 7 described later. The Viterbi decoder 13 is configured to perform a decoding operation based on this state transition diagram.

Based on the state transition shown in step..., The maximum likelihood state transition based on the reproduction signal z [k] reproduced from the recording medium at each time point k is selected. However, as described above, the reproduction signal z [k] has been waveform-equalized in a stage before being supplied to the Viterbi decoder 13. Each time such a maximum likelihood state transition is selected, the value of the recording data a [k] is set as a decoded value in accordance with the selected state transition, so that a maximum likelihood decoded value sequence for the recording data is obtained. Can be obtained as decoded data a ′ [k]. Alternatively, a state data value representing the selected state transition itself can be obtained. In the example of FIG. 1, the state data value sm [k−
[n].

Hereinafter, the above-mentioned steps 1 to will be described. First, the steps will be described in detail. As the state used here, the state at a certain time point k is defined as follows using the precode output before the time point k. That is, n = b [k], m = b [k−1], l
The state when = b [k-2] is defined as Snml. With such a definition, it is considered that there are 2 ³ = 8 states, but as described above, the states that can actually occur are limited based on the encoding method and the like. In the recording data sequence a [k] encoded as the RLL (1, 7) code, "
Since at least one “0” is included between “1” and “1”,
Two or more “1” s do not continue. Based on such conditions imposed on the recording data string a [k], certain conditions are imposed on the precode output b [k], and the resulting states are restricted.

The above-mentioned restriction is specifically as follows. As described above, in the recording data sequence generated by the RLL (1, 7) encoding, there is no pattern in which two or more “1” s are continuous, that is, the following pattern. a [k] = 1, a [k−1] = 1, a [k−2] = 1 (3) a [k] = 1, a [k−1] = 1, a [k− 2] = 0 (4) a [k] = 0, a [k−1] = 1, a [k−2] = 1 (5) Such a kind imposed on the recording data sequence Considering the conditions imposed on b [k] in accordance with the above equation (1) based on the conditions, it is found that S0 in the definition of Snml.
It can be seen that the two states of 10 and S101 cannot occur. Therefore, there are 2 ³ −2 = 6 possible states.

Next, the steps will be described. To obtain a state that can occur at the next time point j + 1 starting from the state at a certain time point j, the value a [j + 1] of the recording data at the time point j + 1 becomes 1 or 0
It is necessary to investigate separately when it becomes.

Here, the state S000 will be described as an example. According to the above equation (1), S000, that is, n =
b [j] = 0, m = b [j-1] = 0, l = b [j-2] = 0
The following two are conceivable as recording data pre-coded as follows. a [j] = 0, a [j-1] = 0, a [j-2] = 1 ... (6) a [j] = 0, a [j-1] = 0, a [j- 2] = 0 (7)

When a [j + 1] = 1 At this time, b [j + 1] is calculated as follows according to the equation (1). Therefore, the value of the reproduced signal c [j] is calculated as follows according to the above equation (2).

C [j + 1] = {B × b [j + 1] + 2A × b [j] + B × b [j−1] −AB = {B × 1 + 2A × 0 + B × 0} −AB = −A ... (9)

The state Snml at the next time point [j + 1]
For n = b [j + 1], m = b [j], 1 = b [j
-1]. Then, as described above, b [j + 1] =
Since 1, b [j] = 0 and b [j-1] = 0, the state at the next time point, j + 1, is S100. Therefore, when a [j + 1] = 1, it can be specified that a transition of S000 → S100 occurs.

When a [j + 1] = 0 At this time, b [j + 1] is calculated as follows according to the equation (1). Therefore, the value of the reproduced signal c [j + 1] is calculated as follows according to the above equation (2).

C [j + 1] = {B × b [j + 1] + 2A × bj] + B × b [j−1]} − AB = {B × 0 + 2A × 0 + B × 0} −AB = −A− B ... (11)

The state Snm at the next time point j + 1
For l, n = b [j + 1], m = b [j], l = b
[j-1]. Then, as described above, b [j + 1] =
Since 0, b [j] = 0 and b [j-1] = 0, the state at the next point in time is S000. Therefore, a [j
In the case of +1] = 0, it can be specified that a transition of S000 → S000 occurs.

In this way, S000 at time j
, The state transitions that can occur at the next time point j + 1 starting from them and the correspondence between the recording data value a [j + 1] and the reproduction signal value c [j + 1] when such state transitions occur Can be requested.

As described above, for each state, the correspondence between the state transition that can occur starting from the state and the value of the recording data and the value of the reproduction signal when each state transition occurs is shown as a schematic diagram. FIG. Time points j and j + 1 described above are not special time points. Therefore, the correspondence between the possible state transitions obtained as described above and the values of the recording data and the values of the reproduction signals accompanying them can be applied at any time. For this reason, in FIG. 6, the value of the recording data accompanying the state transition occurring at an arbitrary time point k is denoted as a [k], and the value of the reproduced signal is denoted by c
Notated as [k].

In FIG. 6, the state transition is represented by an arrow. Further, the sign given to each arrow is Δrecorded data value a
[k] / reproduced signal value c [k]}. State S00
There are two types of state transition starting from 0, S001, S111, and S110, while the states S011 and S1
There can be only one transition starting from 00. Further, in FIG. 6, S000 and S001 are both a
For [k] = 1, take the value of c [k] = − A,
It has transitioned to 100. On the other hand, for a [k] = 0,
It takes the value of c [k] =-AB and transits to S000. Similarly, S111 and S110 have the same a [k−
1] take the same value of c [k-1] and transit to the same state. Therefore, S000 and S00
1 can be collectively expressed as S00, and S111 and S110 can be collectively expressed as S11. Further, S01
FIG. 7 shows an arrangement in which 1 is represented as S10 and S100 is represented as S01.

FIG. 7 is a state transition diagram used in the 4-value 4-state Viterbi decoding method. For example, when there are four states such as a four-level four-state Viterbi decoding method, these four states can be expressed by two bits, and thus such two-bit data can be used as a state data value. Therefore, in FIG. 7, each state is represented by S0 using 2-bit state data values, 00, 01, 11, and 10, respectively.
0, S01, S11, and S10.

Also, a trellis diagram as shown in FIG. 8 is used as a format for expressing the state transition along time corresponding to FIG. FIG. 8 shows a transition between two time points, but a transition between many more time points can also be shown. As the time elapses, a state in which the image sequentially transits to the right time point is expressed. Therefore, a horizontal arrow indicates, for example, S0
A transition to the same state such as 0 → S00 is shown, and an oblique arrow represents a transition to a different state such as S01 → S11.

Assuming the steps of the above-mentioned Viterbi decoding method, that is, the state transition diagram shown in FIG. 7, the method of selecting the most likely state transition from the actual reproduced signal z [k] including noise is as follows. Become.

In order to select the maximum likelihood state transition, first, for the state at a certain time point k, the sum of the likelihoods of the state transitions between a plurality of time points passed in the process of reaching the state is calculated. It is necessary to select the maximum likelihood decoded sequence by comparing the calculated sums of likelihoods. Such a sum of likelihoods is called a path metric.

In order to calculate a path metric, it is first necessary to calculate the likelihood of a state transition between adjacent time points. Such calculation of likelihood is performed as follows based on the value of the reproduced signal z [k] with reference to the above-described state transition diagram. First, as a general explanation, the time k-
Consider the case where the state is Sa in state No. 1. At this time, when the reproduction signal z [k] is input to the Viterbi decoder 13, the likelihood that a state transition to the state Sb occurs is calculated according to the following equation. However, the state Sa and the state Sb
Is any of the four states described in the state transition diagram of FIG.

(Z [k] −c (Sa, Sb)) ² ... (12) In the above equation, c (Sa, Sb) is the state transition from the state Sa to the state Sb in FIG. This is the value of the reproduced signal described in the transition diagram. That is, in FIG. 8 described above, for example, for the state transition S0 → S1, the value is calculated as −A. Therefore, equation (12) is the Euclidean distance between the value of the actual reproduced signal z [k] including noise and the value of the reproduced signal c (Sa, Sb) calculated without considering noise. The path metric at a certain point in time is defined as the sum of likelihoods of state transition between such adjacent points up to that point.

3. Viterbi decoder In the Viterbi decoder 13 shown in FIG.
In step S133, the SMU 134 detects state data corresponding to the state transition as described above, and the merge block 135 decodes the state data, whereby decoded data can be supplied to the controller 2. The configuration and operation of the Viterbi decoder 13 will be described.

In the following description, as the waveform equalization characteristic, instead of the above PR (B, 2A, B), P
It is assumed that R (α, β, γ). This premise takes into account that it is difficult to obtain an ideal partial response characteristic in an actual disk drive device, and the waveform equalization characteristic is often asymmetric. The reasons why it is difficult to obtain the ideal partial response characteristics include the limitation of the operation accuracy of the waveform equalizer, the asymmetry (asymmetry of the waveform) caused by the laser power during recording being too large or too small, and the reproduction signal. There is a phase error of the read clock used when sampling is performed by the A / D converter 12.

In the case of the 4-value 4-state Viterbi decoding method, encoding such that RLL (1, 7) encoding is performed so that RLmin = 2, and the partial response characteristic during reproduction is PR (α, β). , Γ), it can be seen that there are six values and four states. That is, for each of 2 ³ −2 = 6 {b [j−1], b [j], b [j + 1]} sets other than the two states excluded by the condition of RLmin = 2, , Ie, the reproduced signal value c [j + 1] after waveform equalization in an ideal case without noise takes a different value. (Ideally four values, but in reality c011 and c110, and c100 and c001 described below
Do not match, and therefore have six values. )

The values of the six discrimination points are denoted by cpqr. Here, p, q, and r are b [j−
1], b [j] and b [j + 1]. In FIG. 7, the values cpqr of the identification points relating to the transitions of the states S00, S01, S11, and S10 are added. That is, c0
00, c001, c011, c111, c110, c1
00. Since RLmin = 2, c01
There are no 0 and c101. The following description is made on the premise that the 6 values and 4 states follow the state transition diagram of FIG.

The branch metrics calculated corresponding to the six state transitions in FIG. 7 are described as follows. First, a 2-bit state data value representing the state before the transition and the state after the transition are written and arranged to form a sequence of four numbers. Next, a branch metric that can occur during one read clock is expressed as a sequence of three numbers by using the two numbers (ie, the second and third numbers) near the center as one number. . For example, state transition S11 →
The branch metric associated with S10 is denoted by bm110. In this way, branch metrics corresponding to the six types of state transitions in FIG. 7 can be represented as shown in FIG.

Further, the branch metric defined as the Euclidean distance between the actual reproduced signal value z [k] sampled by the A / D converter 12 operating according to the read clock and the value of each discrimination point is as follows. Is calculated.

Bm000 = (z [k] −c000) ² ... (13) bm001 = (z [k] −c001) ² ... (14) bm011 = (z [k] −c011) ^2. (15) bm111 = (z [k] -c111) ² ... (16) bm110 = (z [k] -c110) ² ... (17) bm100 = (z [k] -c100) ^2. (18) When the branch metric is calculated in this way, the value of each discrimination point is directly used as the amplitude reference value. When a standardized path metric is used for the purpose of avoiding a square calculation or the like, the branch metric corresponding to the standardized path metric is different from those according to the equations (13) to (18). In such a case, the value of each identification point cannot be used as it is as the amplitude reference value, but the present invention can be applied.

Using such a value of the branch metric, the path metric mij of the state Sij at the time point k is obtained.
[K] is calculated as follows. m10 [k] = m11 [k-1] + bm110 (19) m11 [k] = min {m11 [k-1] + bm111, m01 [k-1] + bm011} (20) m01 [k ] = M00 [k-1] + bm001 (21) m00 [k] = min {m00 [k-1] + bm000, m10 [k-1] + bm100} (22)

As shown in FIG. 1, the output of the A / D converter 12 is supplied to the BMC 132 and the shift register 131 in the Viterbi decoder 13. The Viterbi decoder 13
Based on the reproduction signal value z [k] supplied from the A / D converter 12, the BMC 132, ACS 133, SMU 134
The state transition sm [k-n] expressing the selected state transition itself is generated by selecting the maximum likelihood state transition by the above operation. Then, based on the state data, the merge block 135
To generate the decoded data and supply it to the controller 2. The controller 2 performs a decoding process based on the supplied decoded data and reproduces user data, address data, and the like, as in the example of the above-described magneto-optical disk device.

The state data from the SMU 134 is also supplied to an amplitude reference value adaptation unit (RAA) 136. Further, the shift register 131 delays the reproduction signal value z [k] supplied from the A / D converter 12 by a predetermined time to RA
A136. This delay is performed to adjust the timing so that the state data generated by the Viterbi decoder 13 has a delay of n read clocks with respect to the reproduced signal value z [k]. Therefore, the state data value generated by the SMU 134 in the Viterbi decoder 13 corresponds to the input data at a time immediately before by the read clock equal to the number n of the stages of the status memory.
sm [kn].

The RAA 136 stores the state data value sm [k−n] supplied at each time and the shift register 13.
Based on the reproduction signal value z [k] delayed by n clocks at 1, the amplitude reference value is updated for each read clock.
Then, the updated amplitude reference value is stored in B in the Viterbi decoder 13.
Supply to MC132.

Here, each block in the Viterbi decoder 13 will be described. Each block in the Viterbi decoder 13, that is, BMC132, ACS133, SMU13
4, merge block 135, shift register 131, R
The AA 136 receives the read clock DCK from the PLL unit 14.
(Hereinafter, also simply referred to as a clock) and the operation timing is adjusted.

The BMC 132 calculates the branch metrics bm000 to bm111 according to the above equations (13) to (18) based on the amplitude reference value supplied from the RAA 16 based on the reproduced signal value z [k]. , And supplies the calculated branch metric to the ACS 133.

The ACS 133 calculates the value of the path metric according to the equations (19) to (22) based on the supplied branch metric value, and selects the most likely state transition by comparing the calculated values. I do. Then, the selection signals SEL00 and SEL11 are supplied to the SMU 134.

The SMU 134 will be described with reference to FIG. The SMU 134 performs a process in units of a 2-bit state data value, and the process performs a state data value s
State data as a series of m [kn] is generated.

As shown in FIG. 9, the SMU 134 has two A-type status memories 150 and 151 and two B-type status memories 152 and 153. Further, select signals SEL00, SEL11, clock,
In addition, a signal line for transferring state data to and from another status memory is connected. A-type status memories 150 and 151 correspond to states S00 and S11, respectively. Also, the B-type status memory 152
And 153 correspond to states S01 and S10, respectively.
The connection between these four status memories is in accordance with the state transition diagram of FIG.

FIG. 10 shows the configuration of the A-type status memory 150 corresponding to the state S00. The A-type status memory 150 has n processing stages. That is, n selectors 201-0 to 201- (n-1) and n registers 202-0 to 202- (n-1) are alternately connected. The select signal SEL00 is supplied to each of the selectors 201-0 to 201- (n-1). Further, as described above, the status data inherited from the B-type status memory 153 corresponding to S10 is supplied to each selector as PM3 having n bits. As described above, the status data inherited by the B-type status memory 152 corresponding to S01 is output to each register as PM0 including n-1 status data values. Further, a clock is supplied to each of the registers 202-0 to 202- (n-1).

The operation of each selector will be described. FIG.
As shown in FIG. 1, the state one clock before, which can be changed in S00, is one of S00 and S10. If the state one clock before is S00, a transition that inherits itself is performed. Therefore, the first-stage selector 20
In “1-0”, “00” is input as the latest state data value in the state data generated by the serial shift. Selector 201-0 has a parallel load B
The latest state data value PM3 [1] in the state data supplied from the mold status memory 153 is supplied. The selector 201-0 supplies one of these two state data values to the subsequent register 202-0 according to the above-mentioned selection signal SEL00.

Further, the selectors 201-1 to 201-1 to
201- (n-1) is a B-type status memory 153 corresponding to S10 as two pieces of data, that is, a parallel load.
, And one state data value supplied from the preceding register as a serial shift. Then, from these two state data, the state data value determined to be the maximum likelihood is supplied to the subsequent register according to the selection signal SEL00.
Since the selectors 201-0 to 201- (n-1) all follow the same selection signal SEL00, the state data as the series of the maximum likelihood state data values selected by the ACS 133 is inherited.

Further, each of the registers 202-0 to 202- (n-
1) updates the held state data value by capturing the supplied state data value according to the clock as described above. Further, as described above, the output of each register is supplied to the status memory corresponding to a state to which a transition can be made after one clock. That is, since the transition can be made to S00 itself, it is supplied to the subsequent selector as a serial shift. Also, as a parallel load, S0
1 is supplied to the B-type status memory 152 corresponding to “1”. The state data value VM00 is output from the register 202- (n-1) at the last stage. By outputting the state data value VM00 in accordance with the clock, the state data is generated as a whole.

The A-type status memory 151 corresponding to the state S11 has the same configuration as the A-type status memory 150. However, as the parallel load corresponding to the state transition S01 → S11 in FIG. 7, the state data PM1 is supplied from the B-type status memory 152 corresponding to S01. Further, the state data PM2 is supplied to the B-type status memory 153 corresponding to S10 as a parallel load corresponding to the state transition S11 → S10 in FIG.

Next, the B-type status memory 152 corresponding to the state S01 will be described with reference to FIG. B
The type status memory does not inherit itself in FIG.
In addition, this corresponds to a state where only one state can transition after one clock. Therefore, no serial shift is performed, and no selector is provided. Therefore, the n registers 212-0, 212-1,.
2- (n-1) is provided, and a clock is supplied to each register to adjust the operation timing.

Each of the registers 212-0, 212-1,... 2
12- (n-1) is supplied with the status data inherited from the A-type status memory 150 corresponding to S00 as PM0 consisting of n-1 status data values. However, '00' is always input to the register 2120 as the first processing stage in synchronization with the clock. This operation corresponds to the fact that the latest state transition that can transition to S01 is always S00, as shown in FIG. Each register 212-0
212- (n-1) updates the held state data value by capturing the supplied state data value according to the clock. Also, the output of each register based on the clock is a state S11 that can transition after one clock as state data PM1 consisting of n-1 state data values.
Is supplied to the A-type status memory 151 corresponding to.
From the final register 212- (n-1), the state data value VM
01 is output. By outputting the state data value VM01 in accordance with the clock, the state data is generated as a whole.

The B-type status memory 153 corresponding to the state S10 has the same configuration as the B-type status memory 152. However, the state data PM2 is supplied from the A-type status memory 151 corresponding to S11 as a parallel load corresponding to the state transition S11 → S10 in FIG. Further, the state data PM3 is supplied to the A-type status memory 150 corresponding to S00 as a parallel load corresponding to the state transition S10 → S00 in FIG. Also,
'11' is always input to the register serving as the first processing stage in synchronization with the clock. This operation corresponds to the state one clock before, which can transit to S10, is S11 as shown in FIG.

Incidentally, in the Viterbi decoding method, the state data values VM00, V
M11, VM01 and VM10 match each other if the memory length n of the status memory is made sufficiently large. In such a case, any one of the state data values generated by the four status memories may be output to the subsequent stage as sm [kn]. The memory length n is determined in consideration of the C / N of the reproduced signal, frequency characteristics, and the like.

The state data sm [kn] obtained by the SMU 134 is supplied to the merge block 135. The merge block 135 is implemented by means such as a ROM in FIG.
Is stored. Then, by referring to the decoding matrix, decoded data based on the state data is generated and supplied to the controller 2.
It can be seen from the state transition diagram of FIG. 7 that the decoded data value corresponds to two consecutive state data values. That is, the state data value sm [kn] generated corresponding to the reproduced signal value z [k] and the state generated corresponding to the reproduced signal value z [k-l] one clock before that. Data value sm
Based on [kn-1], the decoded data value at the time point kn can be determined.

For example, if sm [kn] is '01' and sm
When [kn-1] is "00", it is understood from FIG. 7 that "1" corresponds to the decoded data value. Such a correspondence is summarized in the decoding matrix table of FIG.

Next, updating of the amplitude reference value by the RAA 136 will be described. As described above, the six amplitude reference values c
The value of 000 to c111 varies depending on various factors. Moreover, since the degree of the fluctuation is not constant, the amplitude reference value cannot be shifted in advance. Therefore, by adaptively controlling the amplitude reference value, the amplitude reference value can follow the distortion and fluctuation of the RF signal, the clock phase error, and the like, thereby improving the accuracy of the calculated value of the branch metric. Can be.

As described above, based on the state data generated by the SMU 134 and the reproduced signal value z [k] delayed by the shift register 131, the RAA
136 performs a calculation for updating the amplitude reference value for each clock. This calculation is performed as follows.

The state data value sm [k-n] generated corresponding to the reproduced signal value z [k] and the state data value sm [k-n-1] generated one clock before that are calculated as follows. FIG.
Accordingly, the state transition occurring between these two state data values and the amplitude reference value corresponding to the state transition can be specified. With respect to the amplitude reference value specified in this way, from the existing value and the reproduction signal value z [k],
A new amplitude reference value is calculated. In the case of a disk in which an embossed pit area and a magneto-optical area are mixed like a magneto-optical disk, the calculation of the amplitude reference value is performed separately for each area. Therefore, in that case, 6 values 4
For the state Viterbi decoding method, 6 · 2 = 12 amplitude reference values will be adapted.

For calculation of the amplitude reference value, sm [k−
n] = '11' and sm [kn-1] = '01' will be specifically described as an example. This is the case where the state transition S01 → S11 in FIG. 7 occurs. FIG. 7 shows that the amplitude reference value corresponding to the state transition is c011. Therefore, RAA1
36 performs calculation for updating the amplitude reference value as follows. c011 (new) = δ · z [kn] + (1−δ) · c011 (old) · (23)

In general, when sm [kn] = pq and sm [kn-1] = qr, a new value of the amplitude reference value is calculated as follows. cpqr (new) = δ · z [kn] + (1−δ) · cpqr (old) · (24)

In these equations, δ is a correction coefficient. When setting the value of δ, the relatively continuous characteristics of the recording system and the reproducing system, such as the amplitude of the reproduced signal and its fluctuation, distortion such as asymmetry, errors in the operation of the waveform equalizer, and the like on the recording medium. It is necessary to consider irregular characteristics due to defects and the like. That is, as the value of δ is larger, the amplitude reference value more strongly reflects the amplitude fluctuation of the reproduced signal, asymmetry, errors in the operation of the waveform equalizer, and the like, by the update performed according to the equation (23) or (24). It will be. On the other hand, the amplitude reference value is easily affected by an irregular signal such as a defect caused by a defect or the like on the recording medium. On the other hand, when the value of δ is reduced, the amplitude reference value is less likely to be affected by irregular signals such as defects, but on the other hand, the amplitude reference value follows the reproduced signal more slowly. The effect of adapting the amplitude reference value by the update performed according to (24) is reduced.

A new amplitude reference value is calculated by the RAA 16 according to the equations (23) and (24), and the BMC 13
2 is supplied. As understood from the above description, for example, in the case of Viterbi decoding in six values and four states, the amplitude reference values to be adapted are c000, c001, c011,.
c100, c110, and c111. The amplitude reference value is adaptively changed according to various factors such as a recording situation and defocus, so that the influence of various factors can be absorbed.

FIG. 13 shows states sm [kn-1] and sm
A list in which which amplitude reference value is updated for [kn] is shown. For example, state data sm [kn-
1] is '00', and the status data sm [kn] is '00'.
, That is, when the state transits from state S00 to S00, the amplitude reference value c000 is updated. Also, state S0
When a transition is made from 0 to S01, the amplitude reference value c001 is updated. In addition, as shown in FIG. 13, the specific amplitude reference value is updated according to the state transition.

4. Various evaluation values obtained from the amplitude reference value By using the amplitude reference value that is adapted and updated according to the reproduction RF signal, various evaluation values that enable the reproduction RF signal to be evaluated can be obtained. That is, evaluation values representing the state of the reproduced RF signal, such as amplitude, asymmetry, and MTF, are obtained.

Six adaptive amplitude reference values c000 to c000 in a six-value four-state Viterbi decoder with PR (1,2,1)
When 111 is used, amplitude (AMP), MTF, and asymmetry (λasy) can be calculated as follows. AMP = c111-c000 (25) λasy = ((c111 + c000) / 2- (c001 + c011 + c110 + c100) / 4) / (c111-c000) (27)

Further, 2 corresponds to the opening of the eye pattern.
Strictly speaking, the amplitude (VFO) of the T pattern has an error, but is approximately indicated by the following equation. VFO = (c011 + c110) / 2- (c001 + c100) / 2 (28)

The values represented by the equations (25) to (28) are used for calibration of the gain setting of the variable gain amplifier 8 and calibration of the recording laser power setting. It may also be used to evaluate a data reproduction system for arbitrary recorded data. As an example of the latter, there is a case where the recorded laser power is estimated using an asymmetry value, and this is used as a verification condition.

Here, the reason why the asymmetry value can be used for estimating the recording laser power and the above equations (25) to (2)
8) The reason why each evaluation value can be obtained from the amplitude reference value will be described. First, the relationship between the asymmetry value and the recording laser power will be described.
5) to (28) will be explained.

In a normal optical disk system, the recording laser power is set to an optimum power according to the medium at that time and the state and temperature of the drive device. Calibration is performed at the time of recording in order to find the optimum recording laser power. However, in practice, recording is not always performed with the optimum recording laser power. For example, for calibration, test writing is performed in a certain area (such as a dedicated calibration area) on the medium, reproduced, and the optimum recording laser power is searched for based on whether or not recording has been properly performed. But,
If the area where the calibration is performed and the area where data is actually recorded thereafter have different recording sensitivity characteristics, the recording laser power obtained by the calibration will not be an appropriate power. Of course, there may be a case where the calibration has not been correctly performed for some reason or a case where the setting of the recording laser power obtained by the calibration has not been correctly performed.

At the time of recording, the operation of reproducing the sector immediately after recording and checking whether or not the data has been correctly recorded, that is, an operation called so-called write and verify may be performed. In this case, if it is detected at the time of the verification that the recording laser power is inappropriate and the recording has not been properly performed, the recording operation can be performed again with an appropriate recording laser power as a write retry process. However, the write-and-verify operation may not always be performed on all data sectors, and there are many usages in which write-and-verify is not performed.

From these facts, at the time of reproduction, it cannot be considered that the data to be reproduced is all recorded with an appropriate recording laser power. When data is recorded on the disk 6 by an optical modulation method such as a magneto-optical disk or a WORM disk, the size of a mark (pit) recorded on the disk largely depends on the value of the recording laser power. It also greatly affects the waveform of the reproduced RF signal. Therefore, at the time of reproduction, a reproduction error may occur due to inappropriate recording laser power.

How the magnitude of the recording laser power affects the reproduced RF signal will be described by taking an impulse response as an example. FIG. 14 shows the relationship between the magnitude of the recording laser power and the impulse response of the reproduced RF signal. This is P
This is an example of the case of a partial response response of R (1, 2, 1). When the recording laser power is at the optimum value, the impulse response becomes as shown by a curve (b) in FIG. At this time, k as the sampling time of A / D conversion
The amplitude ratio at the three time points of -1, k, and k + 1 is 1: 2: 1.

However, when the recording laser power is increased,
Since the recording mark on the disk becomes large, its impulse response becomes as shown by the curve (a), that is, the pulse width becomes large. Therefore, sampling time points k-1, k + 1
Is greater than half of the peak value. On the other hand, when the recording laser power decreases, the recording mark on the disk becomes smaller, so that the impulse response becomes as shown by a curve (c), that is, the pulse width becomes narrower. Therefore, the amplitudes at the sampling times k−1 and k + 1 are smaller than half the peak value.

An eye pattern for an actual reproduced RF signal can be represented by superposition of impulse responses at an arbitrary time point k. FIG. 15 shows the degree of eye opening of the eye pattern due to the difference in recording laser power. FIG.
(B) shows an eye pattern in a state where the recording laser power is optimal, and the eyes are vertically symmetric. On the other hand, when the recording laser power is large and small, the eye is shifted upward or downward as shown in FIGS. 15A and 15C, respectively. This FIG.
The state in which the eye is opened asymmetrically due to the non-optimal recording laser power as in (a) and (b) is called asymmetry. That is, the asymmetry is an asymmetric distortion generated in the reproduction RF signal waveform due to an excess or deficiency of the recording laser power.

In order to quantitatively express the asymmetry, the asymmetry value λasy is defined as follows. λasy = (center voltage of 2T envelope−center voltage of 8T envelope) / (peak-to-peak voltage of 8T envelope) (30)

FIGS. 16A and 16B show a signal waveform of a 2T pattern and a signal waveform of an 8T pattern. When the waveform equalization process is performed on the reproduced RF signal corresponding to the 2T pattern, FIG.
As shown in FIG. 6A, the amplitude reference values c001, c01
The waveform has a waveform in which 1, c110, and c100 are periodically repeated. When the waveform equalization process is performed on the reproduced RF signal corresponding to the 8T pattern, as shown in FIG. 16B, the amplitude reference values c000, c000, c000, c000, c000,
c000, c001, c011, c111, c111,
c111, c111, c111, c111, c110,
The waveform has c100 and c001 periodically repeated.

FIG. 17 shows the waveforms of the 2T pattern and the 8T pattern together. FIG. 17 visually shows the asymmetry value λasy. From FIG. 17 and the above equation (30), it can be seen that the asymmetry value λasy is as follows for the case of each eye pattern shown in FIG. When the recording laser power is too large: λasy> 0 When the recording laser power is optimal: λasy = 0 When the recording laser power is too small: λasy <0

As described above, it is possible to estimate the value of the recording laser power from the asymmetry value λasy. Therefore, the asymmetry value λasy
If the recording laser power is set so as to fall within a certain range, it will be an appropriate recording laser power.

According to the above equation (30), the reproduction R
To calculate the asymmetry value λasy of the F signal, “2
It is necessary to detect the center voltage of the T envelope, the center voltage of the 8T envelope, and the peak-to-peak voltage of the 8T envelope, respectively. Here, FIG.
6. As can be seen from FIG. 17, these values can be calculated from the amplitude reference values in the Viterbi decoder 13. That is, the “center voltage of the 2T envelope” is the amplitude reference value c
001, c011, c110, and c100 can be obtained as an average value. The “center voltage of the 8T envelope” can be obtained as an average value of the amplitude reference values c000 and c111. Further, the “peak-to-peak voltage of the 8T envelope” is the amplitude reference values c000 and c111.
Can be obtained as the difference between Therefore, when the amplitude reference value is applied to the above equation (30), λasy = ((c001 + c011 + c110 + c10)
0) / 4- (c000 + c111) / 2) / (c111
−c000) That is, the above-described equation (27) is obtained.

As described above, the amplitude reference values c000 to c1
11 are adapted in the RAA 136 in the Viterbi decoder 13 and updated in the BMC 132. Assuming that the amplitude reference value is adapted in this way, if the reproduced RF signal has asymmetry, each amplitude reference value follows that. Therefore, the CPU 3 (or the controller 2) of FIG.
The value of the recording laser power for the reproduced RF signal at that time can be known by performing the calculation of Expression (27) using the amplitude reference value calculated in Step 6. By using this, write power calibration for optimizing the laser power at the time of recording can be performed. In the following description, in the case of power calibration, it indicates the calibration of the recording laser power.

[0125] 5. Power Calibration FIG. 18 is a flowchart illustrating an example of a power calibration process performed by the CPU 3. When executing the power calibration, first, the optical pickup 1 is sought to a sector (calibration sector) in a calibration area defined by the format of the disk 6 (S001), and the operation shifts to a recording operation for the sector. (S002). In the case of an MO disk on which recording is performed by optical modulation, erasing must be performed before recording, but the erasing step is omitted in the processing steps shown in FIG. When the recording is executed, it is determined whether or not the recording is normally completed (S003). If an error is detected during recording and it is determined that the recording has not been completed normally, the recording error counter is incremented (S004).
It is determined whether or not the count value is equal to or more than a predetermined value (S00
5). If it is determined that the count value is equal to or smaller than the predetermined value, the process returns to step S001 to retry recording on the sector. If it is determined that the count value is equal to or larger than the predetermined value, the power calibration ends based on the recording error (S006). Causes of the recording error include a reproduction error of the sector ID, an error of the servo system, and an inappropriate laser power.

If it is determined in step S003 that the recording has been completed normally, seek is performed on the calibration sector on which recording was performed in step S002 (S007), and the operation shifts to a read operation of the recorded data (S008). When the reading is executed, it is determined whether or not the reading has been completed normally (S009). If it is determined that the reading has been completed normally, the asymmetry of the asymmetry is determined according to the above equation (27) based on the amplitude reference value in the RAA16. Calculation is performed (S010). Then, it is determined whether or not the asymmetry is within a predetermined range (S011). If it is determined that the asymmetry is within a predetermined range, the power calibration is normally terminated (S012).

When it is determined in step S011 that the asymmetry is not within the predetermined range, the recording power (laser light power at the time of recording) is changed (S0).
13), the calibration counter is incremented (S014). If it is determined that the count value is equal to or smaller than the predetermined value, the process returns to step S001 to retry recording on the calibration sector. That is, steps S001, S002, S003,
S007, S008, S009, S010, S011,
By repeating the processing steps of S013, S014, and S015 while changing the recording power stepwise, it becomes possible to obtain the optimum recording power. Then, when the optimum recording power is obtained, the power calibration ends normally in step S012. If it is determined in step S015 that the count value of the calibration counter is equal to or larger than the predetermined value, it is determined that an appropriate recording power cannot be obtained, and the power calibration is terminated with an error (S15).
016).

In step S009, step S0
If it is determined that the read operation at 08 has not been completed normally, it is determined whether or not the sink in the MO area shown in FIG. 3 has been read (S017). And if it is determined that the sink could be read,
Since the PLL is considered to be locked even if the reading is abnormally terminated, it is considered that the reading has been completed normally, and the process proceeds to step S010.

If it is determined that the sync could not be read, it is considered that the recording power value deviated from the optimum value and the PLL was not locked. It is necessary to start over from S001. That is, first, the sync error counter is incremented (S018), and it is determined whether or not the count value of the sync error counter is "1" (S019). When it is determined that the count value is "1", for example, the recording power is greatly increased (S0
20), and return to step S001 (path 1). If it is determined in step S019 that the count value is not "1", it is determined whether the count value is "2" (S021). If it is determined that the count value is "2", for example, the recording power is significantly reduced (S022), and the process returns to step S001 (path 1). If the sync could not be read out in this way, after the recording power value was significantly changed in steps S020 and S022, based on the recording power value,
The processing steps from step S001 are executed again.
If it is determined in step S021 that the count value is not "2", it indicates in step S017 that a sync error has been detected despite a significant change in the recording power. Therefore, it is determined that the sync could not be detected in the sector, and the power calibration is terminated with an error (S023).

When the recording power is set in step S013, assuming that the current recording power is Pw, the asymmetry is λasy, the newly set recording power is Pw ′, and the asymmetry is λasy ′, the recording power and the asymmetry are Since there is a linear relationship, Pw = k × (λasy−λasy ′) + Pw ′ (31) where k is a constant. It can be. Therefore, in step S013, the recording power is set based on the above equation (31).
The coefficient k is a fixed value. However, since the sensitivity characteristic actually varies on the recording surface of the disk, the set recording power Pw also varies. Therefore, when the recording power value is calculated based on Expression (31), a situation may occur in which the asymmetry value is determined to be outside the predetermined range in step S011. Therefore, as described above, step S0
01, S002, S003, S007, S008, S0
09, S010, S011, S013, S014, S0
Fifteen processing steps are repeatedly performed so that the asymmetry value falls within a predetermined range. Therefore, when the asymmetry value falls within the predetermined range, it is determined that appropriate recording power has been obtained, and calibration is normally terminated. If the asymmetry value does not fall within the predetermined range with the recording power set in step S013, it is determined that the optimum recording power cannot be obtained, and the calibration ends abnormally.

Such a power calibration is
For example, this is performed before the recording is performed for the first time after the disk 6 is loaded. In addition, when the temperature inside the disk drive device and the temperature of the disk 6 change during recording, the optimum recording power also changes accordingly. Therefore, power calibration is performed even in response to a temperature change in the disk drive device. As a result, it is possible to obtain an optimum recording power according to the current situation, and it is possible to improve the reliability of the recording data.

However, in order to obtain the optimum recording power, it is necessary to go through the processing steps shown in the flow chart of FIG. 18 as the power calibration, and it takes a relatively long time to execute these processing steps. I need it. For example, if power calibration is performed when recording data supplied from the host computer 1, data recording is started after the power calibration ends. That is, it is conceivable for the user that the time from the start of the power calibration to the end of the data recording gives an impression of the time required for the data recording. Executing the power calibration as described above has an advantage that the reliability of the recording data can be improved, but may cause a problem that the processing efficiency in the disk drive device is reduced.

Therefore, in the present embodiment, a reduction in processing efficiency can be suppressed by executing power calibration based on the current situation. When the disk drive is in the operating state, the following three situations can be considered for the validity of the recording power. Situation 1. Is appropriate. Situation 2. Although not optimal, data is generally recorded correctly. However, since the recording power margin is small, it is desirable to execute power calibration in consideration of variations in the surface of the disk 6 and changes in temperature. Situation 3. The recording power is not appropriate and power calibration should be performed immediately.

When data is actually recorded in a disk drive device, for example, power calibration is often executed even in the situation 1. In the case of situation 2, although power calibration is necessary, it does not need to be performed immediately. Therefore, in such a case, it may be executed when data recording is not being performed, for example, when the vehicle is in an idling state. Therefore, in the present embodiment, for example, in the case of the situation 1 and the situation 2, the power calibration is executed gradually while the normal write sequence is executed.

6. Write Sequence of the Present Embodiment FIG. 19 is a diagram showing a sequence in which write power calibration is performed progressively in a sequence for performing data recording.
It is a flowchart explaining an example of the processing process of PU3. For example, when a write sequence is started based on a recording request from the host computer 1, first, a calibration flag and a calibration counter are initialized to, for example, "0" (S100), and further, recording power is set (S101). Then, the optical pickup 7 is caused to seek to a sector (recording sector) for recording data (S10).
2) The operation shifts to the recording operation for the recording sector (S10).
3). After shifting to the recording operation, it is determined whether or not the recording operation has been completed normally (S104). If it is determined that the recording operation has been completed normally, it is further determined whether or not a calibration flag as identification information is set. Is determined (S105). This calibration flag is set to, for example, “1” at the end of the power calibration. Therefore, it is possible to indicate whether or not the power calibration has been completed in the currently executed write sequence. Hereinafter, setting the calibration flag to “1” means that the flag is set. If it is determined in step S104 that an error has been detected during recording and the operation has not been completed normally, the recording error counter is incremented (S106), and it is determined whether the count value is equal to or greater than a predetermined value (S107). If it is determined that the count value is equal to or smaller than the predetermined value, the process returns to step S001, and the recording for the recording sector is retried. If it is determined that the count value is equal to or more than the predetermined value, the write sequence ends based on the recording error (S108).

When the write sequence is terminated in step S108, an uncompleted power calibration is performed as shown by a broken line (S13).
0), the process may return to step S103 and retry the write sequence. In this case, for example, even if the calibration is not completed and an error occurs, an uncompleted power calibration can be performed to obtain an appropriate recording power.
Then, by retrying the write sequence with the recording power obtained in step S130,
Recording errors can be reduced.

If it is determined in step S105 that the calibration flag is set, the write sequence ends normally (S109). Step S
If it is determined in step 105 that the calibration flag is not set, seeking is performed on the calibration sector (S110), and power calibration is performed. In this case, the continuation of the previous power calibration is performed or a new power calibration is started.
When seeking to the calibration sector in step S110, the operation shifts to the reproduction operation for the calibration sector (S111). Then, after shifting to the reproducing operation, it is determined whether or not the reproducing operation has been completed normally (S112).
Based on the amplitude reference value in RAA16, the above equation (2)
The asymmetry is calculated according to 7) (S11).
3). Then, it is determined whether or not the asymmetry is within a predetermined range (S114). If it is determined that the asymmetry is within the predetermined range, a calibration flag is set (S115), and the power calibration is performed normally. The process is terminated (S109).

If it is determined in step S114 that the asymmetry is not within the predetermined range, the current status ("status 2" or "status 3") is determined based on the asymmetry value (S116). If it is determined that the state is “Situation 3”, the power calibration shown in FIG. 18 is executed (S117). Then, it is determined whether or not the power calibration has been completed normally (S118). If it is determined that the power calibration has been completed normally, the power calibration is completed (S119). Further, “1” is set to the calibration flag (S
120), the flow returns to step S103, and data recording is performed again. If it is determined in step S118 that the power calibration in step S117 has not been completed normally, the write sequence is terminated with an error based on the calibration error (S12).
1).

In step S116, when it is determined that the current state is "Situation 2", based on equation (31),
The recording power to be set is calculated (S122). Then, the calibration counter is incremented (S123), and the count value of the calibration counter is determined (S124). If it is determined in step S124 that the count value of the calibration counter is equal to or smaller than the predetermined value, the write sequence is normally terminated (S109). The recording power calculated in step S122 is set in step S101 when recording is performed next by the write sequence. If it is determined in step S124 that the count value of the calibration counter is equal to or greater than a predetermined value,
It is determined that an appropriate recording power has not been obtained by the calibration, and an error is terminated (S125).

In this embodiment, the power calibration is performed progressively during the execution of the write sequence. Therefore, the power calibration is completed after the execution of the write sequence a plurality of times. Will be. However, even when the power calibration is not completed, since the recording power is determined based on the asymmetry value, the write sequence can be executed with an appropriate recording power.

As described above, in the present embodiment, the power calibration is performed progressively under a predetermined situation when the write sequence is being executed. That is, since the power calibration can be executed simultaneously with the write sequence, the write sequence and the power calibration can be executed in a shorter time than when the power calibration is executed alone. become. In this case, an extra reproduction operation is performed in the write sequence. For example, steps S110 and S11
Since only the reproduction operation shown in FIG. 1 is performed, the influence on the access time of the write sequence is small. Also,
After the power calibration is completed, a normal write sequence is executed, so that stable data recording can be performed in the disk drive device.

7. VGA Calibration By the way, in the RF block 20 shown in FIG. 1, the gain level of the variable gain amplifier 8 (hereinafter, simply referred to as a gain level) is adjusted in order to correctly binarize data read from the disk 6. Has been done.
This is called VGA calibration. The gain level of the variable gain amplifier 8 depends on the level of the reproduced RF signal. That is, it depends on, for example, the quality of data recorded on the disk 6, the power (reproduction power) of laser light when reading data, or the gain of a head amplifier (not shown) included in the optical pickup 7. Will do. Therefore, by performing VGA calibration, the amplitude of the reproduced RF signal can be kept within a predetermined range.

FIG. 20 is a flowchart for explaining an example of the processing steps in the case of performing VGA calibration. There are two types of VGA calibration: a VGA calibration for a pit area in which embossed pits are preformatted as described with reference to FIG. 3, and a VGA calibration for an MO area in which data is recorded. In the embodiment, the VG of the MO area
A calibration will be described as an example. Therefore, in the following description, VGA calibration refers to calibration of the gain level in the MO area. The VGA calibration includes a method of reproducing data already recorded on the disk 6 and a method of recording data for calibration by the disk drive itself and reproducing the data. Have been. In the present embodiment, VGA calibration performed using already recorded data will be described as an example.

To execute power calibration, first, the optical pickup 1 is sought to a sector (calibration sector) in the calibration area on the disk 6 (S201), and the operation shifts to a reproducing operation for that sector (S202). . When the reproduction operation is executed, it is determined whether or not the reproduction has been normally completed (S203).
The amplitude of the reproduced RF signal is calculated based on the amplitude reference value in S16 (S204). Then, it is determined whether or not the amplitude is within a predetermined range (S205). When it is determined that the amplitude is within the predetermined range, the VGA calibration is normally terminated (S206).

When it is determined in step S205 that the amplitude is not within the predetermined range, the setting of the gain level is changed (S207), and the calibration counter is incremented (S208). If it is determined that the count value is equal to or smaller than the predetermined value, the process returns to step S201, and reproduction of the sector is retried. That is, steps S201, S202, S20
3, S204, S205, S207, S208, S20
By repeating the processing steps 9 while changing the gain level stepwise, an optimum gain level can be obtained. Then, when the optimal VGA is obtained, the VGA calibration ends in step S206. Step S209
If it is determined that the count value of the calibration counter is equal to or larger than the predetermined value, it is determined that an appropriate recording power cannot be obtained, and the VGA calibration is terminated with an error (S210).

If it is determined in step S203 that the read operation in step S202 has not been completed normally, it is determined whether the sink in the MO area could be read (S211). If it is determined that the sink has been successfully read, the PLL is considered to be locked even if the reading is abnormally terminated. Therefore, it is determined that the reading is normally completed, and the process proceeds to step S204. If it is determined that the sink could not be read, it is considered that the gain level deviated from the optimum value and the PLL was not locked. Therefore, the gain level was greatly changed, and the processing steps from step S201 were started. Will be repeated. That is, first, the sync error counter is incremented (S212), and it is determined whether or not the count value of the sync error counter is "1" (S213). If it is determined that the count value is "1", for example, the gain level is greatly increased (S214), and the process returns to step S201 (path 2). If it is determined in step S213 that the count value is not "1", it is determined whether the count value is "2" (S215). When it is determined that the count value is “2”, for example, the gain level is greatly reduced (S
216), and return to step S201 (path 2). In this way, after the gain level is largely changed in steps S214 and S216, based on the gain level,
The processing steps from step S201 are executed again.
If it is determined in step S215 that the count value is not “2”, it indicates that a sync error has been detected in step S211 although the gain level has been significantly changed. Therefore, it is determined that the sync could not be detected in the sector and VG
A calibration is terminated with an error (S21)
7).

When the gain level is set in step S207, the currently set gain level is X ', the newly set gain level is X, the current amplitude of the reproduced RF signal is eamp', and the target is set. If the amplitude is eamp, X = k × (eamp−eamp ′) + X ′ (32) where k is a constant. It can be. Therefore, in step S207, the gain level of the variable gain amplifier 8 is set based on the above equation (32). In the above equation (32), the amplitude of the reproduced RF signal is used. For example, the current VFO of the reproduced RF signal is evfo ′, and the target VFO is evfo.
X = k × (evfo−evfo ′) + X ′ (33) where k is a constant. It can be.

Such VGA calibration is performed by
This is performed when the disk 6 is loaded in the disk drive. Further, since the amplitude of the reproduced RF signal depends on the recording power, it is necessary to perform the amplitude immediately after performing the power calibration, for example. Therefore, also in this case, it is desired to perform the processing efficiently in order to suppress a decrease in the access time. When the disk drive is in the operating state, the following three situations can be considered for the validity of the VGA gain level. Situation 4. Is appropriate. Situation 5 Although the reproduction was performed normally this time, there is a possibility that the reproduction cannot be performed next time in consideration of the variation in the recording data. Situation 6 Reproduction is not performed correctly and the gain level is inappropriate. For example, by performing VGA calibration in “Situation 5”, the reliability of reproduction is improved and the access time is shortened.

8. Read Sequence of the Present Embodiment FIG. 21 is a flowchart illustrating an example of processing steps in the case where VGA calibration is performed progressively in a sequence for reproducing data recorded on the disk 6. For example, when a read sequence is started based on a reproduction request from the host computer 1,
First, the calibration flag and the calibration counter are initialized to, for example, “0” (S300). Then, the gain level of the variable gain amplifier 8 is set (S
301), the optical pickup is sought to a sector from which data is to be read (reproduction sector) (S302), and the operation shifts to a reproduction operation for the reproduction sector (S303). After shifting to the reproducing operation, it is determined whether or not the reproducing operation has been completed normally (S304). If it is determined that the reproducing operation has been completed normally, it is further determined whether or not a calibration flag as identification information is set. Is determined (S305).
If it is determined that the calibration flag is not set, the reproduction R is determined based on the amplitude reference value in the RAA 16.
The amplitude of the F signal is calculated (S306). Then, it is determined whether the amplitude is within a predetermined range (S307),
If it is determined that the amplitude is within the predetermined range, the current gain level is determined to be appropriate, a calibration flag is set (S308), and the read sequence is terminated (S309). If it is determined in step S307 that the amplitude of the reproduced RF signal is not within the predetermined range, a gain level to be set is calculated (S310). And
The calibration counter is incremented (S
311), the count value of the calibration counter is determined (S312). If it is determined in step S312 that the count value of the calibration counter is within the predetermined range, the read sequence ends normally (S309). If it is determined in step S312 that the count value of the calibration counter is not within the predetermined range, the read sequence is terminated based on the calibration error (S3).
13).

If it is determined in step S304 that the reproducing operation has not been completed normally in the course of the execution of the read sequence in such a procedure, the process shifts to, for example, the VGA calibration shown in FIG.
314). Then, it is determined whether or not the VGA calibration has been completed normally (S315). If it is determined that the VGA calibration has been completed normally, the calibration flag is set (S316), and the process returns to step S302 to retry the reproducing operation. . If it is determined in step S317 that the VGA calibration did not end normally, the read sequence is ended based on the reproduction error (S317).

When the read sequence is terminated in step S317, as shown by a broken line, an incomplete VGA calibration is performed (S33).
0), the process may return to step S302 and retry the read sequence. That is, for example, even when an error is terminated due to the VGA calibration not being completed, an appropriate recording power can be obtained by performing the uncompleted VGA calibration. Then, by retrying the read sequence based on the gain level obtained in step S330, it is possible to reduce a reproduction error.

As described above, after the read sequence is started, the VGA calibration is gradually performed when the reproducing operation is not normally completed. Therefore, the read sequence and the VGA calibration can be completed in a shorter time than when the read sequence is executed after the VGA calibration is executed alone.

In this embodiment, for example, the MO
In the disk drive device corresponding to the disk, an example has been described in which the power calibration and the VGA calibration are gradually performed when the write sequence and the read sequence are being performed. However, the present invention relates to, for example, a CD-RW (Compact Di).
sc Rewritable), DVD-RAM (Digi
The present invention can also be applied to a case where a write sequence or a read sequence is executed on a recordable optical disc such as a tal versatile disc (Random Access Memory). For VGA calibration,
For example, CD-ROM (CompactDisc Read Only Memor
y), DVD-ROM (Digital Versatile Disc Read-O)
The present invention can also be applied to a case where reproduction is performed on a read-only optical disc such as an nly memory.

In the present embodiment, power calibration and VGA calibration have been described as examples.
The present invention can also be applied to calibration of bias values of focus servo and tracking servo. Further, in a disk drive device corresponding to a magnetic disk such as a floppy (registered trademark) disk other than the magneto-optical disk and the optical disk,
When performing recording and reproduction on a magnetic disk, the present invention can be applied to calibration of positioning control (various servos) of a magnetic head.

[0155]

As described above, according to the present invention, a part of the power calibration sequence can be executed when a write sequence for recording data in predetermined units is being executed. Have been. That is, the power calibration sequence is divided and incorporated into the write sequence, and is gradually executed. As a result, the power calibration and the write sequence can be completed in a shorter time than required to execute and complete the write sequence after performing the power calibration alone. Therefore, data can be efficiently recorded without impairing the accessibility.

In addition, before the power calibration is completed, if an error due to the power calibration not being completed occurs and the write sequence is completed, the power calibration is performed. Even if the write sequence ends in error, it is possible to obtain appropriate recording power. Further, by retrying the write sequence after obtaining the appropriate recording power, the write sequence can be executed with the appropriate recording power.

Further, since a part of the gain level calibration sequence can be executed during the execution of the read sequence for reproducing data in predetermined units, the gain level calibration sequence can be executed. The read sequence is divided and incorporated into the read sequence, and is executed gradually. Thus, the calibration and the read sequence can be completed in a short time as in the case of the power calibration described above. Therefore, data can be efficiently reproduced without deteriorating the accessibility.

In addition, if the read sequence is terminated due to an error caused by the gain level not being completed before the gain level calibration is completed, the VGA calibration is performed. I have to. Therefore, even when the read sequence ends in error, an appropriate gain level can be obtained. Furthermore, by retrying the read sequence after obtaining an appropriate gain level, the read sequence can be executed at an appropriate gain level.

[Brief description of the drawings]

FIG. 1 is a block diagram of a disk drive device according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram of an outline of a mark position recording method and a mark edge recording method.

FIG. 3 is a diagram illustrating a sector format.

FIG. 4 is an explanatory diagram of a minimum magnetization reversal width in the RLL (1, 7) encoding method.

FIG. 5 shows a reproduction signal of data recorded by an RLL (1, 7) code and a mark edge recording method in PR (1, 2, 2,
FIG. 4 is an explanatory diagram of an eye pattern when the waveform is equalized in 1).

FIG. 6 is an explanatory diagram of a state transition process of a Viterbi decoding method.

FIG. 7 is an explanatory diagram of state transition of the Viterbi decoding method.

FIG. 8 is an explanatory diagram of a trellis diagram of state transition of the Viterbi decoding method.

FIG. 9 is a block diagram of the SMU of the Viterbi decoder.

FIG. 10 is a block diagram of an A-type status memory of the SMU of the Viterbi decoder.

FIG. 11 is a block diagram of a B-type status memory of the SMU of the Viterbi decoder.

FIG. 12 is an explanatory diagram of a state data value selecting operation in a merge block of the Viterbi decoder.

FIG. 13 is an explanatory diagram of an amplitude reference value adapted by a Viterbi decoder.

FIG. 14 is an explanatory diagram of a relationship between a recording laser power and an impulse response.

FIG. 15 is an explanatory diagram of a relationship between a recording laser power and an eye pattern.

FIG. 16 is an explanatory diagram of envelopes of 2T and 8T patterns.

FIG. 17 is an explanatory diagram of asymmetry values observed in envelopes of 2T and 8T patterns.

FIG. 18 is a flowchart illustrating an example of a process transition when executing power calibration.

FIG. 19 is a flowchart illustrating an example of a write sequence according to the present embodiment.

FIG. 20 is a flowchart illustrating an example of a process transition when performing VGA calibration.

FIG. 21 is a flowchart illustrating an example of a read sequence according to the present embodiment.

[Explanation of symbols]

1 host computer, 2 drive controller,
3 CPU, 4 LPC, 5 magnetic head, 6 disk, 7 optical pickup, 8 variable gain amplifier, 9
Spindle motor, 10 APC, 11 filter section,
12 A / D converter, 13 Viterbi decoder, 14 PL
L part, 131 shift register, 132BMC, 133
ACS, 134 SMU, 135 merge block,
136 RAA

Claims (12)

[Claims] 1. An identification information setting means capable of setting identification information indicating whether or not to execute a power calibration sequence, and a write unit for performing recording on a loaded recording medium for each predetermined unit of data. Recording control means capable of executing a sequence, recording means capable of recording supplied data based on the recording control means, and reproduction capable of reproducing data recorded by the recording means Means for reproducing the data recorded in the calibration area of the recording medium based on the identification information when the data recording of the predetermined unit is normally completed in the write sequence executed by the recording control means. Reproduction control means that can be executed; and data recorded in the calibration area. When the reproduction is completed normally, asymmetry calculation means for obtaining the asymmetry of the data, and determination means for determining whether to execute a power calibration sequence based on the asymmetry calculated by the asymmetry calculation means, A disk drive device comprising: a calibration execution control unit configured to execute a part of a power calibration sequence based on a determination result of the determination unit. 2. The method according to claim 1, wherein, before the power calibration sequence is completed, if an error occurs due to the power calibration sequence not being completed, the power calibration sequence is performed. The disk drive device according to claim 1. 3. The disk drive according to claim 2, wherein a retry of the write sequence is performed after the power calibration sequence is performed. 4. A reproduction control means capable of executing a read sequence for reproducing data for each predetermined unit; a reproduction means capable of reproducing the data based on the reproduction control means; A determination unit for determining whether or not the data reproduction for each predetermined unit has been normally completed when the sequence is being executed; and a calibration of a gain level of the reproduction unit based on a result of the determination by the determination unit. A disk drive device comprising: a calibration execution control unit capable of executing a part of a sequence. 5. The method according to claim 1, wherein, before the calibration sequence of the gain level is completed, if an error occurs due to the completion of the calibration sequence, the calibration sequence is performed. The disk drive device according to claim 4. 6. The disk drive device according to claim 5, wherein a retry of the read sequence is performed after performing the gain level calibration sequence. 7. A step of executing a write sequence for recording supplied data on a recording medium in predetermined units, a step of reproducing data recorded on the recording medium, and a state in which the write sequence is being executed. Under the
A step of reproducing the data recorded in the calibration area based on the identification information when the data recording of the predetermined unit is normally completed; and a step of reproducing the data recorded in the calibration area normally. Determining the asymmetry of the data, determining whether to execute a power calibration sequence based on the asymmetry, and executing a power calibration sequence based on a result of the determination. A calibration method, comprising: 8. The method according to claim 1, further comprising, before the power calibration sequence is completed, when an error occurs due to the power calibration sequence not being completed, performing the power calibration sequence. The calibration method according to claim 7, wherein the calibration is performed. 9. The calibration method according to claim 8, further comprising a step of performing a retry of the read sequence after performing the power calibration sequence. 10. A step of executing a read sequence for reproducing data recorded on a recording medium for each predetermined unit, and, if the read sequence is being executed, whether the reproduction of the predetermined unit of data has been normally completed. Determining whether the data is recorded on the recording medium based on the result of the determination. Option. 11. The method according to claim 1, further comprising a step of executing the calibration sequence if an error occurs due to the end of the calibration sequence before the completion of the gain level calibration sequence. The calibration method according to claim 10, wherein the calibration is performed. 12. The calibration method according to claim 11, further comprising a step of performing a retry of the read sequence after performing the gain level calibration sequence.