JP2002062246A - Method of manufacturing cantilever - Google Patents

Abstract

PROBLEM TO BE SOLVED: To manufacture an Si cantilever without damaging an Si substrate having membrane structure provided with a cavity in its lower part, even when an inside of a reaction chamber is evacuated. SOLUTION: In this cantilever manufacturing method for manufacturing the cantilever by working on the Si substrate, an Si layer is vertically etched from a face side where the cantilever of the Si substrate is formed by a high- density plasma etcher, at least one leak hole is drilled, a cavity is formed by etching vertically in a side opposed to the face side the cantilever of the Si substrate is formed, the leak hole is communicated with the cavity, the Si substrate is inserted into the reaction chamber for dry etching, the inside of the reaction chamber is evacuated, and the cantilever is manufactured by carrying out etching on the face side the cantilever of the Si substrate is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a cantilever, and more particularly, to a method for manufacturing a cantilever by processing a Si substrate using a dry etching process. Further, the present invention is particularly effective when a relatively large membrane structure is required for arranging a plurality of cantilevers in an array.

[0002]

2. Description of the Related Art STM (scanning tunneling) is an apparatus for observing the surface shape of an object to be measured in angstrom units.
microscope-scanning tunnel microscope) or AFM (atomi
c force microscope) is well known.
As a probe of these devices, a cantilever (cantilever) type probe made of a Si single crystal material (hereinafter, referred to as a probe)
(Abbreviated as Si cantilever) is often used. This S
The i-cantilever can be easily manufactured by subjecting a Si substrate composed of a Si single crystal material to dry etching fine processing. Also, a plurality of Si cantilevers can be manufactured from one Si substrate by performing the same processing as batch processing (manufacturing many ICs on one Si wafer) in the LSI manufacturing process. The cost per hit can be reduced.

[0003] The reason why the Si single crystal material is used for the material of the cantilever is that it is excellent in mechanical properties, electrical characteristics and the like. Further, since an electronic circuit for processing a detection signal by the cantilever can be combined with another part of the same Si substrate having a part thereof as a cantilever part, the Si cantilever and the electronic circuit can be formed on one chip. So-called monolithic chips can be manufactured. As a result, miniaturization, cost reduction and future SPM
(Scanning probe microscopes)
The application of similar Si cantilevers in the field is expected.

As an example of a method of manufacturing the Si cantilever, first, a sample stage on which a Si substrate is mounted is inserted into a vacuum chamber, and the Si substrate is subjected to dry etching. At this time, in order to manufacture the Si cantilever with high dimensional accuracy, a method of performing etching while lowering the substrate temperature is used. When the temperature is high or the temperature distribution is non-uniform, the sidewall shape is deteriorated and the etching rate distribution is deteriorated, and various characteristics of the cantilever may be varied. Therefore, when cooling the Si substrate, it is necessary to improve the heat conduction between the sample stage and the substrate to make the temperature distribution of the Si substrate uniform. So usually
An electrostatic chuck is used or the Si substrate is completely adhered to the sample table by using vacuum grease or the like. In this state, first, for example, an SOI (Silicon On I / O) as shown in FIG.
A structure of the membrane 2 having a cavity 18 below the substrate 10 or the Si substrate is formed.

[0005]

Next, the Si substrate is placed on the sample stage so that the cavity side and the sample stage are brought into close contact with each other with vacuum grease or the like as described above. Thereafter, the sample stage on which the Si substrate is placed is inserted into a reaction chamber (not shown) of the dry etching apparatus, and the reaction chamber is evacuated.

However, if the reaction chamber is evacuated, a pressure difference between the inside and the outside of the cavity 18 occurs, and the problem that the membrane 2 is damaged often arises. In particular, when a plurality of Si cantilevers are manufactured in an array as shown in FIG. 1B, the area of the membrane 2 is increased by that amount, so that the volume of the cavity 18 is also increased. For this reason, there is a problem that the membrane 2 is blown away and damaged by slightly exhausting the reaction chamber.

As a solution to this problem, a gap is formed between the Si substrate and the sample table by putting thin plate spacers, so-called clogs, at several places between the Si substrate and the sample table. Although a method that allows gas to be exhausted is conceivable, using this method impedes the heat conduction between the Si substrate and the sample stage, resulting in uneven heat distribution on the Si substrate and a temperature-sensitive reaction. The process is S
It does not uniformly occur on the i-substrate. For this reason, there is a problem that the shape and dimensional accuracy of the completed Si cantilever is deteriorated.

The present invention has been made in order to solve such a problem. Even when the reaction chamber is evacuated to produce a Si cantilever, the membrane structure having a cavity at the bottom is not damaged. It is an object of the present invention to manufacture a Si cantilever without deteriorating the shape and dimensional accuracy of the Si cantilever by making it possible to manufacture the Si cantilever and making the heat distribution in the Si substrate uniform.

[0009]

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention provides a method of manufacturing a cantilever by processing a Si substrate by vertically etching a surface of the Si substrate on which a cantilever is formed. At least one or more leak holes are opened, and vertical etching is performed on the opposite side of the surface of the Si substrate on which the cantilever is formed to open a cavity and penetrate the leak hole and the cavity, and the Si substrate is used for dry etching. The method is characterized in that the cantilever is inserted into the reaction chamber, the reaction chamber is evacuated, and the surface of the Si substrate on which the cantilever is formed is etched to manufacture the cantilever.

[0010] In addition to the above means, the present invention provides a method for manufacturing a semiconductor device, comprising:
A cantilever can also be manufactured by using an SOI substrate having a structure of a SiO2 layer and a Si layer on a Si layer as a substrate.

Further, according to the present invention, in addition to any one of the above means, the leak hole is formed by a high-density plasma etcher.
Cantilevers can also be manufactured by vertically etching the layers.

Further, according to the present invention, in addition to any one of the above-described means, a cantilever can be manufactured even if the leak hole is obtained by etching the SiO 2 layer with BHF.

In a method of manufacturing a Si cantilever using a Si substrate, a leak hole communicating with a cavity portion of a membrane structure is formed by etching, so that gas inside the cavity passes through the leak hole even if the reaction chamber is evacuated. Since the exhaust gas is exhausted, the membrane structure is not destroyed by the pressure difference between the inside and outside of the cavity, and the Si cantilever can be manufactured.

Further, when a plurality of Si cantilevers are arranged in an array, a relatively large membrane structure is formed and the cavity becomes large. By appropriately providing a plurality of the above-described leak holes, the gas inside the cavity can reduce the plurality of leak holes. Since the gas is exhausted through the passage, the membrane structure is not destroyed by the pressure difference between the inside and outside of the cavity, and the Si cantilever array can be manufactured.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings. In all the drawings, components denoted by the same reference numerals represent the same components. First, as shown in FIG.
SOI (Silico) having a SiO2 layer 12 and a Si layer structure on top
n On Insulator) A substrate 10 is prepared. 2 to 13 show cross sections at the time of the respective manufacturing processes at the position AA in FIG. 1B. In addition, each drawing is exaggerated in the thickness direction of the SOI substrate 10 for easy explanation.

Next, a cantilever etching mask layer is formed. As shown in FIG. 3, an SiO 2 layer 14 serving as a cantilever mask layer is formed on the SOI substrate 10. Usually, since the mask for processing the cantilever used in STM or AFM has a fine pattern, the underlying Si layer 1
3 tends to weaken. Therefore, this S
The iO2 layer 14 is preferably generated by thermal diffusion.

Next, as shown in FIG. 4, this cantilever etching mask layer (SiO 2 layer 14) is
d Pattern with hydrogen fluoride-buffered hydrofluoric acid solution. In the following drawings, the SOI viewed from the side
Since the substrate 10 is shown, only one Si cantilever can be seen, but a configuration in which a plurality of cantilevers are arranged in an array as shown in FIG. 1 may be used.

Next, a mask layer for cavity processing is formed. First, as shown in FIG.
An l layer 15 is formed. This Al layer 15 becomes a mask layer for cavity processing. Next, as shown in FIG.
The layer 15 is patterned with a mixed aqueous solution of phosphoric acid, nitric acid and acetic acid.

Next, as shown in FIG. 7, a pattern for a leak hole 17 is patterned with a photoresist 16 on the surface on which the cantilever is formed. The size, shape and number of the leak holes 17 are preferably determined in consideration of the area of the membrane, the stress at the time of membrane etching, and the like. In addition, this leak hole 1
7 is preferably disposed at the corner of the membrane as much as possible so that a temperature difference from the center of the membrane at the time of substrate cooling does not occur.

Next, as shown in FIG. 8, the ICP (Inductiv
The Si layer 13 is vertically etched from the top to the bottom in FIG. 8 to form the leak hole 17 with a high-density plasma etcher such as an ely coupled plasma. Next, as shown in FIG. 9, BHF is injected into the leak hole 17, and a part of the SiO2 layer 12, which is the insulating layer of the SOI substrate 10, at the bottom of the hole is etched. At this time, etching may proceed more than necessary in the layer direction (lateral direction) of the SiO 2 layer 12. However, since the leak hole itself is sufficiently small and the SiO2 layer in this portion is an unnecessary portion in the end, there is no particular problem. Next, as shown in FIG.
The PR 16 for patterning in the leak hole 17 is removed by ashing.

Next, as shown in FIG. 11, the Si substrate 11 is vertically etched by a high-density plasma etcher such as an ICP to form a cavity 18. Next, as shown in FIG. 12, the Si layer 13 is vertically etched by a high-density plasma etcher such as ICP. At the time of this etching, in the case of a hole wafer (a whole piece of Si wear), the substrate is fixed to the sample table using a method such as an electrostatic chuck, but when the wafer is divided and then mounted on the sample table, or If you cannot use a method such as electrostatic chuck for other reasons,
It is preferable to completely adhere with vacuum grease or the like. In general, a method of bringing a substrate to be processed into complete contact with a sample table with vacuum grease or the like is often used for the purpose of improving heat conduction during cooling between the sample table and the processing substrate. After the substrate to be processed is firmly fixed to the sample table in this manner, when the reaction chamber is evacuated to vacuum, the leak hole 17 is opened in the cavity 18, and the gas in the cavity 18 passes through the leak hole 17. Is discharged out of the cavity 18, so that no pressure difference occurs inside and outside the cavity 18. Therefore, the gas in the cavity can be safely exhausted without the membrane 2 being blown off due to the pressure difference and being damaged.

Finally, as shown in FIG.
The SiO2 layer 14 (mask for cantilever processing) and the Al layer 15 (mask for cavity processing) are removed using F to complete the cantilever structure. Thus, the cantilever array having a relatively large membrane area as shown in FIG. 1 can be manufactured safely without breaking the membrane.

Similarly to this cantilever array, for example, an integrated vibrator array (a cantilever (micro vibrator) having a different length is formed into a comb shape having a large membrane area, and the difference in the natural frequency of each is encoded. Absolute position sensor (Gerhard Grosch, "Hybrid Fiber-optic /
Micromechanical Frequency Encoding DisplacementSen
sor ", Sensor and Actuators, A23, pp. 1128-1131 (199
In any cantilever such as 0))), it can be manufactured safely without breaking the membrane. Of course, since the leak hole 17 has disappeared when the cantilever is completed, there is no problem in using the cantilever.

As described above, the present invention has been described with reference to the preferred embodiments. However, the present invention is not limited to these embodiments, and can be modified without departing from the gist of the present invention. In the above embodiment, the case where the number of leak holes 17 is one has been described. However, for example, when a plurality of cantilevers are arranged in an array as shown in FIG. 1, the membrane area is increased by that amount. It is preferable to increase the number appropriately. Also, it is preferable to provide a position where a leak hole is formed between the cantilevers or at a corner of the membrane.

Further, in the above embodiment, description has been made only for a case where a membrane structure is formed on a Si substrate, and then the cantilever is manufactured by processing the membrane structure.
The present invention is also applicable to various bulk micromachines manufactured based on other membrane structures.

[0026]

According to the present invention, when a cantilever is manufactured on a Si substrate by using a dry etching process, a leak hole communicating with a cavity is formed in advance to evacuate the reaction chamber. It is possible to prevent the membrane structure from being broken due to the pressure difference between the inside and outside of the cavity. Therefore, a membrane structure having a large area can be manufactured, and a multi-type cantilever in which a plurality of cantilevers are arranged in an array can be manufactured.

[Brief description of the drawings]

FIG. 1A is a diagram of an SOI substrate on which cavity processing has been performed. (B) A schematic view of a cantilever array including a plurality of Si cantilevers.

FIG. 2 is a sectional view of an SOI substrate for manufacturing a cantilever.

FIG. 3 is a diagram in which an SiO2 layer is formed on an SOI substrate.

FIG. 4 is a diagram showing a pattern of a cantilever mask layer (SiO 2 layer).

FIG. 5 is a diagram in which a cavity mask layer (Al layer) is formed.

FIG. 6 is a diagram in which a cavity mask layer is patterned.

FIG. 7 is a diagram in which a cavity leak hole is patterned.

FIG. 8 is a diagram in which a cavity leak hole is etched in a Si layer.

FIG. 9 is a diagram in which a cavity leak hole is etched in an SiO 2 layer.

FIG. 10 is a view in which a resist for a cavity leak hole is removed.

FIG. 11 is a diagram after cavity etching.

FIG. 12 is a diagram showing cantilever etching.

FIG. 13 is a sectional view showing a completed cantilever.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Cantilever array 2 Membrane 10 SOI (Silicon On Insulator) substrate 11 Si substrate 12 SiO2 layer 13 Si layer 14 SiO2 layer 15 Al layer 16 Photoresist 17 Leakage hole

Claims (4)

[Claims] 1. A cantilever manufacturing method for manufacturing a cantilever by processing a Si substrate, wherein at least one or more leak holes are opened by vertical etching from a surface side of the Si substrate on which the cantilever is formed. Vertical etching is performed on the side opposite to the surface on which the surface is to be formed, a cavity is opened, the leak hole and the cavity are penetrated, the Si substrate is inserted into a reaction chamber for dry etching, and the reaction chamber is evacuated. A cantilever manufacturing method, characterized in that a cantilever is manufactured by etching a surface of a substrate on which a cantilever is formed. 2. The method according to claim 1, wherein the Si substrate is made of Si.
A method for manufacturing a cantilever, comprising a SOI substrate having a SiO2 layer and a Si layer deposited on the layer. 3. The method according to claim 1, wherein the leak hole is obtained by vertically etching a Si layer by a high-density plasma etcher. 4. The cantilever manufacturing method according to claim 1, wherein the leak hole is obtained by etching the SiO 2 layer with BHF.