JP2002057454A - Method for judging and device for inspecting junction state of integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the junction state-inspecting device of an integrated circuit, that can quickly judge that the junction state of the integrated circuit packaged onto a circuit board using a simple method, and can be realized by an inexpensive configuration. SOLUTION: The inspecting device 1 selects test and drive pins 17 and 16 from the pins for signals of the integrated circuit 2. Then, a pulsive input signal is applied to the first parasitic diode 19 between the drive pin 16 and a ground pin 18 and a substrate resistor 20, and an output signal generated between a pattern 17a on the circuit board, where the test pine 17 is jointed, and the ground pin 18 is detected. In addition, the amplitude of the detected output signal is compared with a reference value, thus judging as to whether the junction state between the test pin 17 and pattern 17a is confirming.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for judging a joint state of an integrated circuit and a judging device utilizing the judging method. More particularly, the present invention relates to the joining of signal pins in an integrated circuit mounted on a circuit board. The present invention relates to a determination method and a determination device capable of electrically detecting a state.

[0002]

2. Description of the Related Art With the miniaturization and high functionality of electronic devices, high-density mounting of a circuit board, which is a core component of the electronic device, such as a one-chip composite component is progressing. Therefore, the number of pins (terminals) in an integrated circuit mounted thereon has increased, and the distance between pins has become extremely narrow.

[0003] On the other hand, "solder" is used as a means for joining pins of an integrated circuit onto a pattern of a circuit board. Recently, in consideration of environmental problems, so-called "lead-free", which does not contain lead, is used. Solder "has been developed.

By the way, when commercializing electronic devices,
It is desirable to check whether the pins of the integrated circuit mounted on the circuit board are securely joined via the solder, that is, whether or not the soldering is correctly performed. In particular, when a lead-free solder is used, inspection of the bonding state is extremely important because the bonding property is unstable.

As an inspection device for judging the bonding state of an integrated circuit, for example, a capacitance detector called a sensor plate is mounted above an integrated circuit mounted on a circuit board,
2. Description of the Related Art There is known an apparatus in which an AC signal is applied to a pattern to which an arbitrary pin of an integrated circuit is to be connected, and the capacitance of the integrated circuit generated at that time is detected by a sensor plate. According to this, by comparing the detected capacitance with the capacitance of a non-defective circuit board, it is possible to determine whether the bonding state is good.

[0006] As another inspection apparatus, for example, an inspection apparatus disclosed in US Pat. No. 5,555,928 is known. This is when two arbitrary pins are selected as a test pin and a sense pin from the signal pins of the integrated circuit mounted on the circuit board, and a constant voltage is applied to the pattern of the circuit board to which the sense pin is to be joined. Is measured when the reverse bias voltage is applied to the pattern of the circuit board to which the test pins are to be joined.

More specifically, as shown in FIG. 6, a parasitic diode 43 and a substrate resistor 44 interposed between a sense pin 40 and a test pin 41 and a ground pin 42 are used. A constant voltage of, for example, 0.9 V is applied between 40 and the ground pin 42, and then a constant voltage of, for example, 1.2 V is applied between the test pin 41 and the ground pin 42. Then, the voltage across the substrate resistor 44 increases and the voltage across the parasitic diode 43 on the sense pin 40 side drops below 0.8 V (forward voltage), so the current flowing through the sense pin 40 (measured by the ammeter 45). Current value). Therefore, by comparing the amount of attenuation of the current value detected by the ammeter 45 with the amount of attenuation of a non-defective circuit board, the bonding state of the test pin 41 can be determined.

The voltage across the diode is 0.8.
When the voltage drops below V (forward voltage), the imaginary resistance component 43a of the diode greatly changes nonlinearly with respect to the change in voltage. That is, even if the ammeter 45 detects the decay of the current value flowing through the sense pin 40, if the imaginary resistance component 43a of the parasitic diode 43, which is an unknown resistor, is not recognized, the junction state of the test pin 41 can be accurately determined. Can not. Therefore, in the above-described inspection apparatus, a signal pin set as the sense pin 40 and a signal pin set as the sense pin 40 in order to detect the imaginary resistance components 43a of the two parasitic diodes 43, respectively,
The current value is measured in a state where the signal pin set as the test pin 41 is replaced, and the current value is measured even in a state where the sense pin 40 and the test pin 41 are short-circuited. That is, three unknown resistance values are calculated by detecting changes in the current values in the three circuits.

[0009]

However, in the inspection apparatus using the sensor plate, if a metal component such as a heat sink is mounted on the upper surface of the integrated circuit, the capacitance cannot be detected. The joining state of the test pins could not be determined.

[0010] Further, the sensor plate is generally expensive, and must be replaced with a special sensor plate every time the type of product is changed. Therefore, the equipment cost becomes extremely high, and the production of a large number of products in small quantities is required. It was not suitable for testing electronic equipment.

On the other hand, in an inspection apparatus that determines a junction state based on an attenuation of a current value flowing through a test pin, a circuit is switched or a test pin and a sense pin are short-circuited in order to detect an imaginary resistance component included in a parasitic diode. And the inspection time per circuit board becomes relatively long, and the inspection cannot be performed quickly.

In view of the above circumstances, the present invention provides an integrated circuit that can determine the bonding state of an integrated circuit mounted on a circuit board in a simple manner and quickly, and can be realized with an inexpensive configuration. It is an object of the present invention to provide a bonding state determination method and a determination apparatus using the method.

[0013]

According to a first aspect of the present invention, there is provided a method for determining a bonding state of an integrated circuit, wherein an arbitrary pin is selected as a test pin from signal pins of the integrated circuit mounted on a circuit board. When a pin corresponding to the test pin is selected as a drive pin and a pulse-like input signal is applied to a first diode and a substrate resistor interposed in series between the drive pin and the ground pin of the integrated circuit, Detecting an output signal generated between the ground pin and a pattern on the circuit board to which the test pin is to be joined, and comparing the amplitude of the detected output signal with a reference value. This is to judge the quality of the bonding state with the above.

Here, when a pulse signal is applied to the first diode and the substrate resistor, the signal may be directly applied to the drive fillet (signal pin) and the solder fillet portion of the ground pin of the integrated circuit. Good,
The pattern may be applied to the pattern of the integrated circuit to which the drive pin is to be joined and the pattern to which the ground pin is to be joined. When applying a signal, a probe or the like is used. Further, it is preferable that the reference value is set based on an actually measured value measured on a good circuit board.

In the semiconductor manufacturing process, the first diode and a second diode to be described later are a parasitic diode that is parasitic on an integrated circuit, or a static diode between a signal pin and a ground pin in an integrated circuit such as TTL. This is a protection diode built for the purpose of electrical protection.

Therefore, according to the first aspect of the present invention, any one of the signal pins of the integrated circuit is selected as a test pin, and a pin corresponding to the test pin is selected. Select as drive pin.
Then, a pulse signal is applied to the first diode and the substrate resistor interposed in series between the drive pin and the ground pin. Since the substrate resistance is connected to all the signal pins, when the voltage at both ends of the substrate resistance changes due to the pulse signal, the voltage in the circuit on the test pin side also changes. Therefore, an output signal generated between the pattern on the circuit board to which the test pin is to be joined and the ground pin is detected. That is, when the voltage applied to the substrate resistor via the drive pin is periodically changed, how the signal output via the test pin changes is detected. Then, the amplitude of the detected signal is compared with a reference value,
Based on the comparison result, it is determined whether the bonding state between the test pin and the pattern is good.

According to a second aspect of the present invention, there is provided a method for determining a junction state of an integrated circuit according to the first aspect, wherein the first diode interposed between the drive pin and the ground pin; In a state where a constant current is supplied to a second diode interposed between a test pin and the ground pin to generate a forward voltage, the first diode and the substrate resistor are pulsed as the input signal. Is supplied.

Therefore, according to the method for judging the junction state of an integrated circuit according to the second aspect of the present invention, in addition to the operation of the first aspect, the first diode and the second diode do not affect the magnitude of the load. A substantially constant current is supplied to generate a forward voltage (about 0.8 V) across each diode.
In this state, when a pulsed current is supplied to the first diode and the substrate resistor, a change in the voltage generated across the substrate resistor by this current is superimposed on the forward voltage generated by the second diode, A pulse signal is generated between the test pin and the ground pin. Thus, with the second diode biased,
Since a pulsed current is supplied, the output impedance is reduced, and signal transmission is stabilized.

According to a third aspect of the present invention, there is provided an integrated circuit bonding state inspection apparatus, comprising: test pin selecting means for selecting an arbitrary pin as a test pin from signal pins of an integrated circuit mounted on a circuit board; Drive pin selecting means for selecting a pin corresponding to the set test pin as a drive pin from the signal pins, a first diode and a substrate interposed in series between the drive pin and a ground pin of the integrated circuit. Pulse signal generation means for applying a pulse-like input signal to the resistor, output signal detection means for detecting an output signal generated between the pattern on the circuit board to which the test pin is to be joined and the ground pin, An output signal detected by the output signal detecting means when the input signal is applied by the pulse signal generating means. Amplitude compared with a reference value of, those comprising the quality determining means for determining the acceptability of bonding state between the test pins and the pattern.

According to the third aspect of the present invention, an arbitrary pin is selected as a test pin from among the signal pins of the integrated circuit by the test pin selecting means. Further, a pin corresponding to the test pin is selected as a drive pin by the drive pin selecting means. Then, the pulse signal generating means applies a pulse signal to the first diode and the substrate resistor interposed in series between the drive pin and the ground pin. Since this signal flows through the substrate resistor, a pulse signal is generated in the second diode and the substrate resistor interposed between the test pin and the ground pin. Thus, the output signal detecting means detects an output signal generated between the pattern on the circuit board to which the test pin is to be joined and the ground pin. That is, the output signal detection means detects how the output signal output via the test pin changes when the voltage applied to the substrate resistor via the drive pin is changed periodically. The pass / fail judgment means compares the detected amplitude of the output signal with a reference value, and judges pass / fail of the bonding state between the test pin and the pattern based on the comparison result.

According to a fourth aspect of the present invention, there is provided a bonding state inspection apparatus for an integrated circuit, wherein the first constant current for supplying a constant current to the first diode and the substrate resistor is provided. And a second constant current source for supplying a constant current to the second diode and the substrate resistor interposed between the test pin and the ground pin, and wherein the pulse signal generating means includes the first constant current source. In a state where a constant current is supplied to the first diode by a current source and a forward voltage is generated, a pulse-like current is supplied as the input signal, and the output signal detection unit is configured to output the pulsed current by the second constant current source. In a state where a constant current is supplied to the second diode to generate a forward voltage, the amplitude of an output signal generated between the pattern on the circuit board and the ground pin is detected. It is.

Therefore, according to the device for inspecting the junction condition of an integrated circuit according to the fourth aspect of the present invention, in addition to the function of the third aspect of the present invention, a substantially constant current is supplied to the first diode by the first constant current source. An approximately constant current is supplied to the second diode by the second constant current source to generate a forward voltage (about 0.8 V) across each diode. In this state, when a pulsed current is applied to the first diode and the substrate resistor, the change in the voltage generated across the substrate resistor is superimposed on the forward voltage generated by the second diode, and the test pin and the A pulse signal is generated between the signal and the ground pin. In this way, a pulsed current is supplied in a state where a bias is applied to the second diode, so that the output impedance is reduced and the signal transmission is stabilized.

According to a fifth aspect of the present invention, an automatic drive pin generation program is used in the integrated circuit bonding state inspection apparatus according to any one of the third and fourth aspects, and the drive pin corresponding to the test pin is provided. Is a drive pin automatic generation program that registers in advance for each individual test pin, and when there is a single pin among the signal pins of the integrated circuit, a pulse signal is applied to the single pin. In this case, when the amplitude of the output signal generated between the test pin and the ground pin becomes a predetermined level or more, the single pin is registered as a drive pin.

This program is executed as a pre-process for judging the bonding state, and is executed on a non-defective circuit board as a reference (the integrated circuit is recognized to be securely bonded). Will be The term “single pin” refers to a pin that is not used as a part of an electronic circuit in an integrated circuit, that is, a pin that is not connected to another electronic integrated circuit.

Therefore, according to the drive pin automatic generation program of the present invention, the drive pins are registered corresponding to the respective test pins. Specifically, it is determined whether or not there is a single pin among the signal pins of the integrated circuit. If there is a single pin, the single pin is preferentially selected as a drive pin. Since the single pin has no circuit configuration, it is hardly affected by a signal wraparound. That is, it is possible to obtain a large gain for the input signal.

By the way, among the single pins, there are pins that do not have an internal circuit of the integrated circuit, that is, pins to which no diode or substrate resistor is connected. Therefore, in the present invention, a pulse signal is applied to a single pin, and this single pin is registered as a drive pin only when the amplitude of an output signal generated between the test pin and the ground pin becomes a predetermined level or more. . This prevents a single pin having no internal circuit from being registered as a drive pin. The registered data relating to the single pin is stored in, for example, a storage unit, and is read out when the bonding state is inspected.

According to a sixth aspect of the present invention, in the automatic drive pin generation program according to the fifth aspect, when there is no single pin among the signal pins of the integrated circuit, a plurality of the drive pins are generated. A pulse-like input signal is sequentially applied to the signal pins, and at this time, an output signal generated between the test pin and the ground pin is stored corresponding to each signal pin, and the stored output is further stored. A signal having the largest amplitude is extracted from the signals, and a signal pin corresponding to the extracted output signal is registered as a drive pin.

Therefore, according to the drive pin automatic generation program of the invention of claim 6, in addition to the effect of the invention of claim 5, if there is no single pin that can be registered as a drive pin, The most appropriate pin as a drive pin is selected from the signal pins. Specifically, a pulse-like input signal is applied to the signal pin (drive pin candidate). Then, an output signal generated between the test pin and the ground pin is stored in correspondence with the signal pin. Such processing is sequentially performed on all drive pin candidates, and all output signals are stored as data. After that, a signal having the largest amplitude is extracted from the stored output signals, and the signal pin that can output the extracted signal is registered as a drive pin. Therefore, the signal pin which is least affected by the signal wraparound is registered as the drive pin. The registered data relating to the signal pins (drive pins) is stored in, for example, a storage unit, and is read out when the bonding state is inspected.

[0029]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An integrated circuit bonding state inspection apparatus 1 (hereinafter, referred to as an inspection apparatus 1) according to an embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is an explanatory diagram showing a configuration of an inspection apparatus 1 according to an embodiment of the present invention, FIG. 2 is an electric circuit diagram showing a circuit configuration of the inspection apparatus 1, FIG. FIG. 4 is an explanatory diagram showing waveforms at the respective portions, and FIGS. 4 and 5 are flowcharts showing the flow of the operation of the inspection device 1.

As shown in FIG. 1, the inspection apparatus 1 is an apparatus for inspecting a bonding state of pins of the integrated circuit 2 with respect to a circuit board 3 on which the integrated circuit 2 is mounted. , A pin jig 5 having a plurality of probes 4, and a channel switching unit 6 connected to each probe 4
And Further, as a functional configuration, a main control unit 7 for executing an inspection process, a test pin selection unit 8 for selecting an arbitrary pin from the control pins of the integrated circuit 2 as a test pin, and a control pin Drive pin selecting means 9 for selecting a pin corresponding to the test pin from the pins as a drive pin. Further, a signal input circuit 11 and a signal output circuit 12 are provided as circuits for determining the connection state of the test pins.

Each of the components will be specifically described. The pin jig 5 includes a plate-like board 14 for supporting a plurality of probes 4 in a vertical direction, and a lifting / lowering means (not shown) for lifting / lowering the board 14 to which the probes 4 are fixed. And a mounting support portion 15 for mounting the circuit board 3 on the upper surface 15a. The mounting support 15 also functions as a guide for guiding the board 14 up and down. According to the pin jig 5, the circuit board 3 is mounted on the upper surface 15a,
When the board 14 is lifted by the lifting means, the tip of the probe 4 comes into contact with a predetermined pattern formed on the back surface of the circuit board 3 and is electrically connected. Each probe 4
Are connected to the channel switching unit 6 via a signal line 13.

The channel switching unit 6 has a plurality of switch elements for switching circuits, such as relays or transistors, and operates based on the outputs of the test pin selecting means 8 and the drive pin selecting means 9. That is, when an arbitrary control pin is selected by the test pin selection means 8, the channel switching unit 6 outputs the signal from the probe 4 which is in contact with the pattern on the circuit board 3 to which the control pin is to be bonded. The circuit 12 is connected. Further, when an arbitrary control pin is selected by the drive pin selection means 9, the channel switching unit 6 sends the probe 4 which is in contact with the pattern on the circuit board 3 to which the control pin is to be connected, to the signal input. The circuit 11 is connected.

The test pin selecting means 8 selects a plurality of control pins provided in the integrated circuit 2 as test pins in order from an arbitrary position based on an instruction signal from the main control means 7. That is, the circuit configuration is switched so that the joining state is determined in order from the control pin provided at an arbitrary position.
On the other hand, the drive pin selecting means 9 selects an optimum drive pin from a plurality of control pins for each control pin selected as a test pin. Specifically, an optimum control pin (drive pin) for the test pin is registered in the storage unit 10 in advance by a drive pin automatic generation process (details will be described later) performed before actually performing the inspection. Therefore, at the time of inspection,
Each time data indicating a test pin is sent from the test pin selection means 8, a drive pin is selected based on the information registered in the storage means 10.

The signal input circuit 11, as shown in FIG.
Formed between the pattern 18a on the circuit board 3 to which the ground pin 18 of the integrated circuit 2 is to be joined and the pattern 16a to which the signal pin 16 (drive pin) selected by the drive pin selecting means 9 is to be joined. Circuit. That is, in a state where the ground pin 18 is joined to the pattern 18a and the signal pin 16 is joined to the pattern 16a, both ends of the first parasitic diode 19 and the substrate resistor 20 interposed inside the integrated circuit 2 are connected. It is. The signal input circuit 11 has a constant (for example, 15
A constant current source 22 for supplying a current of mA) and pulse signal generating means 23 for supplying a pulse current of a constant cycle (1 kHz) are provided in parallel.

The signal output circuit 12 is formed between a pattern 18a to which the ground pin 18 of the integrated circuit 2 is to be joined and a pattern 17a to which the signal pin 17 selected by the test pin selecting means 8 is to be joined. Circuit. That is, in a state where the ground pin 18 is joined to the pattern 18a and the signal pin 17 is joined to the pattern 17a, both ends of the second parasitic diode 21 and the substrate resistor 20 interposed inside the integrated circuit 2 are connected. It is. The signal output circuit 12 has a constant value (for example, 25
mA), and a measuring means 26 (corresponding to an output signal detecting means of the present invention) for measuring a voltage generated at both ends of the second constant current source 25. .

The measuring means 26 comprises an amplifier 27, a switch 28, a holder 29, a differential amplifier 30, a second amplifier 31, an A / D converter 32, etc., as shown in FIG. I have. Here, the amplifier 27 amplifies the voltage Vt generated in the internal resistance of the second constant current source 25, for example, by a factor of ten. The switch 28 is connected to the pulse signal generator 2.
3 and is opened when the pulse signal generating means 23 operates. The holder 29 holds the output of the amplifier 27, particularly the output of the amplifier 27 in a state where the pulse current is not supplied. The differential amplifier 30 obtains a differential pressure between the pulse voltage output from the amplifier 27 and the voltage held (stored) by the holder 29 and outputs the difference pressure to the second amplifier 31. Further, the A / D converter 32 converts the differential pressure amplified by a predetermined factor (for example, 500 times) by the second amplifier 31 into a digital signal, and outputs the digital signal to the CPU provided in the main control unit 7.
Is output to Here, the CPU includes the pass / fail judgment means of the present invention, and compares the digital signal output from the A / D converter 32 with a judgment reference value to judge the quality of the bonding state.

Next, the operation of the signal input circuit 11 and the signal output circuit 12 will be described. First, a substantially constant (eg, 15 mA) current is supplied to the substrate resistor 20 and the first parasitic diode 19 by the operation of the first constant current source 22, and the substrate resistor 20 and the second A substantially constant (for example, 25 mA) current is supplied to the two parasitic diodes 21. At this time, since a constant current flows in the two parasitic diodes 19 and 21 in the forward direction and a bias is applied, a forward voltage (about 0.8 V) is applied across both ends of the respective parasitic diodes 19 and 21. Is generated. In this state, when the pulse signal generating means 23 operates, a pulse-like current is supplied to the first parasitic diode 19 and the substrate resistor 20 as shown in “Ip application” in FIG. The change in the voltage generated at both ends of the substrate resistor 20 is superimposed on the forward voltage generated by the second parasitic diode 21, and the signal pin 17 serving as a test pin and the ground pin 1 are connected.
8, a pulse signal is generated. When the signal pins 17 are correctly bonded to the pattern 17a and the ground pins 18 are correctly bonded to the pattern 18a, the internal resistance of the second constant current source 25 connected to each of the patterns 17a, 18a is reduced. A pulse signal is generated.

This will be described in detail. First constant current source 22
Is the current value of Ib1, and the current value of the second constant current source 25 is Ib1.
2. Assuming that the amplitude of the pulse-like current generated from the pulse signal generating means 23 is It, the resistance value of the substrate resistor 20 is Rs, and the forward voltage of the second parasitic diode 21 is Vd, both ends of the substrate resistor 20 And the voltage Vs between the signal pin 17 and the ground pin 18
t is represented by the following equation.

Vs = (Ib1 + Ib2 + It) * Rs formula

Vt = Vs + Vd = (Ib1 + Ib2 + It) * Rs + Vd = (Ib1 + Ib2) * Rs + Vd + It * Rs formula

Here, the signal pin 17 and the ground pin 1
8 of the voltages Vt, (Ib1 + Ib2) * Rs + V
d) is a DC component, and (It * Rs) is an AC component.
That is, when a pulse-like current is supplied by the pulse signal generating means 23, a change in voltage generated at both ends of the substrate resistor 20 is output as an AC component.
Only this change in voltage can be detected by the measuring means 26.

In the measuring means 26, the voltage generated in the internal resistance of the second constant current source 25 is amplified by the amplifier 27 (see A in FIG. 3 (b)). Amplifier 2 without supplying current
7 is calculated by the differential amplifier 30 (see C). Further, the output of the differential amplifier 30 is amplified by the second amplifier 31 (see D), and is converted into a digital signal by the A / D converter 32. With this circuit configuration, it is possible to extract only the change in the voltage generated at both ends of the substrate resistor 20.

Next, the flow of the operation of the inspection apparatus 1 will be described with reference to the flowcharts of FIGS. FIG. 4 shows a drive pin automatic generation process performed only once before the determination of the bonding state, and FIG. 5 shows a bonding state determination process performed on each of the test circuit boards 3.

In the automatic drive pin generation process (corresponding to the automatic generation program of the present invention), first, an arbitrary control pin is selected as a test pin (step S1), and a plurality of control pins are extracted as drive pin candidates. (Step S2). Here, the drive pin candidate is a control pin other than a single pin, and is not connected in parallel with the test pin between two or more integrated circuits.

Thereafter, it is determined whether there is a single pin in the integrated circuit 2 (step S3). A single pin is a pin that is not used as part of an electronic circuit in an integrated circuit,
That is, pins that are not connected to other electronic components. If there is a single pin (YES in step S3), the single pin having the smallest number is selected from the single pins (step S4), and the pulse signal is output from the pulse signal generation unit 23 to the single pin. Is supplied, and at this time, the amplitude of the output signal output from the test pin is detected by the measuring means 26. At this time, the first constant current source 22 and the second constant current source 25 are both operating, and the first parasitic diode 19 and the second parasitic diode 21 are biased.

If the amplitude detected by the measuring means 26 is equal to or higher than the predetermined level (YES in step S6), the single pin is registered in the storage means 10 as a drive pin (step S7). That is, when there is a single pin, the single pin is preferentially selected as a drive pin. Since the single pin does not have a circuit configuration, it is hardly affected by a signal wraparound or the like, and a large gain can be obtained for an input signal. Note that the storage unit 1
When registering the number of a single pin at 0, the amplitude of the detected output waveform is also stored.

On the other hand, if the detected amplitude is smaller than the predetermined level (NO in step S6), it is not registered as a drive pin. In other words, some of the single pins
There are pins that do not have an internal circuit of the integrated circuit, that is, pins to which no diode or substrate resistor is connected, and such a single pin is not registered as a drive pin. In this case, it is determined whether there is another single pin to which no input signal is applied, and if there is another single pin (YES in step S8), the single pin with the next smaller number A pin is selected (step S9), and the process returns to step S5. That is, the processes of steps S5 to S9 are repeated until a single pin that can be selected as a drive pin is registered.

If there is no single pin in the integrated circuit 2 (NO in step S3), or if there is a single pin but no single pin can be selected as a drive pin (NO in step S8) ), The drive pin candidate with the smallest number is selected from the drive pin candidates extracted in step S2 (step S10).
A pulse-like current is supplied from the pulse signal generating means 23, and at this time, the amplitude of the output signal output from the test pin is detected by the measuring means 26 (step S1).
1). Further, data on the detected amplitude is individually stored in association with the drive pin candidates (step S1).
2).

If there is an unprocessed drive pin candidate (YES in step S13), a drive pin candidate with the next smaller number is selected (step S14), and the process returns to step S11. That is, the processing of steps S11 and S12 is repeated for all the drive pin candidates, and all the amplitudes of the respective drive pin candidates are recorded.

When there are no unprocessed drive pin candidates (NO in step S13), a drive pin candidate having the largest amplitude, that is, a drive pin candidate capable of obtaining the maximum signal gain is specified from the stored output signals (step S1).
5) The drive pin candidate is registered in the storage means 10 as a drive pin (step S7). In this case,
The data on the detected amplitude is also recorded together with the number of the drive pin candidate.

As described above, by performing the drive pin automatic generation processing for each test pin, an optimum drive pin can be registered for each test pin. Further, since this automatic generation processing is performed on a non-defective circuit board serving as a reference, it is possible to determine a determination reference value in an actual inspection based on the amplitude of an output signal detected in the processing.

Next, a description will be given of a joining state determination process (joining state determination method) in an actual inspection. First, a predetermined control pin is selected as a test pin (step T1), and an input signal is applied to a drive pin corresponding to the control pin, that is, a drive pin registered by the drive pin automatic generation process (step T2). ). That is, in a state where the constant current is supplied by the first constant current source 22, a pulse-like current is supplied from the pulse signal generating means 23. At this time, on the test pin side, a change (amplitude) of the voltage generated at both ends of the substrate resistor 20 is detected by the measuring means 26 while a constant current is supplied by the second constant current source 25 (step). T3).

Thereafter, it is determined whether or not the detected amplitude of the output signal is equal to or greater than the criterion value. It is assumed that there is, and that fact is stored (step T5). On the other hand, if the amplitude of the output signal is smaller than the determination reference value (NO in step T4), it is determined that the bonding state of the test pin is defective, and that fact is stored (step T6).

Then, until there are no unprocessed control pins among the control pins to be determined as test pins, in other words, until all of the plurality of control pins have been determined (step T7). NO), the processing from step T1 to step T6 is repeated, and the determination is performed for each control pin.

When all the control pin determinations have been completed (YES in step T7), the stored data are totaled (step T8). If there are no test pins determined to be defective (YES in step T9), The circuit board 3 is regarded as a non-defective product (step T10), and if there is a test pin determined to be defective (NO in step T9), the circuit board 3 is regarded as a defective product, and a defective unit is determined for each integrated circuit pin. Specify a location (Step T1
1).

As described above, in the inspection apparatus 1 described above, a pulse-like input signal is applied to the predetermined signal pin 16 and a change in the voltage is detected at the signal pin 17 for determining the bonding state. Therefore, the determination can be made with a relatively simple configuration without using an expensive device such as a conventional sensor plate. Also, since no sensor plate is used, there is no restriction on the package of the integrated circuit,
In addition, the joining state of the control pins can be accurately determined even for an integrated circuit or a circuit board on which a metal member is mounted. In addition, since a pulse-like signal is input to a signal pin (drive pin) different from the signal pin whose matching state is to be detected, the signal pin selected as a test pin is used as a signal pin of another integrated circuit. Even if the pins are connected via the pattern on the circuit board, the bonding state can be determined.

In the inspection apparatus 1 described above, the first parasitic diode 19 is biased, that is, while the forward voltage is generated across the first parasitic diode 19, the first parasitic diode 19 is maintained. Since a pulsed current is supplied to the substrate resistor 20 and the substrate resistor 20, it is possible to judge only by a change in the voltage generated at both ends of the substrate resistor 20 without considering the imaginary resistance component of the first parasitic diode 19. Becomes Therefore, there is no need to switch the inspection circuit or short-circuit the pins, and the joining state can be determined quickly. Also,
Since the output impedance is reduced and the signal transmission is stabilized, it is possible to make a more accurate determination.

In the inspection apparatus 1 described above, before inspecting the bonding state, a change in the output signal is detected on a non-defective circuit board. Therefore, an optimum drive for each signal pin selected as a test pin is performed. You can register. In particular, since a single pin is preferentially selected as a drive pin, it is hardly affected by a signal wraparound or the like, and a large gain can be obtained for an input signal. Even when there is no single pin that can be registered as a drive pin, it is possible to select an optimum pin as a drive pin from other signal pins. Therefore, in any case, since the amplitude of the output signal becomes large, the determination accuracy can be improved in all the test pins. In addition, since a single pin having no internal circuit is not set as a drive pin, erroneous determination can be prevented.

Further, in the above-described inspection apparatus 1, since the change (amplitude) of the output signal on the non-defective circuit board is detected and stored, the amplitude of the non-defective circuit is set as a judgment reference value when judging the bonding state. Thus, an accurate determination according to the actual product can be made.

As described above, the present invention has been described with reference to the preferred embodiments. However, the present invention is not limited to these embodiments, and will be described below without departing from the gist of the present invention. Various refinements and design changes are possible.

That is, although the inspection apparatus 1 of the above embodiment uses the parasitic diodes 19 and 21 interposed between the control pins 16 and 17 of the integrated circuit 2 and the ground pin 18, the TTL is used. In such an integrated circuit, a protection diode built for electrostatic protection may be used.

In the inspection apparatus 1 of the above embodiment, the current values of the constant current sources 22 and 25 and the pulse signal generation means 23
Although specific numerical values are shown as the amplitude of the current generated from, the present invention is not limited to these numerical values.
Various changes can be made according to the resistance value of the substrate resistor 20, the circuit of the measuring means 26, and the like.

Further, in the inspection apparatus 1 of the above embodiment,
Although the pulse signal generating means 23 is shown to be connected in parallel to the first constant current source 22, they may be connected in series.

[0064]

As described above, according to the method for determining a junction state of an integrated circuit according to the first aspect of the present invention, a pulse-like input signal is applied to a predetermined signal pin, and a change in voltage with respect to the input signal is determined. Since the detection is performed at the signal pin to be determined, the determination can be made with a relatively simple configuration without using an expensive device such as a conventional sensor plate. Further, there is no restriction on the package of the integrated circuit, and the bonding state of the pins can be accurately determined even in the case of an integrated circuit or a circuit board on which a metal member is mounted.

According to a second aspect of the present invention, there is provided a method for determining a junction state of an integrated circuit, in which, in addition to the effects of the first aspect, a state where a bias is applied to a diode, that is, a state where a forward voltage is generated at both ends of the diode. While maintaining it, a pulsed current is supplied to the diode and the substrate resistor, without considering the fictitious resistance component of the diode.
The determination can be made only by the change in the voltage generated at both ends of the substrate resistance. Therefore, the joining state can be quickly determined. Further, the output impedance is reduced and the transmission of the signal is stabilized, so that the determination can be made more accurately.

The integrated circuit bonding state inspection apparatus according to the third aspect of the present invention can inspect with a relatively simple configuration. Further, since the sensor plate is not used, there is no restriction on the package of the integrated circuit, and the bonding state of the pins can be accurately inspected even on a circuit board on which a metal member is mounted.

According to a fourth aspect of the present invention, in addition to the effect of the third aspect of the present invention, the apparatus for inspecting a junction state of an integrated circuit further includes a circuit for detecting a voltage generated at both ends of a substrate resistor without considering an imaginary resistance component of a diode. Since the judgment can be made only by the change, the joining state can be inspected quickly. Further, the output impedance is reduced, and the signal transmission is stabilized, so that more accurate inspection can be performed.

In the drive pin automatic generation program according to the fifth aspect of the present invention, since a single pin is preferentially selected as a drive pin, it is hardly affected by signal wraparound and the like, and a large gain is obtained for an input signal. be able to.
Therefore, the amplitude of the output signal increases, and the determination accuracy can be improved. Also, since a single pin without an internal circuit is not registered as a drive pin,
Incorrect determination can also be prevented.

The automatic drive pin generation program according to the sixth aspect of the present invention provides, in addition to the effect of the fifth aspect, even if there is no single pin that can be selected as a drive pin, other signal pins are used. The most suitable pin can be selected as the drive pin. In particular, since the pin at which the amplitude of the output signal is maximized by applying the input signal is used as the drive pin, the influence of the signal wraparound can be reduced, and the determination accuracy can be improved.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram illustrating a configuration of an inspection apparatus according to an embodiment of the present invention.

FIG. 2 is an electric circuit diagram showing a circuit configuration of the inspection device.

FIG. 3A is an electric circuit diagram showing a circuit configuration of a measuring unit in the inspection device, and FIG. 3B is an explanatory diagram showing waveforms at respective parts.

FIG. 4 is a flowchart showing a flow of an operation of the inspection device.

FIG. 5 is a flowchart showing a flow of an operation of the inspection device.

FIG. 6 is an electric circuit diagram showing a circuit configuration in a conventional inspection device.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 inspection device (integrated circuit bonding state inspection device) 2 integrated circuit 3 circuit board 7 main control means (pass / fail judgment means) 8 test pin selection means 9 drive pin selection means 10 storage means 16 signal pins (drive pins) 16 a pattern 17 signal pin (test pin) 17a pattern 18 ground pin 19 first parasitic diode (first diode) 20 substrate resistor 21 second parasitic diode (second diode) 22 first constant current source 23 pulse signal generating means 25 Constant current source 26 Measurement means (output signal detection means)

Claims (6)

[Claims] 1. A method according to claim 1, wherein an arbitrary pin is selected as a test pin from signal pins of an integrated circuit mounted on a circuit board, and a pin corresponding to the test pin is selected as a drive pin. When a pulse-like input signal is applied to a first diode and a substrate resistor interposed in series between the ground pin of the circuit and the ground pin, a pattern on the circuit board to which the test pin is to be joined is applied when a pulse-like input signal is applied. Detecting the output signal generated in the test circuit, and comparing the amplitude of the detected output signal with a reference value to determine whether the test pin and the pattern are connected properly. Method. 2. A constant current is supplied to the first diode interposed between the drive pin and the ground pin and the second diode interposed between the test pin and the ground pin to supply a forward voltage. 2. The method according to claim 1, wherein a pulsed current is supplied as the input signal to the first diode and the substrate resistor in a state where is generated. 3. A test pin selecting means for selecting an arbitrary pin as a test pin from among signal pins of an integrated circuit mounted on a circuit board, and a pin corresponding to the selected test pin being a signal pin. A drive pin selecting means for selecting a drive pin from among: a pulse signal generating means for applying a pulse-like input signal to a first diode and a substrate resistor interposed in series between the drive pin and the ground pin of the integrated circuit. Means, an output signal detecting means for detecting an output signal generated between the pattern on the circuit board to be joined to the test pin and the ground pin, and when the input signal is applied by the pulse signal generating means Comparing the amplitude of the output signal detected by the output signal detection means with a reference value, and Bonding state inspecting device of the integrated circuit, characterized by comprising the quality determining means for determining the acceptability of the bonding state of the over down. 4. A constant current source for supplying a constant current to the first diode and the substrate resistor, and a second diode and the substrate resistor interposed between the test pin and the ground pin. A second constant current source for supplying a current, wherein the pulse signal generating means supplies a constant current to the first diode by the first constant current source to generate a forward voltage, and A pulse-like current is supplied as a signal, and the output signal detecting means supplies a constant current to the second diode by the second constant current source to generate a forward voltage, and a pattern on a circuit board. 4. The device according to claim 3, wherein an amplitude of an output signal generated between the ground pin and the ground pin is detected. 5. A drive pin used in the integrated circuit bonding state inspection device according to claim 3, wherein said drive pin corresponding to said test pin is registered in advance for each test pin. In the automatic generation program, when there is a single pin among the signal pins of the integrated circuit, a pulse signal is applied to the single pin, and at this time, a pulse signal is generated between the test pin and the ground pin. A drive pin automatic generation program for registering the single pin as a drive pin when the amplitude of the output signal to be output exceeds a predetermined level. 6. When there is no single pin among the signal pins of the integrated circuit, a pulse-like input signal is sequentially applied to the plurality of signal pins, and at this time, between the test pin and the ground pin. The output signal generated in the above manner is stored in correspondence with each signal pin, and further, a signal having the largest amplitude is extracted from the stored output signals, and a signal pin corresponding to the extracted output signal is extracted. The automatic drive pin generation program according to claim 5, wherein the program is registered as a drive pin.