JP2002057417A - Printed board, and integrated circuit, and electronic component - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a printed board in which generation of crosstalk can be blocked, even if miniaturization of electronic component advances and a significantly narrow interval is set between wiring patterns. SOLUTION: In an electronic component comprising an integrated circuit mounted on a printed board, a wiring pattern A fed with a test signal for detecting crosstalk between the conduction patterns of the printed board and a wiring pattern B for receiving a radiation wave from the wiring pattern A, in response to the test signal are formed on the printed board. The integrated circuit comprises a test terminal connected with the wiring pattern A and outputting the test signal, a test terminal connected with the wiring pattern B, and a means for determining the intensity of crosstalks from a detection signal inputted to the test terminal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a printed circuit board, an integrated circuit, and an electronic component having an integrated circuit mounted on the printed circuit board.

[0002]

2. Description of the Related Art In many cases, electronic components used in various electronic devices are in a form in which an integrated circuit is mounted on a printed circuit board. FIG. 11 is a schematic plan view showing an outline of such an electronic component. Electronic components including an integrated circuit (IC) are mounted on the printed circuit board, and output terminals and input terminals of the IC are connected to other ICs and electronic component by wiring patterns A and B, respectively.

[0003]

Recently, various electronic devices have been miniaturized, and various electronic components constituting these electronic devices have been increasingly miniaturized. For this reason, the distance between the wiring patterns A and B has also been set to be narrower, and the crosstalk between the wirings which has not been a problem when the distance between the wiring patterns A and B is wide has recently been increased. It is becoming a big problem. In other words, the occurrence of a situation in which the wiring pattern B receives a radiated electromagnetic wave due to an output signal radiated from the wiring pattern A and an erroneous signal is input to an input terminal of the IC has become a serious problem.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and it is an object of the present invention to prevent the occurrence of crosstalk even when the size of electronic components is reduced and the distance between wiring patterns is set to be considerably small. It is an object to provide a printed circuit board, an integrated circuit, and an electronic component having the integrated circuit mounted on the printed circuit board.

[0005]

In order to solve the above-mentioned problems, a printed circuit board (1) according to the present invention is formed on a printed circuit board on which electronic element parts including an integrated circuit are mounted. A test pattern connected to an output terminal of a test signal output from the integrated circuit to detect crosstalk between the conductive patterns, and a test pattern connected to a crosstalk detection terminal in the integrated circuit. A detection pattern for receiving an electromagnetic wave radiated from the test pattern in accordance with the output.

According to the printed circuit board (1), the occurrence of crosstalk between the conductive patterns can be detected by monitoring the detection pattern while outputting a test signal to the test pattern.

[0007] A printed circuit board (2) according to the present invention.
In the printed circuit board (1), the test pattern and the detection pattern are provided in parallel with each other,
Among the conductive patterns connected to the normal terminals of the integrated circuit, the length of the line extending adjacently and in parallel is set to be longer than the length of the conductive pattern in the longest set. . According to the printed circuit board (2), it is possible to detect the occurrence state of crosstalk under more severe conditions than a normal conductive pattern on the printed circuit board to be evaluated.

Further, a printed circuit board (3) according to the present invention.
In the printed circuit board (1) or (2), the test pattern and the detection pattern are provided in parallel, and the distance between the lines is the distance between the conductive patterns connected to the normal terminals of the integrated circuit. Of these, the interval is narrower than the narrowest set interval. According to the printed circuit board (3), it is possible to detect the occurrence of crosstalk under more severe conditions than a normal conductive pattern on the printed circuit board to be evaluated.

Further, a printed circuit board (4) according to the present invention.
Is characterized in that in the printed board (1), the printed board is a multilayer board, and the test pattern and the detection pattern are formed on different layers so as to overlap in a vertical direction. According to the printed board (4), it is possible to reliably detect the occurrence of crosstalk between the conductive patterns on the multilayer board.

Further, a printed circuit board (5) according to the present invention.
In the printed circuit board (4), the line length of the overlap between the test pattern and the detection pattern is equal to the length of each conductive pattern connected to the normal terminal of the integrated circuit.
It is characterized in that adjacent parallel extending lengths are set longer than the length of the conductive pattern in the longest set. According to the printed circuit board (5), it is possible to detect the occurrence of crosstalk under more severe conditions than a normal conductive pattern on the multilayer printed circuit board to be evaluated.

Also, a printed circuit board (6) according to the present invention.
In the printed circuit board (1) to (5), the shape of the test pattern and the detection pattern is similar to a shape in which a normal pattern connected to a normal terminal of the integrated circuit extends in parallel. It is characterized by having. According to the printed circuit board (6), since the occurrence state of the crosstalk is detected under the similar condition to the normal conductive pattern on the printed circuit board to be evaluated, the occurrence state of the crosstalk according to the actual situation can be grasped. Become.

Further, a printed circuit board (7) according to the present invention.
Is characterized in that, in any one of the printed boards (1) to (5), the test pattern and the detection pattern are formed on a mounting portion of the printed board on which the integrated circuit is mounted. According to the printed circuit board (7), the test pattern and the detection pattern can be formed by using a vacant portion of the printed circuit board where the conductive pattern is not normally formed, so that the effective area of the printed circuit board is not reduced. The test pattern and the detection pattern can be formed on a printed circuit board.

A printed circuit board (8) according to the present invention.
Is characterized in that a plurality of sets of the test patterns and the detection patterns are formed on any of the printed boards (1) to (7). According to the printed circuit board (8), it is possible to detect the occurrence of crosstalk at various locations on the printed circuit board.

The integrated circuit (1) according to the present invention has a test terminal to which a test pattern on a printed board is connected and which outputs a test signal for detecting crosstalk between conductive patterns on the printed board; It has a detection terminal connected to a detection pattern for receiving an electromagnetic wave radiated from a test pattern on a printed circuit board, and a judging means for judging a crosstalk occurrence state based on a detection signal taken from the detection terminal. And According to the integrated circuit (1), the occurrence of crosstalk can be detected on the integrated circuit side, and a crosstalk countermeasure function can be provided. Realization becomes possible.

Further, an integrated circuit (2) according to the present invention is characterized in that, in the above-mentioned integrated circuit (1), the test signal is a repetitive signal whose logic is repeatedly inverted with the passage of time. . According to the integrated circuit (2),
Since the inversion of the logic for easily detecting the state of occurrence of crosstalk is repeatedly performed, the state of occurrence of crosstalk can be grasped reliably and continuously.

Also, in the integrated circuit (3) according to the present invention, in the above-mentioned integrated circuit (1), the judging means detects the level of the detection signal, and the level is detected by the level detecting means. And a comparing means for determining whether or not the signal level is within a predetermined range. According to the integrated circuit (3), the occurrence state of the crosstalk can be grasped from the comparison result by the comparing means, including the intensity of the crosstalk.

Further, in the integrated circuit (4) according to the present invention, in the above-mentioned integrated circuit (3), the determining means may determine that the signal level exceeds a predetermined range by the comparing means. It is characterized by having a counting means for counting the number of times in the inside. The integrated circuit (4)
According to this, the occurrence of crosstalk can be grasped in consideration of the influence of external noise and the like, and erroneous detection of the occurrence of crosstalk can be prevented.

Further, the integrated circuit (5) according to the present invention is the integrated circuit (1), wherein the determining means holds a peak level of the detection signal;
A peak comparing means for judging whether or not the peak level held by the peak hold circuit exceeds a predetermined value. According to the integrated circuit (5), the state of occurrence of crosstalk is determined based on the peak level held by the peak hold circuit that holds the peak level of the detection signal.
The worst case of crosstalk occurrence can be grasped and determined. Also, the determination means can be relatively easily configured using an analog circuit.

An integrated circuit (6) according to the present invention is characterized in that, in the integrated circuit (5), the peak hold circuit includes an integrating circuit. According to the integrated circuit (6), the occurrence state of crosstalk can be grasped in consideration of the influence of external noise and the like, and erroneous detection of the occurrence state of crosstalk can be prevented. Further, it is possible to grasp the average crosstalk occurrence situation.

Further, the integrated circuit (7) according to the present invention is characterized in that, in any of the integrated circuits (1) to (6), when a high-intensity crosstalk is detected by the determination means,
A crosstalk countermeasure implementing means for changing the operation characteristics of the integrated circuit to reduce the crosstalk intensity is provided. According to the integrated circuit (7), when the occurrence of crosstalk is severe, for example, the input / output characteristics of the integrated circuit are changed, that is, the output signal is output in the form of an input / output signal waveform in which crosstalk is unlikely to occur. Alternatively, it is possible to receive an input signal, thereby suppressing an adverse effect due to crosstalk.

In the integrated circuit (8) according to the present invention, in the integrated circuit (7), the canceling means for gradually canceling the change in the operating characteristic of the integrated circuit by the crosstalk countermeasure implementing means with the passage of time. It is characterized by having. According to the integrated circuit (8), it is possible to perform feedback control corresponding to the occurrence state of crosstalk that changes with time, such as a temperature change, and consider the balance between the operating characteristics of the integrated circuit and the anti-crosstalk characteristics. The control can be performed in a proper manner.

Further, the integrated circuit (9) according to the present invention is characterized in that, in any of the integrated circuits (1) to (6), when the occurrence of high-intensity crosstalk is detected by the determination means, And a notification terminal for outputting a notification signal for notifying the user. The integrated circuit (9)
According to this, it is possible to easily grasp the occurrence state of the crosstalk from the outside by monitoring the notification terminal.

The integrated circuit (10) according to the present invention comprises:
In any one of the above integrated circuits (7) to (9), the crosstalk countermeasure implementing means is a first capacitor adding means for adding a capacitor to an input terminal of the integrated circuit. According to the integrated circuit (10),
The noise signal input to the input terminal is filtered by the capacitor, so that noise accompanying the occurrence of crosstalk can be removed.

Further, the integrated circuit (11) according to the present invention comprises:
In any one of the integrated circuits (7) to (10), the crosstalk countermeasure implementing means is a second capacitor adding means for adding a capacitor to an output terminal of the integrated circuit. According to the integrated circuit (11), the edge of the signal output from the output terminal is smoothed by the capacitor, so that an electromagnetic wave that causes crosstalk is hardly radiated, and the occurrence of crosstalk is suppressed. Can be.

The integrated circuit (12) according to the present invention comprises:
In any one of the above integrated circuits (7) to (11), the crosstalk countermeasure implementing means is a drive capability lowering device for reducing a drive capability of an integrated circuit output. According to the integrated circuit (12), the rise or fall of the output signal becomes gentle, the electromagnetic wave that causes crosstalk is hardly radiated, and the occurrence of crosstalk can be suppressed.

An electronic component (1) according to the present invention is an electronic component in which an electronic element component including an integrated circuit is mounted on a printed board, wherein the printed board is formed between conductive patterns formed on the printed board. A test pattern to which a test signal for detecting crosstalk is supplied, and a detection pattern to receive an electromagnetic wave radiated from the test pattern in accordance with the output of the test signal, wherein the integrated circuit includes: A test terminal that is connected and outputs the test signal; a detection terminal connected to the detection pattern; and a determination unit that determines a crosstalk occurrence state based on a detection signal captured from the detection terminal. Features. The above electronic components (1)
According to the present invention, the integrated circuit itself outputs a test signal and detects a crosstalk occurrence state by capturing a detection signal, so that the integrated circuit side detects the crosstalk occurrence state and has a crosstalk countermeasure function. For example, it is possible to realize an intelligent electronic component capable of automatically realizing countermeasures against crosstalk without depending only on the pattern design on the printed circuit board side.

An electronic component (2) according to the present invention is characterized in that, in the electronic component (1), an adjusting means for adjusting an input characteristic of a detection signal is connected to the detection terminal. I have. According to the electronic component (2), characteristics such as an input impedance and a comparison value for crosstalk detection in the integrated circuit can be adjusted to be optimal.

In the electronic component (3) according to the present invention, in the electronic component (1), an output terminal of the integrated circuit is connected to the detection terminal via the detection pattern. And According to the electronic component (3), since the output terminal of the integrated circuit is connected to the detection pattern, the output terminal of the integrated circuit in a normal connection state is connected to the input terminal of the integrated circuit via the conductive pattern. This is equivalent to a state of being connected, and it is possible to detect a crosstalk occurrence situation that is more realistic.

In the electronic component (4) according to the present invention, in the electronic component (1), an output terminal of an integrated circuit other than the integrated circuit is connected to the detection terminal via the detection pattern. It is characterized by having. According to the electronic component (4), since the output terminal of another integrated circuit is connected to the detection pattern, the electronic component is in a normal connection state.
This is equivalent to a state in which the output terminal of the integrated circuit is connected to the input terminal of another integrated circuit via the conductive pattern, and it is possible to detect the occurrence of crosstalk in a more realistic manner.

Further, in the electronic component (5) according to the present invention, in the electronic component (3) or (4), the output logic of the output terminal changes, and the crosstalk strength is determined based on the output state of both logics. The feature is that it is possible. According to the electronic component (5), the occurrence state of the crosstalk is detected at both the rise and the fall of the output signal from which the electromagnetic wave is radiated, so that the occurrence state of the crosstalk can be surely grasped. .

Further, in the electronic component (6) according to the present invention, in any one of the electronic components (1) to (5), the test pattern includes a crosstalk countermeasure circuit provided in a normal circuit pattern. It is characterized in that a similar simulation circuit is connected. According to the electronic component (6),
Since the state of occurrence of crosstalk can be detected in a state very similar to an actual circuit, it is possible to detect the state of occurrence of crosstalk in a more realistic manner.

In the electronic component (7) according to the present invention, in any one of the electronic components (1) to (6), the detection pattern includes a crosstalk countermeasure circuit provided in a normal circuit pattern. It is characterized in that a similar simulation circuit is connected. According to the electronic component (7), the occurrence state of the crosstalk can be detected in a state very similar to the actual circuit, so that the occurrence state of the crosstalk in accordance with the actual situation can be detected.

[0033]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of a printed board, an integrated circuit, and an electronic component having an integrated circuit mounted on the printed board according to the present invention will be described with reference to the drawings. FIG. 1 is a schematic plan view showing a main part of the electronic component according to the embodiment.

The electronic component includes a printed board 1 and an IC 2 mounted on the printed board 1. Here, electronic element components other than the IC 2 (other ICs, resistors, capacitors, transistors, etc.) are omitted for easy understanding. The printed circuit board 1 has wiring patterns A and B formed by using a printing method. The interval between the wiring patterns A and B is set to the same interval as the narrowest interval among the intervals between the conductive patterns connected to the terminals of the IC 2. The length of each of the conductive patterns connected to each terminal of the IC 2 and extending in parallel and adjacent to each other is set to be longer than the length of the conductive pattern in the longest set.

Inside the IC 2, a clock circuit 4 composed of an oscillating circuit for outputting a clock signal of a rectangular wave and an output buffer 3 for performing a buffering operation for outputting a clock signal from the clock circuit 4 are formed. The output buffer 3 is connected to the wiring pattern A via a test terminal (not shown). Also, inside the IC 2, it is connected to a wiring pattern B via a test terminal (not shown),
A monitoring circuit 5 for detecting the level of an input signal from the wiring pattern B, and a crosstalk determining means for determining the occurrence of crosstalk based on the level of the input signal detected by the monitoring circuit 5 6 and a crosstalk countermeasure executing means 7 for executing an operation for the countermeasure against crosstalk based on the control signal from the crosstalk determining means 6.

When the IC 2 is a microcomputer, a clock circuit for controlling the microcomputer is usually provided, so that the clock circuit 4 may be used also as a clock circuit for the microcomputer. The signal output from the output buffer 3 is output to the wiring pattern A (test pattern) via the test terminal, and the signal from the wiring pattern B (detection pattern) is output to the monitor circuit 5 via the test terminal. Will be entered.

Further, the IC 2 is provided with a notifying terminal (not shown) for outputting a notifying signal for notifying the detection when the occurrence of high-intensity crosstalk is detected by the crosstalk determining means 6. . If the output from the notification terminal is displayed in some way, the occurrence of crosstalk can be easily grasped from outside.

Next, an operation performed by the IC 2 to prevent crosstalk will be described. The clock signal output from the clock circuit 4 is output to the wiring pattern A via the output buffer 3. At the rising and falling portions of the clock signal, a change in the electric field occurs in the wiring pattern A, and the change in the electric field is radiated from the wiring pattern A to the surroundings, and the wiring pattern B adjacent thereto is also affected by this electromagnetic wave. The electric field in the wiring pattern B changes. Then, an electromotive force is generated in the wiring pattern B, that is, crosstalk occurs. This signal (electromotive force) is input to the monitor circuit 5 via the test terminal, and the level of the input signal is detected by, for example, a detection / rectification circuit. Then, the detected level is input to the crosstalk determining means 6, and the crosstalk determining means 6 determines the occurrence state (strength) of the crosstalk based on the level. Thereafter, a control signal corresponding to the occurrence state of the crosstalk determined by the crosstalk determination unit 6 is output to the crosstalk countermeasure implementation unit 7, and the countermeasure according to the occurrence state of the crosstalk is executed by the crosstalk countermeasure implementation unit 7. Will be done.

FIGS. 2A to 2C are a plan view and a sectional view showing various embodiments of the wiring patterns A and B. As shown in FIG. By forming the wiring patterns A and B for detecting the state of occurrence of crosstalk in accordance with the wiring shape of the above, it is possible to detect the state of occurrence of crosstalk that is close to actual.

In the example of FIG. 2A, the interval between the wiring patterns A and B is set smaller than the interval between the conductive patterns connected to the respective terminals of the IC 2, and severe conditions are required for the occurrence of crosstalk. Since the distance between the terminals of the IC 2 is usually set at regular intervals, the wiring patterns A,
B is formed by bending.

FIG. 2B shows an example in which wiring patterns A and B are formed on different layers of a multilayer printed board (part B), that is, wiring pattern B is formed on layer A of the multilayer printed board. The wiring pattern A is formed on the layer B of the multilayer printed circuit board. Since each terminal of the IC 2 is connected to the wiring pattern of the same layer even in the case of a multilayer printed board, the wiring pattern A is transferred to the B layer of the multilayer printed board using a through hole in the middle of the wiring pattern. I have.

In the example of FIG. 2C, the wiring patterns A and B are formed to be bent and formed to be similar to the actual shape (bent shape) of each conductive pattern connected to each terminal of the IC 2. It is. Such a pattern shape has a plurality of I
It is often seen as a wiring pattern for connecting C (IC2a, IC2b), and the form of the wiring patterns A and B conforms to the actual form.

In the embodiment shown in FIGS. 2A to 2C, the wiring patterns A and B are both IC2,
Although formed outside the IC 2a, in another embodiment, both the wiring patterns A and B may be formed on a printed circuit board below the IC 2 and the IC 2a or on an inner layer. According to such a printed circuit board, the wiring patterns A and B can be formed by using the vacant portion of the printed circuit board where the conductive pattern is not normally formed, so that the wiring patterns A and B can be printed without reducing the effective area of the printed circuit board. It can be formed on a substrate.

Next, various embodiments of a more specific circuit configuration in the vicinity of the monitor circuit 5 will be described with reference to FIGS. The monitoring circuit 5 includes a comparator CMP. A reference voltage Vr is applied to an inverting input terminal, and a detection pattern (wiring pattern B) is connected to a non-inverting input terminal via a test terminal. And the comparator C
The output from the MP is input to the crosstalk determination means 6. The output of the clock circuit 4 is output to a test pattern (wiring pattern A) via an output buffer OBA (output buffer 3) and a test terminal. That is, when the crosstalk from the wiring pattern A to the wiring pattern B occurs, the comparator CM
The voltage applied to the non-inverting input terminal of P becomes high, and a high-level voltage detection signal is output from the comparator CMP to the crosstalk determination means 6. Then, the crosstalk determining means 6 determines the state of the crosstalk from this signal, and outputs a control signal to the crosstalk countermeasure implementing means 7.

In the embodiment shown in FIG. 3, the resistor R and the capacitor C are connected to the wiring pattern B, and the adjustment of the comparison level and the input impedance of the comparator CMP are performed by the resistor R and the capacitor C. I have. As the resistor R and the capacitor C, a fixed resistor and a fixed capacitor having appropriate circuit constants may be used, but they may be variable and adjustable.

In another embodiment shown in FIG. 4, another output terminal of the IC 2 is connected to the wiring pattern B. Further, the wiring pattern B is provided with a resistor R1 equivalent to a crosstalk countermeasure resistance provided in another wiring pattern, so that crosstalk can be detected more immediately in response to an actual situation. . Note that this wiring pattern B
, A high-level voltage signal and a low-level voltage signal (usually ground: 0 V) are alternately output via the output buffer OBA2, and the reference voltage Vr of the comparator CMP is switched to an appropriate value, whereby the wiring pattern It is possible to detect the occurrence of crosstalk in accordance with both logical states of B.

In another embodiment shown in FIG. 5, an output terminal of another IC 12 is connected to the wiring pattern B.
In the embodiment shown in FIG. 5, similarly to the embodiment shown in FIG. 4, the wiring pattern B is provided with a resistor R1 equivalent to a crosstalk countermeasure resistor provided in another wiring pattern. May be worn. By doing this,
It is possible to detect crosstalk more immediately corresponding to an actual situation. A high-level voltage signal and a low-level voltage signal (normally 0 V) are alternately output to the wiring pattern B via the output buffer OBA3 of the IC 12, and the reference voltage Vr of the comparator CMP is switched to an appropriate value. By doing so, it is possible to detect the occurrence of crosstalk in accordance with both logical states of the wiring pattern B.

Next, a method for determining crosstalk will be described. FIG. 6 is a waveform diagram showing a crosstalk detection situation. When a clock signal is applied to the wiring pattern A, the electric field changes at the rising and falling edges,
Electromagnetic waves are emitted from the wiring pattern A. When this electromagnetic wave is received, an electromotive force is generated in the wiring pattern B. When the crosstalk intensity is within the allowable range, the voltage due to the electromotive force generated in the wiring pattern B falls below the NG determination voltage (the NG determination voltage (the reference voltage Vr in FIGS. 3 to 5) is set as such). If the crosstalk intensity exceeds the allowable range, the voltage due to the electromotive force generated in the wiring pattern B exceeds the NG determination voltage (t1), and at this point, the crosstalk deteriorates (there is crosstalk exceeding the allowable range). Is determined. Here, in order to prevent erroneous detection due to other noises such as extraneous noise, it may be determined that the crosstalk has deteriorated only when the crosstalk deterioration has been continuously detected a predetermined number of times.

FIG. 7 is a waveform chart showing a method for determining crosstalk according to another embodiment. When a clock signal is applied to the wiring pattern A, the electric field changes at the rising and falling edges, and the wiring pattern A emits electromagnetic waves. When this electromagnetic wave is received, the wiring pattern B
Generates an electromotive force. In this method, the wiring pattern B
7B is held by an integrating peak hold circuit (holding the peak of the input voltage, but decreasing the voltage according to the discharge characteristics) shown in FIG. Apply to the inverting input terminal.
When the crosstalk intensity is within the allowable range, the voltage due to the electromotive force generated in the wiring pattern B falls below the NG determination voltage (such an NG determination voltage (see FIGS. 3 to 5).
In the case where the crosstalk intensity exceeds the allowable range, the holding voltage due to the electromotive force generated in the wiring pattern B exceeds the NG determination voltage (t).
2) At this point, it is determined that the crosstalk has deteriorated (there is crosstalk exceeding the allowable range). Here, since the integral type peak hold circuit is employed, it is possible to determine the electromotive force generated in the wiring pattern B based on a spoofed value instead of a sudden voltage change of the electromotive force generated in the wiring pattern B. It is possible to reduce the probability of erroneous detection due to other noises such as external noise.

Next, an embodiment of the crosstalk countermeasure implementing means 7 will be described with reference to FIGS. The embodiment shown in FIG. 8 shows an example in which a countermeasure is applied to the input system of IC2. Normally, the signal input to the input terminal is input to input buffers IBA1 and IBA2. In this embodiment, a series circuit of capacitors C1 and C2 and switching elements SW1 and SW2 is connected to the input terminals of the input buffers IBA1 and IBA2 (the other end is grounded). Element SW1, S
W2 is made conductive. By making the switching elements SW1 and SW2 conductive, the capacitors C1 and C2 having a filter function are connected to the input circuit of the IC2, and noise components due to crosstalk are removed. In a situation where no crosstalk occurs, the capacitors C1 and C2
Is cut off from the input circuit of IC2,
The responsiveness of the input circuit can be kept good.

The embodiment shown in FIG. 9 shows an example in which a measure is taken for the output system of IC2. Normally, output signals are output from output buffers OBA1 and OBA2 to output terminals. In the present embodiment, the output buffers OBA1, OBA
A series circuit of capacitors C3 and C4 and switching elements SW3 and SW4 is connected to the output side of BA2 (the other end is grounded). When the occurrence of crosstalk is detected, the switching elements SW3 and SW4 are turned on. It has become. By making the switching elements SW3 and SW4 conductive, the capacitors C3 and C4 are connected to the output side of the IC2, and the rising of the output signal
Fall becomes gentle. Therefore, the fluctuation of the electric field around the output line due to the output signal becomes gentle, and the electromotive force generated by the output line in the other wiring pattern can be reduced. For this reason, it is possible to suppress the occurrence of crosstalk. Further, when no crosstalk occurs, the capacitors C3 and C4 are cut off from the output side of the IC2, so that the responsiveness of the output circuit can be kept good.

Further, the embodiment shown in FIG.
2 shows an example in which a countermeasure is taken for the output system of FIG. Normally, output signals are output from output buffers OBA1 and OBA2 to output terminals. In the present embodiment, the output buffers OBA1,
The drive capability of OBA2 is controlled.
That is, when the drive capability is reduced, the rise and fall of the output signal become gentle. Therefore, the fluctuation of the electric field around the output line due to the output signal becomes gentle,
The electromotive force generated by the output line in the other wiring pattern can be reduced. For this reason, it is possible to suppress the occurrence of crosstalk. In a situation where no crosstalk occurs, the drive capability can be improved and the responsiveness of the output circuit can be kept good. In addition, by making it possible to gradually decrease and improve the drive capacity according to the occurrence state of the crosstalk, for example, after controlling the decrease in the drive capacity,
By configuring so as to gradually release the reduction in drive capability after a predetermined time has elapsed, it is possible to control the crosstalk characteristics and the operation characteristics of the integrated circuit in a well-balanced manner.

FIG. 10B shows an embodiment of a circuit for changing the drive capability. In the embodiment shown in FIG. 10B, the output buffers OBA1 and OBA2 are
The drains of a plurality of parallel-connected P-channel MOSFETs M1, M2, and M3 whose sources are connected to a power supply Vcc, and the plurality of parallel-connected N-channel MOSs whose drains are grounded
The sources of the FETs M4, M5, and M6 are connected, and the connection point is used as an output terminal OUT. When the output terminal OUT is to output a high-voltage level signal, at least one of the P-channel MOSFETs M1, M2, and M3 is turned on and the N-channel MOSFET is turned on.
Block all M4, M5, M6. Also, the output terminal OUT
Is a low voltage level signal output, the P channel M
OSFETs M1, M2, M3 are all shut off and N
At least one of channel MOSFETs M4, M5, M6
One is made conductive. In order to increase the driving capability, a P-channel MOSFET and an N-channel MOSFET which are turned on when inverting the output signal of the output terminal OUT are used.
Increase the number of ETs and increase the amount of current. Conversely, in order to reduce the driving capability, the number of P-channel MOSFETs and N-channel MOSFETs that are turned on when inverting the output signal of the output terminal OUT is reduced to reduce the amount of current. By doing so, when inverting the output signal from the output terminal OUT, it is possible to freely control the rise and fall of the output signal gently or steeply.

[Brief description of the drawings]

FIG. 1 is a schematic plan view showing a main part configuration of an electronic component according to an embodiment of the present invention.

FIGS. 2A to 2C are a plan view and a cross-sectional view illustrating a configuration of wiring patterns A and B, respectively.

FIG. 3 is a circuit diagram showing an embodiment in the vicinity of a monitor circuit;

FIG. 4 is a circuit diagram showing another embodiment around a monitor circuit.

FIG. 5 is a circuit diagram showing another embodiment around a monitor circuit.

FIG. 6 is a waveform chart showing a method for detecting crosstalk.

FIG. 7 is a waveform chart showing another method for detecting crosstalk.

FIG. 8 is a circuit diagram showing an embodiment of a crosstalk countermeasure implementing means.

FIG. 9 is a circuit diagram showing another embodiment of the crosstalk countermeasure implementing means.

FIGS. 10A and 10B are circuit diagrams showing another embodiment of the crosstalk countermeasure implementing means.

FIG. 11 is a schematic plan view illustrating a configuration of a main part of a conventional electronic component.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Printed circuit board 2 ... Integrated circuit (IC) 3 ... Output buffer 4 ... Clock circuit 5 ... Monitoring circuit 6 ... Crosstalk judgment means 7 ... Crosstalk measures implementation means

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (Reference) H05K 3/46 G01R 31/28 VF term (Reference) 2G032 AB09 AC07 AD07 AE08 AG01 AG09 AK04 5E338 AA01 AA02 BB13 BB25 BB75 CC01 CC10 CD02 CD13 EE13 5E346 AA15 AA35 AA51 BB01 BB11 BB15

Claims (27)

[Claims] An output terminal for a test signal output from the integrated circuit for detecting crosstalk between conductive patterns formed on the printed circuit board, on a printed circuit board on which electronic element components including the integrated circuit are mounted. And a detection pattern connected to a crosstalk detection terminal of the integrated circuit and receiving an electromagnetic wave radiated from the test pattern with the output of the test signal. Printed circuit board. 2. The test pattern and the detection pattern are provided in parallel with each other, and the length of each of the conductive patterns connected to the normal terminal of the integrated circuit is the longest adjacently extending parallel. 2. The printed circuit board according to claim 1, wherein the length is set to be longer than the length of the conductive pattern in the set. 3. The test pattern and the detection pattern are provided in parallel, and the distance between the lines is one of the intervals between the conductive patterns connected to the normal terminals of the integrated circuit.
3. The printed circuit board according to claim 1, wherein the distance is smaller than the narrowest interval. 4. The printed board is a multilayer board,
The printed circuit board according to claim 1, wherein the test pattern and the detection pattern are formed on different layers so as to overlap in a vertical direction. 5. The overlapping line length of the test pattern and the detection pattern is equal to the length of the longest pair extending adjacent and parallel among the conductive patterns connected to the normal terminals of the integrated circuit. The printed circuit board according to claim 4, wherein the length is set to be longer than the length of the conductive pattern. 6. The test pattern according to claim 1, wherein the test pattern and the detection pattern have a shape similar to a shape in which a normal pattern connected to a normal terminal of the integrated circuit extends in parallel. The printed circuit board according to any one of the above items. 7. The printed circuit board according to claim 1, wherein the test pattern and the detection pattern are formed on a mounting portion of the printed circuit board on which the integrated circuit is mounted. 8. The apparatus according to claim 1, wherein a plurality of sets of the test pattern and the detection pattern are formed.
The printed circuit board according to any one of Items 1 to 7, wherein 9. A test terminal to which a test pattern on a printed circuit board is connected and which outputs a test signal for detecting crosstalk between conductive patterns on the printed circuit board; and an electromagnetic wave radiated from the test pattern on the printed circuit board. An integrated circuit comprising: a detection terminal connected to a detection pattern to be received; and a determination unit configured to determine a crosstalk occurrence state based on a detection signal taken from the detection terminal. 10. The integrated circuit according to claim 9, wherein said test signal is a repetitive signal for inverting logic repeatedly as time passes. 11. A level detecting means for detecting a level of the detection signal, and a comparing means for determining whether a signal level detected by the level detecting means is within a predetermined range. The integrated circuit according to claim 9, comprising: 12. The apparatus according to claim 1, wherein said judging means includes a counting means for counting the number of times within a predetermined time, said number being judged by said comparing means that the signal level exceeds a predetermined range. 12. The integrated circuit according to 11. 13. A peak hold circuit for holding a peak level of the detection signal, and a peak comparison means for judging whether or not the peak level held by the peak hold circuit exceeds a predetermined value. The integrated circuit according to claim 9, further comprising: 14. The integrated circuit according to claim 13, wherein said peak hold circuit includes an integration circuit. 15. A crosstalk countermeasure implementing means for changing an operation characteristic of an integrated circuit to reduce crosstalk intensity when high intensity crosstalk is detected by said determination means. Item 15. The integrated circuit according to any one of Items 9 to 14. 16. A system according to claim 1, further comprising a canceling means for gradually canceling the change of the operation characteristic of the integrated circuit by said crosstalk countermeasure implementing means as time passes.
5. The integrated circuit according to 5. 17. A system according to claim 9, further comprising: a notifying terminal for outputting a notifying signal for notifying the occurrence of the occurrence of the high-intensity crosstalk by the judgment means. An integrated circuit according to any of the above items. 18. The apparatus according to claim 15, wherein said crosstalk countermeasure implementing means is first capacitor adding means for adding a capacitor to an input terminal of an integrated circuit.
8. The integrated circuit according to any one of items 7. 19. The crosstalk countermeasure implementing means is a second capacitor adding means for adding a capacitor to an output terminal of an integrated circuit.
9. The integrated circuit according to any one of the above items 8. 20. The integrated circuit according to claim 15, wherein said crosstalk countermeasure implementing means is a drive capability lowering device for lowering a drive capability of an integrated circuit output. 21. An electronic component having an electronic element component including an integrated circuit mounted on a printed circuit board, wherein the printed circuit board supplies a test signal for detecting crosstalk between conductive patterns formed on the printed circuit board. And a detection pattern for receiving an electromagnetic wave radiated from the test pattern in accordance with the output of the test signal, wherein the integrated circuit is connected to the test pattern and outputs a test signal. An electronic component comprising: a detection terminal connected to the detection pattern; and a determination unit configured to determine a state of occurrence of crosstalk based on a detection signal taken from the detection terminal. 22. The electronic component according to claim 21, wherein an adjusting means for adjusting an input characteristic of a detection signal is connected to the detection terminal. 23. The electronic component according to claim 21, wherein an output terminal of the integrated circuit is connected to the detection terminal via the detection pattern. 24. The electronic component according to claim 21, wherein an output terminal of an integrated circuit other than the integrated circuit is connected to the detection terminal via the detection pattern. 25. The electronic component according to claim 23, wherein the output logic of the output terminal changes, and the crosstalk strength can be determined based on the output state of both logics. 26. The test pattern according to claim 21, wherein a simulation circuit similar to a crosstalk countermeasure circuit provided in a normal circuit pattern is connected.
An electronic component according to any one of items 25. 27. A simulation circuit similar to a crosstalk countermeasure circuit provided in a normal circuit pattern is connected to the detection pattern.
The electronic component according to any one of the above items 6.