JP2002033562A - Forming method for insulating layer and connection hole, forming method for wiring structure, and pattern material used to implement the same methods and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an insulating layer and via hole forming method which makes the top surface of an insulating layer smooth when the insulating layer and a via hole are formed on a core substrate, can form a thin-film element etc., in good yield with good reliability and a high degree of freedom, and enables fine via-hole formation, a forming method for a wiring structure, and to provide a pattern material used to implement those methods and its manufacturing method. SOLUTION: A liquid insulating layer material 3 is applied over the surface including an electrode 2 on the substrate 1, and projections 22 formed on the pattern material 21 are pressed against the material 3 from above. After the insulating layer 3 is cured while the projections 22 are made to abut against the electrode 2, the pattern material 21 is peeled off. Consequently, via holes 23 can be formed in the insulating layer 3 at the parts of the projections 22. For the purpose, the surface of the pattern material 21 except the projections 22 are formed smoothly and the projections 22 are formed in a desired shape to desired size to form the insulating layer 3 having the smooth surface and desired via holes 23, so that a reliable product can be manufactured in good yield by forming a thin-film element, etc., by using the method.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming an insulating layer and a connection hole, a method for forming a wiring structure, a mold used therefor, and a method for manufacturing the same. A method for forming an effective insulating layer and minute vias (connection holes) on a module substrate having passive elements such as capacitors, resistors and inductors formed on its surface, a method for forming a wiring structure, and a mold used in these methods and a method for manufacturing the same. Method.

[0002]

2. Description of the Related Art In recent years, to realize miniaturization and high functionality of a mounting board, miniaturization of vias and narrowing of wiring pitch have been studied on the board. Semiconductor bare chip mounting, miniaturization of passive elements such as capacitors and resistors, and surface mounting have been studied.
It has been put to practical use.

[0003] On the other hand, with the progress of miniaturization of passive elements, the difficulty in manufacturing and mounting has increased, and limitations have been seen in the conventional method. As a solution to this, it has been proposed to form passive elements directly on the surface or inside of a printed wiring board, and there have been some examples in which a thick-film resistor or capacitor is formed on the surface of a ceramic substrate or embedded therein. Some are.

However, passive elements such as resistors and capacitors using a thick film such as printing using a paste of a metal or an insulator have difficulty in pattern accuracy and thickness accuracy.
There is a problem of poor reliability such as a problem of variation in reproducibility. In addition, when such a paste is used, high-temperature treatment is required to sinter after application, and particularly when forming on a substrate having poor heat resistance such as an organic substrate, the paste is applied as it is. It is difficult.

As a solution to this problem, an example of a passive element using a thin film such as a sputter or a vapor as a material for a resistor or a capacitor has recently been reported. By patterning a thin film or thin film of a dielectric of a resistor or a capacitor with high precision using lithography, it becomes possible to form a passive element with extremely high precision.

An example of a resistor using this thin film is schematically shown in FIG. 10. An insulating layer 3 is formed on a surface electrode 2 formed on a substrate 1 as a substrate, on which a left and right facing layer is formed. A resistor 6 is formed between the formed wirings 4-5,
A thin film resistor R is formed. As a material of the resistor, various materials such as nickel-chromium (Ni-Cr), tantalum nitride (TaN), and tantalum (Ta) can be cited. In the figure, reference numeral 5a denotes a portion connecting the upper and lower wirings via the vias 7 of the insulating layer 3 (usually an upper wiring material), and the wirings 4 and 5 of the resistance element R correspond to the vias of the insulating layer 8. 9 through the conductive portions 10a and 11a, where the electrodes 10 and 11 are attached.

An example of a capacitor using a thin film is schematically shown in FIG. 11, and a wiring 12 formed vertically on an insulating layer 3 on an electrode 2 of a substrate 1 as a substrate.
Between −13, the dielectric 14 is formed, and constitutes the capacitor C. Materials for the dielectric include tantalum oxide (Ta ₂ O ₅ , TaO), silicon nitride (Si ₃ N ₄ ),
Barium titanate (BaTiO) is exemplified. In the drawings, 13a, 15a, and 16a are conductive portions, 15, 1 and 1, respectively.
Reference numeral 6 denotes an electrode for taking out wirings 12 and 13 of the capacitor.

Among the above-mentioned resistor materials, the TaN film has a small temperature coefficient (TCR) of 100 PPM / ° C. or less and is excellent in stability such as life characteristics. Because it is commonly used. On the other hand, a tantalum oxide thin film can be directly formed as a capacitor material by sputtering, but can be easily formed by anodizing a Ta film or a TaN thin film and growing an oxide on the surface thereof.

[0009]

However, as described above, when a passive element using a thin film is to be formed on an insulating layer on a substrate, the thickness of such a thin film is generally several hundred to several hundreds.
Since it is very thin, several thousand square meters, the roughness and undulation of the insulating layer surface,
Warping is a problem.

For example, as shown in FIGS. 12A and 12B, when an insulating layer 3 is formed on a surface electrode 2 such as a patterned ground or power supply on a substrate (core substrate) 1, The surface electrode 2 is generally formed by patterning copper plating or copper foil, for example, and its thickness is as large as at least several μm to several tens μm. Therefore, if the insulating layer 3 is formed thereon by coating, the thickness of the insulating layer 3 is generally about several μ to several tens of μ. The unevenness 17 corresponding to the pattern (1) is generated. Further, for example, when an organic substrate is used as the substrate 1, for example, warpage and undulation increase, which is a problem.

Accordingly, a passive element or a thin film wiring, for example, a resistor 6 or a wiring 4 or 5 made of a very thin thin film having a thickness of several hundred to several thousand Å is provided on the upper surface of the insulating layer 3 as shown in FIG. This makes it difficult to form a passive element due to the unevenness 17 on the surface of the insulating layer 3, which lowers the reliability and yield of processing by sputtering or photolithography. For this reason, it is better not to form a thin film in a region where the unevenness 17 exists (that is, a portion where the electrode 2 is present or not), and this portion may be a dead space. Further, when a via hole (hereinafter, referred to as a via) 7 is formed in the insulating layer 3 in order to conduct the upper and lower portions of the insulating layer 3, for example, a photosensitive insulating material such as polyimide is used, and lithography is used. When forming the insulating layer 3 and forming the vias 7 in this manner, it is difficult to form small vias in the region having the irregularities 17, and the yield of vias may be reduced.

That is, when the insulating layer 3 is formed and the via 7 is formed, and thereafter, it is desirable that the surface of the insulating layer 3 is very smooth and smooth, and the formed via 7 has a high density. Smaller is better for implementation.

The present invention has been made in view of the above circumstances. In the formation of an insulating layer and a via, the surface of the formed insulating layer becomes very smooth, and the thin film element and the like can be manufactured with high reliability and high yield. A method of forming an insulating layer and a via (connection hole), a method of forming a wiring structure, and a mold used for carrying out these methods, which can be formed with a degree of freedom and in which a fine via can be formed, and a method of manufacturing the same It provides a method.

[0014]

That is, in the present invention, when forming an insulating layer and a connection hole in the insulating layer on a base, a step of forming a mold having projections; An insulating layer having a step of interposing an insulating material therebetween, a step of contacting the mold material with the projection side facing the base, a step of curing the insulating material, and a step of peeling the mold material. The present invention relates to a method for forming a connection hole (hereinafter, referred to as a method for forming an insulating layer and a connection hole of the present invention).

According to the method of forming the insulating layer and the connection hole of the present invention, the projecting side of the mold material is brought into contact with the base, and is cured by interposing the insulating material between the base and the mold. Thereafter, a portion corresponding to the projection is formed as a connection hole according to the shape of the mold, and an insulating layer having a thickness regulated by the size of the projection can be formed in a portion other than the connection hole. Therefore, even in the case of a minute-sized connection hole or an insulating layer having a smooth surface, by setting the protrusion size minutely and by forming the surface facing the substrate excluding the protrusions smoothly, the insulating surface having a thickness corresponding to this is formed. A layer and a small-sized connection hole can be formed, and the degree of restriction on the position where the connection hole and the element are formed is reduced, so that the degree of freedom in design can be increased.

Further, according to the present invention, when forming at least one wiring structure comprising an insulating layer, a connecting hole in the insulating layer, and a wiring layer attached to the connecting hole on the base, a projection with a projection is provided. A step of forming a mold, a step of interposing an insulating material between the base and the mold, a step of bringing the mold into contact with the projection on the base, and a step of curing the insulating material And a step of removing the mold material (hereinafter referred to as a wiring structure forming method of the present invention).

According to the method for forming a wiring structure of the present invention, the insulating layer and the connection hole are formed based on the above-described method for forming the insulating layer and the connection hole. A connection hole of a size can be formed. Therefore, by applying this method to a multilayered wiring structure, a highly reliable product can be manufactured.

The present invention also relates to a mold used for forming an insulating layer and a connection hole in the insulating layer on a substrate, comprising: a projection directed to the substrate; The present invention relates to a mold material (hereinafter, referred to as a mold material of the present invention) formed corresponding to the thickness of a layer and the shape and size of the connection hole.

According to the molding material of the present invention, the projections of the molding material are formed corresponding to the thickness of the insulating layer and the shape and size of the connection hole. Thereby, the desired thickness of the insulating layer and the size of the connection hole can be formed.

Further, the present invention provides a method of manufacturing a mold for forming an insulating layer and a connection hole on a substrate electrode, a step of arranging a mask on a substrate, and a step of using the mask to remove the non-masked portion of the substrate. And a step of etching (hereinafter, referred to as a method of manufacturing a mold of the present invention).

According to the method of manufacturing a mold according to the present invention, since the mold is formed by masking and etching, a high-precision mold is formed, and thus the above-described mold can be manufactured with good reproducibility.

[0022]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In the above-described method for forming an insulating layer and a connection hole, a wiring structure, a mold, and a method for manufacturing a mold according to the present invention, when forming the insulation layer and the connection hole, an electrode on the base is used. Applying the insulating material to a surface including the insulating material, and pressing the mold material such that the projection side faces the applied insulating material and the surface facing the base is flat except for the projection. Preferably, the method further includes a step of curing the insulating material, and a step of peeling the mold material to form the connection hole in a portion of the insulating material corresponding to the protrusion.

In forming the insulating layer and the connection hole, the step of arranging the mold member such that the protrusion side faces the electrode of the base and the surface facing the base is flat except for the protrusion. Filling the insulating material between the surface including the electrode and the mold material, curing the insulating material, peeling the mold material, the insulating material in a portion corresponding to the protrusions, And forming a connection hole.

In this case, it is desirable that the insulating material is a photo-curing material or a thermosetting material.

Preferably, the insulating material is a polyimide material, a light or thermosetting resin such as an epoxy or acrylic resin, a liquid crystal polymer or benzo-cyclobutene.

Preferably, the mold is a transparent optical material such as quartz or glass or a resin material.

Furthermore, it is desirable to use a core substrate for relocation wiring as the base.

The core substrate may be a ceramic multilayer substrate made of alumina, glass ceramic, aluminum nitride, mullite, or the like, or glass epoxy, polyimide, bismaleimide / triazine resin, polyphenylene ether resin, phenol resin, polyolefin resin, An organic multilayer substrate made of Teflon, liquid crystal polymer, or the like is desirable.

In this case, the core substrate may be a ceramic multilayer substrate made of alumina, glass ceramic, aluminum nitride, mullite, or the like, or glass epoxy, polyimide, bismaleimide / triazine resin,
Using an organic multilayer substrate made of polyphenylene ether resin, phenol resin, polyolefin resin, liquid crystal polymer or the like as a substrate, at least one surface of which is photosensitive or non-photosensitive epoxy, or photosensitive or non-photosensitive polyimide, or By resin material such as photosensitive or non-photosensitive benzo-cyclobutene and copper plating,
A build-up substrate on which high-density wiring is formed is desirable.

Thus, the present invention can be applied to manufacture a module substrate by connecting and fixing ICs, chip components, and the like on the surface.

It is desirable that the mold be manufactured by removing the mask after the etching.

In this case, it is preferable to further perform a step of selectively exposing the photosensitive substrate through a photomask and a step of etching the non-masked portion to etch the entire surface of the substrate.

Further, it is desirable to perform wet etching with a hydrofluoric acid solution or dry etching with a fluorine gas on the substrate made of a transparent optical material such as quartz or glass.

It is preferable that the substrate made of a transparent resin material is subjected to wet etching with an organic solvent or dry etching using oxygen gas.

Preferably, the photosensitive substrate is made of photosensitive glass.

Hereinafter, embodiments of the present invention will be described specifically.

First, a specific process for forming the insulating layer and the connection hole according to the embodiment is shown in FIGS.

The substrate as a substrate used in the present embodiment is, for example, a core substrate for redistribution wiring (hereinafter simply referred to as a substrate) made of an organic multilayer substrate, ceramics or the like, and is shown in FIG. As shown, an electrode 2 is patterned and formed on a substrate 1.

Next, as shown in FIG.
A liquid insulating layer 3 is applied to the entire surface including the upper electrode 2. This coating method may be any method, and may be applied to the entire surface by, for example, spin coating, roll coating, curtain coating, or the like. The applied insulating layer 3 may have a concave portion 18 formed according to the pattern of the electrode 2 as shown in FIG.
May be applied in a heaped shape (not shown) at the center of the substrate 1, and the insulating layer 3 may be spread over the entire substrate 1 when the subsequent mold material is brought into contact.

Next, as shown in FIGS. 1C and 2D, the mold 21 is brought into contact with the entire substrate. This molding 21
Projections 2 for forming vias in the insulating layer
2 is given. When contacting, it is necessary to prevent air bubbles and the like from entering.
Is required to be in close contact with the surface of the electrode 2 of the substrate 1.

Next, as shown in FIG.
After the contact, the insulating layer 3 is cured in this contact state.

At this time, when a thermosetting material is used as the insulating layer material, the entire substrate is heated to harden the insulating layer 3. When a photocurable material such as an ultraviolet curable resin is used as the insulating layer material, the insulating layer 3 is irradiated with light for curing from the upper surface of the mold material 21.
To cure. Therefore, in the case of a photocurable material, the material of the mold 21 is a material that transmits the irradiated light, and a transparent material such as quartz or glass is preferable.

Next, as shown in FIG. 2E, after the insulating layer 3 is cured, the mold 21 is peeled off from the substrate 1.
In this peeling step, it is desirable that the mold 21 can be easily peeled from the insulating layer 3. In order to facilitate the peeling, for example, the surface of the mold 21 is thinly coated with a fluorine coating or a silicone resin to improve the peelability. Is also good.

Through the steps described above, the vias 23 can be formed simultaneously with the formation of the insulating layer 3 as shown in FIG. At this time, the thickness of the insulating layer 3 on the electrode 2 is determined by the height of the projection 22 of the mold 21,
The thickness of the insulating layer 3 can be strictly controlled. In addition, mold material 2
If one protrusion 22 can be formed with a minute outer diameter, the formed via 23 can be formed with a minute inner diameter. If the surface of the mold material 21 is flat and has little roughness, the surface of the formed insulating layer 3 can be formed to be very flat and smooth. Further, the via 23 may be located at any position as long as it is on the electrode 2, and the degree of restriction on the position at which the via is formed is reduced (the same applies to other embodiments described later).

The via 2 formed as described above
A thin residue may remain on the bottom surface of the insulating layer 3, and the residue can be removed by etching the entire surface of the insulating layer by a method such as dry etching or ashing.

Then, as shown in FIG. 2G, further electrodes 24 are patterned on the insulating layer 3 formed as described above, and wirings above and below the insulating layer 3 are formed through the vias 23. Can be. This electrode 24 can be formed by, for example, a plating film or a sputtering film.

However, the insulating layer and the connection holes according to the present embodiment can also be formed by the process shown in FIG.

That is, as shown in FIG. 3A, first, the projections 22 of the mold 21 are directly brought into contact with the electrodes 2 of the substrate 1.
Thereby, a gap 17 is formed between the substrate 1 and the mold 21.

Next, as shown in FIG. 3B, the gap 17 is filled with a liquid insulating material. The filling method can be performed by vacuum suction.
By peeling 1, the same insulating layer 3 and via 23 as in the above-described process can be formed.

According to the above-described embodiment, the insulating layer 3 can be formed by a simple process, the via 23 having a minute inner diameter is formed simultaneously with the formation of the insulating layer 3, and the surface of the insulating layer 3 is flattened. Further, it can be formed smoothly, and a thin film such as a sputtered film can be easily formed on the upper surface. Further, the thickness of the insulating layer 3 can be very strictly controlled by the height of the projection 22 of the mold 21.
In addition, the degree of restriction on the position at which the via is formed is reduced, thereby increasing the degree of freedom in designing the via.

Next, a specific forming process of the mold 21 of the embodiment is shown in FIGS.

First, for example, quartz is used as the material of the mold 21 shown in FIG. 4A, and then, as shown in FIG. 4B, a mask 2 for forming the projections 22 on this material is used.
6 is formed by patterning.

Next, as shown in FIGS. 4C and 4D, the surface of the mold 21 is etched using the mask 26.

At this time, when quartz is used as the material of the mold 21, a thin film of Au / Ti is formed by patterning, for example, as the mask 26, and a fluorine-based gas such as CF ₄ gas is used as an etching method. RI
Dry etching such as E (Reactive Ion Etching) or wet etching using a hydrofluoric acid-based solution such as hydrofluoric acid or buffered hydrofluoric acid can be performed.

If a plastic or resin material is used as the material of the mold member 21, for example, aluminum can be used as the mask 26, and the etching can be performed by RIE using oxygen gas.

Next, as shown in FIG.
By removing 6, a projection 22 integral with the mold material can be formed on the mold material 21. In addition, this projection is not integral with the mold member 21 but may be formed as a separate body and adhered thereto (the same applies to a mold member described later).

At this time, if desired, the molding material 2
By etching the entire surface of 1, the edge of the projection 22 can be smoothed as shown in FIG.

The reason why the edge of the projection 22 of the mold member 21 is smoothed is as follows. That is, FIG.
As shown in (a), after the mold material 21 is peeled off, the shape of the via 23 formed by the protrusion 22 is, if the protrusion 22 is
Becomes When the protrusion 22A is rounded as shown in FIG. 6B, the via 23A has a rounded shape.

However, when the electrode wiring 24 on the upper surface of the insulating layer 3 is further formed as shown in FIG. 2G after the formation of the via, if the via 23 is angular, the electrode 2 on the bottom of the via 23 is The edge with the insulating layer 3 is squared, and poor conduction between the upper electrode 24 and the electrode 2 at that portion is likely to occur. Also,
In the case where the bottom surface of the via 23A is rounded as shown in FIG.

In particular, when a thin film electrode such as a sputtered film is formed as the upper electrode 24, the effect is remarkably exhibited. From this, the etching in the step of FIG.
Isotropic etching is preferable to anisotropic etching. As described above, the mold member 21 using quartz can be manufactured.

Next, FIG. 7 shows an example in which photosensitive glass is used as the material of the mold.

The material used for the mold 21A shown in FIG. 7A is photosensitive glass. Next, as shown in FIG. 7B, ultraviolet rays are selectively exposed using a photomask 27 in which a light-shielding film 30 is formed by chrome on the material, and the mold material 21A is irradiated. As a result, FIG.
As shown in FIG. 7, the portion 29 other than the non-exposed portion 28 is exposed.

Next, as shown in FIG. 7C, a heat treatment at, eg, 500 ° C. is performed to crystallize the exposed portion 29 to make it easily soluble in acid.

Next, as shown in FIG.
The entire surface of A is re-exposed with ultraviolet light. Thereby, the degree of crystallization of the exposed portion 29 is increased, and the exposed portion 29 is more easily dissolved in acid.

Next, as shown in FIG.
The crystallized portion 29 of 1A is wet-etched with acid.

As a wet etchant in this case, for example, diluted hydrofluoric acid or the like is used. In this etching, directional (anisotropic) etching is preferable because the selectivity between the crystallized portion 29 and the non-crystallized portion 28 is excellent, and fine projections 28A can be formed. In this way, the mold member 21A can be manufactured using the photosensitive glass in the same manner as in the case of quartz.

According to the present embodiment, the mold members 21 and 21A are manufactured using quartz or photosensitive glass,
If the insulating layer 3 described above is formed by using the first and second insulating layers 1, 21A, the vias 23 can be formed at the same time as the insulating layer 3, and further, the pair with the substrate 1 excluding the projections 22, 28A of the mold members 21, 21A. If the light surface is smoothed and the projections 22 and 28A are formed to a desired size, a smooth insulating layer 3 and a desired via 23 can be formed.

By using the insulating layer and via forming steps as described above, a multilayer wiring board as shown in FIG. 8 can be formed. As the core substrate 1, for example, an organic multilayer substrate corresponding to FR-4 or a multilayer wiring substrate such as ceramic is used (31 in the figure indicates an insulating layer of each layer, 33 indicates a wiring layer), and a capacitor C is provided on the substrate. And a thin film passive element such as a resistor R is formed by a known method (see FIGS. 10 and 11), and furthermore, the insulating layer 8 and the via holes 7, 9 and the conductive layers 10, 11, 15 by Cu plating or the like are formed. 16 and the like can form a multi-layer wiring board.

Further, as shown in FIG. 9, an IC 35 and a chip component 36 can be mounted on the multilayer wiring board and used as a module board. Although not shown, the module substrate can be connected and fixed on a printed wiring board on the core substrate side.

The insulating layer 31 of the core substrate 1 is
Alumina, glass ceramic aluminum nitride, mullite, etc., or glass epoxy, polyimide, bismaleimide / triazine resin, polyphenylene ether resin, phenol resin, polyolefin resin, liquid crystal polymer, etc. may be used. Insulating layers 3 and 8 on the core substrate
And 32 may be a photosensitive or non-photosensitive epoxy, or a photosensitive or non-photosensitive polyimide, or a photosensitive or non-photosensitive benzo-cyclobutene, liquid crystal polymer, or the like.

Of these, it is apparent that all of the insulating layers 3, 8, and 32 are desirably formed by the steps shown in FIGS. Also, when a liquid crystal polymer, for example, an aromatic liquid crystal polyester is used as the insulating layer, it is resistant to high frequency noise, and has high strength and elastic modulus, high load deflection temperature, continuous use temperature, heat resistance, and low water absorption. Since it also shows the ratio, it can be said that it is suitable for an interlayer insulating film.

According to each of the above-described embodiments, the mold 21
By forming the size of the protrusion 22 into a desired shape and size, and further forming a portion other than the protrusion smooth, the insulating layer 3 and the via 23 having a thickness regulated by the protrusion 22 can be formed. In particular, an insulating layer of a substrate on which a thin film wiring or a thin film passive element is formed can be formed very smooth and smooth on the surface, and minute vias can be formed. Therefore, it is possible to solve the problems associated with the conventional surface roughness, undulation, warpage, and the like of the insulating layer.

The above embodiment can be modified based on the technical idea of the present invention.

For example, a via is formed in an insulating layer on a flat surface without providing a projection on a mold material, a photocurable material is used as an insulating layer, and a via is formed on a surface opposite to the insulating layer. Vias can also be formed by masking the position to be formed with a light-shielding film, transmitting the mold material, performing exposure by ultraviolet irradiation or the like, curing the insulating layer and removing the mold material, and then wet-etching the non-exposed portion. .

Further, similarly to the above, it is also possible to use a mold material having no protrusion and a photocurable material as the insulating layer, and irradiate exposure from the mold material side to perform pulse control of exposure. As a result, an exposed portion and a non-exposed portion are formed, so that a via can be formed by wet etching in the same manner as above.

Further, the process of forming the insulating layer and the via, the process of forming the mold material, the method of forming the protrusions, and the like in the embodiment are not limited to the embodiment, and may be appropriately performed. Further, an insulating material can be applied to the mold material side and can be pressure-bonded to the substrate.

[0077]

As described above, according to the method of forming the insulating layer, the connection hole, and the wiring structure of the present invention, the projecting side of the mold is brought into contact with the base, and the insulating material is interposed between the base and the mold. After the mold material is peeled off, a portion corresponding to the protrusion is formed as a connection hole according to the shape of the mold material, and an insulating layer having a thickness regulated by the size of the protrusion is formed in a portion other than the connection hole. Can be formed. Therefore, even in the case of a minute-sized connection hole or an insulating layer having a smooth surface, by setting the protrusion size minutely and by forming the surface facing the substrate excluding the protrusions smoothly, the insulating surface having a thickness corresponding to this is formed. A layer and a small-sized connection hole can be formed, and the degree of restriction on the position where the connection hole and the element are formed is reduced, so that the degree of freedom in design can be increased.

The mold of the present invention and the method for producing the same are as follows:
Since the projections of the mold material are formed corresponding to the thickness of the insulating layer and the shape and size of the connection hole, it is possible to form the insulation layer and the connection hole having a thickness corresponding to the mold material, and mask and etch this mold material. Therefore, it can be formed with high precision.

[Brief description of the drawings]

FIG. 1 is a diagram showing a process of forming an insulating layer and a via according to an embodiment of the present invention.

FIG. 2 is a diagram showing another process for forming an insulating layer and a via according to the embodiment of the present invention.

FIG. 3 is a view showing still another formation process of the insulating layer and the via according to the embodiment of the present invention;

FIG. 4 is a view showing a process of forming a mold using quartz according to the embodiment.

FIG. 5 is a view showing one step of another forming process of the mold using quartz according to the embodiment.

FIGS. 6A and 6B schematically show a projection of a mold material and a via formed by the same according to the embodiment, wherein FIG. 6A shows a case of a square projection, and FIG. 6B shows a case of a round projection.

FIG. 7 is a diagram showing a process of forming a mold using photosensitive glass according to the embodiment.

FIG. 8 is a schematic diagram of a multilayer wiring board using a process of forming an insulating layer and a via according to the embodiment.

FIG. 9 is a schematic view of a module substrate using a process of forming an insulating layer and a via according to the embodiment.

FIG. 10 is a schematic diagram showing the vicinity of a resistor of a conventional multilayer wiring board.

FIG. 11 is a schematic view showing the vicinity of a capacitor of a conventional multilayer wiring board.

FIG. 12 is a view showing a process of forming an insulating layer formed on a substrate electrode according to a conventional example.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Base (core), 2 ... Surface electrode, 3, 8, 31, 32
... insulating layer (insulating material), 4, 5, 12, 13, 33 ... wiring, 6 ... resistor, 7, 9, 23 ... via, 10, 11, ...
15, 16, 24 ... electrodes, 5a, 10a, 11a, 13
a, 15a, 16a: conductive part, 14: dielectric, 17: gap, 18: recess, 21, 21A: mold, 22, 25A,
28A: projection, 26, 27: mask, 28: non-exposed part,
29: Exposure part, 30: Light shielding film, 35: IC, 36: Chip component, C: Capacitor, R: Thin film resistance element

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H05K 3/40 H05K 3/40 E 3/46 3/46 N XTY B // B29K 105: 24 B29K 105: 24 B29L 31:34 B29L 31:34 F-term (reference) 4F202 AA21 AA24 AA39 AA40 AA44 AC07 AD19 AG28 AH33 AJ03 AJ06 AJ09 AJ11 CA01 CB01 CB12 CD24 CK11 CK41 4F204 AA21 AA24 AA37 A28 AA37 EA03 EB01 EB12 EF27 EF30 EK13 EK18 5E317 AA24 BB01 BB02 BB03 BB12 CC25 CC31 CC53 CD31 CD32 GG16 5E346 AA05 AA06 AA12 AA15 AA26 AA43 BB01 BB16 BB20 CC08 CC09 CC10 CC13 CC31 DG01 GG33 EE0133

Claims (41)

[Claims] A step of forming a projection with a mold when forming an insulating layer and a connection hole in the insulating layer on the base; and a step of interposing an insulating material between the base and the mold. A method for forming an insulating layer and a connection hole, comprising: a step of bringing the mold into contact with the projection on the base; a step of curing the insulating material; and a step of peeling the mold. 2. A step of applying the insulating material to a surface of the substrate including an electrode when forming the insulating layer and the connection hole, wherein the projecting side is directed toward the applied insulating material. hand,
A step of indenting the mold material having a flat surface facing the base except for the protrusions, a step of curing the insulating material, and a step of peeling the mold material and applying the insulating material to a portion corresponding to the protrusions. 2. The method for forming an insulating layer and a connection hole according to claim 1, further comprising the step of forming a connection hole. A step of arranging the mold member such that, when forming the insulating layer and the connection hole, the projection side faces the electrode of the base, and the surface facing the base is flat except for the projection. A step of filling the insulating material between the surface including the electrode and the mold material; a step of curing the insulating material; and a step of peeling the mold material and applying the insulating material to a portion corresponding to the protrusion. 2. The method for forming an insulating layer and a connection hole according to claim 1, further comprising the step of forming a connection hole. 4. The method according to claim 1, wherein the insulating material is a photocurable material. 5. The method according to claim 1, wherein the insulating material is a thermosetting material. 6. The method according to claim 1, wherein the insulating material is a polyimide-based material. 7. The method for forming an insulating layer and a connection hole according to claim 1, wherein the insulating material is a light or thermosetting resin such as an epoxy or acrylic resin. 8. The method according to claim 1, wherein the insulating material is a liquid crystal polymer.
A method for forming an insulating layer and a connection hole according to claim 1. 9. The method according to claim 1, wherein the insulating material comprises benzo-cyclobutene. 10. The method for forming an insulating layer and a connection hole according to claim 1, wherein said mold member is made of a transparent optical material such as quartz or glass. 11. The method according to claim 1, wherein the mold is made of a resin material. 12. The method for forming an insulating layer and a connection hole according to claim 1, wherein a core substrate for relocation wiring is used as said base. 13. The method of claim 12, wherein the core substrate is a ceramic multilayer substrate made of alumina, glass ceramic, aluminum nitride, mullite, or the like. 14. The core substrate is an organic multilayer substrate made of glass epoxy, polyimide, bismaleimide / triazine resin, polyphenylene ether resin, phenol resin, polyolefin resin, Teflon (registered trademark), liquid crystal polymer, or the like. Item 13. The method for forming an insulating layer and a connection hole according to Item 12. 15. The ceramic substrate according to claim 15, wherein the core substrate is a ceramic multilayer substrate made of alumina, glass ceramic, aluminum nitride, mullite, or the like, or glass epoxy,
An organic multilayer substrate made of polyimide, bismaleimide / triazine resin, polyphenylene ether resin, phenol resin, polyolefin resin, liquid crystal polymer, or the like is used as a substrate, and at least one surface thereof is made of a photosensitive or non-photosensitive epoxy or a photosensitive epoxy. A high-density wiring is formed by a resin material such as a photosensitive or non-photosensitive polyimide, or a resin material such as a photosensitive or non-photosensitive benzo-cyclobutene and copper plating. Method of forming connection holes. 16. When forming at least one wiring structure including an insulating layer, a connecting hole in the insulating layer, and a wiring layer attached to the connecting hole on a base, a mold member with a projection is produced. A step of interposing an insulating material between the base and the mold; a step of contacting the mold with the protrusion facing the base; a step of curing the insulating material; Removing the wiring structure. 17. A step of applying the insulating material to a surface including an electrode on the base when forming the insulating layer and the connection hole, wherein the projecting side is directed to the applied insulating material. hand,
A step of indenting the mold material having a flat surface facing the base except for the protrusions, a step of curing the insulating material, and a step of peeling the mold material and applying the insulating material to a portion corresponding to the protrusions. 17. The method for forming a wiring structure according to claim 16, comprising the step of forming a connection hole. 18. A step of, when forming the insulating layer and the connection hole, arranging the mold member such that the projection side faces the electrode of the base, and the surface facing the base is flat except for the projection. A step of filling the insulating material between the surface including the electrode and the mold material; a step of curing the insulating material; and a step of peeling the mold material and applying the insulating material to a portion corresponding to the protrusion. 17. The method for forming a wiring structure according to claim 16, comprising the step of forming a connection hole. 19. The insulating material is a photocurable material,
A method for forming a wiring structure according to claim 16. 20. The insulating material is a thermosetting material,
A method for forming a wiring structure according to claim 16. 21. The method according to claim 16, wherein the insulating material is a polyimide-based material. 22. The method according to claim 16, wherein the insulating material is a light or thermosetting resin such as an epoxy or acrylic resin. 23. The method according to claim 16, wherein the insulating material is a liquid crystal polymer. 24. The method according to claim 16, wherein the insulating material comprises benzo-cyclobutene. 25. The method for forming a wiring structure according to claim 16, wherein the mold member is made of a transparent optical material such as quartz or glass. 26. The method for forming a wiring structure according to claim 16, wherein said mold member is made of a resin material. 27. The method according to claim 16, wherein a core substrate for relocation wiring is used as the base. 28. The method according to claim 27, wherein the core substrate is a ceramic multilayer substrate made of alumina, glass ceramic, aluminum nitride, mullite, or the like. 29. The method according to claim 27, wherein the core substrate is an organic multilayer substrate made of glass epoxy, polyimide, bismaleimide / triazine resin, polyphenylene ether resin, phenol resin, polyolefin resin, Teflon, liquid crystal polymer, or the like. Of forming a wiring structure. 30. The core substrate is a ceramic multilayer substrate made of alumina, glass ceramic, aluminum nitride, mullite or the like, or glass epoxy,
An organic multilayer substrate made of polyimide, bismaleimide / triazine resin, polyphenylene ether resin, phenol resin, polyolefin resin, liquid crystal polymer, or the like is used as a substrate, and at least one surface thereof is made of a photosensitive or non-photosensitive epoxy or a photosensitive epoxy. 28. A wiring structure according to claim 27, wherein the wiring structure is a build-up substrate on which high-density wiring is formed by a resin material such as photosensitive or non-photosensitive polyimide, or a photosensitive or non-photosensitive benzo-cyclobutene and copper plating. Forming method. 31. The method of forming a wiring structure according to claim 27, wherein the method is applied to manufacture a module substrate by connecting and fixing an IC, a chip component, and the like on a surface. 32. A mold used for forming an insulating layer and a connection hole in the insulating layer on a base, comprising a projection directed to the base, wherein the projection has a thickness and a thickness of the insulating layer. A mold formed corresponding to the shape and size of the connection hole. 33. The mold according to claim 32, wherein the mold comprises a transparent optical material such as quartz or glass. 34. The molding according to claim 32, wherein the molding is made of a resin material. 35. A step of arranging a mask on a substrate when manufacturing a mold for forming an insulating layer and a connection hole on an electrode of a substrate, and a step of etching the non-masked portion of the substrate using the mask. The manufacturing method of the shape | mold material which has these. 36. The method according to claim 35, wherein the mask is removed after the etching. 37. The method according to claim 35, further comprising selectively exposing a photosensitive substrate through a photomask, and etching the non-masked portion. 38. The mold according to claim 32, further comprising a step of etching the entire surface of the base. 39. The mold according to claim 36, wherein the base made of a transparent optical material such as quartz or glass is subjected to wet etching with a hydrofluoric acid-based solution or dry etching using a fluorine-based gas. Production method. 40. The method according to claim 36, wherein the substrate made of a transparent resin material is subjected to wet etching with an organic solvent or dry etching using oxygen gas. 41. The method according to claim 37, wherein the photosensitive substrate is made of photosensitive glass.