JP2002032055A - Driving device and driving method for ac type plasma display panel - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the cost of a writing circuit by lowering the breakdown voltage of the writing circuit and also to reduce the power consumption of the circuit. SOLUTION: A scanning circuit 15 is connected to scanning electrodes of a panel 13 and the circuit 15 is connected to a line to which outputs with each other of a sustenance circuit 16 and an initialization circuit 17 being preceding circuits of the circuit 15 as a floating circuit. A control circuit 27 is constituted of a constant voltage circuit 23, a voltage comparator 24, a gate circuit 25 and a voltage level shifting circuit 26 and the output of the initialization circuit 17 and the output Vref of the constant voltage circuit 23 are inputted to the voltage comparator 24. Then, the voltage comparator 24 detects the voltage level of an initialization waveform being the output of the initialization circuit 17 and outputs a changeover signal for holding the completion voltage of the initialization waveform at a prescribed value and the signal is inputted to the scanning circuit 15 via the gate circuit 25 and the voltage level shifting circuit 26.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a television receiver, a computer terminal and the like used for displaying images.
C-type plasma display panel (hereinafter referred to as panel)
And a driving method.

[0002]

In conventional panels, a substrate scan electrode SCN _i and the sustain electrode SUS _{i (i} = 1~N) is provided a N pairs, the M data electrodes D ₁ to D _M a substrate provided are opposed across a discharge space, the scanning electrodes SCN ₁ ~SCN _N and sustain electrodes SUS ₁ ~SUS _N
And the data electrodes D _{1 to} D _M intersect at right angles. One discharge cell is formed at the intersection of one data electrode and one scan electrode and sustain electrode.

Next, a conventional panel driving method will be described.
This will be described with reference to the operation timing chart shown in FIG. In this panel, one field period is divided into a plurality of subfields having different light emitting period weights, and gradation display is performed by a combination of subfields to emit light. FIG.
Shows a drive waveform in one subfield, and the subfield includes an initialization period, a writing period, a sustain period, and an erasing period.

[0004] As shown in FIG. 7, in the initializing period to form wall charges in applying the initializing waveform to the scan electrodes SCN ₁ ~SCN _N discharge cells. In the next writing period, scan electrode SC
While sequentially applying a scan pulse to _{N 1} ~SCN N, to form a wall charge corresponding to the display data by applying a data pulse to the data electrodes D ₁ to D _M, the scanning electrodes SCN ₁ ~ in the following sustain period SCN _N and the sustaining electrodes SUS ₁ ~SUS _N
And the sustain pulse is applied alternately to continue the display discharge. And applying an erase waveform to the sustain electrodes SUS ₁ ~SUS _N stops the display discharge in the subsequent erase period.

In the initializing period, a gentle rising period from Vc (V) to Vd (V) in the first half of the initializing waveform and a gentle rising period from Ve (V) to 0 (V) in the second half of the initializing waveform. A weak initializing discharge is caused in all the discharge cells twice during the falling period, and at the end of the initializing waveform, that is, when the voltage reaches 0 (V), data of the next writing period is written. A predetermined amount of wall charge for facilitating writing is formed in each discharge cell according to the characteristics (discharge start voltage and the like) of each discharge cell.

Since the output of the initialization circuit fluctuates due to the temperature characteristics of the initialization circuit for outputting the initialization waveform and the load fluctuation due to the change of the display state of the panel, the scan electrode SCN is changed.
The inclination of the gently falling portion of the initialization waveform applied to the _{1 ~SCN N} (portion extending from 0 Ve) varies. In consideration of this variation, even when the portion of the initialization waveform that gradually falls due to the influence of the temperature characteristics of the initialization circuit or the like becomes the slowest, the scan electrode S at the end of the initialization waveform.
Voltage of CN ₁ ~SCN _N is set to be 0 (V). That is, the initialization waveform as designed is the scan electrode SCN.
When applied to _{1 ~SCN N,} it is provided with time keep the voltage of the scanning electrodes SCN ₁ ~SCN _N to 0 (V) t1 (about 50 [mu] s) after the initializing waveform is completed.

[0007]

However, in such a conventional driving method, the wall charges formed in the discharge cells decrease during the time t1, and unless the voltage of the data pulse is increased. did not become. Therefore, there is a problem that a high-voltage driving element is required for a circuit for generating a data pulse, so that the cost is increased and power consumption is increased.

If the initialization waveform is set so that the time when the initialization waveform gradually falls and becomes 0 is at the end of the initialization period, the gradient of the initialization waveform becomes gentler due to the temperature characteristics of the initialization circuit. , The end voltage of the initialization waveform fluctuates. As a result, the amount of wall charges formed in the discharge cells during the initialization period differs between one subfield and another subfield, and an error occurs during the writing period. There has been a problem that display quality deteriorates due to discharge.

SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and reduces the withstand voltage of a writing circuit to reduce cost and power consumption without deteriorating the display quality. An object of the present invention is to provide a driving apparatus and a driving method for an AC plasma display panel that can be performed.

[0010]

In order to solve the above-mentioned problems, a substrate on which a plurality of scan electrodes and sustain electrodes covered with a dielectric layer are arranged is arranged so as to intersect the scan electrodes and the sustain electrodes. An AC-type plasma display panel driving device in which another substrate on which a plurality of data electrodes are arranged is disposed opposite to each other across a discharge space, and has a voltage waveform of a certain polarity and a polarity opposite to the certain polarity. An initialization circuit that outputs a gradual waveform having a voltage waveform that gradually changes in a direction, and when applying an initialization waveform based on the gradual waveform to the scan electrode or the sustain electrode, the initialization waveform. Is controlled to a predetermined value, and after the application of the initialization waveform, the voltage of the scan electrode or the sustain electrode to which the initialization waveform has been applied is changed to the wall voltage formed in the discharge space. It is obtained by a control circuit that functions to a voltage that can hold.

Further, in the driving method of an AC type plasma display panel according to the present invention, a substrate on which a plurality of scan electrodes and sustain electrodes covered with a dielectric layer are arranged, intersects the scan electrodes and the sustain electrodes. Is a method of driving an AC plasma display panel in which another substrate on which a plurality of data electrodes are arranged is opposed to each other across a discharge space, wherein a voltage waveform of a certain polarity and a polarity opposite to the certain polarity are used. And a voltage waveform that gradually changes in the direction to reach a predetermined voltage controlled by the control circuit, and a voltage waveform set to a voltage that can hold the wall charges formed in the discharge space. Is applied to the scan electrode or the sustain electrode.

According to this driving device or driving method, the end voltage of the initialization waveform can be reliably set to a predetermined value, and the wall charge formed in the discharge space by the initialization waveform can be held.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a panel driving apparatus and a driving method according to the present invention will be described below with reference to the drawings.

As shown in FIG. 3, the panel of this embodiment has a plurality of pairs of scanning electrodes 2 and sustaining electrodes 3 provided on a first glass substrate 1 in parallel with each other. A dielectric layer 4 is provided so as to cover 2 and sustain electrode 3, and a protective film 5 is provided on dielectric layer 4. A plurality of data electrodes 8 covered with a dielectric layer 7 are provided on a second substrate 6 made of glass, and partition walls 9 are formed on the dielectric layer 7 between the data electrodes 8 in parallel with the data electrodes 8. Is provided. Phosphors 10 are provided on the surface of the dielectric layer 7 and the side surfaces of the partition walls 9. The first substrate 1 and the second substrate 6 are arranged to face each other with the discharge space 11 interposed therebetween such that the scan electrodes 2 and the sustain electrodes 3 intersect the data electrodes 8 at right angles.
Further, a discharge cell 12 is formed at the intersection of the scan electrode 2 and the sustain electrode 3 and the data electrode 8 which form a pair and are sandwiched between two adjacent partition walls 9. The discharge space 11 is filled with xenon and at least one of helium, neon, and argon as a discharge gas.

The electrode array of this panel has an M × N matrix configuration as shown in FIG. 4, and M columns of data electrodes D _{1 to} D _M (data electrodes 8 of FIG. 3) are arranged in the column direction. in which, in the row direction N rows of scanning electrodes SCN ₁ ~SCN _N (scanning electrodes 2 in FIG. 3) and sustain electrodes SUS ₁ ~SUS _N (sustain electrode 3 of FIG. 3) are arranged. Further, the discharge cells 12 shown in FIG. 3 are formed in a region as shown in FIG.

FIG. 1 is a block diagram showing a panel driving device according to a first embodiment of the present invention. In FIG. 1, a writing circuit 14 is connected to the data electrodes D _{1 to} D _M of the panel 13. Scan electrodes in the SCN ₁ ~SCN _N is connected a scanning circuit 15, the scanning circuit 15 is connected as a floating circuit in output are connected to each other line of the preceding stage of the sustain circuit 16 and the initialization circuit 17. Maintaining the sustain electrodes SUS ₁ ~SUS _N circuit 18 and the erase circuit 1
9 is connected.

The control circuit 27 includes a constant voltage circuit 23, a voltage comparator 24, a gate circuit 25, and a voltage level shift circuit 26. The output of the initialization circuit 17 and the output Vref (V) of the constant voltage circuit 23 are input to the voltage comparator 24. The voltage comparator 24 outputs a switching signal that becomes an effective level when the output of the initialization circuit is lower than Vref (V), and becomes an invalid level when the output of the initialization circuit is higher than Vref (V). The switching signal output from the voltage comparator 24 is input to the scanning circuit 15 via the gate circuit 25 and the voltage level shift circuit 26.

The display signal input to the display signal processing circuit 20 is subjected to processes such as A / D conversion, scanning line conversion, and subfield conversion, and the signal-processed display signal is output to the writing circuit 14. You. The synchronization signal is input to the display signal processing circuit 20 and the timing control circuit 21. The timing control circuit 21 generates a timing control signal for controlling each drive circuit,
6, output to the initialization circuit 17, maintenance circuit 18, erasure circuit 19 and gate circuit 25, and to the scanning circuit 15 via the voltage level shift circuit 22.

The operation of the driving device will be described with reference to the operation timing chart shown in FIG. 2 and FIG. FIG. 2 shows a drive waveform in one subfield as in FIG. In the initialization period of FIG.
Is in a high-impedance state, and from the initialization circuit 17, the voltage rises sharply from 0 (V) to Vc (V).
After slowly rising from (V) to Vd (V), V
De falls sharply from d (V) to Ve (V)
A gentle gradient waveform that gradually falls from (V) to 0 (V) is output. The scanning circuit 15 is in a state of allowing the output of the initialization circuit 17 to pass therethrough, and the gentle slope waveform output from the initialization circuit 17 remains unchanged while maintaining the scan electrodes SCN ₁ to SCN ₁ .
It is applied to the SCN _N.

During the initialization period, the sustain circuit 18 is in a high impedance state, and 0 (V) is first output from the erase circuit 19, followed by Vk (V). Maintaining the electrodes SUS ₁ ~SUS _N output of the erase circuit 19 is applied, the timing to replace the voltage from the 0 (V) to Vk (V), the voltage applied to the scanning electrodes SCN ₁ ~SCN _N is Vd (V ) To Ve (V). Further, the write circuit 14 outputs 0
(V) is output and applied to the data electrodes D _{1 to} D _M.

From the timing control circuit 21 to the gate circuit 2
The enable signal output to 5 is at an effective level from the time when the gentle gradient waveform output from the initialization circuit 17 becomes Vd (V) until the end of the writing period. When the voltage level of the gentle gradient waveform decreases from Ve (V) and becomes lower than the output Vref (V) of the constant voltage circuit 23, this is detected by the voltage comparator 24, and the switching signal output from the voltage comparator 24 is Change to effective level. Since the enable signal is at an effective level, a signal of an effective level is output from the gate circuit 25 and the voltage level shift circuit 26
Is input to the scanning circuit 15 via the. Then, the scanning circuit 15 superimposes the output of the initialization circuit 17 on the output of the initialization circuit 17 and Vg
The state is switched to the state of outputting (V).

[0022] Since operates as the circuit described above, if the output Vref of the constant voltage circuit 23 and slightly larger voltage than 0 (V), initialization is applied to the scanning electrodes SCN ₁ ~SCN _N The waveform rises sharply from 0 (V) to Vc (V), gradually rises from Vc (V) to Vd (V), and then sharply falls from Vd (V) to Ve (V). , And gradually falls to a predetermined value 0 (V) controlled by the control circuit 27. The voltage of scan electrodes SCN ₁ ~SCN _N rises to as soon as the initialization waveform is completed Vg (V).

In the initialization period, V in the first half of the initialization waveform
A weak rising slope from c (V) to Vd (V) and a gentle falling slope from Ve (V) to 0 (V) in the latter half are weak in all discharge cells twice. By causing the initializing discharge, a predetermined amount of wall charges according to the characteristics of each discharge cell (such as a discharge starting voltage) is formed in each discharge cell. That is, in the rising slope portion of the initialization waveform, negative wall charges are formed in the protective film 5 surface on the scanning electrode SCN ₁ ~SCN _N, sustain electrodes S
Surface of protective film 5 on US _{1 to} SUS _N and data electrode D ₁
A positive wall charge is formed on the surface of the phosphor 10 on ~ D _M ,
At the next falling slope, the positive and negative wall charges formed at the rising slope are each weakened, and at the end of the initialization waveform, the wall charges formed in each discharge cell are adjusted to an amount suitable for the writing operation. ing. At the end of the initialization waveform in any subfield, scan electrode SCN
₁ the voltage of ～SCN _N is always predetermined voltage that is controlled by the control circuit 27, which sub-field a predetermined amount of wall charges always according to the characteristics of the discharge cells in the discharge cells in the setup period of Is adjusted to remain.

Further, as soon as the initialization waveform is completed, by the voltage Vg (V) in which discharge is not generated higher than 0 (V) the voltage of the scanning electrodes SCN ₁ ~SCN _N, in each discharge cell It prevents the formed wall charges from decreasing. That is, the voltage of the scanning electrodes SCN ₁ ~SCN _N is 0
As soon as (V) is reached, the voltage is changed in the direction opposite to the voltage change at the falling slope of the initialization waveform. If the amount of wall charges formed in the discharge cells during the initialization period is large, discharge is likely to occur during the writing period. Therefore, the writing can be performed without increasing the voltage of the data pulse applied to the data electrodes D _{1 to} D _M during the writing period. Actions can be taken.

In the subsequent writing period, 0 (V) is output from the sustain circuit 16, and the initialization circuit 17 enters a high impedance state. The scanning circuit 15 continues to output Vg (V) in a form superimposed on the output 0 (V) of the sustaining circuit 16 by the switching signal of the voltage comparator 24,
Scan pulse (V) are sequentially applied to the scanning electrodes SCN ₁ ~SCN _N. Maintaining circuit 18 is high-impedance state, from the erasing circuit 19 is applied to Vk (V) is outputted sustain electrodes SUS ₁ ~SUS _N. From the write circuit 14, V lower than the voltage Vb (V) of the conventional data pulse is applied.
a (V) data pulse is output, and the data electrodes D ₁ to D ₁ are output.
_Applied to D _M. In the writing period, a writing discharge occurs in the discharge cells to which the scan pulse and the data pulse are simultaneously applied, and wall charges that cause the sustain discharge in the subsequent sustain period are formed in the discharge cells.

In the subsequent sustain period, the initialization circuit 17 is in a high impedance state,
A sustain pulse of h (V) is output. At this time, the scanning circuit 15 is in a state of allowing the output of the sustain circuit 16 to pass therethrough, and the output of the sustain circuit 16 is not changed and the scan electrode SC
It is applied to the _{N 1} ~SCN N. The erasing circuit 19 is in a high impedance state, and the sustaining circuit 18 outputs Vh
The sustain pulse of (V) is output and the sustain electrodes SUS _{1 to} SU
_Applied to S _N. Further, the write circuit 14 outputs 0
(V) is output and applied to the data electrodes D _{1 to} D _M.
In the sustain period, in the previous discharge cells having generated the address discharge in the write period, the sustain discharge is taking place every time the sustain pulse is applied to the scanning electrodes SCN ₁ ~SCN _N or sustain electrodes SUS ₁ ~SUS _N, the discharge cells Is displayed and emitted.

In the subsequent erasing period, the initialization circuit 17 is in a high impedance state,
(V) is output. At this time, the scanning circuit 15 is in a state of allowing the output of the sustain circuit 16 to pass, and
The output of 6 is directly applied to the scanning electrodes SCN ₁ ~SCN _N. The maintenance circuit 18 is in a high impedance state,
From erase circuit 19 is applied to the erase waveform of Vk (V) which gradually rises is outputted sustain electrodes SUS ₁ ~SUS _N. 0 (V) is output from the writing circuit 14 and applied to the data electrodes D _{1 to} D _M. In the erasing period, a weak erasing discharge is caused in the discharge cell in which the sustain discharge has occurred in the previous sustain period to weaken wall charges and stop the sustain discharge.

As described above, the control circuit 27 for controlling the end voltage of the initialization waveform to a constant value without being affected by the temperature characteristics and the like of the initialization circuit is provided by the constant voltage circuit 23 for outputting the reference voltage. And a voltage comparator 24 for comparing the reference voltage with the voltage of the initialization waveform. The output of the scanning circuit 15 is switched and initialized by a switching signal which is an output signal from the voltage comparator 24. By configuring the end voltage of the waveform to the predetermined voltage 0 (V) and then to Vg (V) immediately, wall charges suitable for the write operation in the write period are reliably formed in the discharge cells. At the same time, it is held until the write operation, so that the voltage of the data pulse can be reduced.

When the driving method of the present embodiment and the conventional driving method are used, data pulse voltages required for driving were compared. From Vc (V) at the front of the initialization waveform to Vd
(V) and the rising slope to the rear
The falling slope from (V) to 0 (V) is 3 V / μs and 1 V / μs, respectively, Vc = 180 V, Vd =
430V, Ve = 180V, Vg = 80V, Vk = 20
The measurement was performed at 0 V and Vh = 180 V. In the case of the present embodiment, that is, when the voltage is set to Vg (V) immediately after reaching the end voltage (0 V) of the initialization waveform, the data applied to the data electrodes D _{1 to} D _M in order to cause a write discharge. The pulse voltage was Va = 65V. On the other hand, in the conventional case, that is, a time (50 μs) in which the end voltage (0 V) of the initialization waveform is continued for a while after the initialization waveform ends.
Is provided, the voltage of the data pulse is Vb = 75V
Met. According to the present embodiment, the voltage of the data pulse can be reduced as compared with the related art, so that the power consumption of the writing circuit can be reduced to 75% of that of the related art, and the driving element of the writing circuit can be used. Since the withstand voltage is reduced, the cost can be reduced.

Next, FIG. 5 shows a block diagram of a panel driving device according to a second embodiment of the present invention. FIG. 5 is FIG.
The difference from the control circuit 27 is that the initialization circuit 17
That is, a control circuit 28 is provided between the control circuit 28 and the scanning circuit 15. In the control circuit 28, a resistor 29 and a diode 30, which are connected in series, and a diode 31 are connected in parallel, and a connection point between the resistor 29 and the diode 30 is connected to a constant voltage circuit 33 via a diode 32. .

The operation of this drive device during the initialization period will be described with reference to the initialization waveform diagram shown in FIG. 6 and FIG. Except for the initialization waveform in FIG. 6, the driving waveform is the same as the driving waveform described with reference to FIG.

In the initialization period shown in FIG.
Is in a high-impedance state, and from the initialization circuit 17, the voltage rises sharply from 0 (V) to Vc (V).
After slowly rising from (V) to Vd (V), V
De falls sharply from d (V) to Ve (V)
A gentle gradient waveform that gradually falls from (V) to 0 (V) is output. The output of the constant voltage circuit 33 is Vref =
Vi (V). During the period when the gentle gradient waveform rises from 0 (V) to Vd (V), the diode 31 in the control circuit 28 conducts, so that the gentle gradient waveform output from the initialization circuit 17 and input to the control circuit 28 remains unchanged. And output from the control circuit 28 to the scanning circuit 15. During the period when the gentle gradient waveform falls from Vd (V) to Vi (V), the diode 3 in the control circuit 28
Since the resistor 29 is set to a resistance value at which the voltage drop at this time can be ignored, the gentle slope waveform output from the initialization circuit 17 and input to the control circuit 28 is controlled as it is. The output from the circuit 28 is applied to the scanning circuit 15. When the gentle gradient waveform output from the initialization circuit 17 becomes equal to or lower than the output Vref (V) of the constant voltage circuit 33, the diode 32 becomes conductive, and the connection point between the resistor 29 and the diode 30 becomes Vre via the diode 32.
f = Vi (V) and the output of the control circuit 28 is also clamped to Vref = Vi (V). Initialization circuit 17
Is zero (V), the output current capability of the constant voltage circuit 33 is set to be larger than Vref / (resistance value of the resistor 29). The output of circuit 28 will continue to be clamped to Vref = Vi (V). Scanning circuit 15 is ready to pass the output of the control circuit 28, the output of the control circuit 28 is directly applied to the scanning electrodes SCN ₁ ~SCN _N.

[0033] Thus, the scanning electrodes SCN ₁ ~SCN _N in the initialization period, after rising from 0 (V) to slowly from Vc (V) up to sharply rise Vc (V) to Vd (V), Vd ( An initializing waveform that sharply falls from V) to Ve (V) and gradually falls from Ve (V) to Vi (V) is applied, and after the initializing waveform ends, Vi that is the end voltage of the initializing waveform is applied. (V) is applied as a voltage capable of retaining wall charges. As described above, the control circuit 28 sets the end voltage of the initialization waveform to the predetermined voltage Vref = Vi.
This is a circuit that can be clamped to (V).

As described above, a weak discharge occurs in the gentle falling slope in the latter half of the initialization waveform, thereby weakening the wall charges formed in each discharge cell. The amount of wall charge remaining in each discharge cell changes depending on the value of the end voltage of the initialization waveform. In the second embodiment, by setting the end voltage of the initialization waveform to Vi (V) higher than 0 (V), the discharge voltage in the discharge cell is reduced as compared with the case where the end voltage of the initialization waveform is 0 (V). The amount of wall charges formed on the substrate is increased. By increasing the wall charge amount in advance in this manner, the scan electrode SCN
Be formed wall charges within the discharge cell is somewhat reduced while the voltage of _{1 ~SCN N} is clamped in the end voltage Vi of the initialization waveform (V), remaining in the discharge cell during write discharge The wall charge amount can be made larger than before. That is, the wall charges can be held in the discharge cells so as to facilitate the writing discharge. As a result, the writing operation can be performed without increasing the voltage of the data pulse applied to the data electrodes D _{1 to} D _M during the writing period.

When the driving method of this embodiment and the conventional driving method were used, data pulse voltages required for driving were compared. Vc (V) to Vd (V) in the first half of the initialization waveform
, And the slope of the falling slope from Ve (V) to Vi (V) in the latter half are 3 respectively.
V / μs, 1 V / μs, Vc = 180 V, Vd = 4
30V, Ve = 180V, Vg = 80V, Vk = 200
V and Vh were measured at 180 V. In the present embodiment, that is, when the voltage of the scanning electrodes SCN ₁ ~SCN _N is clamped to the end voltage Vi = 20V initialization waveform,
The voltage of the data pulse was Va = 55V. On the other hand, in the conventional case, the voltage of the data pulse was Vb = 75V. According to the present embodiment, by setting Vi = 20 V, the voltage of the data pulse can be reduced as compared with the conventional case.
And the withstand voltage of the driving element used in the writing circuit is reduced, so that the cost can be reduced.

Although the control circuit 28 is provided independently of the initialization circuit 17 in the second embodiment, a circuit configuration in which a clamp function is incorporated in the initialization circuit 17 may be employed.

In the first embodiment, the ending voltage of the initialization waveform is 0 (V). However, the ending voltage of the initialization waveform is not 0 (V), as in the second embodiment. Vi
(V), and may be raised to Vg (V) immediately after reaching Vi (V). For example, Vi = 5-20
(V), and immediately after reaching Vi (V), the voltage is increased to Vg (V), whereby the voltage of the data pulse can be reduced. When Vi = 20 V, the voltage of the data pulse becomes Va = 45 V, and the power consumption of the writing circuit can be reduced to 36% of the conventional one.

In the above embodiment, the case where the initialization waveform has a ramp waveform having a gentle slope in each of the first half and the second half has been described. However, the ramp waveform having the gentle slope is obtained by a time constant circuit using CR. The present invention can be applied to a case where the generated waveform is a distorted waveform. If the second half of the initialization waveform has a gentle slope, the first half of the initialization waveform may be a pulse-like waveform that rises sharply. Furthermore, the present invention is applied if the drive waveform in the initialization period has a voltage waveform having a certain polarity and a voltage waveform that gradually changes in a direction opposite to a certain polarity thereafter. The writing period,
When the drive waveform in the sustain period and the erase period is another waveform, for example, the erase waveform may be a narrow pulse.

In the above-described embodiment, the case where the initialization waveform is applied to the scan electrode has been described. However, the present invention can be applied to the case where the initialization waveform is applied to the sustain electrode.

In the above embodiment, the reference voltage is 0
Although the case of (V) has been described, since the operation of the panel depends on the voltage applied between the respective electrodes, the reference voltage need not be 0 (V).

Further, in the above-described embodiment, the case where the subfield includes the initializing period, the writing period, the sustaining period, and the erasing period has been described, but the operation using the erasing waveform is included as part of the operation using the initializing waveform. In this case, the present invention can be applied.

[0042]

As described above, according to the driving apparatus for an AC type plasma display panel of the present invention, a voltage waveform having a certain polarity and a voltage waveform which gradually changes in a direction opposite to a certain polarity can be obtained. An initialization circuit that outputs a gentle gradient waveform having the same, and when applying an initialization waveform based on the gentle gradient waveform to the scan electrode or the sustain electrode, controls the end voltage of the initialization waveform to a predetermined value, and A control circuit that functions to set the voltage of the scan electrode or the sustain electrode to which the initialization waveform has been applied to a voltage that can hold the wall charges formed in the discharge space after the application of the initialization waveform, thereby enabling writing. The voltage of the data pulse applied to the data electrode can be reduced during the period, the withstand voltage of the writing circuit can be reduced, the cost can be reduced, and the power consumption of the writing circuit can be reduced.

According to the driving method of the AC type plasma display panel of the present invention, the voltage waveform having a certain polarity and the certain polarity gradually change in the direction opposite to the polarity, and the predetermined voltage controlled by the control circuit. A voltage waveform set to a voltage that can hold the wall charges formed in the discharge space is applied to the scan electrode or the sustain electrode, following the initialization waveform having a voltage waveform that leads to a voltage of The withstand voltage of the writing circuit is reduced, cost and power consumption can be reduced, and erroneous discharge during the writing operation is suppressed, so that deterioration of display quality can be prevented.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a panel driving device according to a first embodiment of the present invention.

FIG. 2 is an operation timing chart showing a panel driving method according to the first embodiment of the present invention;

FIG. 3 is a partially cutaway perspective view of an AC type plasma display panel.

FIG. 4 is an electrode arrangement diagram of an AC type plasma display panel.

FIG. 5 is a block diagram showing a panel driving device according to a second embodiment of the present invention.

FIG. 6 is a diagram showing an initialization waveform according to the second embodiment of the present invention;

FIG. 7 is an operation timing chart showing a method for driving a conventional AC plasma display panel.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 first substrate 2 scan electrode 3 sustain electrode 4, 7 dielectric layer 5 protective film 6 second substrate 8 data electrode 9 partition 10 phosphor 11 discharge space 12 discharge cell 13 panel 14 write circuit 15 scan circuit 16, 18 Maintaining circuit 17 Initializing circuit 19 Erasing circuit 20 Display signal processing circuit 21 Timing control circuit 22, 26 Voltage level shift circuit 23, 33 Constant voltage circuit 24 Voltage comparator 25 Gate circuit 27, 28 Control circuit 29 Resistance 30, 31, 32 diode

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G09G 3/288 G09G 3/28 H H04N 5/66 101 B (72) Inventor Kenji Ogawa Kadoma, Osaka Pref. 1006 Kadoma, Matsushita Electric Industrial Co., Ltd. GG12 HH02 HH04 JJ02 JJ04 JJ06

Claims (6)

[Claims] 1. A substrate on which a plurality of scan electrodes and sustain electrodes covered with a dielectric layer are arranged, and another substrate on which a plurality of data electrodes are arranged so as to intersect the scan electrodes and the sustain electrodes. Are arranged opposite each other across the discharge space.
An initialization circuit for outputting a voltage waveform having a certain polarity and a voltage waveform having a voltage waveform gradually changing in a direction opposite to the certain polarity; When applying an initialization waveform based on a gradient waveform to the scan electrode or the sustain electrode, the end voltage of the initialization waveform is controlled to a predetermined value, and after the application of the initialization waveform is completed, the The voltage of the scan electrode or the sustain electrode to which the activation waveform is applied,
A driving circuit for an AC plasma display panel, comprising: a control circuit that functions to maintain a voltage capable of holding wall charges formed in the discharge space. 2. The control circuit according to claim 1, further comprising: a constant voltage circuit that outputs the voltage of the predetermined value; and a voltage comparator that compares an output voltage of the initialization circuit with an output voltage of the constant voltage circuit. Item 2. An AC-type plasma display panel driving device according to item 1. 3. The control circuit according to claim 1, wherein the control circuit is a circuit for clamping an end voltage of the initialization waveform to the predetermined value.
3. The driving device for an AC plasma display panel according to claim 1. 4. A substrate on which a plurality of scan electrodes and sustain electrodes covered with a dielectric layer are arranged, and another substrate on which a plurality of data electrodes are arranged so as to intersect the scan electrodes and sustain electrodes. Are arranged opposite each other across the discharge space.
A method of driving a plasma display panel, comprising: a voltage waveform having a certain polarity and a voltage waveform that gradually changes in a direction opposite to the certain polarity to reach a predetermined voltage controlled by a control circuit. A method for driving an AC type plasma display panel, wherein a voltage waveform set to a voltage capable of retaining wall charges formed in the discharge space is applied to the scan electrode or the sustain electrode, following the initialization waveform. 5. The method of driving an AC plasma display panel according to claim 4, wherein the voltage capable of retaining the wall charges is a voltage shifted in the direction of the certain polarity with respect to the predetermined voltage. 6. The method of driving an AC-type plasma display panel according to claim 4, wherein a voltage capable of holding the wall charge is the same as the predetermined voltage.