JP2002016174A - Multi-layer wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce influence of EMI noise together with crosstalk noise in a multi-layer wiring board provided with orthogonally crossing parallel wiring groups. SOLUTION: This multi-layer wiring board is provided with a laminated wiring body composed of a first parallel wiring group L1 formed on a first insulation layer (I3) and turned to an intersection side respectively in respective prescribed division areas, a second parallel wiring group L2 formed on a second insulation layer (I4) laminated on the first insulation layer (I3) and orthogonally crossing the first parallel wiring group L1 respectively in the respective division areas and a through conductor group T for electrically connecting them. The first and second parallel wiring groups L1 and L2 are surrounded by an annular magnetic body layer RM formed at the outer peripheral part of the first and second insulation layers (I3 and I4). Electromagnetic wave noise is absorbed and shielded by the annular magnetic body layer RM and the influence of the EMI noise is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board used for an electronic circuit board or the like, and more particularly to a wiring structure in a multilayer wiring board on which a semiconductor element operating at a high speed is mounted.

[0002]

2. Description of the Related Art Conventionally, in a multilayer wiring board on which a semiconductor element such as a semiconductor integrated circuit element is mounted and which is used for an electronic circuit board or the like, an insulating material made of ceramics such as alumina is used for forming a wiring conductor for internal wiring. Layers and wiring conductors made of a refractory metal such as tungsten (W) are alternately laminated to form a multilayer wiring board.

In a conventional multilayer wiring board, signal wirings of internal wiring wiring conductors usually have a strip wiring structure, and a so-called solid pattern is formed above and below wiring conductors formed as signal wirings via insulating layers. A ground (ground) layer or a power supply layer having a wide area of the shape was formed.

Further, with the increase in the speed of electric signals handled by the multilayer wiring board, a polyimide resin or an epoxy resin having a relatively small relative dielectric constant of 3.5 to 5 instead of an alumina ceramic having a relative dielectric constant of about 10 instead of an insulating layer. And a conductive layer for internal wiring made of copper (Cu) is formed on the insulating layer by using a thin film forming technique such as a vapor deposition method such as a vapor deposition method or a sputtering method. By forming a wiring conductor in a pattern and multiplying the insulating layer and the wiring conductor into layers, a multilayer wiring board having a high density, a high function and a high speed operation of a semiconductor element has been obtained.

On the other hand, the wiring structure of the internal wiring of the multilayer wiring board is designed to reduce ringing noise and reduce crosstalk between signal wirings by matching the impedance of the wirings, and to realize high-density wiring. A structure has been proposed in which a group of parallel wirings is formed on the upper surface of an insulating layer, and this is multi-layered to electrically connect predetermined wirings of the wiring group of each layer via through conductors such as via conductors and through-hole conductors. ing.

In a multilayer wiring board having such parallel wiring groups, an electronic component such as a semiconductor element mounted on the multilayer wiring board is electrically connected to a mounting board on which the multilayer wiring board is mounted. Then, an appropriate wiring is selected from each parallel wiring group in the multilayer wiring board, and the connection between the wirings between different wiring layers is performed via a through conductor such as a via conductor.

[0007] According to such a multilayer wiring board, the number of wiring layers can be reduced as compared with the case where the signal lines are constituted by strip lines, and the signal wirings within the parallel wiring groups and between the parallel wiring groups. The crosstalk between them can be reduced.

[0008]

With the recent increase in speed and density of electronic components, it is a major problem that noise generated inside the multilayer wiring board adversely affects the operation of electronic components and surrounding electronic devices. It is becoming.

The noise generated inside the multilayer wiring board includes, for example, ringing noise caused by impedance mismatch, crosstalk noise caused by electromagnetic coupling with an adjacent signal wiring, and mounting on the multilayer wiring board. Power / ground noise generated during switching of electronic components, EMI (Electr) radiated from wiring inside the multilayer wiring board, power / ground wiring or power / ground plane
o-Magnetic Interference (electromagnetic interference) noise.

In order to reduce the occurrence of such various kinds of noises and the suppression of the influence thereof, various improvements have been proposed for a multilayer wiring board having the above-mentioned parallel wiring group. However, when a frequency band above the GHz band is taken into consideration, high-frequency signals transmitted by the parallel wiring group are not attenuated, and the fabrication is easy and the number of manufacturing steps and manufacturing cost do not increase significantly. There is an increasing demand for a multilayer wiring board having a configuration.

SUMMARY OF THE INVENTION The present invention has been devised to meet the above-mentioned requirements, and has as its object to reduce the crosstalk between wirings in the same layer and between upper and lower layers by forming parallel wiring groups stacked at right angles. It is an object of the present invention to provide a multilayer wiring board suitable for an electronic circuit board or the like on which an electronic component such as a semiconductor element that operates at a high speed can be further reduced while having a wiring structure that allows the influence of EMI noise.

[0012]

A multilayer wiring board according to the present invention is formed on a first insulating layer, and has a center angle of approximately two to four straight lines having an intersection at the center of the first insulating layer. In each of the divided areas divided so as to be equal, a first parallel wiring group heading toward the intersection point side and a second insulating layer laminated on the first insulating layer are formed in each of the divided areas. A second parallel wiring group orthogonal to the first parallel wiring group; and a through-conductor group that electrically connects the first and second parallel wiring groups. The first and second parallel wiring groups are each surrounded by an annular magnetic material layer formed on the outer periphery of the first and second insulating layers.

Further, in the multilayer wiring board of the present invention, in the above structure, the annular magnetic layers formed on the first and second insulating layers are connected to each other by a penetrating magnetic body. Things.

Further, in the multilayer wiring board according to the present invention, in the above-mentioned structure, the distance between the penetrating magnetic bodies is not more than ４ of the wavelength of the high-frequency signal transmitted by the first and second parallel wiring groups. It is characterized by being.

Further, in the multilayer wiring board of the present invention, in each of the above structures, the first and second parallel wiring groups each include a plurality of signal wirings and a power supply wiring or a ground wiring adjacent to each signal wiring. It is characterized by having.

According to the multilayer wiring board of the present invention, the first and second parallel wiring groups are arranged perpendicularly to each other in each of the divided regions, and are vertically stacked and electrically connected by the through conductor group. The cross-talk noise between the wirings of the parallel wiring groups can be reduced and minimized, and the wirings of the parallel wiring group forming the second wiring layer are located at the center of the insulating layer. In this case, a substantially annular wiring structure is formed so as to surround the portion, so that crosstalk noise between the wirings can be reduced, and an effect as a measure against EMI noise can be obtained. In addition, the first and second parallel wirings are provided. Since the group was surrounded by the annular magnetic layers formed on the outer peripheral portions of the first and second insulating layers, respectively, the radiation noise slightly generated from inside the laminated wiring body and the external EM of electromagnetic noise, such as trying to
The I noise can be absorbed by the annular magnetic material layer and effectively reduced.

In the case where the annular magnetic layers formed on the first and second insulating layers are connected to each other by a penetrating magnetic body penetrating the insulating layer, the EMI between the annular magnetic layers may be reduced. Radiation and intrusion of noise can also be effectively reduced.

Further, when the interval between the penetrating magnetic members is set to be equal to or less than a quarter of the wavelength of the high-frequency signal transmitted by the first and second parallel wiring groups, the distance between the annular magnetic member layers is reduced. Radiation and intrusion of EMI noise can be almost eliminated, and the effect of EMI noise can be extremely effectively reduced.

Thus, according to the multilayer circuit board of the present invention, the crosstalk noise between the wirings can be reduced by the laminated wiring body, and the effect of the EMI noise in the first and second parallel wiring groups is also effective. Electronic components such as semiconductor elements that operate at high speed without causing noise, transmission loss of high-frequency signals, and malfunction of electronic parts such as mounted semiconductor elements. It can be operated accurately and stably.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a multilayer wiring board according to the present invention will be described in detail based on an embodiment shown in the accompanying drawings.

One embodiment of a multilayer wiring board according to the present invention is shown in FIGS. 1 to 5 are top views or bottom views of respective insulating layers in an example of a multilayer wiring board according to an embodiment of the present invention. FIG. 1 shows an upper surface of an electronic device such as a semiconductor device such as an integrated circuit device. FIG. 2 is a top view of a second insulating layer thereunder, FIG. 3 is a top view of a third insulating layer below, and FIG. FIG. 5 is a top view of the fourth insulating layer, and FIG. 5 is a bottom view of the fourth insulating layer.

In these figures, I1 to I4 are the first to fourth insulating layers, respectively. In this example, the first insulating layer I1 is the uppermost layer of the multilayer wiring board. The fourth insulating layer I4 is the lowermost layer. M is an upper surface of the first insulating layer I1, that is, a mounting region for a semiconductor element or the like provided at the center of the upper surface of the multilayer wiring board.

C is a line conductor of a strip line portion provided below the mounting area M and on the upper surface of the third insulating layer I3. In this example, the line conductor C on the third insulating layer I3 is formed on the ground conductor layer GL formed on the surface of the second insulating layer I2 and on the surface of the fourth insulating layer I4. A strip line portion is formed by the formed power supply conductor layer PL. Further, the plurality of line conductors C are respectively led out to the mounting area M on the surface of the multilayer wiring board via the through conductor group TC for connection, and are electrically connected to the respective terminal electrodes of the mounted semiconductor elements and the like. In FIG. 1 to FIG. 5, each through conductor including the through conductor group TC for connection is indicated by a circle.

GL is a ground conductor layer formed on the surface of the second insulating layer I2. The ground conductor layer GL enables rearrangement for efficiently electrically connecting a semiconductor element or the like to the first parallel wiring group L1 via the line conductor C, and according to the frequency of a mounted device. By optimizing the area of the grounded conductor layer and stabilizing the supply of potential to semiconductor elements and the like, it has a shielding effect against electromagnetic noise. This ground conductor layer GL is appropriately formed on the upper surface of the second conductor layer I2 in the multilayer wiring board in accordance with the specifications of each line conductor C and each parallel wiring group L1, L2 formed below. By forming such a ground conductor layer GL, it is possible to rearrange the ground wires between the semiconductor element or the like and the first parallel wiring group L1 so that the ground wires can be efficiently connected. Thus, a multilayer wiring board having a good shielding effect can be obtained.

PL is a power supply conductor layer formed on the surface of the fourth insulating layer I4. This power supply conductor layer PL
As in the case of the ground conductor layer GL, the rearrangement for efficiently electrically connecting the power supply wiring from the semiconductor element or the like to the first parallel wiring group L1 is enabled. Like the ground conductor layer GL, the power supply wiring layer PL is appropriately formed according to the specifications of the multilayer wiring board. By forming such a power supply conductor layer PL, the semiconductor element and the first The power supply wiring can be rearranged so as to be efficiently connected to the parallel wiring group L1.

The ground conductor layer GL and the power supply conductor layer P
L may be in the form of a lattice if necessary, or may be used by exchanging the power supply and the ground. Whether each of these layers is set to the ground or the power supply may be appropriately selected according to the specifications of the multilayer wiring board.

Note that the through conductor group TC for connection penetrates through these layers while being electrically insulated from the ground conductor layer GL.

Next, L1 and L2 are first and second parallel wiring groups formed on the upper surfaces of the third and fourth insulating layers I3 and I4, respectively. In this example, the first parallel wiring group L1 is provided on the upper surface of the third insulating layer I3.
The second parallel wiring group L2 is formed on the upper surface of the wiring 4 and is alternately stacked. P1 and P2 are the first
And the power supply wiring in the second parallel wiring group L1, L2, G1
And G2 are the first and second parallel wiring groups L1 respectively.
A ground wiring in L2, S1 and S2 indicate signal wirings in the first and second parallel wiring groups L1 and L2, respectively.

The plurality of signal lines S1 and S2 arranged on the same plane may transmit different signals, respectively, and the plurality of power lines P1 and S1 arranged on the same plane may be used.
P2 may supply different powers.

Further, the connection with the external electric circuit is electrically connected to each of the wirings of the second parallel wiring group L2 or the first parallel wiring group L1 via the through conductor group TP for external connection. A connection conductor such as a solder bump is attached to each of connection lands LP disposed on the lower surface of the fourth insulating layer I4, and these are electrically connected to connection electrodes of an external electric circuit. It is. LPP is a power supply connection land to which the power supply wiring P1 or P2 is connected, and LPG is a ground wiring G1.
Or, a ground connection land to which G2 is connected, and LPS indicates a signal connection land to which the signal wiring S1 or S2 is connected. Further, the ground conductor layer GL, the power supply conductor layer PL, the line conductor C, and the like are also electrically connected to the connection lands LP via the through conductors as necessary.

The first parallel wiring group L1 on the third insulating layer I3 has an intersection in the mounting area M corresponding to the center of the insulating layer I3. In each of the divided areas divided by the straight lines so that the center angles thereof are substantially equal, each of the divided areas is constituted by a group of parallel wirings directed toward the intersection, that is, toward the mounting area M in the center of the insulating layer I3. Here, two straight lines whose intersections are located in the mounting area M along the diagonal line of the substantially square insulating layer I3 have a center angle of about 90.
An example is shown in which four divided areas are set so as to be different degrees.

The second parallel wiring group L2 formed on the fourth insulating layer I4 has a first parallel wiring group in each of the divided regions (indicated by a dashed line in FIG. 4). It is composed of a parallel wiring group orthogonal to the parallel wiring group of L1. Here, in the second parallel wiring group L2, the power supply wiring P2 and the ground wiring G
2 is connected to form a substantially square ring wiring having wiring parallel to each side of the substantially square fourth insulating layer I4.

The first parallel wiring group L1 and the second parallel wiring group L2 are arranged such that the wirings corresponding to the through conductor group T formed on the third insulating layer I3 are located at appropriate positions. They are electrically connected to each other, thereby forming a parallel wiring portion which is a laminated wiring body in which parallel wiring groups orthogonal to each of the divided regions are formed.

In this example, the first and second parallel wiring groups L1 and L2 are connected to the signal wirings S1 and S2 by the power supply wiring P1.
P2 or ground wirings G1 and G2 are arranged adjacent to each other. Thereby, the same insulating layer I3 · I
4 can be electromagnetically cut off between the signal lines S1 and S2, and crosstalk noise between the left and right signal lines S1 and S2 on the same plane can be reduced favorably.

The arrangement of the signal lines S1 and S2 is appropriately set according to the specifications of the multilayer wiring board so that a desired wiring circuit is formed in the parallel wiring groups L1 and L2.

As a modification of this embodiment, a power supply conductor layer PL may be used as a power supply wiring adjacent to a part of the signal wiring S2 of the second parallel wiring group L2. When the multi-layer wiring board of the present invention includes a parallel wiring group and a strip line portion, the multilayer wiring board may be modified as described above.

Further, by always making the power supply wirings P1 and P2 or the ground wirings G1 and G2 adjacent to the signal wirings S1 and S2, crosstalk noise between the signal wirings S1 and S2 can be cut off and effectively reduced. it can. Further, the mutual coupling between the power supply wirings P1 and P2 and the signal wirings S1 and S2 and the ground wirings G1 and G2 and the signal wirings S1 and S2 on the same plane is maximized, and the current path of the signal wirings S1 and S2 can be minimized. . For this reason, the inductance value from the signal wirings S1 and S2 to the power supply wirings P1 and P2 and the ground wirings G1 and G2 can be reduced, and power supply noise and ground noise at the time of device switching can be effectively reduced. .

This is because the first parallel wiring group L1
Below or the second parallel wiring group L2 is further laminated to form a multi-layer structure, these wiring layers also apply.

According to the multilayer wiring board of the present invention, the divided regions are set as described above, and the laminated wiring body in which parallel wiring groups orthogonal to each other are formed in each of the divided regions is provided. The power supply wiring P2 and the ground wiring G2 of the parallel wiring group constituting the second parallel wiring group L2 have a substantially ring-shaped wiring structure so as to surround the center of the fourth insulating layer I4, and are further disposed in a ring shape. By optimizing the power supply wiring P2 and the grounding wiring G2, an effect of shielding EMI noise from the outside and radiation of unnecessary electromagnetic wave noise to the outside is obtained, and crosstalk noise between signal wirings is reduced. In addition to this, it is effective as an EMI measure.

Further, as shown in FIG. 4, when the outermost peripheral annular wiring in the wiring layer is the ground wiring G2, the area of the annular ground wiring G2 is equal to that of the second parallel wiring group L2. By optimizing the connection with the through conductor group and the through conductor group, a more effective shielding effect against EMI noise can be obtained, and effective EMI countermeasures can be taken.

The first parallel wiring group L1 is formed on the third insulating layer I3, that is, in the same plane as the plurality of line conductors C of the strip line portion. Each of the plurality of line conductors C serving as signal wiring is connected to the periphery of the mounting area M in the plane thereof. Further, the second parallel wiring group L2 is formed on the fourth insulating layer I4, and is electrically connected to the first parallel wiring group L1 by the through conductor group T. Thus, each terminal electrode of the semiconductor element mounted on the mounting area M is electrically connected to the first or second parallel wiring group L1 or L2 via the strip line portion.

According to the multi-layer wiring board of the present invention having such a wiring structure, the wiring connected to the input / output electrodes of the semiconductor elements arranged at a very small pitch and extremely high density is connected to the line conductor C in the strip line portion. The wiring pitch (wiring interval) can be expanded, and the signal wiring, power supply wiring, and ground wiring can be rearranged and expanded into wide-width wiring suitable for the parallel wiring group. Electrical connection can be efficiently performed with a semiconductor element having input / output electrodes of high density while utilizing the excellent electrical characteristics of the wiring group. In addition, a plurality of the strip line portions are stacked and provided until all the signal wires are unfolded, and parallel wiring groups corresponding to the strip line portions are provided in parallel.・ Efficient rearrangement of ground wiring, setting of optimal wiring for connection with surrounding parallel wiring group, and development of parallel wiring group enable multi-layering in response to higher density of semiconductor elements In this case, it is possible to optimize the wiring design and reduce the number of layers.

In the multilayer wiring board of the present invention, annular magnetic layers RM are formed on the outer peripheral portions of the third and fourth insulating layers I3 and I4, respectively. The first and second parallel wiring groups L1
・ It surrounds L2.

As a result, the potentials of the power supply wiring and the ground wiring fluctuate due to the simultaneous switching of electronic components such as semiconductor elements mounted on the multilayer wiring board, and the power supply wiring in the first parallel wiring group L1 is changed. EMI (Elec) due to high-frequency current from the electromagnetic coupling between the power supply wiring P1 and the ground wiring G1 at the ends of P1 and the ground wiring G1
tro-Magnetic Interference: Radiation of EMI noise to free space due to the generation of so-called high-frequency current, which is radiation of noise to free space, and the connection between signal wirings S1, S2 and through conductor T. Since the characteristic impedance is discontinuous, the radiation of the electromagnetic wave noise radiated from the connection portion to the free space can be absorbed and shielded by the annular magnetic material layer RM, and also attempts to invade the laminated wiring body from the outside. EMI noise can also be absorbed and shielded, and high-level and stable electrical characteristics of a semiconductor element and the like to be mounted can be maintained and good operation can be performed.

As described above, when the annular magnetic layer RM is formed, the third and fourth insulating layers I3 and L3 surround the first and second parallel wiring groups L1 and L2, respectively. It is preferable that the annular magnetic layer RM is disposed on the outer peripheral portion of I4 so that these annular magnetic layers RM have a large weight in the laminated wiring body. If the outermost peripheral wiring of the second parallel wiring group L2 is a ring-shaped power supply wiring P1, on the other hand, the distance between the first parallel wiring group L1 and the second parallel wiring group L2 is smaller. It is preferable to arrange the annular magnetic material layer RM so as to be located at least twice the outside. Further, it is effective to make the width of the annular magnetic material layer RM as wide as possible. However, if it is made too wide, the multilayer wiring board becomes large, so the third and fourth insulating layers I3・ For external dimensions of I4
The width may be set to 20% or less, preferably 15% or less, so as to obtain a desired EMI noise reduction effect, and usually to be equal to or greater than the width of the wiring conductors of the parallel wiring group. Further, the thickness may be set to be substantially the same as each wiring conductor of the parallel wiring group.

Further, the penetrating magnetic material penetrating through the third insulating layer I3 so as to connect the annular magnetic layers RM formed on the third and fourth insulating layers I3 and I4. A body TM may be provided. Thus, the annular magnetic layer RM
By connecting them with the penetrating magnetic material TM, a pseudo coaxial structure is formed for the first and second parallel wiring groups L1 and L2 located inside the annular magnetic material layer RM, and the laminated wiring body is formed. Radiation of EMI noise from inside and intrusion of EMI noise from outside can be absorbed and shielded even between the annular magnetic layers RM. Furthermore,
By setting the interval between the penetrating magnetic bodies TM to be equal to or less than one-fourth of the signal wavelength of the high-frequency signal transmitted by the signal wirings S1 and S2 in the first and second parallel wiring groups L1 and L2. EMI noise, which greatly affects high-frequency signals, among EMI noises can be reliably prevented from passing between these penetrating magnetic bodies TM.

According to the multilayer wiring board of the present invention having the above-described configuration, it is possible to more effectively prevent radiation of EMI noise from the inside of the multilayer wiring body into free space and penetration of EMI noise from the outside. Can be.

The characteristics of the magnetic material for forming the annular magnetic material layer RM and the penetrating magnetic material TM include the following.
It is preferable that the magnetic material has a saturation magnetic flux density that is not saturated by the magnetic field excited by the first and second parallel wiring groups L1 and L2 by the operation of the semiconductor element and the like mounted on the multilayer wiring board. For example, sendust or ferrite may be used. In addition, the annular magnetic material layer RM and the penetrating magnetic material TM include various magnetic conductor materials and various conductor materials similar to the wiring conductors of the parallel wiring group, or various materials such as ruthenium dioxide, lanthanum bolite, tin oxide, nichrome, and silver palladium. Or the like, and may have desired conductivity and resistance in addition to desired magnetism.

Examples of the method of forming the annular magnetic material layer RM and the penetrating magnetic material TM include a thick film printing method in which a magnetic paste is printed and applied in a predetermined pattern and filled in the through holes, or a magnetic film having a predetermined shape. There is a method of attaching or transferring a body foil, or a method of applying a magnetic film by a sputtering method.

In the multilayer wiring board of the present invention, in addition to the above-described example, the setting of each of the divided regions constituting the parallel wiring portion is performed in the central portions of the third and fourth insulating layers I3 and I4. And two central lines having a point of intersection in the mounting region M corresponding to the two substantially straight lines parallel to the side passing substantially through the center of the sides of the insulating layers I3 and I4, and having a central angle of about 90 degrees. 4 divided areas may be set as described above, and three straight lines may be set so that the central angle is substantially equal to about 60 degrees.
One divided area may be set, and eight divided areas divided by four straight lines so that the central angle is substantially equal to about 45 degrees may be set.

In any of these cases, as in the above-described example, not only between the left and right signal wirings S1 and S2 on the same plane, but also because the upper and lower parallel wiring groups are orthogonal to each other, the crossover between the upper and lower layers is performed. Talk noise can be reduced well,
The current path of the signal lines S1 and S2 can be minimized. Therefore, the inductance value from the signal lines S1 and S2 to the power lines P1 and P2 and the ground lines G1 and G2 can be reduced, and the power supply noise and the ground noise at the time of switching of the device can be effectively reduced. Also,
By providing the ring-shaped magnetic layer RM for the first and second parallel wiring groups L1 and L2, the influence of EMI noise can be reduced, and the power supply of the parallel wiring group constituting the second parallel wiring group L2 can be reduced. When the wiring P2 and the ground wiring G2 have an annular wiring structure surrounding the center of the insulating layer on which they are formed, the power supply wiring P2
By optimizing the ground wiring G2, it is possible to provide an effect of shielding the intrusion of EMI noise from the outside and the emission of unnecessary electromagnetic wave noise to the outside, thereby reducing the crosstalk noise between the signal wirings. In addition to being able to reduce, it is possible to have a more sufficient effect as EMI countermeasures.

In such a multilayer wiring board of the present invention, for example, an MPU (Micro Processing Unit) A
SIC (Application Specific Integrated Circuit)
An electronic component such as a semiconductor device such as a DSP (Digital Signal Processor) is mounted. It is used as a package for storing electronic components such as a package for storing semiconductor devices, a substrate for mounting electronic components, a so-called multi-chip module or multi-chip package on which a large number of semiconductor integrated circuit devices are mounted, or a motherboard. These electronic components are mounted on the surface of the multilayer wiring board by, for example, so-called bump electrodes, or are attached to the mounting portion by an adhesive, a brazing material, or the like, and are connected to the mounting portion by a through conductor or the like via a bonding wire or the like. It is electrically connected to the first or second parallel wiring group L1, L2. In FIGS. 1 to 5, a connection portion with an external electric circuit and a connection portion with an electronic component such as a mounted semiconductor element are not shown.

The through conductor group T, TC, TP here, for example, penetrates the insulating layer I3 and connects the upper and lower wirings, or the wiring and external connection terminals formed on the surface of the semiconductor element or the multilayer wiring board. The connection is made electrically, and usually, a through-hole conductor, a via conductor, or the like is used, and is formed at a location required for connection.

In the multilayer wiring board of the present invention, a multilayer wiring board can be formed by laminating multilayer wiring portions having various wiring structures above and below the laminated wiring body. For example, a wiring structure having a structure in which parallel wiring groups are orthogonally stacked like a multilayer wiring body, a wiring structure having a strip line structure, and other specifications required for a multi-layer wiring substrate such as a microstrip line structure and a coplanar line structure. It can be appropriately selected and used according to the conditions.

Further, for example, an electronic circuit may be formed by laminating a polyimide insulating layer and a conductor layer formed by copper vapor deposition. Further, a package for semiconductor element accommodation may be configured by attaching a chip resistor, a thin film resistor, a coil inductor, a cross capacitor, a chip capacitor, and an electrolytic capacitor.

The shape of each insulating layer is not limited to a substantially square shape as shown, but may be a rectangular shape, a rhombic shape, a polygonal shape, or the like.

Note that the first and second parallel wiring groups L1.
L2 is not limited to that formed on the surface of each insulating layer, and may be formed inside each insulating layer.

In the multilayer wiring board of the present invention, each of the insulating layers including the third and fourth insulating layers I3 and I4 is made of, for example, an aluminum oxide sintered body by a ceramic green sheet laminating method. Using inorganic insulating materials such as aluminum nitride sintered body, silicon carbide sintered body, silicon nitride sintered body, mullite sintered body, glass ceramics, or polyimide, epoxy resin, fluorine resin, polynorbornene・ Using an organic insulating material such as benzocyclobutene or an electric insulating material such as a composite insulating material formed by bonding an inorganic insulating powder such as a ceramic powder with a thermosetting resin such as an epoxy resin. It is formed.

These insulating layers may be formed so as to form a desired multilayer wiring board by a method such as a green sheet laminating method or a build-up method according to the characteristics of each insulating layer. The thickness of these insulating layers is appropriately set according to the characteristics of the material used, and to satisfy conditions such as mechanical strength and electrical characteristics corresponding to required specifications and ease of forming a through conductor group. Is done.

The first and second parallel wiring groups L1 and L2,
Other wiring layers and through conductor groups T, TC, TP, etc. are made of metal powder metallization such as tungsten, molybdenum, molybdenum-manganese, copper, silver, silver-palladium, or copper, silver, nickel, chromium, titanium, gold.・
It is composed of a thin film of a metal material such as niobium or an alloy thereof.

These wiring conductors and through conductors are formed by forming a metal layer by a thick film printing method, for example, by a sputtering method, a vacuum evaporation method, or a plating method according to the characteristics of the respective materials and the method of forming the insulating layer. It is formed in a predetermined pattern shape and size by a lithography method, and is provided on each insulating layer.

The width of each wiring and the distance between the wirings of the first and second parallel wiring groups L1 and L2 are determined according to the characteristics of the material to be used. It is set as appropriate so as to satisfy conditions such as ease of disposition in the device.

The thickness of each of the parallel wiring groups L1 and L2 is 1
It is preferably about 20 μm. This thickness is 1 μm
When the value is less than the above, the resistance of the wiring increases, and it tends to be difficult to provide a good power supply to the semiconductor element by the wiring group, secure a stable ground, and propagate a good signal.
On the other hand, if it exceeds 20 μm, the insulation layer laminated thereon may be insufficiently covered, resulting in poor insulation.

Each of the through conductors of the through conductor group T, TC, and TP and the penetrating magnetic body TM may have a cross section of a circle, an ellipse, a rectangle such as a square or a rectangle, or any other shape. You may. The position and size are appropriately set according to the characteristics of the material to be used so as to satisfy conditions such as electrical characteristics corresponding to required specifications and easiness of formation and arrangement on the insulating layer.

For example, when glass ceramics is used for the insulating layer and a conductor material mainly composed of copper is used for the parallel wiring group, the thickness of the insulating layer is 100 μm, the line width of the wiring is 100 μm, and the distance between the wirings is 100 μm. Is 100 μm and the diameter of the through conductor is 10
By setting the thickness to 0 μm, the impedance of the signal wiring is set to 50Ω, and the connection between the upper and lower parallel wiring groups can be performed while suppressing the reflection of the high-frequency signal.

It should be noted that the present invention is not limited to the above-described embodiments, and that various changes can be made without departing from the scope of the present invention. For example, in the above-described embodiment, the present invention has been described as a multilayer wiring board on which a semiconductor element is mounted. However, the present invention may be applied to a semiconductor element housing package for housing a semiconductor element or a multi-chip module. In addition, as an insulating layer, aluminum nitride sintered body considering heat dissipation
A silicon carbide based sintered body or a glass ceramic based sintered body in consideration of a low dielectric constant may be used.

[0067]

According to the multi-layer circuit board of the present invention, the first and second parallel wiring groups are vertically arranged in each of the divided regions, stacked vertically, and electrically connected by the through conductor group. Since the multilayer wiring body is provided, the crosstalk noise between the wirings of the respective parallel wiring groups can be reduced and minimized, and the wiring of the parallel wiring group forming the second wiring layer is formed of an insulating layer. Has a substantially annular wiring structure so as to surround the central portion of the semiconductor device, so that crosstalk noise between the wirings can be reduced, and it is effective as a measure against EMI noise. Since the parallel wiring group is surrounded by the annular magnetic layer formed on the outer periphery of the first and second insulating layers, respectively, the radiation noise slightly generated from inside the laminated wiring body and the external noise E of the electromagnetic wave noise and the like to the input and try
The MI noise can be absorbed by the annular magnetic layer and effectively reduced.

In the case where the annular magnetic layers formed on the first and second insulating layers are connected to each other by a penetrating magnetic body formed by penetrating the insulating layer, the EMI between the annular magnetic layers may be reduced. The radiation and intrusion of noise can also be effectively reduced, and the distance between the penetrating magnetic bodies is set to ４ or less of the wavelength of the high-frequency signal transmitted by the first and second parallel wiring groups. When the spacing is set to, radiation and intrusion of EMI noise from the annular magnetic material layer can be substantially eliminated, and the effect of EMI noise can be extremely effectively reduced.

As described above, according to the present invention, it is possible to further reduce the EMI noise while having a wiring structure constituted by a group of parallel wirings stacked perpendicularly and reducing crosstalk between wirings in the same layer and between upper and lower layers. Thus, a multilayer wiring board suitable for an electronic circuit board or the like on which electronic components such as a semiconductor element operating at a high speed can be mounted can be reduced.

[Brief description of the drawings]

FIG. 1 is a top view of a first insulating layer, showing an example of an embodiment of a multilayer wiring board of the present invention.

FIG. 2 is a top view of a second insulating layer, showing an example of the embodiment of the multilayer wiring board of the present invention.

FIG. 3 is a top view of a third insulating layer, showing an example of the embodiment of the multilayer wiring board of the present invention.

FIG. 4 is a top view of a fourth insulating layer, showing an example of the embodiment of the multilayer wiring board of the present invention.

FIG. 5 is a bottom view of a fourth insulating layer, showing an example of the embodiment of the multilayer wiring board of the present invention.

[Explanation of symbols]

 I1 to I4... First to fourth insulating layers L1, L2... First and second parallel wiring groups P1, P2. G1, G2: first and second ground wirings S1, S2: first and fourth signal wirings T: through conductor group RM: Annular magnetic material layer TM

Claims (4)

[Claims] 1. A method according to claim 1, wherein each of the first and second insulating layers is formed by dividing two to four straight lines having an intersection at the center of the first insulating layer so that the center angles are substantially equal. A second parallel wiring group that is formed on a first parallel wiring group heading toward the intersection and a second insulating layer laminated on the first insulating layer and that is orthogonal to the first parallel wiring group in each of the divided regions. And a through-hole conductor group for electrically connecting the first and second parallel wiring groups. The first and second parallel wiring groups are respectively A multilayer wiring board, which is surrounded by an annular magnetic layer formed on the outer periphery of the first and second insulating layers. 2. The multilayer wiring board according to claim 1, wherein the annular magnetic layers formed on the first and second insulating layers are connected to each other by a penetrating magnetic body. 3. The multilayer according to claim 2, wherein a distance between the penetrating magnetic bodies is equal to or less than a quarter of a wavelength of a high-frequency signal transmitted by the first and second parallel wiring groups. Wiring board. 4. The first and second parallel wiring groups each have a plurality of signal wirings and a power supply wiring or a ground wiring adjacent to each signal wiring.
The multilayer wiring board as described in the above.