JP2001077542A - Multilayer wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multiplayer wiring board which can reduce cross talk noises between wires in a group of parallel wires stacked alternately and suitable for electronic circuit board, where electronic components, such as a semiconductor element or the like operating at high speed, etc., are mounted, a package, or the like with countermeasures against EMI noise being applied without deteriorating the electric characteristics. SOLUTION: This multiplayer wiring board possesses a stacked wiring body, constituted by stacking a second insulating layer 12 which has a second parallel wring group L2 including a signal wring S2, orthogonal to a first parallel wring group L1, on the first insulating layer I1, having a first parallel wring group L1 which includes a signal wiring S1, and electrically connecting the first and second parallel wring groups L1 and L2 by means of a group of through-conductors, and also which is constituted by staking a third insulating layer 13 having ground conductor layer GL opposed to the parallel wiring group L2 hereon, and additionally in which relative permittivity εr 2 between the ground conductor layer GL and the second parallel wring group L2 is made smaller than relative permittivity εr 1 between the first and second parallel wiring group L1 and L2. A countermeasure against EMI noise is made possible, without causing mismatching in the impedance of the signal wring.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board used for an electronic circuit board or the like, and more particularly to a wiring structure in a multilayer wiring board on which a semiconductor element operating at a high speed is mounted.

[0002]

2. Description of the Related Art Conventionally, in a multilayer wiring board on which a semiconductor element such as a semiconductor integrated circuit element is mounted and which is used for an electronic circuit board or the like, an insulating material made of ceramics such as alumina is used for forming a wiring conductor for internal wiring. Layers and wiring conductors made of a refractory metal such as tungsten (W) are alternately stacked to form a multilayer wiring board.

In a conventional multilayer wiring board, signal wirings of internal wiring wiring conductors usually have a strip line structure, and a so-called solid pattern is formed above and below wiring conductors formed as signal wirings via insulating layers. A ground (ground) layer or a power supply layer having a wide area of the shape was formed.

Further, with the increase in the speed of electric signals handled by the multilayer wiring board, the insulating layer is replaced with alumina ceramics having a relative dielectric constant of about 10, and a polyimide resin or epoxy resin having a relatively small relative dielectric constant of 3.5 to 5 is used. And a conductive layer for internal wiring made of copper (Cu) is formed on the insulating layer by using a thin film forming technique such as a vapor deposition method such as a vapor deposition method or a sputtering method. By forming a wiring conductor in a pattern and multiplying the insulating layer and the wiring conductor into layers, a multilayer wiring board having a high density, a high function and a high speed operation of a semiconductor element has been obtained.

On the other hand, the wiring structure of the internal wiring of the multilayer wiring board is designed to reduce the impedance of the wiring, reduce the crosstalk between signal wirings, etc. A structure has been proposed in which a group of parallel wirings is formed, which is multi-layered, and predetermined wirings in the wiring group of each layer are electrically connected to each other via through conductors such as via conductors and through-hole conductors.

In a multilayer wiring board having such parallel wiring groups, an electronic component such as a semiconductor element mounted on the multilayer wiring board is electrically connected to a mounting board on which the multilayer wiring board is mounted. Then, an appropriate wiring is selected from each parallel wiring group in the multilayer wiring board, and the connection between the wirings between different wiring layers is performed via a through conductor such as a via conductor.

[0007]

However, this conventional multilayer wiring board having a parallel wiring group has also been subject to EM due to the increase in the frequency of electronic components such as semiconductor elements to be mounted.
I (electromagnetic interference) noise has become a problem. This EMI noise means that unnecessary electromagnetic waves are radiated from various electronic devices, and these electromagnetic waves enter the electronic circuit of the electronic device or the electronic circuits of other electronic devices in the vicinity, thereby causing electromagnetic interference. It affects the electronic circuit as noise, and causes the electronic device to malfunction.

As measures against the EMI noise, measures at the following three levels are usually considered. First, at the system level of an electronic device or the like, there is a measure to block electromagnetic waves by a method such as coating a radio wave absorber on the inside of a housing constituting the electronic device. Second, at a board level where an electronic circuit is configured, there is a measure to use an EMI countermeasure component such as an EMI filter and a capacitor in the electronic circuit. Third, at the package level such as a multilayer wiring board or a package on which electronic components such as semiconductor elements are mounted or housed, measures to shield EMI noise by covering an internal wiring layer with a wide area ground conductor layer called a solid pattern. There is.

Particularly, in recent years, MPU (Microprocessing Un
The frequency of semiconductor integrated circuits typified by it) has been increasing, and semiconductor devices operating at several GHz have been realized. On the other hand, with higher frequencies and higher densities of semiconductor devices, EM
There is concern about an increase in I noise. This is because in a digital device such as an MPU, a signal having a rise of several GHz contains harmonic components several to several tens of times the fundamental frequency, and one of the main causes of EMI noise is This is because this harmonic component is radiated as an electromagnetic wave.

As a countermeasure for preventing the emission of such harmonic components, it is conceivable to completely cover the upper and lower portions of the wiring layer with a solid pattern and a large-area ground conductor layer for shielding.

However, in the conventional multilayer wiring board composed of the stacked parallel wiring groups as described above, the wiring direction of the wiring layer is composed of the so-called X direction and the Y direction which are orthogonal to each other. Since there is no ground conductor layer, there has been a problem that EMI countermeasures have not been taken at the package level. Therefore, unnecessary electromagnetic wave noise from peripheral electronic devices may enter and cause malfunctions of semiconductor elements or the like, or unnecessary electromagnetic wave noise may be radiated from wiring to adversely affect peripheral electronic devices or the like. There was a problem.

When a large-area ground conductor layer is arranged above and below the parallel wiring group as a measure against EMI noise, a signal wiring opposed to the ground conductor layer via an insulating layer is connected between the ground conductor layer and the ground conductor layer. Since the signal wiring has a capacitance component, the impedance of the signal wiring arranged in consideration of the impedance matching between the signal wirings (for example, 50Ω) becomes smaller than an expected value, and is opposed to the ground conductor layer. Mismatch of impedance occurs between the signal wiring and the signal wiring of another wiring layer, which causes noise, transmission loss of a high-frequency signal, and malfunction of electronic components such as mounted semiconductor elements. There was a problem.

The present invention has been devised in view of the above problems, and has as its object to reduce crosstalk noise between wirings in a group of alternately stacked parallel wirings and to degrade electrical characteristics. An object of the present invention is to provide a multilayer wiring board suitable for an electronic circuit board or a package on which electronic components such as a semiconductor element operating at a high speed are mounted without taking measures against EMI noise.

[0014]

According to the present invention, there is provided a multilayer wiring board comprising: a first wiring layer including a first parallel wiring group including a signal wiring; And a laminated wiring body formed by laminating a second insulating layer having a second parallel wiring group including: and electrically connecting the first and second parallel wiring groups with a through conductor group. A third insulating layer having a ground conductor layer facing the parallel wiring group is laminated on and / or below the laminated wiring body, and the ground conductor layer and the first and / or second
The relative dielectric constant between the first and second parallel wiring groups is smaller than that between the first and second parallel wiring groups.

Further, in the multilayer wiring board according to the present invention, the relative permittivity between the ground conductor layer and the first and / or second parallel wiring group is set to the first and second parallel wiring groups.
The relative dielectric constant between the parallel wiring groups is 0.2 to 0.9 times.

Further, in the multilayer wiring board according to the present invention, in each of the above structures, the first and second parallel wiring groups each include a plurality of signal wirings and a power supply wiring or a ground wiring adjacent to each signal wiring. It is characterized by having.

According to the multilayer wiring board of the present invention, the parallel wiring groups including the signal wirings are arranged orthogonally to each other and are connected to each other by the through conductor groups, and face the parallel wiring groups above and / or below the laminated wiring body. A third insulating layer having a ground conductor layer is laminated, and the ground conductor layer and the first and / or opposing first and / or third conductor layers are opposed to each other.
Alternatively, since the relative dielectric constant between the first parallel wiring group and the second parallel wiring group is made smaller than the relative dielectric constant between the first and second parallel wiring groups, the first parallel wiring group and the second parallel wiring group in the stacked wiring body are formed. Since the wiring groups are orthogonal to each other, crosstalk noise between the parallel wiring groups can be reduced and minimized. Further, since the signal wiring in the parallel wiring group does not have an extra capacitance component between the signal wiring and the ground conductor layer, the impedance mismatch of the signal wiring does not occur. Further, since the ground conductor layer is laminated so as to face and cover the parallel wiring group,
It can function as a ground conductor layer having a sufficient shielding effect against noise.

Further, when the relative dielectric constant between the ground conductor layer and the first and / or second parallel wiring groups is 0.2 to 0.9 times the relative dielectric constant between the first and second parallel wiring groups. In
The adverse effects caused by the generation of a capacitance component in the signal wiring can be suppressed to the extent that there is no practical problem, and the impedance mismatch with the signal wiring can be suppressed to a range that does not adversely affect the transmission characteristics of the high-frequency signal. In addition, it is possible to prevent the unnecessary increase in the size of the multilayer wiring board while improving the shielding effect of the EMI noise by the ground conductor layer, and to cope with high integration and high density.

Thus, according to the multilayer wiring board of the present invention, the crosstalk noise between the wirings can be reduced by the laminated wiring body, and grounding is performed at a predetermined position via an insulating layer having a predetermined relative permittivity. By arranging the conductor layer, measures against EMI noise can be taken without deteriorating electric characteristics, and electronic components such as semiconductor elements operating at high speed can be operated accurately and stably without malfunction.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a multilayer wiring board according to the present invention will be described in detail based on an embodiment shown in the accompanying drawings.

FIG. 1 is an exploded plan view showing an example of an embodiment of a multilayer wiring body according to the multilayer wiring board of the present invention. FIG. 1A shows a first insulating layer, and FIG. Of the insulating layer,
(C) is a plan view of the ground conductor layer (third insulating layer). FIG. 2 is a cross-sectional view of a principal part corresponding to the line AA 'of FIG. 1, showing an example of an embodiment of a multilayer wiring board of the present invention including a laminated wiring body obtained by laminating them.

In these figures, I1 to I3 are first to third insulating layers, respectively, and L1 and L2 are disposed substantially parallel to the upper surfaces of the first and second insulating layers I1 and I2, respectively. The first and second parallel wiring groups, GL, in this example, are ground conductor layers disposed on the second parallel wiring group L2 via the third insulating layer I3. Note that the first parallel wiring group L1 and the second parallel wiring group L2 are electrically connected at predetermined locations by a through conductor group (not shown) to form a multilayer circuit. These constitute a multilayer wiring body according to the multilayer wiring board of the present invention. I4 is a fourth insulating layer laminated on the ground conductor layer GL and serving as a surface layer of the multilayer wiring board.

P1 and P2 are power supply wirings in the first and second parallel wiring groups L1 and L2, respectively, G1 and G2 are ground wirings in the first and second parallel wiring groups L1 and L2, respectively.
S2 indicates a signal wiring in the first and second parallel wiring groups L1 and L2, respectively.

The plurality of signal lines S1 and S2 arranged on the same plane may transmit different signals, respectively, and the plurality of power lines P1 and S1 arranged on the same plane may be used.
It goes without saying that P2 may supply different powers.

Such a multilayer wiring board has, for example, an MPU (Micro Processing Unit) / ASIC on its surface.
(Application Specific Integrated Circuit) DS
An electronic component such as a semiconductor element such as a P (Digital Signal Processor) is mounted. These electronic components are mounted on the surface of the multilayer wiring board by, for example, so-called bump electrodes, or are attached to the mounting portion by an adhesive, a brazing material, or the like, and are connected to the ground conductor layer GL via bonding wires or the like. Is electrically connected to, for example, the second parallel wiring group L2 by an electrically insulated through conductor or the like. A connection portion with an external electric circuit and a connection portion with an electronic component such as a semiconductor element to be mounted are not shown.

In this example, the fourth layer serving as the surface layer of the multilayer wiring board is used.
The insulating layer I4 is formed as needed. For example, when the ground conductor layer GL is provided in the third insulating layer I3, the insulating layer I4 is not necessarily formed.

In this example, the first and second parallel wiring groups L1 and L2 are connected to the signal wirings S1 and S2 by the power supply wirings P1 and P2.
2 or ground wirings G1 and G2 are arranged adjacent to each other. Thus, the signal wirings S1 and S2 on the same insulating layer I1 and I2 are electromagnetically cut off, and crosstalk noise between the left and right signal wirings S1 and S2 on the same plane can be reduced favorably. Further, the signal wiring S1
・ Be sure to connect power supply lines P1 and P2 or ground lines G1
By making G2 adjacent to each other, the power supply wiring P1
The interaction between P2 and the signal lines S1 and S2 and between the ground lines G1 and G2 and the signal lines S1 and S2 are maximized, and the inductance of the power lines P1 and P2 and the ground lines G1 and G2 can be reduced. Due to this reduction in inductance, power supply noise and ground noise can be effectively reduced.

The through conductor group penetrates through the insulating layers I1 and I2 and electrically connects the upper and lower wirings or the wiring to external connection terminals and the like attached to the surface of the semiconductor element or the multilayer wiring board. Usually, a through-hole conductor, a via conductor, or the like is used, and is formed at a location required for connection.

In the multilayer wiring body of the multilayer wiring board of the present invention, the first parallel wiring group L1 including the signal wiring S1 is the first parallel wiring group L1.
And a second parallel wiring group L2 including the same signal wiring S2 stacked thereon is disposed substantially parallel to a second direction orthogonal to the first direction. These wirings are electrically connected by a group of through conductors penetrating the second insulating layer I2 to form a laminated wiring body.

According to such a laminated wiring body, since the first parallel wiring group L1 and the second parallel wiring group L2 are stacked so as to be orthogonal to each other, the parallel wiring groups L1 and L
Crosstalk noise between the two wirings can be reduced to a minimum.

On this laminated wiring body, a ground conductor layer GL facing the second parallel wiring group L2 is laminated on the third insulating layer I3. The ground insulating layer GL may be arranged below the laminated wiring body or may be arranged vertically according to the specification of the multilayer wiring board.

According to the multilayer wiring board of the present invention,
As shown in FIG. 2, the ground conductor layer GL and the relative dielectric constant epsilon _r 1 between the relative dielectric constant epsilon _r 2 of the first and second parallel wiring group L1 · L2 between the second parallel wiring group L2 Smaller (ε _r 2
<Ε _r 1). In this example, the third insulating layer I3 located between the ground conductor layer GL and the second parallel wiring group L2
Is made smaller than the relative dielectric constant of the second insulating layer I2 located between the first and second parallel wiring groups L1 and L2, so that the relative dielectric constant between the respective parallel wiring groups can be reduced. Is set as follows. As a result, unnecessary coupling between the ground conductor layer GL and the signal wiring S2 of the second parallel wiring group L2, in particular, is established between the first and second parallel wiring groups L1 and L2 located above and below in the same laminate. It can be reduced to the same degree as the coupling, the signal wiring S2 can be suppressed from having an extra capacitance component, and the occurrence of impedance mismatching of the signal wiring S2 can be sufficiently reduced.

In the multilayer wiring board of the present invention, the relative permittivity ε _r 2 between the ground conductor layer GL and the first and / or second parallel wiring groups L1 and L2 is thus set to the first and second parallel wiring groups. The relative permittivity between L1 and L2 is smaller than ε _r 1 (ε _r
When 2 <ε _r 1), the relative permittivity ε _r 2 becomes the relative permittivity ε _r
The ratio is preferably within a range of 0.2 to 0.9 times, more preferably within a range of 0.5 to 0.8 times 1. By setting in this way, it is possible to maintain the shape of the substrate with high accuracy after the formation process such as firing even when the material composition is changed in order to change the relative dielectric constant, while having the above-mentioned effects. You can do it.

It should be noted that the relative permittivity ε _r 2 is smaller than the relative permittivity ε _r 1.
If it exceeds 0.9 times, there is a tendency that the above effects cannot be sufficiently obtained. The specific the dielectric constant epsilon _r 2 is 0.2 times less than the relative dielectric constant epsilon _r 1, for example, tends to the composition of the material can not be formed as a multilayer wiring board for a very different.

For example, the first and second insulating layers I1.I
The same dielectric material having a relative dielectric constant of about 10 is used for 2 and the dielectric material having a relative dielectric constant of about 4 is used for the third insulating layer I3. The wiring width is 100 μm, the wiring thickness is 15 μm, and the space between the wirings. When the thickness of each of the insulating layers I1 to I3 is 150 μm,
EMI noise, which is a problem in terms of high-frequency electrical characteristics, does not enter the laminated wiring body or radiate from the laminated wiring body, and can function as a ground conductor layer having a sufficient shielding effect against EMI noise. The characteristic impedance Z ₀ of the signal wiring S2 of the second parallel wiring group L2 facing the ground conductor layer GL can be reduced.
It can be matched with the characteristic impedance Z ₀ of the first signal wiring S1.

It should be noted that the above-described configuration is applicable to the case where a ground conductor layer is laminated below the first parallel wiring group L1 in FIG. 2 or the same parallel wiring as the wiring layer below the first parallel wiring group L1. In the case where a ground conductor layer is stacked below the group by using a group, the present invention can also be applied to these.

In the multilayer wiring board of the present invention, a multilayer wiring board having various wiring structures can be laminated on and under the laminated wiring body on the side not facing the ground conductor layer. For example, a wiring structure having a structure in which parallel wiring groups are orthogonally stacked like a multilayer wiring body, a wiring structure having a strip line structure, and other specifications required for a multi-layer wiring substrate such as a microstrip line structure and a coplanar line structure. It can be appropriately selected and used according to the conditions.

For example, an electronic circuit may be formed by laminating a polyimide insulating layer and a conductor layer formed by copper deposition. Further, a package for semiconductor element accommodation may be configured by attaching a chip resistor, a thin film resistor, a coil inductor, a cross capacitor, a chip capacitor, and an electrolytic capacitor.

The shape of each of the insulating layers including the first to third insulating layers I1 to I3 is not limited to a substantially square shape as shown, but may be a rectangular shape, a rhombic shape, a polygonal shape. It may be a shape such as a shape.

The first and second parallel wiring groups L1.
L2 is not limited to those formed on the surfaces of the first and second insulating layers I1 and I2, and may be formed inside the respective insulating layers I1 and I2.

In the case where the ground conductor layer 3 is formed inside the third insulating layer I3 with respect to the example shown in FIG.
Is not necessarily required. Further, the ground conductor layer GL may be formed on the surface of the third insulating layer I3 so as to be exposed on the surface of the multilayer wiring board.

In the multilayer wiring board of the present invention, each of the first to third insulating layers I1 to I3 and the fourth insulating layer I4 is made of, for example, an aluminum oxide sintered body by a ceramic green sheet laminating method. Using inorganic insulating materials such as aluminum nitride sintered body, silicon carbide sintered body, silicon nitride sintered body, mullite sintered body, glass ceramics, or polyimide, epoxy resin, fluorine resin, polynorbornene・ Using an organic insulating material such as benzocyclobutene or an electric insulating material such as a composite insulating material obtained by combining an inorganic insulating powder such as a ceramic powder with a thermosetting resin such as an epoxy resin. It is formed.

When these insulating layers are made of, for example, an aluminum oxide sintered body, a suitable organic binder, a solvent, etc. are added to a raw material powder of aluminum oxide, silicon oxide, calcium oxide, magnesium oxide, etc. and mixed. A ceramic green sheet was obtained by forming the sheet into a sheet shape by employing a well-known doctor blade method, and thereafter, the ceramic green sheet was subjected to an appropriate punching process and each parallel wiring was formed. The group and each through conductor group and the metal paste to be the conductor layer are printed and applied in a predetermined pattern and laminated vertically,
Finally, the laminate is manufactured by firing at a temperature of about 1600 ° C. in a reducing atmosphere.

The thickness of these insulating layers is determined in accordance with the characteristics of the material to be used so as to satisfy the conditions such as mechanical strength and electrical characteristics corresponding to the required specifications and the ease of forming the through conductor group. It is set appropriately.

The first and second parallel wiring groups L1.
L2 and other wiring layers, ground conductor layers GL, through conductor groups, and the like are made of metal powder metallized, for example, tungsten, molybdenum, molybdenum-manganese, copper, silver, silver-palladium, or copper, silver, nickel, chromium, and titanium. -It is composed of a thin film of a metal material such as gold, niobium, or an alloy thereof.

For example, in the case of metallization of metal powder of tungsten, a metal paste obtained by adding and mixing an appropriate organic binder and a solvent to the tungsten powder is printed in a predetermined pattern on a ceramic green sheet to be an insulating layer. This is applied and baked together with the laminate of ceramic green sheets to be disposed on the upper surface of each insulating layer.

In the case of a thin film of a metal material, a metal layer is formed by, for example, a sputtering method, a vacuum evaporation method, or a plating method, and then a predetermined wiring pattern is formed by a photolithography method. First and second
The width of each wiring of the parallel wiring groups L1 and L2 and the distance between the wirings are determined according to the characteristics of the material to be used by the electrical characteristics corresponding to the required specifications and the ease of disposition on the insulating layers I1 and I2. It is set appropriately so as to satisfy conditions such as

The thickness of each of the parallel wiring groups L1 and L2 and the ground conductor layer GL is preferably about 1 to 20 μm.
If the thickness is less than 1 μm, the resistance of the wiring increases, and it tends to be difficult to supply a good power supply to the semiconductor element, secure a stable ground, and propagate a good signal to the semiconductor element by the wiring group. On the other hand, if it exceeds 20 μm, the insulation layer laminated thereon may be insufficiently covered, resulting in poor insulation.

Each of the through conductors in the through conductor group may have a rectangular cross section such as an elliptical shape, a square or a rectangular shape in addition to a circular cross sectional shape.
Other irregular shapes may be used. The position and size are appropriately set according to the characteristics of the material to be used, so as to satisfy conditions such as electrical characteristics corresponding to required specifications and easiness of formation and arrangement on the insulating layer.

For example, if the aluminum oxide sintered body is used for the insulating layer and the metallization of tungsten is used for the parallel wiring group, the thickness of the insulating layer is set to 200 μm.
By setting the wiring width to 100 μm, the spacing between the wirings to 150 μm, and the size of the through conductor to 100 μm, the impedance of the signal wiring is reduced to 50Ω, and the reflection of high-frequency signals between the upper and lower parallel wiring groups is suppressed. It is possible to make electrical connection.

It should be noted that the present invention is not limited to the above-described embodiments, and that various changes may be made without departing from the spirit of the present invention. For example, in the above embodiment, the present invention has been described as a multilayer wiring board on which a semiconductor element is mounted. However, the present invention may be applied to a semiconductor element housing package for housing a semiconductor element. Alternatively, an aluminum nitride-based sintered body / silicon carbide-based sintered body considering heat dissipation or a glass-ceramic-based sintered body considering low dielectric constant may be used.

[0052]

According to the multilayer wiring board of the present invention, parallel wiring groups including signal wirings are arranged orthogonally to each other and connected by a through conductor group to form a parallel wiring group above and / or below a laminated wiring body. A third insulating layer having a large-area ground conductor layer opposed to the third insulation layer is laminated, and the relative dielectric constant between the ground conductor layer and the first and / or second parallel wiring group facing the third conductor layer is set to a first dielectric constant And the relative permittivity between the first parallel wiring group and the second parallel wiring group in the stacked wiring body.
Since the parallel wiring groups are orthogonal to each other, the crosstalk noise between the parallel wiring groups can be reduced and minimized, and the signal wiring in the parallel wiring group is located between the parallel wiring group and the ground conductor layer. Because there is no extra capacity component,
Since no mismatching of the impedance of the signal wiring occurs and the ground conductor layer is laminated so as to face and cover the parallel wiring group,
It can function as a ground conductor layer having a sufficient shielding effect against MI noise.

Further, when the relative dielectric constant between the ground conductor layer and the first and / or second parallel wiring group is set to 0.2 to 0.9 times the relative dielectric constant between the first and second parallel wiring groups. Is to reduce the adverse effect of the generation of the capacitance component on the signal wiring to the extent that there is no practical problem, and to suppress the impedance mismatch with the signal wiring to a range that does not adversely affect the transmission characteristics of the high-frequency signal. In addition, it is possible to prevent the unnecessary increase in the size of the multilayer wiring board while improving the shielding effect of EMI noise by the ground conductor layer, and to cope with high integration and high density.

As described above, according to the present invention, the crosstalk noise between the wirings can be reduced by the parallel wiring groups alternately stacked in the multilayer wiring body, and the specific dielectric constant can be set at a predetermined position. EMI noise can be prevented without deteriorating the electrical characteristics by arranging the ground conductor layer through the insulating layer with high efficiency, and accurate and stable without malfunctioning electronic components such as semiconductor devices that operate at high speed. Thus, a multilayer wiring board suitable for an electronic circuit board, a package for accommodating a semiconductor element, and the like, which can be operated in a short time, can be provided.

[Brief description of the drawings]

FIGS. 1 (a) to 1 (c) each show a first insulating layer, a second insulating layer, and a ground conductor layer (first embodiment) showing an example of an embodiment of a multilayer wiring body according to a multilayer wiring board of the present invention. FIG. 3 is a plan view of a third insulating layer).

FIG. 2 is a cross-sectional view of a principal part corresponding to the line AA ′ of FIG. 1, showing an example of an embodiment of the multilayer wiring board of the present invention including the multilayer wiring body shown in FIG.

[Explanation of symbols]

... Insulating layer L1, L2... Parallel wiring group P1, P2... Power supply wiring G1, G2... Ground wiring S1, S2... Signal wiring GL. ····· Ground conductor layer ε _r 1 ······ Relative permittivity between first and second insulation layers ε _r 2 ········ Between ground conductor layer and second insulation layer Relative permittivity

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5E321 AA17 BB25 GG09 5E338 AA03 CC01 CC04 CC05 CD01 EE13 5E346 AA12 BB01 BB11 CC04 CC08 CC16 CC21 CC32 CC35 CC36 CC37 CC38 CC39 EE29 GG24 HH03 HH07

Claims (3)

[Claims] 1. A second parallel wiring group including a signal wiring and having a second parallel wiring group orthogonal to the first parallel wiring group on a first insulating layer having a first parallel wiring group including a signal wiring. And a stacked wiring body in which the first and second parallel wiring groups are electrically connected by a through conductor group, and the parallel wiring body is provided above and / or below the stacked wiring body. A third insulating layer having a ground conductor layer facing the wiring group, and a relative dielectric constant between the ground conductor layer and the first and / or second parallel wiring group being set to the first dielectric layer; And a dielectric constant smaller than the relative permittivity between the second parallel wiring group. 2. The dielectric constant between the ground conductor layer and the first and / or second parallel wiring group is set to 0.2 to less than the relative dielectric constant between the first and second parallel wiring groups. 2. The multilayer wiring board according to claim 1, wherein the ratio is set to 0.9 times. 3. The first and second parallel wiring groups each include a plurality of signal wirings and a power supply wiring or a ground wiring adjacent to each signal wiring.
Or the multilayer wiring board according to claim 2.