JP2001523429A - Signal conditioning circuit with ADC / DAC combined sensor system and method - Google Patents

Abstract

(57) Abstract An electronically calibrated sensor 100 includes a sensing element 102 having an output coupled to a signal conditioning circuit 104. The signal conditioning circuit 104 is operable with high computational efficiency to compensate for temperature and inter-partial variations on the sensing element output and provides a usable sensor output signal. The signal adjustment circuit 104 includes an analog-digital / digital-analog (ADC / DAC) converter 112. The ADC / DAC 112 can perform both analog-to-digital conversion of an analog input signal and digital-to-analog conversion of a digital output signal. The ADC / DAC 112 further provides an analog signal to the input signal adjustment circuits 104 and 106.

Description

DETAILED DESCRIPTION OF THE INVENTION Signal conditioning circuit with ADC / DAC combined sensor system and method thereof                                Field of the invention   The present invention relates generally to sensors and circuit configurations for conditioning sensor signals, and Or analog-digital converter / digital-analog converter (ADC / DAC) The present invention relates to a signal conditioning circuit for a sensor having a coupling device.                                Background of the Invention   The world uses sensor devices that detect physical phenomena and provide signals in response to those phenomena. Overflowing. For example, a thermometer provides a visual signal of the physical condition temperature. To the height of the mercury column. Another example of a temperature sensing device is to send a physical condition temperature. There are thermocouples that convert to air signals. To use sensor signals, you need to You must be able to understand and respond. For example, a thermometer on a glass column Is marked with a line to indicate the degree of temperature. Of course, for this line to be meaningful Must be in the correct position on the glass column and the process of placing the lines correctly Calibrate (Calibration). During calibration, the sensor is exposed to known physical conditions or conditions. Place and observe the reaction. Observing the response of the sensor to known conditions Thus, the response of the sensor with respect to a wide range of conditions can be predicted.   A pressure sensor is a device that provides a signal representing pressure, for example, the air pressure in a tire. is there. Like other types of sensors, calibration is required to make use of the pressure sensor. Endurance Certain types of pressure sensors, known as pressure sensors, generate a voltage signal representing pressure. . Pressure-resistant sensors have several problems in applications. For example, withstand voltage sensing element Generates a relatively low level voltage signal. The withstand voltage detection element is sensitive to temperature changes. It can produce a signal that does not change linearly with pressure changes. further In addition, the signal voltage characteristics between the sensing elements are not consistent. Therefore, a wide range of operating temperatures and pressures Special for sensor products that provide sufficiently accurate high level sensor output in A simple signal adjustment circuit is required. This device is low cost and has high reproducibility between parts. It is important to be able to mass-produce.   Many low-cost signal conditioning methods use analog circuitry that is conditioned during the calibration process. adopt. For example, it is known to use an amplifier circuit coupled to a resistor network. You. In one such application, a resistor network is connected to a plurality of fusible links. Are included. There is a limit to the degree of adjustment that can be made, but a reasonable Various to provide power The resistance value is set. In another application, the resistor network has laser-trimmable resistor elements. I can. During the calibration process, the resistive element is trimmed using a laser and the amplifier network To achieve the correct resistance value to provide the proper output from. For any use Melt links and / or laser trim components This requires access to the circuit during processing. For this reason, Options are limited. For some applications, sensitivity and linearity are separately compensated. It will be difficult to compensate. In addition, processing operations following the calibration allow the final product Errors that cannot be corrected. Also, the laser trimming process Requires expensive processing hardware and increases cycle time.   An alternative design allows for electronic calibration of the sensing element. Electronic calibration sensors Coupled to the sensor element via the appropriate signal conditioning circuitry, holding the calibration method A microprocessor coupled to the memory. During processing, various sensing elements Under known operating conditions. Calibration values are set and stored in memory. in action The microprocessor operates with the method and calibration values to provide the sensor output. You. In another implementation, a digital signal processor (DSP) is used. Perform the necessary calculations on the digital value of the sensor element output using r).   Systems implemented using digital technology are generally 1) Front-end analog signal adjustment, 2) Analog-digital conversion, 3) Data Digital processing, 4) digital-analog conversion, and 5) back-end analog signal Signal output drive. Front-end adjustments are digitally programmed Often configured by ramming gain and offset functions, In some cases, the offset signal is provided by some form of digital-to-analog converter (DAC). It is usually generated. Signal conditioning circuit also includes some form of disturbance variable compensation In that case, the disturbance variable signal is also front-end adjusted and digitized.   Sensor signal conditioning circuit includes at least two analog-to-digital converters (ADCs) May be needed. One is to digitize the output of the sensing element. One is for digitizing a disturbance variable signal. Detector output and To adjust the front end signal of the disturbance variable, the DAC device adjusts the appropriate control signal. Must be provided to the rectifier circuit. It also analyzes the digitized and modified sensor output. It needs to be converted back to a log. Therefore, the signal conditioning circuit consists of two ADCs and three You may need one DAC. These devices are implemented in integrated circuits Die area is intensive, but this is especially true for ADC and DAC Directly to the physical dimensions of the matching components to be built (capacitors, resistors, transistors, etc.) Because it is related to. Some analog-digital and digital-analog Perform the operation Due to the large amount of die area required to perform Digital technology has been hampered.   A typical continuous approximation implementation of an ADC includes at least one DAC. analog -Requires digital and digital-to-analog conversion (A / D and D / A, respectively) If so, it is known that the DAC can be reused in the ADC device. Examples of this architecture include analog signal conditioning or circuit calibration for A / D and D / A. Cannot be realized. In addition, some D / A outputs and Many as required in sensor signal conditioning circuits with several A / D outputs A circuit that requires A / D and D / A conversion operations cannot be executed.   Therefore, the digital signal processing is used to effectively utilize the ADC and DAC devices. Electronically calibrated sensing devices still minimize the number of devices in the conditioning circuit is necessary. The sensing device is preferably a signal processing circuit that performs digital calibration of the sensor. Path and its analog input adjustment circuit. Basically, the hardware is more There is a need for an accurate technique to be used effectively.                             BRIEF DESCRIPTION OF THE FIGURES   FIG. 1 shows a signal conditioning circuit according to a preferred embodiment of the present invention. It is a block diagram showing a sensor system provided.   FIG. 2 is a block diagram of an ADC / DAC device according to a preferred embodiment of the present invention.   FIG. 3 is a timing chart showing the operation of the circuit of FIG.   FIG. 4 is a block diagram of an ADC / DAC device according to another preferred embodiment of the present invention. .   FIG. 5 is a block diagram of an ADC / DAC device according to another embodiment of the present invention.   FIG. 6 is a circuit diagram of an ADC / DAC device according to a preferred embodiment of the present invention.   FIG. 7 is a timing chart further illustrating the operation of the ADC / DAC device of the present invention.   FIG. 8 shows a test system used to calibrate a sensor in a preferred manner. FIG.   FIG. 9 is a flowchart illustrating a preferred method of calibrating the sensor.                          Detailed Description of the Preferred Embodiment   In a sensor that is electronically calibrated, a sensing element is coupled to a calibration circuit. Provides an intelligent device output signal. The calibration circuit is computationally efficient and provides a usable sensor output. Compensation for temperature fluctuation of output of sensing element to provide force signal, fluctuation between parts, Linearization and scaling can be performed. The calibration method includes substantial components Efficient ADC / DAC device for product reuse. Calibration circuit and ADC / DAC device However, it goes without saying that it is applicable to all kinds of sensors.   Referring to FIG. 1, sensor 100 is coupled to signal conditioning circuit 104, where A sensing element 102 for providing a pressure sensor signal 101 is provided. Signal conditioning circuit 10 4 is preferably constructed as a single-chip integrated circuit and includes a preconditioning circuit for the pressure signal. 106, temperature signal preliminary adjustment circuit 108, multiplexer 110, analog Digital / digital-analog converter (ADC / DAC) 112, electronically erasable writable Read only memory (EEPROM: electronically erasable programmable read only)  memory) 114, control memory register 116, polynomial calculator 118, input / output Force (I / O) controller 120, output filter 122, and output driver 124 Is provided. Circuit 104 provides an output that is appropriately coupled to the above circuit elements known in the art. And an oscillator 126 coupled to the clock generator 128 having Further In addition, as will be appreciated by those skilled in the art, depending on the acoustic design, the circuit 104 may include overvoltage protection, Additional operating voltage generator, power on / reset function and test logic (not shown) Have.   Sensing element 102 is preferably well known in the art for generating a pressure indicating signal. A piezoresistive sensor formed as part of a semiconductor die, as in sing element) It is. In a preferred implementation, sensing element 102 is formed as a discrete element. , May be coupled to the signal conditioning circuit 104 (as shown in FIG. 1). Alternatively, it may be integrally formed as a part of the processing circuit chip. Sensing element 10 2 further provides a temperature signal 103. In an alternative preferred embodiment, the temperature Another temperature sensing device is provided to provide the signal. Output from sensing element 102 The signals 101 and 103 are relatively low-level signals, and generally change with temperature. Variable and varies substantially between parts. Output signals 101 and 103 of the sensing element 102 Also includes certain non-linear characteristics. Therefore, the output signal of the sensing element 102 is Operated by the signal adjustment circuit 104 to perform temperature compensation in the usable voltage range. Provide a substantially linear signal.   More specifically, the pressure and temperature output signals 101 and 103 of the sensing element 102 are , Respectively, coupled to pressure and temperature preconditioning circuitry 106, 108, respectively. The filtering, amplification, and offset are applied to the output signal of the detection element 102. Forecast The conditioned pressure and temperature signals are then selected via multiplexer 110 To the ADC / DAC 112. The ADC / DAC 112 And provide a digital pressure signal and a digital temperature signal, respectively.   The digital pressure signal and the digital temperature signal from the ADC / DAC 112 are transferred to the bus 13. 0 through register 116 and It is coupled to a term equation calculator 118. The EEPROM 114 has a data storage part. Sa More specifically, polynomial calculator 118 is used in providing compensated pressure sensor signals. Storage for a plurality of calibration data. Output signal of polynomial calculator 118 Is coupled to ADC / DAC 112 via bus 130, where the digital output signal is regenerated. And converted to an analog output signal. The analog output signal is obtained by using the filter 122. The signal is filtered, amplified, and output by the output driver 124. I / O controller 120 provides external access to the sensor 100 using a minimum number of pins 132 Thus, access and operation capability such as writing to the EEPROM 114 are provided.   The preferred structure of the ADC / DAC 112 will be described, and the detection element signal adjustment circuit shown in FIG. The operation of the road 200 will be described in detail with reference to the embodiment. The signal conditioning circuit 200 , ADC / DAC 112, digitally compensated analog input circuit or A log signal adjustment circuit 202, a digital signal processing circuit 204, and an analog output driver. And a memory device 208 having an output bus 231. No. Compared to the elements shown in FIG. 1, the circuit element 202 is the preconditioning element 106 or It is considered similar to the pre-adjustment element 108. Similarly, circuit element 206 has an output Similar to the filter 122 and the output driver 124, the circuit 204 includes a polynomial calculator 1 18, and the circuit element 208 can be considered similar to the memory 114. .   The digitally compensated analog input or signal conditioning circuit 202 is essentially a , Analog signal input terminal 217, compensation signal sample / hold circuit 210, driver The amplifier includes an inverter circuit 214, an adder circuit 218, and an output terminal 219. The compensation signal is periodically provided by the ADC / DAC 112 in the form of an analog offset signal. Analog / parameter control input terminal 221 Is communicated via The offset signal is supplied to the driver circuit via the addition circuit 218. 214 input and offset corrected analog as is well known in the art. Input signal. The analog offset value is determined during the sensor 100 calibration process. It is determined. Memory 208 stores the digital offset value during the calibration process. Data structure. A digital audio signal provided via output bus 231 The offset value is converted to an analog offset value signal by the ADC / DAC 112. And an analog offset value suitable for use by the driver circuit 214. rear ADC / DAC 112 periodically obtains a digital offset value as described in And converts the digital offset value to an analog offset value signal, It communicates with the analog input circuit 202 via the analog control input terminal 221. off Operation parameters other than the set can also be stored in the data structure of the memory 208. Can be converted and sent to modify the operation of the analog input circuit 202. You. Other parameters Include gain, linearity, temperature or other compensation parameters.   An output of the analog input circuit 202, that is, an analog signal is output through an output terminal 219. Then, it is communicated to the ADC / DAC 112. The ADC / DAC 112 inputs analog signals digitally. Convert to force value or digital continuous approximation data. The digital input value is To the digital circuit or DSP 204, which operates on digital input values. And provide a digital output value that depends on it. Digital output value is ADC / DAC Returned to 112, ADC / DAC 112 converts digital output value to analog output value To work. Thereby, the analog output signal is output to the analog output circuit 206. Will be communicated to.   Continuing to refer to FIG. 2, ADC / DAC 112 includes a comparator 222 and a continuous approximation resistor. (SAR: successful approximation register) 224, multiplexer 226 , A digital-to-analog converter (DAC) 228 and a demultiplexer 230 Be prepared. ADC / DAC 112 is a digital control operatively coupled to comparator 222 Element 232, continuous approximation register 224, multiplexer 226, digital-analog A log converter (DAC) 228 and a demultiplexer 230; The ADC / DAC 112 is appropriately controlled in several operation modes. Digital control element The child 232 is controllable, and is controlled on the control bus 201 through the I / O control device 120. Data.   In the first operation mode, the ADC / DAC 112 operates as an analog-to-digital converter. Works. That is, the multiplexer 226 and the demultiplexer 230 , SAR 224 is coupled to the input of DAC 228. The first input terminal of the comparator 222 is coupled to the output terminal 219 of the analog input circuit 202 The second input terminal of the comparator 222 is connected to the analog output terminal 227 of the DAC 228. Be combined. The comparator 222 also has an output terminal 233. In this structure, The comparator 222, the SAR 224, and the DAC 228 are standard continuous approximation type analog- Operates as a digital conversion device. Control element 232 is provided at output terminal 219. This structure is maintained until the conversion of the signal to be performed is successful. As is well known in the art, SA If the output digital value from R224 is converted to an analog signal, the comparator 222 Conversion is considered successful if the value is close enough to the analog input signal determined by . The digital word output of the SAR 224 representing the analog input is connected to the input of the DSP 204. Are combined.   The output digital value from DSP 204 is communicated to multiplexer 226 and 112 is constructed for the second output mode of operation. That is, multiple Lexer 226 is configured to couple the output of DSP 204 to DAC 228. Demar A multiplexer 230 couples the output of DAC 228 to analog output circuit 206. Be built. DAC 228 converts the digital output value to an analog output value, To the analog output circuit 206, more specifically, its sample / hold circuit 212. Be combined.   In the third operation mode of the ADC / DAC 112, the multiplexer 226 stores the memory The output of 208 is constructed to couple to DAC 228. Demultiplexer 230 Outputs the output of the DAC 228 to the analog input circuit 202. And is configured to couple to the Digital input of analog input device 202 The offset value is read from the memory 208. The digital offset value is , Is converted to an analog input offset signal. Analog input offset signal It is communicated to the sample / hold circuit 210 and held therein. Behavior of circuit 200 During the operation, it is necessary to periodically update the analog input offset. ADC / DAC112 Is the available processing time, i.e. the ADC / DAC converts the input signal from analog to digital Signal update process without conversion or digital-to-analog conversion of output signal Has the advantage of taking advantage of the time between running. FIG. 3 shows the ADC / DAC 112 1 shows an example of a timing structure 300.   Referring to FIG. 3, during the total circuit cycle 302, the above three operation modes occur. This. Clock cycle or other suitable timing unit is shown at 304 Is done. A digital to analog conversion of the input offset signal occurs at 306 and the output Digital-to-analog conversion of the signal occurs at 310. Each of these actions is essentially Analog from digital values Is a direct conversion to an analog value and requires approximately the same number of processing cycles. Then enter Analog-to-digital conversion of the signal occurs at 312. Analog to digital input signal Following the digital conversion 312, the cycle is a digital-to-analog conversion of the input offset signal. Repeated at 306. In a preferred implementation of the sensor 100, the pressure and There are two analog inputs corresponding to temperature and temperature. For this reason, needless to say Requires two analog offset signals and two input analog-to-digital conversions And the timing is modified appropriately.   From the above description, it can be seen that the ADC / DAC 112 is advantageously and efficiently utilized to provide the necessary analog A minimum amount of circuits for each of the digital-to-digital conversion operation and the digital-to-analog conversion operation Perform with configuration. A multiplexer 226 is provided between the SAR 224 and the DAC 228, 8 and the comparator 222 add a demultiplexer 230 to Other typical SAR ADC devices can be advantageously reused for operation. And For example, the digital inputs to multiplexer 226 may be adjusted and combined, and demultiplexed. By adjusting and combining the analog output through the mixer 230, a plurality of digital An analog conversion operation can be performed. Referring to FIG. Alternate preferred structural circuit 200 'has multiple inputs, i.e., multiple analog-digital Constructed and shown for the transform operation.   Referring to FIG. 4, a circuit 200 'includes a sensing element signal adjustment. AD shown to receive multiple analog inputs from circuits 202a-202n A C / DAC 112 'is provided. ADC / DAC 112 'is basically the same as ADC / DAC 112 However, there are significant changes for processing multiple signals. Same as circuit 200 Are given the same reference numbers. Each of the circuits 202a to 202n has a plurality of Receive analog input signals from multiple analog signal sources, such as To be combined. For example, in the sensor 100, the first signal is temperature, and the second signal is pressure. Has two sensor signal inputs. In addition, a copy coupled to the ADC / DAC 112 '. Output signal circuits 206a, 206b. . . 206n is also shown. In addition, the circuit The output signal from each of 202a-202n is passed through multiplexer 234 to a previous In the analog-to-digital conversion mode described above, the analog / digital conversion is performed using the ADC / DAC 112 '. Performs digital-to-digital conversion. The operation of the ADC / DAC 112 'is also controlled by the digital control element 232. The elements 232 each perform an analog-to-digital conversion. , The ADC / DAC 112 'is constructed to communicate the resulting digital value to the DSP 204. The digital output value from DSP 204 passes through multiplexer 226 and DAC 228. And converted back to an analog signal. Next, the analog output signal is demultiplexed. Communication is via 230 to individual output signal circuits 206a-206n. Also AD Analog offset from C / DAC 112 'to circuits 202a-202n as described above. Further to provide a signal Can be built.   Referring now to FIG. 5, another embodiment 200 "of the circuit 200 is illustrated. In these cases, the same reference numerals are used to indicate the same elements as those of the circuit 200. No. As shown in FIG. 5, the ADC / DAC 112 ″ outputs the SAR 224 to the input of the DAC 228. The SAR 224 is repositioned and reconstructed to be directly coupled to the force. Also, The multiplexer 226 "receives the output from the comparator 222 and further basically Serial-to-digital data controller 238 Are reconfigured to receive serial digital data from them. All others In this respect, the ADC / DAC 112 ″ is the same as the ADC / DAC 112. For the Tal transform operation, the output of comparator 222 is passed through multiplexer 226 ". Coupled to SAR 224. Successful digital conversion of analog signals, again DSP 204 is coupled to the input. Digital output value of DSP 204 and memory 208 Digital values are coupled via serial digital data controller 238 Is done. The serial digital data controller 238 communicates with the DSP 204 and the The parallel digital data is received from the memory 208 and the serial digital data is received. Data stream to multiplexer 226 ". "Couples the serial digital data to the SAR 224.   Referring to FIG. 6, a more detailed circuit diagram of the ADC / DAC 112 will be described. 600 is shown. In a preferred implementation, circuit 600 is operatively coupled. Input capacitor array 602, reference capacitor array 604, comparator 6 06 and an output amplifier 608. For simplicity of drawing, it is a single-ended configuration However, it is needless to say that the difference execution example may be preferable depending on the application. not. Further, the correction circuit 600 of the difference method is described in FIG. 6 and the following description. More well within the skill of the art. The circuit 600 has multiple auto zeros / samples. A switch (auto-zero / sample switches) 614 and an effective output switch 616 , A digital-analog control switch 618, and an interface for controlling the operation of the circuit 600. A digital-to-digital control switch 620. Also described below 6, the input capacitor array 602 is shown as a single capacitor in FIG. But it is actually a capacitor array. Input capacitor array 602 Is preferably a complementary array of the reference capacitor array 604, but the value is doubled. It is.   A preferred implementation of circuit 600 is with an automatic zero / sample switch 614 and a valid output. The various elements forming the circuit 600 with the force switch 616, in particular the comparator An offset error between the output amplifier 606 and the output amplifier 608 is canceled. Timing diagram of FIG. The preferred operation of the circuit 600 illustrated in FIG. Automatic zero / sample switch 61 closed before analog-to-digital conversion operation 4 And an active output switch 616 that is open. Digital-analog operations and Automatic Zero / Sample Switch 614 During Any of the Analog-Digital Operations Is opened, and the effective output switch 616 is closed. Still referring to FIG. During the analog-to-digital conversion, the analog-to-digital control switch 620 is closed. Then, the digital-analog control switch 618 is opened. Similarly, digital-A During analog conversion, the analog-to-digital control switch 620 is opened and the digital The analog control switch 618 is closed.   With the above in mind, and referring again to FIG. 6, during the analog-to-digital conversion operation, The input analog values are read and stored in input capacitor array 602. A continuous approximation calculation is performed under the control of the SAR-D / A control 610 and the input capacitor array Charge develops on a reference capacitor array 604 that is as large as 602. This As is well known in the art, when the magnitude of the charge on each array is equal, the successive approximation operation terminates. Complete. The digital value corresponding to the analog input signal is read from the SAR-D / A control 610. And communicated via bus 612 to operations that require digital values. Say However, an effective control method is incorporated in the SAR-D / A control 610 to minimize the conversion time. To maximize the conversion accuracy.   In the digital-to-analog conversion mode, digital values are transmitted via bus 612. Received and reference capacitor array 604 is read. This array is a binary weighted capacitor array Work. The charge on the reference capacitor array 604 is 02. Capacitor array 602 is connected across output amplifier 608. Built as a return capacitor, forming a switching capacitor gain stage.   The error in the analog-to-digital conversion is determined by the reference capacitor array 604 and the input capacitor. It is a function of the alignment of the pasita array 602. The error of the digital-analog conversion is The feedback capacitor, i.e., the reference capacitor Function for ray 604. During the digital-analog conversion operation, the feedback function The use of an input capacitor array minimizes gain errors. More self A dynamic zero function operates to minimize offset errors. Thus, the circuit 6 00 is an efficient and configurable analog-to-digital and digital-to-analog conversion Needless to say, it is realized with a minimum error. Next, the sensor 100 is calibrated. The preferred method is described in detail.   The method of calibrating the sensor 100 is described in the structural mechanism of the sensor described above and in FIG. Depends on the test system used.   FIG. 8 shows a test system used to calibrate a sensor in a preferred manner. FIG. 9 is a flowchart illustrating a preferred method of calibrating the sensor. Both FIG. 8 and FIG. 9 are referenced in the following description.   Here, a method for calibrating the temperature performance of the sensor will be described in detail. Explained The method determines the offset, sensitivity, and sensitivity of the sensor for both temperature and pressure performance. Those skilled in the art will readily understand that the linearity and linearity can be calibrated.   First, in step 901, the sensor 100 is placed in the environmental chamber 803. You. The operation of the environmental chamber 803 is controlled by the test apparatus 801 via the signal 809 And be monitored. Sensor controlled by test equipment 801 via signal 807 And be monitored. During this calibration example, the pressure in the environmental chamber is kept constant .   Next, in step 903, the sensor 100 is exposed to a first physical condition; If so, it is the first temperature.   Next, in step 905, the analog output terminal of the digital-analog converter 228 The signal 227 is connected to the analog signal adjusting circuit 202 via the demultiplexer 230. Digitally coupled to the meter control input terminal 221 and stored in the memory device 208 The first digital correction value of the correction values is stored in memory device 208 from multiplexer 2. 26, through a digital-to-analog converter 228, an analog signal adjustment circuit. It is sent to the parameter control input terminal 221 of the path 202. Returning temporarily to Fig. 4, , Memory device 208 includes a digital modification associated with each of circuits 202a-202n. Constructed to hold values.   Returning to FIG. 9, in step 907, the digital-analog The analog output terminal 227 of the analog-to-digital converter 228 The output port 229 of the SAR 224 is coupled to the second input terminal 225 of the comparator 222. , Is coupled to the DAC 228 via the multiplexer 226 to continuously connect the ADC / DAC 112. Constructed as an approximate analog-to-digital converter. Analog signal adjustment circuit 202 Is dependent on the first digital correction value by the ADC / DAC 112 It is converted to a first digital output signal. The first digital output signal is the DSP 204 or Is used by any of the test apparatuses 801, which will be described later.   Next, in step 909, the environment chamber 803 is controlled under the control of the test apparatus 801. On the other hand, a command to expose the sensor 101 to the second physical condition, in this case, the second temperature, is given. It is.   Next, in step 911, the analog output terminal of the digital-to-analog converter 228 The child 227 is connected to the second input terminal 22 of the comparator 222 through the demultiplexer 230. 5 and provided from the analog signal adjustment circuit 202 to the ADC / DAC 11 2 is converted to a second digital output signal dependent on the first digital correction value.   In step 913, the first digital output signal and the second digital output signal are: Under the control of the test apparatus 801 by the test apparatus 801 or the DSP 204, the digital Analyzed via signal 807 passed on control bus 201 to control element 232, A second digital correction value is provided accordingly. This second digital correction value is stored in the memory 208. Second digital correction value is derived Then permanently trim or calibrate the analog signal conditioning circuit 202 be able to.   Next, at step 915, the analog output terminal of the digital-to-analog converter 228 The child 227 is connected to the analog signal adjustment circuit 202 via the demultiplexer 230. It is coupled to a parameter control input terminal 221. Next, the digital correction value 2 The digital correction value is passed from the memory device 208 through the digital-to-analog converter 228. Then, the signal is sent to the parameter control input terminal 221 of the analog signal adjustment circuit 202. The analog signal conditioning circuit 202 is now calibrated and the sensing element signal is displayed in its digital representation. This circuit is actually used for proper conversion.   In step 917, the analog output terminal 2 of the digital-to-analog converter 228 27 is connected to the second input terminal 225 of the comparator 222 using the demultiplexer 230. ADC / DAC 112 is again a continuous approximation type analog-to-digital converter. It is built. The signal provided from the analog signal adjustment circuit 202 is ADC / DAC1 12 is converted to a third digital output signal dependent on the second digital correction value. . When the third digital output signal becomes available, it is converted by DSP 204 to the fourth digital output signal. It can be processed into a temperature-compensated digital signal. Next, the DSP 204 Coupled to a digital-to-analog converter 228 via a multiplexer 226, The analog output terminal 227 of the digital-analog converter 228 is a demultiplexer Coupled to the analog output circuit 206 via 230. In this structure, ADC / DAC 112 is set as a DAC, and outputs the fourth digital signal to the analog output terminal 203. To a calibrated (and calibrated) sensor signal. This signal is Output terminal 203, but coupled to pin 132, so that the adjusted sensor The signal can be provided outside the package of the sensor.   The invention has been described with reference to a preferred embodiment of an electronically calibrated pressure-resistant sensor. Sa More specifically, the sensor of the present invention is needed in a preferred implementation of sensor 100. Do many analog-to-digital and digital-to-analog conversions In addition, a unique configurable analog-digital / digital converter that minimizes circuit elements It is disclosed with a analog-to-analog converter. The invention relates to multiple analog-digital And other data acquisition systems that require digital-to-analog conversion operations Easily adapted. The disclosed structure adapts the described flexible architecture Calibration method. In this way, hardware efficient and accurate sensors ・ Production of the system becomes possible.

────────────────────────────────────────────────── ─── Continuation of front page    (72) Inventor Luger, Timothy             Austin, Texas, United States             Goodeed Drive 5025 (72) Inventor Zarnocki, Walter             Hoffman S., Illinois, United States             Tates, Elliott Drive 5256

Claims (1)

[Claims]   1. An output terminal for providing a signal; and an input terminal for controlling parameters of the signal. An amplifier having:   A first input terminal coupled to the output terminal of the amplifier for receiving the signal; A comparator having two input terminals and an output terminal;   A continuous approximation device operatively coupled to said output terminal of said comparator, A continuous approximation device having an output bus for providing digital continuous approximation data;   A memory device having another output bus for providing digital parameter data; and   A digital-to-analog converter having an analog output terminal, -When an analog converter is coupled to the output bus of the continuous approximation device, A analog output terminal coupled to the second input terminal of the comparator; The analog converter is coupled to the another output bus of the memory device when the analog converter is coupled to the analog output bus. A log output terminal is coupled to the input terminal controlling the parameter of the signal Digital-to-analog converter;   A signal adjustment circuit characterized by comprising:   2. The digital continuous approximation data provided by the continuous approximation device is 2. The circuit according to claim 1, wherein the circuit depends on the signal output by the band. Road.   3. Having a sensor output signal operatively coupled to a signal input terminal of the amplifier; A digital continuous approximation provided by the continuous approximation device. Data depends on the sensor output signal and the digital parameter data 3. The circuit of claim 2, further comprising a sensor.   4. A signal conditioning circuit for the sensor, comprising:   A sensing element having a sensor output signal;   A signal input terminal coupled to receive the sensor output signal, and an output terminal; A sensing element signal conditioning circuit having an analog control input terminal;   A memory having a data structure including a first digital correction value;   A signal processing circuit; and   Analog signal input terminal, digital signal input port, analog signal output terminal Analog-digital / digital-analog having a digital signal output port An analog-to-digital / digital-to-analog conversion circuit. Conversion (ADC / DAC) circuit:   An analog signal is input from the detection element signal signal adjustment circuit output to the analog signal input. Via a terminal, and the digital representation is sent to the digital signal output port. To provide;   Receiving a digital signal from the signal processing circuit and converting the analog representation to the analog signal; Signal output terminal. And; and   Receiving the first digital correction value from the memory and relying on the analog control Providing a control signal to the sensing element signal conditioning circuit analog control input terminal;   The analog-to-digital / digital-to-analog conversion (AD C / DAC) circuit;   A signal adjustment circuit characterized by comprising:   5. The analog-to-digital / digital-to-analog conversion (ADC / DAC) circuit includes:   Digital-to-analog conversion coupled between multiplexer and demultiplexer An output of the demultiplexer is coupled to a first input of a comparator. A second input of the comparator is coupled to the sensing element signal conditioning circuit output terminal; An output coupled to an input of a continuous approximation register circuit; Digital-to-analog conversion in which the output of the converter circuit is coupled to the input of the multiplexer vessel;   5. The circuit according to claim 4, wherein the circuit comprises:   6. The analog-to-digital / digital-to-analog conversion (ADC / DAC) circuit includes:   An input capacitor array coupled to the analog signal input terminal; A reference capacitor array coupled to an approximation register circuit, wherein the input capacitor is Each of the capacitor array and the reference capacitor array is connected to the comparator. An input capacitor array having an output coupled to the second input and a reference capacitor; Pasita array;   6. The circuit according to claim 5, wherein the circuit comprises:   7. The memory is coupled to another input of the multiplexer. The circuit according to claim 5.   8. The analog-to-digital / digital-to-analog conversion (ADC / DAC) circuit includes:   A matrix coupled between the second input of the comparator and the sensing element signal conditioning circuit. A multiplexer, further coupled to at least one other sensing element signal conditioning circuit. Multiplexer to be combined;   The circuit of claim 5, further comprising:   9. The data structure of the memory being the at least one other sensing element signal modulation; Having another digital correction value for the control of the analog-to-digital A digital-to-analog conversion (ADC / DAC) circuit from the memory to the other digital Receiving a positive value and reducing the analog control signal based on the another digital correction value to the lesser value. And further adapted to provide to a control input of one other sensing element signal conditioning circuit. 9. The circuit according to claim 8, wherein:   10. The analog-digital / digital-analog conversion (ADC / DAC) circuit :   Digital-to-analog coupled between continuous approximation register and demultiplexer A converter having an output of the demultiplexer coupled to an input of a comparator, A comparator has a second input coupled to the output terminal of the sensing element signal conditioning circuit. , The output of the comparator is coupled to the input of a multiplexer, A digital-to-analog converter whose output is coupled to the input of the successive approximation register;   5. The circuit according to claim 4, wherein the circuit comprises:   11. The analog-digital / digital-analog conversion (ADC / DAC) circuit , An input coupled to the memory and a second input of the multiplexer Constituted by a serial digital data controller having an output The circuit according to claim 10, wherein:   12. The analog-digital / digital-analog conversion (ADC / DAC) circuit :   An input capacitor coupled between the analog signal input terminal and the comparator; A reference capacity coupled between the array and the successive approximation register and the comparator. Data array;   The circuit according to claim 11, wherein the circuit comprises:   13. Analog signal input terminal, parameter control input terminal and analog signal output An analog signal adjustment circuit having an input terminal; Log signal output A comparator having a first input terminal, a second input terminal, and an output terminal coupled to the terminals; A continuous approximation device coupled to the output terminal of the comparator and having an output port; A memory device for holding a digital correction value, and a digital device having an analog output terminal. A signal conditioning method comprising an analog converter, comprising:   Connecting the analog output terminal of the digital-to-analog converter to the analog signal Coupled to the parameter control input terminal of the Analog correction signal through the digital-to-analog converter Sending to the parameter control input terminal of   The analog output terminal of the digital-analog converter is connected to the second terminal of the comparator. 2 input terminal, and is connected to the analog output terminal of the analog signal adjustment circuit. Converting an analog output signal into a digital output signal dependent on the digital correction value Stage;   A method characterized by comprising:   14． Transform the digital output signal and generate another digital correction value dependent on it. Providing; and   The analog output terminal of the digital-analog converter is connected to the second terminal of the comparator. 2 input terminal, the analog signal output terminal of the analog signal adjustment circuit These analog output signals are modified digitally depending on the digital correction value. Converting to an output signal;   14. The method of claim 13, further comprising: