JP3389815B2 - Digital calibration method for analog measurement unit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a calibration method for an analog measurement unit such as an IC tester.

[0002]

2. Description of the Related Art FIG. 5 shows a circuit configuration diagram for calibrating a conventional analog measurement unit. Reference numeral 20 in FIG. 5 denotes a test controller that outputs setting data for acquiring calibration data, 21
Is an I / O control circuit provided between the test controller 20 and the analog measurement unit.

22a to 22e are registers, 23 is a digital / analog converter (hereinafter referred to as "DAC"), 24
Is an analog-digital converter (hereinafter referred to as “ADC”), 25 to 28 are adjustment DACs, 29 is an analog circuit for setting value output, 30 is an analog circuit for voltage detection at a unit input / output point, An analog measurement unit is configured by. Then, a voltage according to the digital code data supplied from the test controller 20 is generated at the unit input / output point in the figure, and the voltage applied to the unit input / output point is converted into a digital signal to test controller 20 side. Communicate to.

In the analog measurement unit, the DAC
23 has terminals for gain and offset adjustment,
The gain adjusting terminal is connected to the gain adjusting DAC 25, and the offset adjusting terminal is connected to the offset adjusting DAC 26, so that the correction adjustment of the DAC 23 is performed. That is, the offset adjustment of the DAC 23 is performed by writing "-FULL" code data from the test controller 20 into the register 22b and applying this to the DAC 23, and the voltage measured value at the unit input / output point at this time is the maximum output amplitude of the DAC 23. So that it has a negative voltage
This is performed by writing digital code data from the test controller 20 to the register 22c and applying it to the input of the offset adjusting DAC 26 to correct the offset.

To adjust the gain of the DAC 23, "+ FULL" code data is written from the test controller 20 to the register 22b and applied to the DAC 23. At this time, the measured voltage value at the unit input / output point is DAC2.
This is performed by writing digital code data from the test controller 20 to the register 22a so as to obtain the maximum positive voltage of the output amplitude of 3, and applying it to the input of the gain adjusting DAC 25 to correct the gain.

On the other hand, the ADC 24 is also provided with a gain and offset adjusting terminal. A gain adjusting terminal is connected to a gain adjusting DAC 27 and an offset adjusting terminal is connected to an offset adjusting DAC 28.
It is designed to make correction adjustments. That is, ADC
Offset adjustment of 24 is done by ADC2
The maximum negative voltage of the input amplitude of 4 is applied, and the ADC at this time
The digital code data is written from the test controller 20 to the register 22e so that the output code of 24 becomes the "-FULL" code, and the DAC2 for offset adjustment is used.
8 to correct the offset by applying to 8 inputs.

Further, the gain of the ADC 24 is adjusted by applying the maximum positive voltage of the input amplitude of the ADC 24 to the unit input / output point, and the output code of the ADC 24 at this time is "+ FUL.
This is performed by writing digital code data from the test controller 20 to the register 22d so as to obtain an L ″ code, and applying the digital code data to the input of the offset adjusting DAC 27 to correct the gain.

[0008]

In the above-described conventional circuit configuration for performing the calibration, the DAC for adjusting the offset and the DAC for adjusting the gain are provided.
A register for the C application code is required, and there is a problem that the circuit configuration becomes complicated and the size is increased.
In addition, since the adjustment range of the offset and gain adjustment terminals provided in the DAC or ADC is limited, highly accurate parts are required in the analog circuit up to the input / output point of the unit, which is expensive. Further, since the correction data between only two points of "+ FULL" and "-FULL" is used, there is a problem that the accuracy is not so good even if the correction adjustment is performed.

The present invention has been made in view of such circumstances, and it is possible to widen the adjustment range of correction by eliminating the adjustment circuit for calibration and performing adjustment based on a predetermined calculation result. A digital calibration method for an analog measurement unit that enables high-accuracy calibration by making possible a low-cost circuit configuration that does not require high-precision parts, and by providing multiple correction data. The purpose is to provide.

[0010]

The invention according to claim 1 is
A digital calibration method for an analog measurement unit having a DA conversion means for outputting a voltage corresponding to a supplied digital code to an input / output point, wherein a digital code of 0, a positive digital code, and a negative digital code are The first step of measuring the voltage at the input / output point when supplied, and the same slope as the ideal characteristic of the voltage at the input / output point for the supplied digital code, and for the digital code of 0 In the characteristic indicating the voltage measured in the first step, the second step of obtaining a digital code at a point where the voltage becomes 0 as an offset digital code, the slope of the ideal characteristic, and the digital code with the first step The gain correction of the supplied digital code is obtained based on the slope of the characteristic indicating the voltage measured in the first step. And a process is characterized by correcting the voltage at the input point by correcting a digital code supplied to the DA conversion unit based on the offset digital code and said gain correction.

According to a second aspect of the present invention, there is provided a digital calibration method for an analog measurement unit having AD conversion means for outputting a digital code corresponding to a voltage at an input / output point, wherein a voltage of 0 and a digital code on the positive side are provided. And an ideal voltage for the negative side digital code and an ideal voltage for the negative side digital code are applied to the input / output points, respectively.
And the AD with respect to the voltage applied to the input / output point
Based on the slope of the ideal characteristic indicating the digital code output from the converting unit and the slope of the characteristic indicating the digital code measured with respect to the voltage applied in the fourth step, the AD converting unit outputs the output. And a fifth step of obtaining the gain correction of the digital code, wherein 0 is obtained in the fourth step.
The digital code measured when the voltage is applied is an offset digital code, and the digital code output from the AD conversion means is corrected based on the offset digital code and the voltage applied to the input / output point. It is characterized by obtaining a digital code corresponding to.

According to a third aspect of the present invention, an analog having DA conversion means for outputting a voltage corresponding to the supplied digital code to the input / output point and AD conversion means for outputting a digital code corresponding to the voltage at the input / output point. A method for digitally calibrating a measuring unit, comprising the first, second and third steps according to claim 1, the offset digital code obtained in the second step and the offset digital code obtained in the third step. The digital code supplied to the DA conversion means is corrected based on the gain correction to correct the voltage at the input / output point, and the fourth and fifth aspects of the present invention are also described.
And a digital code measured when a voltage of 0 is applied in the fourth step is used as an offset digital code, and the AD conversion is performed based on the offset digital code and the gain correction obtained in the fifth step. The digital code output from the means is corrected to obtain a digital code corresponding to the voltage applied to the input / output point.

According to a fourth aspect of the present invention, in the digital calibration method for an analog measuring unit according to any one of the first to third aspects, the gain correction is obtained for a region between measured voltage or digital code. The digital code supplied to the DA conversion means or the digital code output from the AD conversion means is corrected based on the gain correction obtained for the area in which the digital code exists.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below. FIG. 1 is a diagram showing a circuit configuration for executing a digital calibration method for an analog measurement unit according to an embodiment of the present invention. Although the analog measurement unit is provided according to the number of pins of the IC or the like to be tested, only one analog measurement unit is shown here in order to avoid complication of the drawing.

In the figure, reference numeral 1 is a test controller, which outputs calibration data acquisition information for performing calibration through the I / O control circuit 2 and a control signal for the arithmetic unit 3. The I / O control circuit 2 is provided between the test controller 1 and each component described later, and controls input / output of data of the controller 1.

The arithmetic unit 3 performs various arithmetic processes (to be described later) for acquiring calibration data based on the control signal from the test controller 1 and the information stored in the memory 4. Reference numeral 4 is a memory for storing the calibration data acquisition information from the test controller 1, the calculation result from the calculator 3, and the like. 5 indicates which DA depends on the address and the write / read signal output from the arithmetic unit 3.
This is a decoding circuit that outputs a control signal indicating whether to operate the C and ADC.

A DA 6 receives the setting data from the arithmetic unit 3 and the control signal (write signal) from the decoding circuit 5.
C, which converts the setting data supplied when the control signal is received into an analog signal and converts it to the analog circuit 7 in the subsequent stage.
Output to. The analog circuit 7 is a circuit for outputting the set value voltage corresponding to the setting data to the unit input / output point by the analog signal output from the DAC 6, and includes the input resistor 7a, the force amplifier 7b, and the buffer 7
c, a sense amplifier 7d, and a feedback resistor 7e.

An ADC 8 receives a control signal (read signal) from the decoding circuit 5 and outputs a digital code corresponding to the voltage supplied through the analog circuit 9 when receiving the control signal. . Here, the analog circuit 9 is a circuit for detecting the voltage at the unit input / output point by the ADC 8, and is configured by a current detection resistor 9a and a voltage detection amplifier 9b.

10 is a digital voltmeter (hereinafter,
"DVM"), measures the voltage at the input / output points of the unit, converts the measured value into a digital signal, and supplies the digital signal to the test controller 1.

Next, the operation of the above configuration will be described with reference to the calibration data acquisition flow chart of FIG. FIG. 2 is a flowchart showing a process until the correction data of the DAC 6 and the ADC 8 mounted on the analog measurement unit of FIG. 1 is acquired.

In the figure, when the process for acquiring the calibration data is started, first, in step S1, the test controller 1 selects an analog measurement unit to be measured, and the selected analog measurement unit (hereinafter referred to as " Calibration data acquisition information including data for specifying "target unit") and parameter setting data of the target unit is written in the memory 4.

Subsequently, the test controller 1 issues a calibration data acquisition execution command requesting the execution of the "operation unit processing" shown in steps Sa1 to Sa4 in the figure to the operation unit 3 (step S2). This requests that the application code based on the parameter setting data in the calibration data acquisition information be set in the DAC 6, whereby the processing from step Sa1 is started by the computing unit 3.

In step Sa1, the arithmetic unit 3 sets a flag indicating that arithmetic unit processing is being performed. After this,
The test controller 1 monitors this arithmetic unit processing flag (step S3), and the "arithmetic unit processing" in the arithmetic unit 3 is performed.
Wait until the end.

Next, the arithmetic unit 3 is the test controller 1
Reads the calibration data acquisition information written in the memory 4 in step S1 (step Sa2), and based on the read data, applies the applied code to the DA of the target unit.
The address and write signals are output to the decode circuit 5 as well as output to C6. This causes the decoding circuit 5 to output a control signal for operating the DAC 6,
Then, the application code is set to and the voltage is output from the target unit (step Sa3).

Thereafter, the arithmetic unit 3 clears the arithmetic unit processing flag and ends the "arithmetic unit processing" (step S).
a4). Then, the test controller 1 recognizes that the processing of the arithmetic unit 3 is completed, and proceeds to the processing of step S3 to step S4 to acquire the voltage at the input / output point of the target unit from the measured data of the DVM 10 and store it in the memory 4
Write in (step S5).

Next, in step S6, it is confirmed whether the test controller 1 has acquired the data of all the measurement points (application codes to be measured) of the target unit. Then, if there is a measurement point for which data has not been acquired, the procedure returns to step S1,
Change the parameter setting data and perform the above steps S1 to S5.
The processing of (and Sa1 to Sa4) is repeated, and if the data acquisition at all measurement points is completed, the process proceeds to step S7. Here, the measurement points are "0", "+ FUL"
The case where digital code data of L "and" -FULL "is used for the application code is set in advance. Also, when a plurality of digital code data other than these are used for the application code, they are selected and set in advance. I'll do it.

In step S7, the test controller 1
Issues a calibration data operation instruction requesting the execution of the "operation unit processing" shown in steps Sb1 to Sb5 in the figure to the operation unit 3. This requires execution of calibration data calculation for offset correction and gain correction based on the data obtained by the above-described measurement, and the processing from step Sb1 is started by the calculation unit 3 by this. .

In step Sb1, the arithmetic unit 3 sets a flag indicating that arithmetic unit processing is being performed. After this,
The test controller 1 monitors this arithmetic unit processing in-progress flag (step S8), and "arithmetic unit processing" in the arithmetic unit 3 is performed.
Wait until the end.

Next, the arithmetic unit 3 is the test controller 1
Reads the measurement data written in the memory 4 in step S5 (step Sb2) and proceeds to step Sb3 to perform calibration data calculation for calculating offset correction and gain correction of each measurement point. The contents of this calibration data calculation will be described later in detail.

Subsequently, the arithmetic unit 3 writes the result of the calibration calculation in step Sb3 to the memory 4 (step Sb4), clears the arithmetic unit processing flag in step Sb5, and ends the "arithmetic unit processing". Then, the test controller 1 recognizes that the processing of the arithmetic unit 3 is completed, and proceeds from step S8 to step S9.

In step S9, the test controller 1
Make sure that you have acquired all the required calibration data. Then, if there is an analog measurement unit for which the calibration data is to be acquired, which has not yet been subjected to the above-described measurement and arithmetic processing, the process returns to step S1, and the target unit and the parameter setting data are changed to perform the above steps S1 to S8 (and Sa1 to Sa4, Sb1 to Sb5)
The processing is repeated, and if acquisition of all necessary calibration data is completed, the calibration data acquisition processing of FIG. 2 is ended.

Next, the contents of the calibration data calculation (step Sb3 in FIG. 2) in the calibration data acquisition process with the above circuit configuration will be described in detail with reference to FIG. FIG. 3 shows the DAC 6 shown in FIG.
It is a figure which shows the relationship of offset and gain adjustment of.

In this figure, point b shows the measured voltage at the unit input / output point when the digital code "0" is applied, and point c shows the measured voltage at the unit input / output point when the digital code "+ FULL" is applied. And point d shows the measured voltage at the unit input / output point when the digital code "-FULL" is applied.

A broken line O shows the ideal characteristic of the DAC 6. Point e is a straight line passing through point b with the inclination of the ideal characteristic (dotted line P)
At the point where the voltage becomes 0 V, the digital code corresponding to this point e corresponds to the offset digital code. Gain correction A indicates the difference between the slope of the straight line connecting the two points b and c and the slope of the ideal characteristic, and gain correction B indicates the slope of the straight line connecting the two points b and d and the ideal. The difference in the slope of the characteristics is shown.

In the calibration data calculation, the offset digital code of the DAC 6 and the gain corrections A and B are calculated based on the above measurement data. First, the slope of the ideal characteristic (broken line O) is represented by (slope of ideal characteristic) = (digital code of "+ FULL") / (ideal voltage of "+ FULL") (1). Note that, here, for convenience of calculation processing, the change amount of the digital code with respect to the change of the voltage is used as the slope.
Therefore, the dotted line P is represented by (measurement voltage) = {1 / (gradient of ideal characteristic)} × (digital code) + (measured voltage at point b) (2). Offset digital code is this (2)
It is a digital code whose measured voltage is 0 volt in the formula. Therefore, from equations (1) and (2), the offset digital code is (offset = − (measurement voltage at point b) × (ideal characteristic slope) digital code) = − (measurement voltage at point b) × (“+ FULL "Digital code) / (ideal voltage of" + FULL ") ... (3)

Next, the slope of the straight line connecting the points b and c is (slope between b and c) = (digital code of "+ FULL") / (measured voltage at point c-point b) Measured voltage of ・ ・ ・ ・ ・ ・ ・ ・ (4) Therefore, the gain correction A is calculated from the equations (1) and (4) as follows: (gain correction A) = (inclination of ideal characteristic) / (inclination between b and c) = {(digital code of “+ FULL”) / (“ (Ideal voltage of + FULL)) / {(digital code of “+ FULL”) / (measured voltage at point c−measured voltage at point b)} (5)

The slope of the straight line connecting the two points b and d is (slope between b and d) = (digital code of "-FULL") / (measured voltage at point b-d point Measured voltage of ・ ・ ・ ・ ・ ・ ・ ・ (6) Therefore, the gain correction B is calculated from the equations (1) and (6) as follows: (gain correction B) = (slope of ideal characteristic) / (slope between b and d) = {(digital code of “+ FULL”) / (“ + (FULL) "ideal voltage)} / {("-FULL "digital code) / (measured voltage at point b-measured voltage at point d)} (7)

The offset digital code, the gain correction A, and the gain correction B thus obtained are stored in the memory 4. Then, when the voltage is output from the analog measurement unit, the digital code is corrected by these correction data to correct the voltage at the input / output point of the unit.

Here, the correction using the offset digital code, the gain correction A and the gain correction B is performed at the measurement point 2
This is equivalent to correcting the straight line connecting the points. Therefore, as described above, "0", "+ FULL", and "-FUL"
Calibration data is also acquired for measurement points using a plurality of digital code data other than L ″ digital code data as applied codes, and appropriate two points are selected from these measurement points, and the same calculation is performed for the two points. It is also possible to obtain an offset digital code and a gain correction for correcting the straight line connecting the measurement points, that is, by obtaining a plurality of measurement voltages, a plurality of offset digital codes and gain correction data are provided, and each measurement voltage is provided. It may be used as correction data corresponding to two points of the digital code set by the above.

Next, the process of obtaining the correction data (offset digital code and gain correction) of the ADC 8 of FIG. 1 will be described. FIG. 4 is a diagram showing the relationship between the offset and gain adjustment of the ADC 8.

In this figure, point b1 shows a digital code when a voltage of 0 volt is applied to the unit input / output point. In the measurement of this digital code, first, a voltage of 0 volt is applied to the unit input / output point, the arithmetic unit 3 outputs an address and a read signal to the decoding circuit 5, and outputs a control signal for operating the ADC 8 to the decoding circuit 5. Let Then, at this time, a digital code corresponding to the voltage supplied via the analog circuit 9 is output to the ADC 8, and the arithmetic unit 3 receives the digital code to measure the digital code at the point b1.

In the measurement and the arithmetic processing described below, the test controller 1 selects the analog measurement unit to be measured, the data specifying the selected analog measurement unit, and the AD of the target unit.
The calibration data acquisition information consisting of control data for operating C is started by writing in the memory 4, and the procedure is similar to that of FIG. 2 described above.

Point c1 shows a digital code when an ideal voltage of "+ FULL" is applied to the unit input / output point,
Point d1 indicates a digital code when an ideal voltage of "-FULL" is applied to the unit input / output point. Similar to the above, these digital codes are also measured by applying the voltage to the input / output points of the unit and causing the arithmetic unit 3 to output the address and read signals to cause the ADC 8 to output the digital codes.

The broken line O1 shows the ideal characteristic of the ADC 8, and the dotted line P1 shows the straight line passing through the point b1 with the inclination of the ideal characteristic. The gain correction A1 indicates the difference between the slope of the straight line connecting the two points b1 and c1 and the slope of the ideal characteristic.
Reference numeral 1 denotes the difference between the slope of the straight line connecting the two points b1 and d1 and the slope of the ideal characteristic. Based on the above measurement data, offset digital code of ADC8, gain correction A
1 and B1 are calculated.

Since the digital code at point b1 is a digital code when the voltage at the input / output point of the unit is 0 volt, this is an offset digital code.

Next, in the calculation of the gain corrections A1 and B1, first, the slope of the ideal characteristic (broken line O1) is (the slope of the ideal characteristic) = (digital code of "+ FULL") / (ideal of "+ FULL" Voltage) (8), the slope of the straight line connecting the two points b1 and c1 is (slope between b1 and c1) = (digital code of c1 point−b1 point Digital code) / (applied voltage at point c1) ... (9) Therefore, the gain correction A1 is calculated from the equations (8) and (9) as follows: (gain correction A1) = (slope of ideal characteristic) / (slope between b1 and c1) = {(digital code of “+ FULL”) / (“ + (FULL ″ ideal voltage)} / {(digital code at c1 point−digital code at b1 point) / (applied voltage at c1 point)} (10)

The slope of the straight line connecting the two points b1 and d1 is: (slope between b1 and d1) = (digital code of b1 point−digital code of d1 point) / applied voltage of d1 point It is represented by (11). Therefore, from the equations (8) and (11), the gain correction B1 can be calculated by (gain correction B1) = (inclination of ideal characteristic) / (inclination between b1 and d1) = {(digital code of “+ FULL”) / (“ + FULL ″ ideal voltage)} / {(digital code of b1 point−digital code of d1 point) / (applied voltage of d1 point)} (12)

The offset digital code, the gain correction A and the gain correction B thus obtained are stored in the memory 4. Then, when the voltage input to the unit input / output point is detected, the ADC
The digital code output from 8 is corrected to obtain the digital code corresponding to the voltage value at the unit input / output point.

As with the correction data for the DAC 6 described above, "0", "+ FULL", and "-FUL".
A plurality of applied voltages other than the applied voltage of L ″ are applied to the unit input / output points, the digital code is measured, two appropriate points are selected from the measured points, and the same calculation as above is performed.
The offset digital code for correcting the straight line connecting the measurement points and the gain correction may be obtained.

[0050]

As described above, according to the present invention, the offset digital code and the gain correction are obtained by a predetermined calculation, and the digital code supplied to the DA conversion means or the digital output from the AD conversion means based on these values. Since the code is corrected, the adjustment DAC and the register for the applied code, which are required in the conventional circuit, can be deleted. Further, since the adjustment range is not limited, high-precision parts used for the analog measurement unit are unnecessary, and an inexpensive circuit configuration can be realized. Further, according to the invention described in claim 4, since a plurality of correction data are provided, it is possible to perform highly accurate calibration.

[Brief description of drawings]

FIG. 1 is a diagram showing a circuit configuration for executing a digital calibration method for an analog measurement unit according to an embodiment of the present invention.

FIG. 2 is a flowchart showing a process up to acquisition of correction data for the DAC 6 and the ADC 8 mounted on the analog measurement unit shown in FIG.

FIG. 3 is a diagram showing a relationship between offset and gain adjustment of the DAC 6.

FIG. 4 is a diagram showing a relationship between offset and gain adjustment of the ADC 8.

FIG. 5 is a circuit configuration diagram for calibrating a conventional analog measurement unit.

[Explanation of symbols]

1 Test controller 3 calculator 4 memory 5 Decoding circuit 6 DAC 8 ADC 10 DVM

Claims (4)

(57) [Claims] 1. A digital calibration method for an analog measurement unit having DA conversion means for outputting a voltage corresponding to a supplied digital code to an input / output point, wherein the digital code is 0, the positive digital code, and the negative digital code. The first step of measuring the voltage at the input / output point when the digital code on the side is supplied, and the same slope as the ideal characteristic of the voltage at the input / output point for the supplied digital code, A second step of obtaining a digital code at a point where the voltage is 0 in the characteristic indicating the voltage measured in the first step with respect to the digital code as an offset digital code, the slope of the ideal characteristic, and the digital code. And the slope of the characteristic indicating the voltage measured in the first step with respect to the gain of the digital code to be supplied. Third to seek correction
And a voltage at the input / output point is corrected by correcting the digital code supplied to the DA conversion means based on the offset digital code and the gain correction. Calibration method. 2. A digital calibration method for an analog measurement unit having AD conversion means for outputting a digital code corresponding to a voltage at an input / output point, which is a voltage of 0, an ideal voltage for a digital code on the positive side, and a negative side. And a fourth step of measuring the digital code output from the AD conversion means when the ideal voltage for the digital code is applied to the input / output point, and from the AD conversion means with respect to the applied voltage to the input / output point. The slope of the ideal characteristic that indicates the digital code to be output,
And a fifth step of obtaining a gain correction of the digital code output from the AD conversion means, based on a characteristic gradient indicating the digital code measured with respect to the voltage applied in the fourth step. The digital code measured when a voltage of 0 is applied in the fourth step is used as an offset digital code, and the digital code output from the AD conversion means is corrected based on the offset digital code and the gain correction. A digital calibration method for an analog measuring unit, characterized in that a digital code corresponding to a voltage applied to an output point is obtained. 3. Digital calibration of an analog measuring unit having DA conversion means for outputting a voltage corresponding to a supplied digital code to an input / output point and AD conversion means for outputting a digital code corresponding to a voltage at the input / output point. A method comprising the first, second, and third steps of claim 1, wherein the offset digital code obtained in the second step and the gain correction obtained in the third step DA
The digital code supplied to the conversion means is corrected to correct the voltage at the input / output point, and the method has the fourth and fifth steps according to claim 2, and a voltage of 0 is applied in the fourth step. The digital code measured at this time is used as an offset digital code, and the digital code output from the AD conversion means is corrected based on the offset digital code and the gain correction obtained in the fifth step and applied to the input / output point. A method for digital calibration of an analog measurement unit, characterized in that a digital code corresponding to the measured voltage is obtained. 4. The digital calibration method for an analog measurement unit according to claim 1, wherein the gain correction is obtained for a region between each of the measured voltage and the digital code, and the DA correction means is provided. A digital calibration method for an analog measuring unit, characterized in that a digital code supplied or a digital code output from the AD conversion means is corrected based on a gain correction obtained for a region where the digital code exists.