JP2001356356A - Active matrix type ips(in-plane switching) liquid crystal display device, method for driving the same and information equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the problem that brightness of a liquid crystal display picture becomes uneven in the 1H-potential inversion driving of counter electrodes with respect to a pixel electrode signal. SOLUTION: Counter electrodes corresponding to each row are formed in rectangular shapes in a horizontal direction for each row of the horizontal direction of pixel electrodes provided with switching elements and odd numbered lines and even numbered lines of these rectangular shaped counter electrodes are connected each other respectively at end parts to form a first counter electrode 8 and a second counter electrode 9 respectively. Then, the inversion driving of counter electrode signals with respect to the pixel electrode signal is performed by impressing first and second counter electrode signals which are inverted each other in one field on the first and second counter electrodes 8, 9. The timing at which the counter electrodes signals are inverted is performed during the blanking period of the pixel electrode signal. Thus, a liquid crystal display device is made to be a high-quality liquid crystal display device by eliminating the unevenness of the brightness of the display screen.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving method of an active matrix type in-plane switching (hereinafter referred to as IPS) liquid crystal display device by inverting a signal potential of a counter electrode and a structure of the display device.

[0002]

2. Description of the Related Art In recent years, a liquid crystal display device has been selected as a display monitor for a computer due to rapid improvement in quality such as large size, thinness, space saving, high brightness, high visibility, and low power consumption. In particular, an active matrix IPS liquid crystal display device has been adopted as a high-speed, high-density display such as XGA, SXGA, etc., because it has high display performance suitable for upsizing. The counter electrode signal potential inversion driving method, which is one of the driving methods, can reduce the pixel signal potential and is suitable for high speed operation.

A conventional active matrix type I is described below.
The structure of the PS liquid crystal display device and the inversion driving of the counter electrode signal potential will be described with reference to FIGS. 4A shows the waveform of the pixel electrode signal 1, FIG. 4B shows the waveform of the counter electrode signal 2,
(C) is a waveform of the gate signal 3. The gate signal 3 is an operation signal of the switching element connected to the pixel electrode, and the pixel electrode signal 1 is written from the pixel signal line while the switching element is conductive (ON), that is, while the gate signal 3 is at the high level. The gate signal 3 is at the high level only during the 1H (horizontal scanning) period during one field, and this is repeated in the cycle of one field.
The pixel electrode signal 1 alternately repeats a high potential and a low potential every 1H period. This is called 1H inversion driving. In the normal 1H inversion driving, the counter electrode signal 2 has a constant potential. In the counter electrode signal potential inversion driving, a low potential and a high potential are alternately repeated so that the counter electrode signal 2 is inverted with the pixel electrode signal 1.

FIG. 5 is a schematic view showing an array substrate 4 of a conventional IPS liquid crystal panel. Counter electrode wiring (common line) 5
Are horizontally arranged alternately with the gate wiring 18 and are formed of a conductive film such as a metal on the surface of the array substrate 4. The opposite electrode wiring 5 is all connected at both ends. In this figure, signal lines are omitted. The potential of the counter electrode signal 2 is supplied from an external signal generator through a counter electrode signal supply terminal (not shown) formed on the array substrate.
Thus, the voltage of the pixel electrode signal 1 is reduced.

[0005]

Generally, in a liquid crystal display device, the number of scanning lines is increased as in the XGA or SXGA driving system in order to improve the quality. In this case, the 1H period is shortened without changing the 1-field period. or,
The display screen is enlarged to improve visibility,
Accordingly, the area of the counter electrode wiring is also increased.

[0006] A conventional counter electrode signal potential inversion drive is shown in FIG.
As shown in (1), when the 1H period is shortened, the counter electrode signal 2 changes, and a signal waveform called a write rising period 6 becomes blunt. In addition, if the area of the counter electrode wiring is increased, the rounding of the write rise period is further increased, and the counter electrode signal 2 becomes non-uniform for each counter electrode. The rounding of the write rising period 6 occurs every 1H period. That is, since the number of scanning lines is generated during one field period, the total time occupied by the writing rising period 6 is further increased as the number of scanning lines is increased. As a result, the brightness of the display image of the liquid crystal display device becomes non-uniform, which significantly deteriorates the display performance.

The present invention has been made in view of such a conventional problem. Even when an image is displayed at a high speed by increasing the number of scanning lines, the writing rise time is not affected.
It is an object of the present invention to provide a display device that does not make brightness nonuniform.

[0008]

According to a first aspect of the present invention, pixel electrodes are arranged in a matrix on an array substrate, switching elements are connected to the pixel electrodes, and the switching elements are arranged in a horizontal direction of the array substrate. In an active matrix IPS liquid crystal display device, a gate line to be operated is formed, and a counter electrode corresponding to each of the pixel electrodes is formed on the array substrate, and a liquid crystal is held between the array substrate and the counter substrate. Each of the counter electrodes is connected to a counter electrode wiring that is alternately adjacent to the gate line in a horizontal direction, and the counter electrode wiring is configured such that odd lines and even lines are arranged at one end of each row. It is characterized in that it is separated into two regions of a first counter electrode wiring and a second counter electrode wiring which are connected in common.

Thus, different voltages can be applied to the first counter electrode wiring and the second counter electrode wiring, respectively. Therefore, when performing the inversion driving of the counter electrode signal during the 1H inversion driving of the pixel electrode signal, the counter electrode signal is generated. Without using 1H inversion drive, 1H
Field (hereinafter referred to as 1V) inversion driving can be performed.

According to a second aspect of the present invention, there is provided an active matrix type IPS liquid crystal display device according to the first aspect, wherein the first counter electrode wiring and the second counter electrode wiring have one field corresponding to one field. It is characterized in that inverted signals are applied for each scan.

In this manner, by inverting the counter electrode signal potential by 1 V during the 1H inversion drive of the pixel electrode signal, the waveform of the write rising period can be smoothed during the one field period by the first counter electrode signal and the second counter electrode. Both signals have the effect of being able to be suppressed to one initial occurrence.

According to a third aspect of the present invention, in the active matrix type IPS liquid crystal display device according to the second aspect, one screen in which the signal potential of the first counter electrode wiring and the second counter electrode wiring is one field. It is characterized in that the time of inversion for each scan is within the blanking period of the pixel electrode signal.

As a result, the writing rise period of the pixel electrode signal is only generated once during the one-field period for both the first counter electrode signal and the second counter electrode signal. , The write rise period during the blanking period can be ended. This has the effect of preventing the occurrence of the write rise period during the actual display period other than the blanking period of the pixel electrode signal.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. FIG. 1 shows a pattern of a gate wiring and a counter electrode wiring formed on an array substrate of an IPS liquid crystal display according to a first embodiment of the present invention.
In the IPS liquid crystal device, pixel electrodes are arranged in a matrix on an array substrate, switching elements are connected to the pixel electrodes, gate lines for operating the switching elements are formed in the horizontal direction of the array substrate, and signal lines are formed perpendicular to the gate lines. A counter electrode corresponding to each of the pixel electrodes is formed on the array substrate. The liquid crystal is held between the array substrate and the counter substrate. Here, signal lines, pixel electrodes, counter electrodes, and switching elements are omitted. On the array substrate 7, opposing electrode wirings are formed in a rectangular shape so as to be alternately adjacent to and parallel to the gate wirings 18 in the horizontal scanning direction. This counter electrode wiring is
Outside the effective display area 21, odd-numbered lines and even-numbered lines of the counter electrode wiring are connected to each other at their ends to form a first counter electrode wiring 8 and a second counter electrode wiring 9 in a comb shape. With this structure, in the 1H pixel electrode signal potential inversion driving, the signal applied to the first and second counter electrode wirings 8 and 9 can be a 1V potential inversion signal.

FIG. 2 shows a pixel electrode signal 10 and first and second counter electrode signals 11 and 11 in the 1H pixel electrode signal potential inversion driving method.
FIG. 2A shows a signal waveform of the pixel electrode 10, FIG. 2B shows a waveform of the first counter electrode signal 11,
(C) shows the waveform of the second counter electrode signal 12. In FIG. 2, the first counter electrode signal 11 and the second counter electrode signal 1
2 is that the write rise period 13 is set to a constant level during one field period so that the rounding of the write rise period 13 is performed only once in the initial period during one field period, and the write rise period 13 is set during the blanking period 14 of the pixel electrode signal 10. Terminate. The potentials of the first counter electrode signal 11 and the second counter electrode signal potential 12 are switched during the 10 blanking periods 14 of the pixel electrode signal potential, and the movement is performed such that they are performed for each field.

As a result, it is possible to prevent a write rising period from occurring during an actual display period other than the blanking period 14 of the pixel electrode signal 10, and to suppress unevenness in the brightness of the display screen.

FIG. 3 shows a circuit connection of an active matrix type IPS liquid crystal display device of the 1V counter electrode signal potential inversion drive system in the 1H pixel electrode signal potential inversion drive. Here, a scanning line driving circuit for sequentially driving gate lines and a signal line driving circuit for supplying a signal to each pixel via a vertical signal line are not shown. In FIG. 3, the counter electrode signal control device 15 creates two types of signals to be applied to the first counter electrode wiring 8 and the second counter electrode wiring 9. These signals are a first counter electrode signal 11 and a second counter electrode signal 12, as shown in FIGS. 2B and 2C.
Switching is performed for each field by synchronizing with the start pulse of the pixel electrode signal 10. Counter electrode signal line 16, 1
Reference numeral 7 denotes a first counter electrode signal 11 and a second counter electrode signal 12 generated by the counter electrode signal control device 15, and a first counter electrode wiring 8 formed on the array substrate 7 and a second counter electrode signal. Each is transmitted to the wiring 9.

The counter electrode signal supply terminals 19 and 20 include:
The counter electrode signal lines 16 and 17 are connected to the first counter electrode wiring 8 and the second counter electrode wiring 9, respectively, and the first counter electrode signal 11 and the second counter electrode signal 12 are connected to the first counter electrode signal. It is transmitted to the electrode wiring 8 and the second counter electrode wiring 9. With this configuration, the brightness of the display screen can be made uniform.

[0019]

As described above, according to the first to third aspects of the present invention, the counter electrode signal potential is changed from the inversion driving for 1H period to the 1st period.
Since the V period inversion drive can be performed, the rounding of the write rising period of the counter electrode signal is 1 during both the first counter electrode signal and the second counter electrode signal during one field period.
It can only occur once. In particular, according to the third aspect of the invention, the rising timing can be completed during the blanking period by adjusting the inversion timing to the blanking period of the pixel electrode signal. Accordingly, it is possible to prevent occurrence of dullness of the counter electrode signal in the writing rising period during the actual display period other than the blanking period of the pixel electrode signal. Therefore, it is possible to increase the number of scanning lines for high-quality display such as an XGA or SXGA driving method without making the brightness of the display image of the liquid crystal display device non-uniform. Further, even if the area of the counter electrode wiring is increased, there is only one write rise period within one field period, so that the display screen can be enlarged in order to improve visibility.

[Brief description of the drawings]

FIG. 1 is a diagram showing a counter electrode pattern formed on an array substrate of an IPS liquid crystal display according to an embodiment of the present invention;

FIG. 2 is a waveform chart showing timings of a pixel electrode signal and a counter electrode signal in a 1H pixel electrode signal potential inversion driving method according to an embodiment of the present invention.

FIG. 3 is an active matrix type I of a potential inversion driving method using a 1V counter electrode signal according to an embodiment of the present invention;
Diagram showing circuit connection of PS liquid crystal display device

FIG. 4 is a waveform diagram showing timings of a pixel electrode signal, a counter electrode signal, and a gate signal in a conventional 1H pixel electrode signal potential inversion driving method.

FIG. 5 is a diagram showing a counter electrode pattern formed on a conventional array substrate.

FIG. 6 is a waveform diagram of a conventional counter electrode signal.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Pixel electrode signal 2 Counter electrode signal 3 Gate potential 4 Array substrate 5 Counter electrode wiring 6 Write rise period 7 Array substrate 8 First counter electrode 9 Second counter electrode 10 Pixel electrode signal 11 First counter electrode signal 12th 2 counter electrode signal 13 write rising period 14 blanking period 15 counter electrode signal control device 16 counter electrode line 17 counter electrode line 18 gate wiring 19 counter electrode signal supply terminal 20 counter electrode signal supply terminal 21 effective display area

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G09G 3/20 612 G09G 3/20 612T 621 621B 621M 3/36 3/36 F term (Reference) 2H092 GA14 JB05 JB23 NA05 PA06 2H093 NA33 NA43 NC10 NC34 NC36 ND35 ND36 ND43 NE03 5C006 AC25 AC28 AF44 AF50 AF73 BB16 BC03 BC08 BC12 BC21 EB05 FA54 5C080 AA10 BB05 DD03 DD25 EE28 FF11 JJ04 JJ06 5C094 AA03 A04 AAA AA AA AA AA A13 AB AA A13 AA AA AB AA A13 AA AA A13 AA A13 AA AA AB AA A13 AA AA AB AA A13 AA AA A13 AA A13 AA A13 EB02 FA01 FB12

Claims (4)

[Claims] 1. A pixel electrode is arranged in a matrix on an array substrate, a switching element is connected to the pixel electrode, a gate line for operating a switching element in a horizontal direction of the array substrate is formed, and the array substrate is formed. A counter electrode corresponding to each of the pixel electrodes is formed;
In an active matrix type IPS liquid crystal display device that holds liquid crystal between the array substrate and the opposing substrate, the opposing electrodes are connected to opposing electrode wirings that are alternately adjacent to the gate lines in a horizontal direction, The counter electrode wiring is divided into two regions of a first counter electrode wiring and a second counter electrode wiring in which odd lines and even lines are connected in common at each end of each row. Active matrix type IPS
Liquid crystal display. 2. The active matrix type IPS liquid crystal display device according to claim 1, wherein the first counter electrode wiring and the second counter electrode wiring are inverted signals for each one-field scanning of one field. A method for driving an active matrix IPS liquid crystal display device, characterized in that: 3. The active matrix type IPS liquid crystal display device according to claim 2, wherein a time at which the signal potentials of the first counter electrode wiring and the second counter electrode wiring are inverted each time one screen is scanned as one field. A driving method of an active matrix type IPS liquid crystal display device, wherein the driving period is within a blanking period of a pixel electrode signal. 4. An information device using the active matrix type IPS liquid crystal display device according to claim 1.