JP2001345454A - 半導体装置およびその作製方法 - Google Patents

半導体装置およびその作製方法

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Publication number
JP2001345454A
JP2001345454A JP2001086805A JP2001086805A JP2001345454A JP 2001345454 A JP2001345454 A JP 2001345454A JP 2001086805 A JP2001086805 A JP 2001086805A JP 2001086805 A JP2001086805 A JP 2001086805A JP 2001345454 A JP2001345454 A JP 2001345454A
Authority
JP
Japan
Prior art keywords
layer
film
forming
semiconductor
insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2001086805A
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English (en)
Japanese (ja)
Other versions
JP2001345454A5 (https=
Inventor
Tomohito Yoshimoto
智史 吉本
Hideomi Suzawa
英臣 須沢
Tatsuya Arao
達也 荒尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP2001086805A priority Critical patent/JP2001345454A/ja
Publication of JP2001345454A publication Critical patent/JP2001345454A/ja
Publication of JP2001345454A5 publication Critical patent/JP2001345454A5/ja
Withdrawn legal-status Critical Current

Links

Landscapes

  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
JP2001086805A 2000-03-27 2001-03-26 半導体装置およびその作製方法 Withdrawn JP2001345454A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001086805A JP2001345454A (ja) 2000-03-27 2001-03-26 半導体装置およびその作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2000-87660 2000-03-27
JP2000087660 2000-03-27
JP2001086805A JP2001345454A (ja) 2000-03-27 2001-03-26 半導体装置およびその作製方法

Publications (2)

Publication Number Publication Date
JP2001345454A true JP2001345454A (ja) 2001-12-14
JP2001345454A5 JP2001345454A5 (https=) 2008-02-28

Family

ID=26588513

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001086805A Withdrawn JP2001345454A (ja) 2000-03-27 2001-03-26 半導体装置およびその作製方法

Country Status (1)

Country Link
JP (1) JP2001345454A (https=)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002057166A (ja) * 2000-06-02 2002-02-22 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
US7482179B2 (en) 2002-10-21 2009-01-27 Samsung Sdi Co., Ltd. Method of fabricating a thin film transistor using dual or multiple gates

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0677484A (ja) * 1992-08-27 1994-03-18 Sharp Corp 薄膜トランジスタ及びその製造方法
JPH08228006A (ja) * 1995-02-21 1996-09-03 Semiconductor Energy Lab Co Ltd 絶縁ゲイト型薄膜半導体装置の作製方法
JPH10189449A (ja) * 1996-12-26 1998-07-21 Seiko Epson Corp 結晶性半導体膜の製造方法、および薄膜トランジスタの製造方法
JP2000058841A (ja) * 1998-08-07 2000-02-25 Semiconductor Energy Lab Co Ltd 半導体装置及びその作製方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0677484A (ja) * 1992-08-27 1994-03-18 Sharp Corp 薄膜トランジスタ及びその製造方法
JPH08228006A (ja) * 1995-02-21 1996-09-03 Semiconductor Energy Lab Co Ltd 絶縁ゲイト型薄膜半導体装置の作製方法
JPH10189449A (ja) * 1996-12-26 1998-07-21 Seiko Epson Corp 結晶性半導体膜の製造方法、および薄膜トランジスタの製造方法
JP2000058841A (ja) * 1998-08-07 2000-02-25 Semiconductor Energy Lab Co Ltd 半導体装置及びその作製方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002057166A (ja) * 2000-06-02 2002-02-22 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
US7482179B2 (en) 2002-10-21 2009-01-27 Samsung Sdi Co., Ltd. Method of fabricating a thin film transistor using dual or multiple gates

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