JP2001326431A - Multiple pattern printed circuit board - Google Patents

Multiple pattern printed circuit board

Info

Publication number
JP2001326431A
JP2001326431A JP2000139928A JP2000139928A JP2001326431A JP 2001326431 A JP2001326431 A JP 2001326431A JP 2000139928 A JP2000139928 A JP 2000139928A JP 2000139928 A JP2000139928 A JP 2000139928A JP 2001326431 A JP2001326431 A JP 2001326431A
Authority
JP
Japan
Prior art keywords
printed circuit
circuit board
small
pcb
small printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000139928A
Other languages
Japanese (ja)
Inventor
Tetsuo Saito
徹雄 斉藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2000139928A priority Critical patent/JP2001326431A/en
Publication of JP2001326431A publication Critical patent/JP2001326431A/en
Pending legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To provide a multiple pattern PCB that can easily identify where a small PCB after division has been arranged before the division, and can reduce labor required for the pickup of articles that has been soldered improperly. SOLUTION: In this multiple pattern printed circuit board, small printed circuit boards 1 to 6 having the same wiring pattern on a printed circuit board are formed via a division line, and electronic components are mounted onto each small printed circuit board and are separated by the division line for manufacturing each small printed circuit board. The division line is composed of a long hole 13 and connection parts 10 to 12, and an identification means for identifying the small printed circuit boards 1 to 6 is provided at the connection parts 10 to 12 remaining on the small printed circuit boards 1 to 6 after the separation.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、プリント基板に複
数の小プリント基板を形成し、電子部品実装後に切り離
して各々の小プリント基板を製造する、いわゆる多面取
りプリント基板に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a so-called multi-panel printed circuit board in which a plurality of small printed boards are formed on a printed circuit board, and each of the small printed boards is cut off after mounting electronic components.

【0002】[0002]

【従来の技術】通常、プリント基板(以下、「PCB」
と略称する)を設計する際には、搭載される機器の搭載
スペースとワークサイズおよび部品実装の工程を考慮し
て設計することが多い。
2. Description of the Related Art Usually, a printed circuit board (hereinafter, referred to as "PCB") is used.
) Is often designed in consideration of the mounting space and work size of the device to be mounted and the component mounting process.

【0003】つまり、コストダウンのために、数種類存
在するワークサイズの面積と基板の面積を比較し、同じ
配線パターンの基板が効率よく何枚取れるかを考慮した
多面取りの方法が取られる。多面取り方法とは、1枚の
大きなプリント基板上に複数の同一配線パターンの複数
の小PCBを分割線を介して形成し、電子部品を実装し
た後に、この配線パターンが形成された小PCBを分割
線で切り離して各々の小プリント基板を製造する方法で
ある。
In other words, in order to reduce the cost, a multi-panel method is adopted in which the areas of several types of work sizes are compared with the areas of the substrates, and the number of substrates having the same wiring pattern is efficiently taken into consideration. The multiple patterning method is to form a plurality of small PCBs having the same wiring pattern on one large printed circuit board through dividing lines, mount electronic components, and then remove the small PCB on which the wiring pattern is formed. This is a method of manufacturing each small printed circuit board by separating at a dividing line.

【0004】図3に従来の多面取りプリント基板の一例
を示す。
FIG. 3 shows an example of a conventional multi-panel printed circuit board.

【0005】図3において21〜26までが必要な小P
CBであり、すべて表面実装部品が搭載される同一の配
線パターンが印刷されている。27,28は捨て部分で
あり、29は各小PCBを保持する接続部(いわゆるミ
シン目)であり、30は長孔であり、接続部と長孔によ
り分割線が形成されている。電子部品を実装した後は、
分割線にそって切り離し、バラバラにして各々の小PC
B21〜26を製造し、各小PCBを各々機器に搭載す
る。
[0005] In FIG. 3, a small P requiring 21 to 26 is required.
CB, all of which are printed with the same wiring pattern on which surface mount components are mounted. 27 and 28 are discarded portions, 29 is a connecting portion (so-called perforation) holding each small PCB, 30 is a long hole, and a dividing line is formed by the connecting portion and the long hole. After mounting electronic components,
Separate along the dividing line, separate and make each small PC
B21 to B26 are manufactured, and each small PCB is mounted on each device.

【0006】電子部品の実装は表面実装部品であるた
め、表面実装部品はリフローによる半田付け工程で半田
付けされる。リフローによる半田付けは、以下のような
工程に沿って行なわれる。まず、メタルマスクと呼ばれ
る半田付け位置に穴のあいた金属板をPCBに重ねて、
クリーム半田を穴のあいた所定の位置に配置する。次い
で、クリーム半田が配置されたPCBに、電子部品を仮
り置きした後、リフロー炉で加熱してクリーム半田を溶
融させ、電子部品をPCBに半田付し実装するものであ
る。
[0006] Since the mounting of the electronic component is a surface mounting component, the surface mounting component is soldered in a reflow soldering process. Soldering by reflow is performed according to the following steps. First, a metal plate with a hole at the soldering position called a metal mask is placed on the PCB,
The cream solder is placed at a predetermined position with a hole. Next, after temporarily placing the electronic component on the PCB on which the cream solder is disposed, the electronic component is heated in a reflow furnace to melt the cream solder, and the electronic component is soldered and mounted on the PCB.

【0007】[0007]

【発明が解決しようとする課題】しかしながら、前記従
来例では、メタルマスクの一部に損傷がある場合、半田
付け不良が生じ、例えば図3の22の小PCBの1部に
半田付けされないという不良品が生じる可能性がある。
However, in the above-mentioned conventional example, when a part of the metal mask is damaged, poor soldering occurs, and for example, there is an inconvenience that it is not soldered to a part of the small PCB 22 in FIG. Good products may be produced.

【0008】小PCBを分割する前に半田付け不良個所
を発見することができれば問題はないが、分割した後に
小PCB22の位置にあたる箇所にメタルマスクが損傷
していたことが判明した場合、切り離した複数の小PC
Bから該当する小PCBを識別することは困難である。
There is no problem if a defective soldering portion can be found before dividing the small PCB. However, if it is found that the metal mask is damaged at a position corresponding to the position of the small PCB 22 after the division, the separation is performed. Multiple small PCs
It is difficult to identify the corresponding small PCB from B.

【0009】すなわち図4に示したように、小PCB2
2に残存する接続部29の位置が他の小PCB21,2
3と同一箇所にあるため、小PCB22、23、24は
いずれも同一の形状を有している。従って、小PCBの
外観から分割前どこに配置されていたかを見分けること
は困難である。そのために、生産現場で不良品のピック
アップに多大な労力を割かれることになる。この対策と
して、各小PCBに21〜26の番号をシルクで印刷
し、区別する手段があるが、やはり番号をチェックする
必要があり、労力を割かれることになる。
That is, as shown in FIG.
2 are connected to the other small PCBs 21 and 2
3, the small PCBs 22, 23, and 24 all have the same shape. Therefore, it is difficult to distinguish from the appearance of the small PCB where it was located before the division. Therefore, a great deal of labor is required for picking up defective products at the production site. As a countermeasure, there is a means for printing and discriminating the numbers 21 to 26 on each small PCB with silk, but it is still necessary to check the numbers, which is labor intensive.

【0010】本発明が解決しようとする課題は、分割後
の小PCBが、分割前どこに配置されていたかが容易に
識別でき、半田付け不良品のピックアップに要する労力
を低減することが可能な多面取りPCBを提供すること
である。
[0010] The problem to be solved by the present invention is that it is possible to easily identify where the small PCB after the division was placed before the division, and to reduce the labor required for picking up defective soldering products. To provide a PCB.

【0011】[0011]

【課題を解決するための手段】本発明は、上記問題点に
鑑み発明されたもので、本発明のプリント基板上に同一
の配線パターンを設けた複数の小プリント基板を分割線
を介して形成し、各々の小プリント基板に電子部品を実
装した後、分割線で切り離して各々の小プリント基板を
製造する多面取りプリント基板において、長孔と複数の
接続部から分割線を構成し、切り離し後小プリント基板
に残存する接続部に各々の小プリント基板を識別する識
別手段を設けたことを特徴とするものであり、さらに前
記識別手段が、接続部の位置を異ならしめる手段である
ことを特徴とするものである。
SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and a plurality of small printed boards provided with the same wiring pattern on a printed board of the present invention are formed through dividing lines. After mounting the electronic components on each small printed circuit board, separate them by dividing lines to form each of the small printed circuit boards. The connection portion remaining on the small printed circuit board is provided with identification means for identifying each small printed circuit board, and the identification means is means for changing the position of the connection portion. It is assumed that.

【0012】例えば、接続部の位置を小PCBの場所に
よって変えることにより、不良基板を含んだ多面取り基
板を割った後でも簡単な目視で識別できる多面取りプリ
ント基板を提供するものである。
[0012] For example, by changing the position of the connection portion depending on the location of the small PCB, it is possible to provide a multi-panel printed board that can be easily visually identified even after the multi-panel board including the defective board is cracked.

【0013】[0013]

【発明の実施の形態】図1、図2に本発明の多面取りプ
リント基板の一実施形態を示す。
1 and 2 show an embodiment of a multi-panel printed circuit board according to the present invention.

【0014】図1において、1〜6が小PCBで7,8
が捨て部分である。9〜12が接続部としてのミシン目
であり、長孔13と共に分割線を構成している。図1で
わかるように従来例に比べて、9〜12に示されるミシ
ン目の位置が異なっている。図1において、基板2に半
田付け不良が存在したとする。その後ミシン目にそって
切断し、各々の小PCBを分割すると図2のようにな
る。
In FIG. 1, 1 to 6 are small PCBs,
Is the discarded part. Reference numerals 9 to 12 denote perforations as connection parts, which together with the long holes 13 constitute a dividing line. As can be seen from FIG. 1, the positions of perforations 9 to 12 are different from those of the conventional example. In FIG. 1, it is assumed that a soldering defect exists on the substrate 2. After that, cutting is performed along the perforations, and each small PCB is divided as shown in FIG.

【0015】図2において10a,10bはミシン目1
0、11a,11bはミシン目11の切断残部である。
不良基板2には左右のサイド中央に切断残部11b,1
1aが存在し、基板1には右サイド中央に切断残部11
a、左サイド上部に切断残部12が存在し、基板3には
左サイド中央に切断残部10a、左サイド上部に切断残
部9が存在する。
In FIG. 2, 10a and 10b are perforations 1.
Reference numerals 0, 11a, and 11b denote remaining portions of the perforations 11.
In the defective board 2, the remaining cutting parts 11b, 1
1a, and the substrate 1 has a cutting residue 11 in the center of the right side.
a, there is a remaining cutting portion 12 at the upper left side, and the substrate 3 has a remaining cutting portion 10a at the center of the left side and a remaining cutting portion 9 at the upper left side.

【0016】図2から分かるように各々の小PCBに残
存するミシン目の切断残部の位置により、目視により小
PCBを識別することができ、不良基板の抽出が容易に
なる。
As can be seen from FIG. 2, the small PCB can be visually identified based on the position of the remaining cut portion of each small PCB, thereby facilitating extraction of a defective board.

【0017】上記実施形態では、接続部(ミシン目)の
位置を異ならしめる手段により、各々の小PCBの識別
を行なったが、識別する手段はこれに限定されるもので
はなく、例えば、接続部の位置によりミシン目の数を変
化させてもよい。すなわち、例えばある接続箇所ではミ
シン目が1で、他の接続箇所ではミシン目を2として識
別を行なってもよい。
In the above embodiment, each small PCB is identified by means for changing the position of the connection part (perforation). However, the identification means is not limited to this. The number of perforations may be changed depending on the position. That is, for example, the identification may be performed such that the perforation is 1 at a certain connection point and the perforation is 2 at another connection point.

【0018】[0018]

【発明の効果】以上説明したように、多面取り基板のミ
シン目に各小PCBを識別する手段を設けることによ
り、各小PCBの位置関係が特定でき、実装時に半田付
け不良が発生した際の不良基板の抽出を容易にする。
As described above, by providing a means for identifying each small PCB at the perforation of the multi-panel board, the positional relationship between the small PCBs can be specified, and when a soldering failure occurs during mounting. It facilitates the extraction of defective substrates.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施形態を説明する図で、多面取り
プリント基板の平面図。
FIG. 1 is a diagram illustrating an embodiment of the present invention, and is a plan view of a multi-surface printed circuit board.

【図2】本発明の一実施例を説明する図で、分割後の小
プリント基板の平面図。
FIG. 2 is a diagram illustrating an embodiment of the present invention, and is a plan view of a small printed circuit board after division.

【図3】従来例の多面取りプリント基板の平面図。FIG. 3 is a plan view of a conventional multiple printed circuit board.

【図4】従来例の多面取りプリント基板を分割した後の
小プリント基板の平面図。
FIG. 4 is a plan view of a small printed circuit board obtained by dividing a conventional multiple printed circuit board.

【符号の説明】[Explanation of symbols]

1 小プリント基板 2 小プリント基板 3 小プリント基板 4 小プリント基板 5 小プリント基板 6 小プリント基板 7 捨て材 8 捨て材 9 ミシン目 10 ミシン目 11 ミシン目 12 ミシン目 13 長孔 Reference Signs List 1 small printed board 2 small printed board 3 small printed board 4 small printed board 5 small printed board 6 small printed board 7 discarded material 8 discarded material 9 perforation 10 perforation 11 perforation 12 perforation 13 long hole

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 プリント基板上に同一の配線パターンを
設けた複数の小プリント基板を分割線を介して形成し、
各々の小プリント基板に電子部品を実装した後、分割線
で切り離して各々の小プリント基板を製造する多面取り
プリント基板において、長孔と複数の接続部から分割線
を構成し、切り離し後小プリント基板に残存する接続部
に各々の小プリント基板を識別する識別手段を設けたこ
とを特徴とする多面取りプリント基板。
1. A plurality of small printed circuit boards provided with the same wiring pattern on a printed circuit board are formed through dividing lines,
After mounting the electronic components on each small printed circuit board, separate them with dividing lines to manufacture each small printed circuit board. A multiple printed circuit board, wherein an identification means for identifying each small printed circuit board is provided at a connection portion remaining on the board.
【請求項2】 前記識別手段が、接続部の位置を異なら
しめる手段であることを特徴とする請求項1に記載のプ
リント基板。
2. The printed circuit board according to claim 1, wherein said identification means is means for changing a position of a connection part.
JP2000139928A 2000-05-12 2000-05-12 Multiple pattern printed circuit board Pending JP2001326431A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000139928A JP2001326431A (en) 2000-05-12 2000-05-12 Multiple pattern printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000139928A JP2001326431A (en) 2000-05-12 2000-05-12 Multiple pattern printed circuit board

Publications (1)

Publication Number Publication Date
JP2001326431A true JP2001326431A (en) 2001-11-22

Family

ID=18647294

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000139928A Pending JP2001326431A (en) 2000-05-12 2000-05-12 Multiple pattern printed circuit board

Country Status (1)

Country Link
JP (1) JP2001326431A (en)

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