JP2001312492A - System and method for retrieval and recording medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce instruction fetch operation and to improve throughput by allowing a bus controller to provide a processing program based upon the retrieval result of retrieval hardware for a CPU in instruction fetch operation of an analyzing process program based upon the retrieval result. SOLUTION: The bus controller 4 is provided with an X address setting register 4-1 and a mechanism which stores an instruction paired with object data to be compared is introduced in peripheral hardware 3 for retrieval. At an instruction fetch request from the CPU 1, the bus controller 4 reads the instruction corresponding to the retrieval result of the peripheral hardware 3 for retrieval out of a comparison object register 3-1 and provides it for the CPU 1. The CPU 1 performs the instruction corresponding to the retrieval result provided through the bus controller 4 without performing a program for analyzing the retrieval result of the peripheral hardware 3 for retrieval.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a search system, a search method, and a recording medium, and more particularly to a search system and a search method in which search processing is performed by hardware around a search, and processing corresponding to the search result is performed by a CPU. And a recording medium.

[0002]

2. Description of the Related Art Conventionally, a CPU (central processor) has been used.
When the processing unit acquires data from the outside, there are two types of methods as described below.

Name: Contents Instruction fetch: Program instructions used to operate the CPU I / O data: Data used when performing control and calculation

Hereinafter, the names shown above will be used.

If the entire search process is performed only by software, the CPU processing efficiency is low. Therefore, in recent years, the processing required for the search uses search hardware, and the CPU performs the processing using the search result of the hardware. And CPU
Is a general method of taking in a result obtained from search hardware as data used for performing control and calculation, and then processing the data.

This general method can be realized by a processing flow described later in a system configuration as shown in FIG.

First, the system configuration will be described. FIG. 2 is a block diagram showing a configuration example of a conventional search system. As shown in the figure, the search system includes a CPU 1 that performs an instruction fetch request, an I / O data read request, a process corresponding to a search result searched by the search peripheral hardware 3 described below, and the like. A memory 2 in which instructions to be executed by the CPU 1 are placed, peripheral hardware for search 3 for executing a search process, and a bus connecting the CPU 1, the memory 2 and the peripheral hardware for search are controlled. CP of the contents at the notified address
And a bus controller 4 for executing processing for returning to U1.

[0008] The memory 2 stores instructions to be executed by the CPU 1. For example, an instruction to set a comparison target value in the comparison target register 3-1 and an instruction to set a search comparison value in the search comparison value register 3-3 to search for a match by comparing with the comparison target value (comparison target Setting), an instruction for reading the search result set in the search result register 3-2 (setting of search comparison value), an instruction for branching according to the result of analyzing the instruction (analysis result corresponding branch), a search result register Instructions such as an instruction (reference data analysis) for performing a process of making a branch corresponding to the search result set in 3-2 are stored.

Next, the flow of processing will be described. (1) The CPU 1 sets a comparison target value in the comparison target register 3-1 of the peripheral hardware for search 3 via the bus controller 4. (2) When the CPU 1 sets the search comparison value in the search comparison value register 3-3, the search peripheral hardware 3 starts the search. If there is a comparison target value that matches the search comparison value, the order position and the like of the comparison target register 3-1 in which the comparison target value is stored are set in the search result register 3-2 as the search result. (3) The CPU 1 reads the value (search result value) of the search result register 3-2 via the bus controller 4. (4) The CPU 1 analyzes the search result value as I / O data. (5) From the analysis result, the CPU 1 branches to a process corresponding to the I / O data and executes the process. (6) If the CPU 1 branches to the process corresponding to the I / O data and does not execute the process in (5), the search result value is further analyzed. (7) From the analysis result, the CPU 1 converts the I / O data into I / O data. Branch to the corresponding process and execute the process. (8) Thereafter, the number of times the process corresponding to the search result is performed,
The analysis and the processing branch judgment corresponding to the analysis result are repeated. In this way, the search peripheral hardware 3 executes the search process, the CPU 1 fetches the search result as data, analyzes the search result, and executes a process corresponding to the search result.

[0010]

However, based on the search result of the peripheral hardware for search 3, the CPU 1
Perform a process, a program for analyzing the search result of the peripheral hardware for search 3 is required in spite of the fact that the CPU 1 leaves the search to the peripheral hardware for search 3, and the search process is viewed as a whole. In this case, processing overhead still remains. For this reason, there is a problem that the CPU 1 uses the search result and cannot immediately perform a process corresponding to the search result.

There are the following three reasons why this problem occurs. (1) When the CPU 1 performs processing based on a search result obtained from the search peripheral hardware 3, the CPU 1 obtains a search result as I / O data. (2) Since the CPU 1 takes in the search result as I / O data, it is necessary to analyze the result for the data. (3) The CPU 1 issues an instruction fetch request to perform this analysis, executes the instruction fetch, and executes the program.

From these three items, in performing a process corresponding to the search result, the CPU 1 analyzes the result of the search peripheral hardware 3 even though the CPU 1 leaves the search to the search peripheral hardware 3. I need a program.
As a result, overhead remains when viewed as a whole search.

The present invention has been made in view of such a situation, and enables a process corresponding to a search result to be performed immediately without analyzing the search result, and executes a process corresponding to the search result. This makes it possible to improve the processing efficiency when performing.

[0014]

According to a first aspect of the present invention, there is provided a retrieval system comprising: first storage means for storing comparison target data to be compared; instructions for pairing with the comparison target data; and first storage means. Second storage means for storing the comparison data to be compared with the comparison data stored in the means, and the comparison data stored in the first storage means and the comparison data stored in the second storage means Comparison means for comparing data with the data, third storage means for storing a comparison result by the comparison means, reading means for reading an instruction corresponding to the comparison result from the first storage means, and an instruction read by the reading means And a fourth storage means for storing an instruction to be executed by the execution means. When the execution means requests the provision of a comparison result by the comparison means, the reading means responds to the request. An instruction corresponding to the comparison result stored in the third storage unit and paired with the comparison target data stored in the first storage unit is provided to the execution unit, and the execution unit is provided by the reading unit. Executing the set instructions. When the comparison unit compares the comparison target data with the comparison data, if there is comparison target data that matches the comparison data, the third storage unit stores
The address of the first storage unit in which the instruction paired with the data to be compared is stored can be stored as the comparison result. Further, when the request from the execution means is an instruction fetch request, the reading means stores the first storage means corresponding to the comparison result stored in the third storage means in response to the request. An instruction paired with the data to be compared can be provided to the execution means. Further, the reading means stores an address of the fourth storage means in which an instruction referring to the comparison result stored in the third storage means is located, and stores the address and an address corresponding to the instruction fetch request by the execution means. Providing a command corresponding to the comparison result stored in the third storage means and paired with the comparison target data stored in the first storage means to the execution means when Can be. 6. The search method according to claim 5, wherein: first storage means for storing comparison target data to be compared, an instruction paired with the comparison target data, and comparison target data stored in the first storage means. Second storage means for storing comparison data to be compared with, comparison means for comparing comparison target data stored in the first storage means with comparison data stored in the second storage means, A search comprising: third storage means for storing a comparison result by the comparison means; reading means for reading an instruction corresponding to the comparison result from the first storage means; and execution means for executing the instruction read by the reading means. A search method in the system, wherein the execution means requests provision of a comparison result by the comparison means,
The reading means provides to the execution means an instruction corresponding to the comparison result stored in the third storage means and corresponding to the comparison target data stored in the first storage means, in response to a request; The execution means executes the instruction provided by the reading means. A recording medium according to a sixth aspect is characterized by recording a program capable of executing the search method according to the fifth aspect. In the search system, the search method, and the recording medium according to the present invention, when the execution unit requests the provision of the comparison result by the comparison unit, the read unit is stored in the third storage unit in response to the request. An instruction corresponding to the comparison result and paired with the comparison target data stored in the first storage unit is provided to the execution unit, and the execution unit executes the instruction provided by the reading unit.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The configuration and operation of a search system according to the present invention will be described below with reference to FIG. Components corresponding to those of the conventional search system shown in FIG. 2 are denoted by the same reference numerals, and description thereof will be omitted as appropriate. In the present embodiment, the following two mechanisms and programs are newly added to the conventional search system.

First, the following mechanism is added to the peripheral hardware for search 3. (1) The comparison target register 3-1 used at the time of retrieval stores an instruction (CP) of the CPU 1 in combination with a comparison target value (comparison target data).
U instruction). (2) The search result returned by the search peripheral hardware 3 is not a conventional search result but a CPU instruction paired with the comparison target register 3-1 matched in the search.

Next, the following mechanism is added to the bus controller 4. (1) A new X address setting register 4-1 is provided.
The X address indicates an address at which the destination of the returned data is to be changed with respect to the instruction fetch request address from the CPU 1. (2) When there is an instruction fetch request from the CPU 1, the request address and the X address setting register 4-1
Make a comparison between From this comparison result, the data fetch destination to be returned is changed in response to an instruction fetch request from the CPU 1. When the comparison results do not match: The instruction at the request address is passed to the CPU 1. When the comparison results match: The contents of the search result register 3-2 of the peripheral hardware for search 3 are passed to the CPU 1. (3) This mechanism operates only for instruction fetch,
If the request for / O data comes from CPU1,
It operates as in the conventional case.

Next, a program executed on the CPU 1 will be described. The mechanism added in the present embodiment is C
A program executed on the PU1 needs to be set in advance.
The following two items need to be set in advance.

(1) Setting in peripheral hardware for search 3 Register 3 to be compared in peripheral hardware for search 3
Set a CPU instruction paired with -1. Note that the CPU instruction set here is an instruction executed after analysis of the search result in the conventional method.

(2) Setting to the bus controller 4 The CPU 1 fetches an instruction, and sets the address of the memory 2 in which the instruction to refer to the search result register 3-2 of the peripheral hardware for search 4 is set to the X address. Set in the setting register 4-1.

Next, the operation of this embodiment will be described. In the present embodiment, a new mechanism is added to two hardware, the search peripheral hardware 3 and the bus controller 4, and a search process is performed using the added mechanism. In this case, it is necessary to set in advance the mechanism as described above. Therefore, the CPU 1 executes a pre-setting program that does not exist in the conventional method and performs pre-setting for the mechanism before executing the search processing.

In executing the search processing, the CPU 1 fetches an instruction originally located at the instruction fetch request address and then executes the instruction. However, in the present embodiment, the X address setting register 4-
1 and a request address by an instruction fetch from the CPU 1 and an X address setting register 4-1.
Is added, and when the request address for the instruction fetch from the CPU 1 is the address set in the X address setting register 4-1, the instruction of the request address is not taken in. Then, the search result register 3-2 of the search peripheral hardware 3 is read.

This eliminates the need for the CPU 1 to issue an instruction fetch request for executing a program for reading a search result of the search peripheral hardware 3.
There is an effect that the processing amount of the CPU 1 is reduced.

However, with only the mechanism added to the bus controller 4, the value obtained by the CPU 1 at the instruction fetch request address of the CPU 1 is the value of the search result, and the CPU 1 cannot execute the instruction. This is I / O data obtained by using the value of the search result register 3-2 of the conventional search peripheral hardware 3 as a search result, and is not a value corresponding to the instruction fetch of the CPU 1.

Therefore, a new mechanism is added to the peripheral hardware for search 3 so that the comparison target register 3-1 has an instruction of the CPU 1 in pairs with the comparison target value.
Then, when the CPU 1 obtains a search result from the search result register 3-2 of the search peripheral hardware 3, the search result is obtained by comparing the CPU with the comparison target value of the comparison target register 3-1.
Return 1 order.

With the above-mentioned mechanism added to the bus controller 4 and the peripheral hardware for search 3, respectively,
The bus controller 4 detects when the search result register 3-2 of the search peripheral hardware 3 is referred to using the request address of the instruction fetch from
The bus controller 4 sends the instruction at the requested address to C
Instead of returning to the PU 1, the CP corresponding to the search result is referred to by referring to the search result register 3-2 of the search peripheral hardware 3.
The instruction of U1 is compared with the register 3 corresponding to the search result.
1 and returns it to the CPU 1 as an instruction corresponding to the requested address.

From this operation, the CPU 1 can perform a process corresponding to the search result without analyzing the value of the search result register 3-2 of the peripheral hardware for search 3.

As described above, according to the present embodiment, it is possible to eliminate the processing amount of the processing performed by the CPU 1 executing a plurality of instructions in the conventional method.

The differences between the conventional method and the method according to the present embodiment in performing the search processing are described below.

In the conventional method, the program executed by the CPU 1 executes the following instructions. (1) Instruction fetch (2) Execution of read instruction (search result register read) (3) Acquisition of contents of search result register (4) Instruction fetch (5) Execution of read instruction (analysis of search result) ( 6) Instruction fetch (7) Execution of read instruction (operation for each analysis result)

On the other hand, the case where the mechanism added in the present embodiment is used is as follows. (1) Instruction fetch (2) Execution of read instruction (operation for each analysis result)

As described above, due to the difference in the processing procedure between the conventional case and the present embodiment, by using the method of the present embodiment, the CPU 1 executes a plurality of instructions in the conventional method. (The operations (2) to (6) in the program executed by the CPU 1 in the conventional method) can be deleted. That is, at the time of the instruction fetch operation of the analysis processing program based on the search result, the bus controller 4 provides the CPU 1 with a processing program (CPU instruction) corresponding to the search result of the peripheral hardware for search 3, thereby executing the instruction executed by the CPU 1. Fetch operations can be reduced. Thereby, the processing efficiency when the CPU 1 executes the processing corresponding to the search result can be improved.

In the above embodiment, the search result register 3-2 indicates, as the search result, the order position of the comparison target register 3-1 in which the comparison target value matching the search comparison value is stored. A value is set, and the CPU instruction stored in the comparison target register 3-1 is read,
Although provided to the CPU 1, a CPU instruction paired with the comparison target value may be set. In this case, the bus controller 4 sets the search result register 3-2.
Will be provided to the CPU 1.

The configuration and operation of the above embodiment are merely examples, and the present invention is not limited to this. It is apparent that the configuration and operation can be appropriately changed without departing from the spirit of the present invention.

[0035]

As described above, according to the retrieval system, the retrieval method, and the recording medium of the present invention, when the execution unit requests the provision of the comparison result by the comparison unit, the reading unit responds to the request. , An instruction corresponding to the comparison result stored in the third storage means and paired with the comparison target data stored in the first storage means is provided to the execution means, and the execution means is provided by the reading means. Since the executed instruction is executed, processing corresponding to the search result can be immediately performed without analyzing the search result,
It is possible to improve the processing efficiency when executing the processing corresponding to the search result.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration example of a search system according to an embodiment of the present invention.

FIG. 2 is a block diagram illustrating a configuration of an example of a conventional search system.

[Explanation of symbols]

 1 CPU 2 Memory 3 Peripheral hardware for search 3-1 Register to be compared 3-2 Search result register 3-3 Search and comparison value register 4 Bus controller 4-1 X address setting register

Claims (6)

[Claims] A first storage unit for storing comparison target data to be compared, an instruction paired with the comparison target data, and a comparison with the comparison target data stored in the first storage unit Second storage means for storing comparison data to be stored, and comparison means for comparing the comparison target data stored in the first storage means with the comparison data stored in the second storage means A third storage unit that stores a comparison result by the comparison unit; a reading unit that reads an instruction corresponding to the comparison result from the first storage unit; and executes the instruction read by the reading unit. And a fourth storage unit for storing an instruction to be executed by the execution unit. When the execution unit requests the comparison unit to provide a comparison result, Means for executing the instruction corresponding to the comparison result stored in the third storage means and corresponding to the comparison target data stored in the first storage means, in response to the request Means for executing the command provided by the reading means. 2. When the comparison unit compares the comparison target data with the comparison data and finds that the comparison target data coincides with the comparison data, the third comparison unit sets the third comparison data.
2. The retrieval system according to claim 1, wherein the storage means stores, as a comparison result, an address of the first storage means in which the command forming a pair with the comparison target data is stored. 3. The read means, when the request from the execution means is an instruction fetch request, corresponds to the comparison result stored in the third storage means in response to the request. The retrieval system according to claim 1, wherein an instruction paired with the comparison target data stored in the first storage unit is provided to the execution unit. 4. The reading means stores an address of the fourth storage means in which an instruction referring to the comparison result stored in the third storage means is stored, and stores the address and the execution number. When the address corresponding to the instruction fetch request by the means matches, the data is compared with the comparison target data stored in the first storage means corresponding to the comparison result stored in the third storage means. 4. The retrieval system according to claim 1, wherein said instruction is provided to said execution means. 5. A comparison target data to be compared, first storage means for storing an instruction paired with the comparison target data, and comparison with the comparison target data stored in the first storage means. Second storage means for storing comparison data to be stored, and comparison means for comparing the comparison target data stored in the first storage means with the comparison data stored in the second storage means A third storage unit for storing a comparison result by the comparison unit; a reading unit for reading an instruction corresponding to the comparison result from the first storage unit; and executing the instruction read by the reading unit. Performing a request for providing a comparison result by the comparing means, the reading means responding to the request. Providing, to the execution unit, an instruction corresponding to the comparison result stored in the third storage unit and paired with the comparison target data stored in the first storage unit; A search method, wherein the execution means executes the instruction provided by the reading means. 6. A recording medium on which a program capable of executing the search method according to claim 5 is recorded.