JP2001298043A - Semiconductor device and its manufacturing method - Google Patents

Semiconductor device and its manufacturing method

Info

Publication number
JP2001298043A
JP2001298043A JP2000279987A JP2000279987A JP2001298043A JP 2001298043 A JP2001298043 A JP 2001298043A JP 2000279987 A JP2000279987 A JP 2000279987A JP 2000279987 A JP2000279987 A JP 2000279987A JP 2001298043 A JP2001298043 A JP 2001298043A
Authority
JP
Japan
Prior art keywords
circuit board
semiconductor substrate
semiconductor device
opening
connection conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000279987A
Other languages
Japanese (ja)
Other versions
JP2001298043A5 (en
Inventor
Toshihiro Iwasaki
俊寛 岩崎
Keiichiro Wakamiya
敬一郎 若宮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2000279987A priority Critical patent/JP2001298043A/en
Publication of JP2001298043A publication Critical patent/JP2001298043A/en
Publication of JP2001298043A5 publication Critical patent/JP2001298043A5/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/4824Connecting between the body and an opposite side of the item with respect to the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48475Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
    • H01L2224/48476Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area
    • H01L2224/48477Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding)
    • H01L2224/48481Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a ball bond, i.e. ball on pre-ball
    • H01L2224/48482Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a ball bond, i.e. ball on pre-ball on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To enhance connection reliability of electrode pads on a semiconductor substrate with respect to an insulating circuit board. SOLUTION: Electrode pads 1 on a semiconductor substrate 3 are mounted to face the terminal electrodes 15 on the back face trough openings 23 in an insulated circuit board 11 and connected with the terminal electrodes 15 by means of connection conductors 5 passing through the openings 23.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は、半導体基板の絶
縁回路基板への実装技術に関する。さらに詳しくは、半
導体基板上の電極パッドと絶縁回路基板上の端子電極と
を、絶縁回路基板に設けたスルーホールを通して接続用
導体により接続した半導体装置およびその製造方法に関
するものである。
The present invention relates to a technology for mounting a semiconductor substrate on an insulated circuit board. More specifically, the present invention relates to a semiconductor device in which electrode pads on a semiconductor substrate and terminal electrodes on an insulated circuit board are connected by connection conductors through through holes provided in the insulated circuit board, and a method of manufacturing the same.

【0002】[0002]

【従来の技術】図8は、従来の半導体装置において、半
導体基板を絶縁回路基板上に実装した接続部近傍の断面
図を示す。図8において、3は半導体基板、1は半導体
基板3の電極パッド、25は電極パッド1に設けられた
接続用下地金属膜、7は半導体基板3の保護絶縁膜、1
1は絶縁回路基板、15は絶縁回路基板11の端子電
極、31は電極パッド1と端子電極11を電気接続する
バンプ(共晶ハンダ)、21は半導体基板1と絶縁回路
基板11との間を封止する封止樹脂、27はソルダーレ
ジストを示し、30’はこれらを含む従来の半導体装置
を示している。
2. Description of the Related Art FIG. 8 is a cross-sectional view showing the vicinity of a connection portion where a semiconductor substrate is mounted on an insulated circuit board in a conventional semiconductor device. 8, reference numeral 3 denotes a semiconductor substrate, 1 denotes an electrode pad of the semiconductor substrate 3, 25 denotes a base metal film for connection provided on the electrode pad 1, 7 denotes a protective insulating film of the semiconductor substrate 3, 1
1 is an insulated circuit board, 15 is a terminal electrode of the insulated circuit board 11, 31 is a bump (eutectic solder) for electrically connecting the electrode pad 1 and the terminal electrode 11, and 21 is a space between the semiconductor substrate 1 and the insulated circuit board 11. The sealing resin for sealing, 27 indicates a solder resist, and 30 'indicates a conventional semiconductor device including these.

【0003】図8を参照すると、従来の半導体装置3
0’では、半導体基板3の電極パッド1に設けた接続用
下地金属膜25と、絶縁回路基板11上の端子電極15
上に設けられたバンプ31(共晶ハンダ)とが対応する
ように位置決めしたうえで、バンプ31を溶触して接続
用下地金属膜25と接合させる。その後、絶縁回路基板
11と半導体基板3間を封止樹脂21で封止している。
Referring to FIG. 8, a conventional semiconductor device 3
0 ′, the connection base metal film 25 provided on the electrode pad 1 of the semiconductor substrate 3 and the terminal electrode 15 on the insulated circuit board 11
After the bumps 31 (eutectic solder) provided thereon are positioned so as to correspond to each other, the bumps 31 are welded and joined to the connection base metal film 25. After that, the space between the insulating circuit board 11 and the semiconductor substrate 3 is sealed with a sealing resin 21.

【0004】[0004]

【発明が解決しようとする課題】このような半導体装置
において、デバイスの高集積化に伴い半導体基板3上の
電極パッド1の狭ピッチ化が進むと、半導体基板3と絶
縁回路基板11の隙間が狭くなる。このため、半導体基
板3と絶縁回路基板11の熱膨張のミスマッチが発生す
る恐れがあり、バンプ31に生じる応力が増大するとい
う問題点があった。
In such a semiconductor device, when the pitch of the electrode pads 1 on the semiconductor substrate 3 is reduced with the increase in the degree of integration of the device, the gap between the semiconductor substrate 3 and the insulating circuit substrate 11 is increased. Narrows. Therefore, there is a possibility that a mismatch in thermal expansion between the semiconductor substrate 3 and the insulated circuit board 11 may occur, and there is a problem that stress generated in the bumps 31 increases.

【0005】この発明は上記のような問題点を解消する
ためになされたもので、絶縁回路基板に設けられたスル
ーホールを利用し、半導体基板上の電極パッドを絶縁回
路基板の端子電極に接続用導体を介して接続するデバイ
ス構造を実現するものである。これにより、絶縁回路基
板に対する半導体基板上の電極パッドの接続信頼性を向
上できる。同時に、半導体デバイスの高集積化に伴う電
極パッドの狭ピッチ化に対しても、絶縁回路基板に対す
る半導体基板上の電極パッドの接続信頼性を確保できる
ようになる。
SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and connects an electrode pad on a semiconductor substrate to a terminal electrode of an insulated circuit board by using a through hole provided in the insulated circuit board. It realizes a device structure for connection via a conductor for use. Thereby, the connection reliability of the electrode pads on the semiconductor substrate with respect to the insulating circuit substrate can be improved. At the same time, the connection reliability of the electrode pads on the semiconductor substrate with respect to the insulated circuit board can be ensured even when the pitch of the electrode pads is reduced due to the high integration of semiconductor devices.

【0006】[0006]

【課題を解決するための手段】請求項1の発明にかかる
半導体装置は、電極パッドが形成された半導体基板と、
主面と背面とを有し、主面が前記半導体基板の電極パッ
ドに対向して配置され、前記電極パッドに対応する位置
で、主面と背面との間、または背面に端子電極が形成さ
れ、前記主面から前記端子電極に至る開口が形成された
絶縁回路基板と、前記開口内を通り、前記半導体基板の
電極パッドと前記絶縁回路基板の端子電極との間を接続
する接続用導体と、を備えたものである。
According to a first aspect of the present invention, there is provided a semiconductor device comprising: a semiconductor substrate on which an electrode pad is formed;
Having a main surface and a back surface, the main surface is disposed to face the electrode pad of the semiconductor substrate, and at a position corresponding to the electrode pad, a terminal electrode is formed between the main surface and the back surface or on the back surface. An insulating circuit board having an opening extending from the main surface to the terminal electrode, and a connection conductor that passes through the opening and connects between an electrode pad of the semiconductor substrate and a terminal electrode of the insulating circuit board. , Is provided.

【0007】請求項2の発明にかかる半導体装置は、電
極パッドが形成された半導体基板と、主面と背面とを有
し、主面が前記半導体基板の電極パッドに対向して配置
され、前記電極パッドに対応する位置に開口が形成さ
れ、この開口の内壁面に端子電極が形成された絶縁回路
基板と、前記開口内を通り、前記半導体基板の電極パッ
ドと前記絶縁回路基板の端子電極との間を接続する接続
用導体と、を備えたものである。
According to a second aspect of the present invention, there is provided a semiconductor device having a semiconductor substrate on which electrode pads are formed, a main surface and a back surface, wherein the main surface is arranged to face the electrode pads of the semiconductor substrate. An opening is formed at a position corresponding to the electrode pad, an insulated circuit board having a terminal electrode formed on an inner wall surface of the opening, and an electrode pad of the semiconductor substrate and a terminal electrode of the insulated circuit board passing through the opening. And a connection conductor for connecting between them.

【0008】請求項3の発明にかかる半導体装置は、電
極パッドが形成された半導体基板と、主面と背面とを有
し、主面が前記半導体基板の電極パッドに対向して配置
され、前記電極パッドに対応する位置に開口が形成さ
れ、主面と背面との間の中間の平面で、または背面の平
面で、前記開口に接して前記開口の周りに端子電極が形
成された絶縁回路基板と、前記開口内を通り、前記半導
体基板の電極パッドと前記絶縁回路基板の端子電極との
間を接続する接続用導体と、を備えたものである。
According to a third aspect of the present invention, there is provided a semiconductor device having a semiconductor substrate on which electrode pads are formed, a main surface and a back surface, wherein the main surface is disposed so as to face the electrode pads of the semiconductor substrate. An insulating circuit board in which an opening is formed at a position corresponding to the electrode pad, and a terminal electrode is formed around the opening in contact with the opening on an intermediate plane between the main surface and the back surface or on the back surface And a connection conductor that passes through the opening and connects between the electrode pad of the semiconductor substrate and the terminal electrode of the insulated circuit board.

【0009】請求項4の発明にかかる半導体装置は、電
極パッドが形成された半導体基板と、主面と背面とを有
し、主面が前記半導体基板の電極パッドに対向して配置
され、前記電極パッドに対応する位置に開口が形成さ
れ、前記背面の前記開口の近辺に端子電極が形成された
絶縁回路基板と、前記開口内を通って、前記半導体基板
の電極パッドと前記絶縁回路基板の端子電極との間を接
続する接続用導体と、を備えたものである。
A semiconductor device according to a fourth aspect of the present invention has a semiconductor substrate on which electrode pads are formed, a main surface and a back surface, wherein the main surface is disposed so as to face the electrode pads of the semiconductor substrate. An opening is formed at a position corresponding to the electrode pad, an insulated circuit board having a terminal electrode formed near the opening on the back surface, and through the opening, the electrode pad of the semiconductor substrate and the insulated circuit board. And a connection conductor for connecting between the terminal electrodes.

【0010】請求項5の発明にかかる半導体装置は、請
求項1〜4のいずれかに記載のものにおいて、前記絶縁
回路基板が、主面、背面、または主面と背面との中間層
において、合わせて2層以上の配線層を備えたものであ
る。
A semiconductor device according to a fifth aspect of the present invention is the semiconductor device according to any one of the first to fourth aspects, wherein the insulating circuit board has a main surface, a back surface, or an intermediate layer between the main surface and the back surface. In total, two or more wiring layers are provided.

【0011】請求項6の発明にかかる半導体装置は、請
求項5に記載のものにおいて、前記主面または中間層の
2層以上の配線層が、前記開口部において前記接続用導
体に電気的に接続されたものである。
According to a sixth aspect of the present invention, in the semiconductor device according to the fifth aspect, two or more wiring layers of the main surface or the intermediate layer are electrically connected to the connection conductor at the opening. Connected.

【0012】請求項7の発明にかかる半導体装置は、請
求項1〜4のいずれかに記載のものにおいて、前記接続
用導体が、同一の材質の連続体により形成されたもので
ある。
According to a seventh aspect of the present invention, in the semiconductor device according to any one of the first to fourth aspects, the connecting conductor is formed of a continuous body of the same material.

【0013】請求項8の発明にかかる半導体装置は、請
求項1〜4のいずれかに記載のものにおいて、前記接続
用導体が、2種以上の材質を積層して形成されたもので
ある。
According to an eighth aspect of the present invention, in the semiconductor device according to any one of the first to fourth aspects, the connection conductor is formed by laminating two or more kinds of materials.

【0014】請求項9の発明にかかる半導体装置は、請
求項4に記載のものにおいて、前記接続用導体が、前記
半導体基板の電極パッドに接合された塊状の第一の導体
部分と、この第一の導電部分から前記絶縁回路基板の端
子電極に至る線状の第二の導体部分とからなるものであ
る。
A semiconductor device according to a ninth aspect of the present invention is the semiconductor device according to the fourth aspect, wherein the connecting conductor is formed of a lump-shaped first conductor portion joined to an electrode pad of the semiconductor substrate. A linear second conductor portion extending from one conductive portion to the terminal electrode of the insulated circuit board.

【0015】請求項10の発明にかかる半導体装置は、
請求項4に記載のものにおいて、前記絶縁回路基板の背
面側から前記接続用導体を封止する封止樹脂を備えたも
のである。
According to a tenth aspect of the present invention, a semiconductor device comprises:
The device according to claim 4, further comprising a sealing resin for sealing the connection conductor from the back side of the insulated circuit board.

【0016】請求項11の発明にかかる半導体装置は、
請求項1〜4のいずれかに記載のものにおいて、前記開
口は、その断面形状が円形、楕円形、ほぼ四角形を含む
所望の形状に形成されたものである。
A semiconductor device according to the invention of claim 11 is:
The opening according to any one of claims 1 to 4, wherein the opening is formed in a desired shape including a circular shape, an elliptical shape, and a substantially rectangular shape.

【0017】請求項12の発明にかかる半導体装置は、
請求項1〜4のいずれかに記載のものにおいて、前記接
続用導体は、前記開口の内面に少なくとも一部が接する
ように形成されるか、もしくは、接しないように形成さ
れたものである。
According to a twelfth aspect of the present invention, there is provided a semiconductor device comprising:
5. The connection conductor according to claim 1, wherein the connection conductor is formed so as to be at least partially in contact with an inner surface of the opening, or is formed so as not to be in contact with the inner surface of the opening.

【0018】請求項13の発明にかかる半導体装置は、
請求項12に記載のものにおいて、前記開口の前記接続
用導体との間隙は、空隙であるかまたは非導電性樹脂が
設置されたものである。
According to a thirteenth aspect of the present invention, there is provided a semiconductor device comprising:
13. The device according to claim 12, wherein a gap between the opening and the connection conductor is a gap or a non-conductive resin is provided.

【0019】請求項14の発明にかかる半導体装置は、
請求項1〜4のいずれかに記載のものにおいて、前記半
導体基板と前記絶縁回路基板との間に非導電性樹脂が設
置されたものである。
According to a fourteenth aspect of the present invention, there is provided a semiconductor device comprising:
5. A non-conductive resin according to claim 1, wherein a non-conductive resin is provided between said semiconductor substrate and said insulated circuit board.

【0020】請求項15の発明にかかる半導体装置は、
請求項1〜4のいずれかに記載のものにおいて、前記非
導電性樹脂により前記半導体基板と前記絶縁回路基板と
が固着されたものである。
According to a fifteenth aspect of the present invention, there is provided a semiconductor device comprising:
5. The semiconductor device according to claim 1, wherein said semiconductor substrate and said insulated circuit board are fixed by said non-conductive resin.

【0021】請求項16の発明にかかる半導体装置の製
造方法は、主面と背面とを有する絶縁回路基板に、主面
側から、背面または主面と背面との間に配置された端子
電極に達する開口を形成する工程と、電極パッドが形成
された半導体基板を前記電極パッドと前記開口とが対応
するようにして、前記半導体基板を前記絶縁回路基板に
搭載する工程と、前記電極パッドと前記端子電極とを前
記開口を通る接続用導体で接続する工程と、を含むもの
である。
According to a sixteenth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of: connecting an insulating circuit substrate having a main surface and a back surface to a terminal electrode disposed between the main surface and the back surface or between the main surface and the back surface; Forming an opening to reach, and mounting the semiconductor substrate on the insulated circuit board such that the electrode pad and the opening correspond to the semiconductor substrate on which the electrode pad is formed; and Connecting the terminal electrode with a connection conductor passing through the opening.

【0022】請求項17の発明にかかる半導体装置の製
造方法は、請求項16に記載の製造方法において、前記
接続用導体を予め前記半導体基板の電極パッドの上に形
成する工程と、前記非導電性の樹脂を予め前記絶縁回路
基板上に設置する工程と、を含むものである。
According to a seventeenth aspect of the present invention, in the manufacturing method of the sixteenth aspect, a step of previously forming the connection conductor on an electrode pad of the semiconductor substrate; And installing a conductive resin on the insulated circuit board in advance.

【0023】請求項18の発明にかかる半導体装置の製
造方法は、請求項16に記載の製造方法において、前記
接続用導体の一部を予め前記半導体基板の電極パッドの
上に形成するとともに、前記接続用導体の他の一部を予
め前記絶縁回路基板の開口内に形成する工程と、前記非
導電性の樹脂を予め前記絶縁回路基板上に設置する工程
と、を含むものである。
According to a eighteenth aspect of the present invention, in the manufacturing method of the sixteenth aspect, a part of the connection conductor is formed in advance on an electrode pad of the semiconductor substrate, and The method includes a step of forming another part of the connection conductor in advance in the opening of the insulated circuit board, and a step of previously installing the non-conductive resin on the insulated circuit board.

【0024】請求項19の発明にかかる半導体装置の製
造方法は、半導体基板の電極パッド上に接続用導体を形
成する工程と、主面と背面とを有し、背面に端子電極を
有する絶縁回路基板に開口を設ける工程と、前記電極パ
ッド上の接続用導体が前記絶縁回路基板の主面側の前記
開口内に位置するようにして前記半導体基板を前記絶縁
回路基板に搭載する工程と、前記接続用導体と前記端子
電極とを前記開口を介して電気的に接続する工程と、前
記絶縁回路基板の背面から前記接続用導体と前記端子電
極とを樹脂封止する工程と、を含むものである。
According to a nineteenth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of: forming a connecting conductor on an electrode pad of a semiconductor substrate; Providing an opening in the substrate, and mounting the semiconductor substrate on the insulated circuit board such that the connection conductor on the electrode pad is located in the opening on the main surface side of the insulated circuit board; The method includes a step of electrically connecting the connection conductor and the terminal electrode through the opening, and a step of resin-sealing the connection conductor and the terminal electrode from the back surface of the insulated circuit board.

【0025】請求項20の発明にかかる半導体装置の製
造方法は、請求項16または19に記載の製造方法にお
いて、前記電極パッド上の接続用導体が前記絶縁回路基
板の開口の内壁に接触して固定されるように前記半導体
基板を前記絶縁回路基板に搭載するものである。
According to a twentieth aspect of the present invention, in the manufacturing method of the sixteenth or nineteenth aspect, the connecting conductor on the electrode pad contacts an inner wall of the opening of the insulated circuit board. The semiconductor substrate is mounted on the insulated circuit board so as to be fixed.

【0026】請求項21の発明にかかる半導体装置の製
造方法は、請求項16または19に記載の製造方法にお
いて、前記電極パッド上の接続用導体が前記絶縁回路基
板の開口の内壁に接触しないように前記半導体基板を前
記絶縁回路基板に搭載するものである。
According to a twenty-first aspect of the present invention, in the manufacturing method of the sixteenth or nineteenth aspect, the connecting conductor on the electrode pad does not contact the inner wall of the opening of the insulated circuit board. And mounting the semiconductor substrate on the insulated circuit board.

【0027】[0027]

【発明の実施の形態】以下にこの発明の実施の形態につ
いて図面を参照して詳細に説明する。なお、図中、同一
または相当する部分には同一の符号を付してあり、場合
によりその説明を簡略化ないし省略する。 実施の形態1.以下、この発明の実施の形態1を図面を
参照して詳細に説明する。図1(a)〜(d)は、この
発明の実施の形態1による半導体装置における、半導体
基板と絶縁回路基板との接続部近傍の断面図である。ま
た、図1(e)は図1(a)〜(d)の半導体装置の上
面図の概念図を一般的に示すものである。図1(a)〜
(d)において、3は半導体基板、1は半導体基板3の
電極パッド、7は半導体基板3の保護絶縁膜を示す。保
護膜7は、例えばガラスコート膜7aとポリイミド膜7
bとの積層膜として形成されているが、このような構成
に限定されるものではない。また、11は絶縁回路基
板、13は絶縁回路基板11の配線層、15は絶縁回路
基板11の端子電極、17は絶縁回路基板11の外部端
子用電極、19は外部端子、23は絶縁回路基板11に
設けた開口(この例ではスルーホール)を示す。さら
に、5はスルーホール23に設置された接続用導体、9
は半導体基板3と絶縁回路基板11の間に設置された非
導電性樹脂であり、30はこれらを含む半導体装置を示
す。
Embodiments of the present invention will be described below in detail with reference to the drawings. In the drawings, the same or corresponding portions are denoted by the same reference characters, and description thereof will be simplified or omitted as appropriate. Embodiment 1 FIG. Hereinafter, a first embodiment of the present invention will be described in detail with reference to the drawings. FIGS. 1A to 1D are cross-sectional views showing the vicinity of a connection portion between a semiconductor substrate and an insulated circuit board in a semiconductor device according to a first embodiment of the present invention. FIG. 1E generally shows a conceptual diagram of a top view of the semiconductor device of FIGS. 1A to 1D. FIG. 1 (a)-
3D, reference numeral 3 denotes a semiconductor substrate, reference numeral 1 denotes an electrode pad of the semiconductor substrate 3, and reference numeral 7 denotes a protective insulating film of the semiconductor substrate 3. The protective film 7 includes, for example, a glass coat film 7a and a polyimide film 7
Although it is formed as a laminated film with b, it is not limited to such a configuration. Further, 11 is an insulated circuit board, 13 is a wiring layer of the insulated circuit board 11, 15 is a terminal electrode of the insulated circuit board 11, 17 is an external terminal electrode of the insulated circuit board 11, 19 is an external terminal, and 23 is an insulated circuit board 11 shows an opening (through hole in this example) provided at 11. Reference numeral 5 denotes a connection conductor provided in the through hole 23;
Is a non-conductive resin provided between the semiconductor substrate 3 and the insulated circuit board 11, and 30 indicates a semiconductor device including these.

【0028】図1(a)に示すように、本実施の形態の
第一例の半導体装置30では、半導体基板3は、その表
面に電極パッド1が設けられ、その周りは保護絶縁膜7
で覆われている。絶縁回路基板11は、半導体基板3に
対向する表面(主面)と、その反対側の裏面(背面)に
それぞれ配線層13を有している。また、半導体基板3
の電極パッド1に対応する位置にスルーホール23が設
けられ、スルーホール23の底部、すなわち、絶縁回路
基板11の背面には端子電極15が形成されている。こ
のような半導体基板3を絶縁回路基板11に搭載し、半
導体基板3の電極パッド1と絶縁回路基板11の端子電
極15とをスルーホール23に設置した接続用導体5を
介して電気的に接続している。さらに、半導体基板3と
絶縁回路基板11との隙間に非導電性樹脂9を設置して
封止している。
As shown in FIG. 1A, in a semiconductor device 30 according to a first example of the present embodiment, an electrode pad 1 is provided on a surface of a semiconductor substrate 3, and a protective insulating film 7 is provided around the electrode pad 1.
Covered with. The insulated circuit board 11 has a wiring layer 13 on the front surface (main surface) facing the semiconductor substrate 3 and on the back surface (rear surface) on the opposite side. In addition, the semiconductor substrate 3
A through hole 23 is provided at a position corresponding to the electrode pad 1, and a terminal electrode 15 is formed at the bottom of the through hole 23, that is, on the back surface of the insulated circuit board 11. Such a semiconductor substrate 3 is mounted on the insulated circuit board 11, and the electrode pads 1 of the semiconductor substrate 3 and the terminal electrodes 15 of the insulated circuit board 11 are electrically connected via the connection conductor 5 provided in the through hole 23. are doing. Further, a non-conductive resin 9 is provided in a gap between the semiconductor substrate 3 and the insulated circuit board 11 and sealed.

【0029】図1(a)に示すように、この半導体装置
30では、絶縁回路基板11の、半導体基板3が搭載さ
れている面と反対側(背面)に端子電極15を設け、こ
の端子電極15の位置で絶縁回路基板11にスルーホー
ル23を設けている。そして、このスルーホール23を
通過する接続用導体により、半導体基板3の電極パッド
1と絶縁回路基板11の端子電極15とを接続してい
る。これにより、絶縁回路基板11の厚みの分だけ多く
接続用導体5の高さを確保することができる。同時に、
半導体基板3と絶縁回路基板11間の熱膨張のミスマッ
チに主因して生じる接続用導体5内での応力を低下させ
ることができる。なお、接続用導体5は同一の材質の連
続体により形成されていてもよく、また製造方法によっ
ては、複数種類の材質を継ぎ足すように構成されていて
もよい。すなわち、積層構造であってもよい。なおま
た、接続用導体5と絶縁回路基板11の端子電極15と
の接続は放熱を目的としたものではない。したがって、
接続用導体5に接続された端子電極15が外部端子19
に熱伝導的に接続されている必要はない。また、端子電
極15が露出している必要はなく、保護膜などで覆われ
ていてもよい。
As shown in FIG. 1A, in the semiconductor device 30, a terminal electrode 15 is provided on the opposite side (back surface) of the insulated circuit board 11 from the surface on which the semiconductor substrate 3 is mounted. A through hole 23 is provided in the insulated circuit board 11 at the position 15. The electrode pad 1 of the semiconductor substrate 3 and the terminal electrode 15 of the insulated circuit board 11 are connected by a connection conductor passing through the through hole 23. Thereby, the height of the connection conductor 5 can be ensured by the thickness of the insulating circuit board 11. at the same time,
It is possible to reduce the stress in the connection conductor 5 which is mainly caused by the thermal expansion mismatch between the semiconductor substrate 3 and the insulating circuit board 11. Note that the connection conductor 5 may be formed of a continuum of the same material, or may be configured such that a plurality of types of materials are added depending on the manufacturing method. That is, a laminated structure may be used. The connection between the connection conductor 5 and the terminal electrode 15 of the insulated circuit board 11 is not intended for heat radiation. Therefore,
The terminal electrode 15 connected to the connection conductor 5 is connected to the external terminal 19.
It does not need to be thermally conductively connected. Further, the terminal electrode 15 need not be exposed, and may be covered with a protective film or the like.

【0030】また、図1(a)に示すように、この半導
体装置30では、絶縁回路基板11の表裏2層に配線層
13を形成しているため、絶縁回路基板11の配線層1
3の自由度を向上できる。また、図1(a)の左端に示
すように、絶縁回路基板11の半導体基板3側(主面)
に、外部端子用電極17を設けており、スルーホールを
通して外部端子19を接続している。また、半導体基板
3と絶縁回路基板11間との間に非導電性樹脂9を配置
している。これにより、半導体基板3と絶縁回路基板1
1の熱膨張のミスマッチに起因して生じる応力を緩和さ
せることができる。
Further, as shown in FIG. 1A, in the semiconductor device 30, the wiring layers 13 are formed on the front and back two layers of the insulating circuit board 11, so that the wiring layers 1
3 degrees of freedom can be improved. Further, as shown at the left end of FIG. 1A, the semiconductor substrate 3 side (main surface) of the insulated circuit board 11
In addition, an external terminal electrode 17 is provided, and an external terminal 19 is connected through a through hole. Further, a non-conductive resin 9 is arranged between the semiconductor substrate 3 and the insulating circuit board 11. Thereby, the semiconductor substrate 3 and the insulated circuit board 1
The stress caused by the thermal expansion mismatch of No. 1 can be reduced.

【0031】次に、図1(b)に示すように、本実施の
形態の第二例では、絶縁回路基板11が複数の基板から
構成されており、絶縁回路基板11の中間の厚みの位置
で、基板の層間に端子電極15を設けている。そして、
絶縁回路基板11には、この中間の端子電極15までの
開口(この場合ビアホール)23が形成されている。そ
して、半導体基板3の電極パッド1と絶縁回路基板11
の中間位置の端子電極15とがビアホール23に設置さ
れた接続用導体5により接続されている。このように、
絶縁回路基板11が2層以上の基板から構成されている
場合にも、図1(a)の場合と同様の作用・効果が実現
できる。すなわち、本実施の形態は、2層以上の多層構
造の絶縁回路基板11にも適応でき、半導体基板3と絶
縁回路基板11の電気的接続を行う接続用導体5に生じ
る応力を低下させることができる。
Next, as shown in FIG. 1B, in the second example of the present embodiment, the insulating circuit board 11 is composed of a plurality of boards, Thus, the terminal electrode 15 is provided between the layers of the substrate. And
The insulated circuit board 11 has an opening (via hole in this case) 23 extending to the intermediate terminal electrode 15. Then, the electrode pads 1 of the semiconductor substrate 3 and the insulating circuit board 11
Is connected to the terminal electrode 15 at the intermediate position by the connection conductor 5 provided in the via hole 23. in this way,
Even when the insulated circuit board 11 is composed of two or more layers, the same operation and effect as in the case of FIG. 1A can be realized. That is, the present embodiment can be applied to the insulated circuit board 11 having a multilayer structure of two or more layers, and can reduce the stress generated in the connection conductor 5 for electrically connecting the semiconductor substrate 3 and the insulated circuit board 11. it can.

【0032】次に、図1(c)に示すように、本実施の
形態の第三例では、絶縁回路基板11が2層の基板から
構成され、それぞれの表面に配線層13が形成されてい
る。絶縁回路基板11の半導体基板3側と反対側(背
面)に端子電極15が設けられ、そこに達するスルーホ
ール23が形成されている。半導体基板3の電極パッド
1と絶縁回路基板11の電極端子15とは、スルーホー
ル23に設置された接続用導体5で電気的に接続されて
いる。このとき、絶縁回路基板11の中間層の配線13
も接続導体5と電気的に接続される。すなわち、スルー
ホール23を用いて絶縁回路基板11の2層の配線層を
接続している。このような構造によっても、図1(a)
に示すケースと同様の作用・効果を実現できる。
Next, as shown in FIG. 1C, in a third example of the present embodiment, the insulating circuit board 11 is composed of two layers, and the wiring layer 13 is formed on each surface. I have. A terminal electrode 15 is provided on the opposite side (back surface) of the insulated circuit board 11 from the semiconductor substrate 3 side, and a through hole 23 reaching the terminal electrode 15 is formed. The electrode pad 1 of the semiconductor substrate 3 and the electrode terminal 15 of the insulated circuit board 11 are electrically connected by the connection conductor 5 provided in the through hole 23. At this time, the wiring 13 of the intermediate layer of the insulated circuit board 11
Are also electrically connected to the connection conductor 5. That is, the two wiring layers of the insulated circuit board 11 are connected using the through holes 23. Even with such a structure, FIG.
The same operation and effect as the case shown in FIG.

【0033】次に、図1(d)に示すように、本実施の
形態の第四の例では、図1(a)に示したような絶縁回
路基板11のスルーホール23を貫通した接続用導体5
と、スルーホールを貫通しない通常の接続用導体5との
両方を備えている。電極パッド1はAl(アルミニウ
ム)を主体に構成され、電極パッド1の周辺は絶縁樹脂
(PI)によって被覆されている。なお、以上の本実施
の形態で、スルーホール23の内面と接続用導体5との
間隙は、空隙であっても、非導電性樹脂が配置されてい
てもよい。また、その混合であってもよい。また、接続
用導体5が一部でのみスルーホール23の内面に接触し
ていてもよい。接続用導体5がスルーホール23に充満
して固定化するよりも、接続用導体5に及ぼす応力を緩
和できる。
Next, as shown in FIG. 1D, in a fourth example of the present embodiment, a connection through the through hole 23 of the insulated circuit board 11 as shown in FIG. Conductor 5
And a normal connection conductor 5 that does not penetrate through holes. The electrode pad 1 is mainly composed of Al (aluminum), and the periphery of the electrode pad 1 is covered with an insulating resin (PI). In the above embodiment, the gap between the inner surface of the through hole 23 and the connection conductor 5 may be an air gap or a non-conductive resin may be arranged. Moreover, the mixture may be sufficient. Further, the connection conductor 5 may be in contact with the inner surface of the through hole 23 only in a part. The stress exerted on the connection conductor 5 can be reduced as compared with the case where the connection conductor 5 fills and fixes the through hole 23.

【0034】次に、図1(e)は、この実施の形態の半
導体装置30を絶縁回路基板11の背面側から見た平面
図である。絶縁回路基板11のほぼ中心線上に端子電極
15が配列され、その両側に基板電極19が配列され、
両者が配線13で接続されている。なお、本実施の形態
において、絶縁回路基板11としては、両面にそれぞれ
配線層13を備えた1層以上の基板を、他の基板ととも
に積層した多層構造の絶縁回路基板であってもよい。
Next, FIG. 1E is a plan view of the semiconductor device 30 of this embodiment as viewed from the back side of the insulated circuit board 11. Terminal electrodes 15 are arranged substantially on the center line of the insulated circuit board 11, and substrate electrodes 19 are arranged on both sides thereof.
Both are connected by a wiring 13. In the present embodiment, the insulated circuit board 11 may be a multi-layer insulated circuit board in which one or more boards each having a wiring layer 13 on both surfaces are laminated together with another board.

【0035】次に、本発明の実施の形態1にかかる半導
体装置の製造方法を説明する。図2(a),(b)は、
本発明の本実施の形態1による半導体装置の製造方法を
説明するための図であり、半導体装置における半導体基
板と絶縁回路基板との接続部近傍の断面図である。
Next, a method of manufacturing the semiconductor device according to the first embodiment of the present invention will be described. FIGS. 2 (a) and 2 (b)
FIG. 5 is a diagram for explaining the method for manufacturing the semiconductor device according to the first embodiment of the present invention, which is a cross-sectional view near the connection between the semiconductor substrate and the insulating circuit substrate in the semiconductor device.

【0036】本実施の形態の半導体装置の製造方法の第
一例では、図2(a)に示すように、半導体基板3の表
面に設けられた電極パッド1上のみに接続用導体5を形
成し、絶縁回路基板11と半導体基板3との間隙を充填
するために非導電性樹脂9を絶縁回路基板11上に設け
たうえで、接続用導体5と端子電極15が対応するよう
に加熱圧着を行う。図示矢印は、上方から半導体基板3
を絶縁回路基板11の方向へ押圧する状態を示してい
る。このとき、接続用導体5は絶縁回路基板11のスル
ーホール23の壁面には接合せず、端子電極15と接合
される。スルーホール23がない場合に比べて、接続用
導体5は絶縁回路基板11分だけ高い構造となる。
In the first example of the method of manufacturing a semiconductor device according to the present embodiment, as shown in FIG. 2A, the connection conductor 5 is formed only on the electrode pad 1 provided on the surface of the semiconductor substrate 3. Then, a non-conductive resin 9 is provided on the insulating circuit board 11 to fill a gap between the insulating circuit board 11 and the semiconductor substrate 3, and then heat-pressed so that the connection conductors 5 and the terminal electrodes 15 correspond to each other. I do. The arrow shown in the figure indicates the semiconductor substrate 3 from above.
Is pressed in the direction of the insulated circuit board 11. At this time, the connection conductor 5 is not joined to the wall surface of the through hole 23 of the insulated circuit board 11 but is joined to the terminal electrode 15. The connecting conductor 5 has a structure that is higher by the amount of the insulating circuit board 11 than in the case where there is no through hole 23.

【0037】次に、図2(b)に示すように、本実施の
形態の半導体装置の製造方法の第二例では、半導体基板
3の表面に設けられた電極パッド1の上、および絶縁回
路基板11の端子電極15の上、すなわちスルーホール
23内に、接続用導体5をそれぞれ形成し、非導電性樹
脂9を挟んで両方の接続用導体5が対応するように加熱
圧着を行う。これにより、電極パッド1と端子電極15
とが接続用導体5を介して接続される。なお、このよう
な製造方法では、電極パッド1上および端子電極15上
のそれぞれに形成された接続用導体5の材質を変えるこ
ともできる。
Next, as shown in FIG. 2B, in the second example of the method of manufacturing a semiconductor device according to the present embodiment, the electrode pad 1 provided on the surface of the semiconductor substrate 3 and the insulating circuit The connection conductors 5 are respectively formed on the terminal electrodes 15 of the substrate 11, that is, in the through holes 23, and heat compression is performed so that both connection conductors 5 correspond with the nonconductive resin 9 interposed therebetween. Thereby, the electrode pad 1 and the terminal electrode 15
Are connected via the connection conductor 5. In addition, in such a manufacturing method, the material of the connection conductor 5 formed on each of the electrode pad 1 and the terminal electrode 15 can be changed.

【0038】通常、電極パッド1が狭ピッチになるにつ
れて、半導体基板3上の電極パッド1に形成できる接続
用導体5は直径が小さくなるとともに、その高さも低く
形成されることになる。本実施の形態では、あらかじ
め、絶縁回路基板11のスルーホール23内にも一方の
接続用導体5を形成したうえで、半導体基板3の電極パ
ッド1の上の接続用導体5と圧着し、電極パッド1とを
端子電極15を接続する。これにより接続用導体5の高
さを確保し、接続の安定性を向上させることができる。
Normally, as the pitch of the electrode pads 1 becomes narrower, the diameter of the connecting conductors 5 that can be formed on the electrode pads 1 on the semiconductor substrate 3 becomes smaller and the height thereof becomes smaller. In the present embodiment, one of the connection conductors 5 is also formed in advance in the through hole 23 of the insulated circuit board 11 and then crimped to the connection conductor 5 on the electrode pad 1 of the semiconductor substrate 3. The terminal electrode 15 is connected to the pad 1. Thereby, the height of the connecting conductor 5 can be secured, and the stability of the connection can be improved.

【0039】電極パッド1上に接続用導体5を形成する
手法としては、共晶ハンダやAu(金)等を用いたバン
プスタッドボンディングや成膜技術等が適用できる。ま
た、絶縁回路基板11にスルーホール23を形成する手
法としては、レーザー加工等が適用できる。また、絶縁
回路基板11と半導体基板3との間隙を充填する手法と
しては、エポキシ系の樹脂フィルム状で供給した非導電
性樹脂9を加熱加圧する技術等が適用できる。また、電
極パッド1および端子電極15の少なくともいずれかの
表面には、接続用導体5の接合性を加味して、多層薄膜
を形成してもよい。
As a method of forming the connection conductor 5 on the electrode pad 1, bump stud bonding using eutectic solder, Au (gold), or the like, a film forming technique, or the like can be applied. Further, as a method of forming the through holes 23 in the insulated circuit board 11, laser processing or the like can be applied. As a technique for filling the gap between the insulating circuit board 11 and the semiconductor substrate 3, a technique of heating and pressing the non-conductive resin 9 supplied in the form of an epoxy resin film can be applied. Further, a multilayer thin film may be formed on at least one of the surfaces of the electrode pad 1 and the terminal electrode 15 in consideration of the bonding property of the connection conductor 5.

【0040】以上説明したように実施の形態1によれ
ば、絶縁回路基板11に設けられた開口23(スルーホ
ールまたはビアホール)を利用して接続用導体5の高さ
を増やすことができる。また、開口23を介して絶縁回
路基板11の半導体基板3から遠い側の裏面の端子電極
15に接続用導体5を接続することによって、接続用導
体5の応力の増加を回避できる。また、スルーホール2
3と接続用導体5との間隙をルースにすることによっ
て、接続用導体5にかかる応力を抑制することができ
る。一方、スルーホール23の壁面を接合エリアとする
場合には半導体基板3と絶縁回路基板11の接合強度を
増加できる。以上のような結果、絶縁回路基板11に対
する半導体基板3上の電極パッド1の接続信頼性を向上
できる。同時に、半導体デバイスの高集積化に伴う電極
パッド1の狭ピッチ化に対しても、絶縁回路基板11と
半導体基板3上の電極パッド1との接続信頼性を確保で
きるようになる。
As described above, according to the first embodiment, the height of the connection conductor 5 can be increased by using the opening 23 (through hole or via hole) provided in the insulated circuit board 11. Further, by connecting the connection conductor 5 to the terminal electrode 15 on the back surface of the insulated circuit board 11 remote from the semiconductor substrate 3 via the opening 23, an increase in stress of the connection conductor 5 can be avoided. Also, through hole 2
By making the gap between the connection conductor 3 and the connection conductor 5 loose, the stress applied to the connection conductor 5 can be suppressed. On the other hand, when the wall surface of the through hole 23 is used as the bonding area, the bonding strength between the semiconductor substrate 3 and the insulating circuit substrate 11 can be increased. As a result, the connection reliability of the electrode pads 1 on the semiconductor substrate 3 to the insulated circuit board 11 can be improved. At the same time, the connection reliability between the insulated circuit board 11 and the electrode pads 1 on the semiconductor substrate 3 can be ensured even when the pitch of the electrode pads 1 is reduced due to the high integration of semiconductor devices.

【0041】実施の形態2.以下、この発明の実施の形
態2を図面に基づいて説明する。図3(a)〜(f)
は、本発明の実施の形態2による半導体装置における、
半導体基板と絶縁回路基板との接続部近傍の断面図であ
る。図3(a)〜(f)において、3は半導体基板、1
は半導体基板3の電極パッド、7は半導体基板3の保護
絶縁膜を示す。保護膜7は、例えばガラスコート膜7a
とポリイミド膜7bとの積層膜として形成されている
が、このような構成に限定されるものではない。また、
11は絶縁回路基板、13は絶縁回路基板11の配線
層、15は絶縁回路基板11の端子電極、23は絶縁回
路基板11に設けた開口(スルーホールまたはビアホー
ル)を示す。さらに、5は開口23に設置された接続用
導体、9は半導体基板3と絶縁回路基板11の間に充填
された非導電性樹脂であり、30はこれらを含む半導体
装置を示す。
Embodiment 2 Hereinafter, a second embodiment of the present invention will be described with reference to the drawings. 3 (a) to 3 (f)
Is a semiconductor device according to the second embodiment of the present invention.
It is sectional drawing of the vicinity of the connection part of a semiconductor substrate and an insulated circuit board. 3A to 3F, 3 is a semiconductor substrate, 1
Denotes an electrode pad of the semiconductor substrate 3, and 7 denotes a protective insulating film of the semiconductor substrate 3. The protective film 7 is, for example, a glass coat film 7a.
And a polyimide film 7b, but the invention is not limited to such a configuration. Also,
Reference numeral 11 denotes an insulated circuit board, 13 denotes a wiring layer of the insulated circuit board 11, 15 denotes a terminal electrode of the insulated circuit board 11, and 23 denotes an opening (through hole or via hole) provided in the insulated circuit board 11. Reference numeral 5 denotes a connection conductor provided in the opening 23, reference numeral 9 denotes a non-conductive resin filled between the semiconductor substrate 3 and the insulated circuit board 11, and reference numeral 30 denotes a semiconductor device including these.

【0042】図3(a)に示すように、本実施の形態の
第一例の半導体装置30は、絶縁回路基板11のスルー
ホール23の壁面に形成された端子電極15を、半導体
基板3上の電極パッド1に接続用導体5を介して接続し
ている。これにより、端子電極15の接合エリアを増加
し、接続用導体5の高さの増加を図ることができ、接合
信頼性を向上できるようになる。
As shown in FIG. 3A, in the semiconductor device 30 of the first example of the present embodiment, the terminal electrode 15 formed on the wall surface of the through hole 23 of the insulated circuit board 11 is Is connected to the electrode pad 1 via a connection conductor 5. Thereby, the joining area of the terminal electrode 15 can be increased, the height of the connecting conductor 5 can be increased, and the joining reliability can be improved.

【0043】次に、図3(b)に示すように、本実施の
形態の第二例では、半導体基板3の電極パッド1に接合
された接続用導体5と、絶縁回路基板11の端子電極1
5に接合された接続用導体5とを異なる材質で形成し、
接続用導体5全体としては複数種類の材質を積層して接
合した形に形成することもできる。次に、図3(c)に
示すように、本実施の形態の第三例では、絶縁回路基板
11の端子電極15が絶縁回路基板11の表裏面でスル
ーホール23の周囲に形成されているが、スルーホール
23の内面には形成されていない。このように生産性を
考慮して、スルーホール23の壁面を接合エリアとしな
い構造とすることもできる。
Next, as shown in FIG. 3B, in the second embodiment of the present embodiment, the connection conductor 5 bonded to the electrode pad 1 of the semiconductor substrate 3 and the terminal electrode of the insulated circuit board 11 1
5 is formed of a different material from the connection conductor 5 joined to
The connecting conductor 5 as a whole may be formed in a form in which a plurality of types of materials are laminated and joined. Next, as shown in FIG. 3C, in a third example of the present embodiment, the terminal electrodes 15 of the insulated circuit board 11 are formed around the through holes 23 on the front and back surfaces of the insulated circuit board 11. However, it is not formed on the inner surface of the through hole 23. As described above, in consideration of productivity, a structure in which the wall surface of the through hole 23 is not used as a bonding area may be adopted.

【0044】以上の図3(a),(b),(c)の構造
では、絶縁回路基板11への半導体基板3の搭載を接続
用導体5のみで行なっている。すなわち、保護膜7で被
覆された半導体基板3は、絶縁回路基板11に直接に接
しており、その間に非導電性樹脂は介在しない。また、
図3(a)および(c)に示す構造では、半導体基板3
と絶縁回路基板11の固定を治具により、または半導体
基板3と絶縁回路基板11との密着力を用いて行っても
よい。
In the structure shown in FIGS. 3A, 3B, and 3C, the semiconductor substrate 3 is mounted on the insulated circuit board 11 using only the connection conductor 5. That is, the semiconductor substrate 3 covered with the protective film 7 is in direct contact with the insulated circuit board 11, and no non-conductive resin is interposed therebetween. Also,
In the structure shown in FIGS. 3A and 3C, the semiconductor substrate 3
The fixing of the semiconductor substrate 3 and the insulating circuit board 11 may be performed by using a jig or by using the adhesion between the semiconductor substrate 3 and the insulating circuit board 11.

【0045】また、図3(b)に示すデバイス構造で
は、前記と同様の方法、または、半導体基板3に形成さ
れた突起物(例えば接続用導体5)を用いて半導体基板
3と絶縁回路基板11の固定を行っている。多くの場
合、電極パッド1上に形成された接続用導体5とスルー
ホール23との接触を用いて半導体基板3と絶縁回路基
板11との固定を行っている。
In the device structure shown in FIG. 3B, the semiconductor substrate 3 and the insulated circuit board are formed in the same manner as described above, or by using a projection (for example, the connection conductor 5) formed on the semiconductor substrate 3. 11 is fixed. In many cases, the semiconductor substrate 3 and the insulated circuit board 11 are fixed using the contact between the connection conductor 5 formed on the electrode pad 1 and the through hole 23.

【0046】次に、図3(d)および同図(e)に示す
ように、本実施の形態の第四例および第五例では、半導
体基板3と絶縁回路基板11との間に非導電性樹脂9を
充填した構造にしている。なお、図3(d)では、絶縁
回路基板11の端子電極15がスルーホール23の内面
に設けられ、スルーホール23は貫通している。図3
(e)では、端子電極15がスルーホール23の底面を
塞ぐように絶縁回路基板11の背面に形成されている。
Next, as shown in FIGS. 3D and 3E, in the fourth and fifth examples of the present embodiment, a non-conductive material is provided between the semiconductor substrate 3 and the insulated circuit board 11. The structure is filled with the conductive resin 9. In FIG. 3D, the terminal electrode 15 of the insulated circuit board 11 is provided on the inner surface of the through hole 23, and the through hole 23 penetrates. FIG.
In (e), the terminal electrode 15 is formed on the back surface of the insulated circuit board 11 so as to cover the bottom surface of the through hole 23.

【0047】次に、図3(f)に示すように、本実施の
形態の第六例では、絶縁回路基板11が複数の基板から
形成され、中間の位置に端子電極15と配線層13が形
成されている。そして、中間位置の端子電極15に至る
ビアホール23が形成され、このビアホール23に接続
用導体5が設置されて電極パッド1と端子電極15とが
接続されている。また、これにより絶縁回路基板11の
複数の配線層13が接続用導体5と接続されている。図
3(d)〜(f)の例では、半導体基板3の電極パッド
1から絶縁回路基板11の開口内の端子電極15に接続
用導体5が延長しているが、この接続用導体5は非導電
性樹脂9の位置では開口の延長線上より一部外側にはみ
出て接続用導体5と確実に固着・接続している。また、
この場合、非導電性樹脂9は感光性樹脂である必要はな
く、一般の接着性を示す樹脂でよい。なお、本実施の形
態で、絶縁回路基板11は、端子電極15を備えた基板
と、他の基板とを積層した多層構造の絶縁回路基板であ
ってもよい。
Next, as shown in FIG. 3F, in the sixth example of the present embodiment, the insulating circuit board 11 is formed from a plurality of boards, and the terminal electrodes 15 and the wiring layers 13 are provided at intermediate positions. Is formed. Then, a via hole 23 reaching the terminal electrode 15 at the intermediate position is formed, and the connection conductor 5 is provided in the via hole 23 to connect the electrode pad 1 to the terminal electrode 15. In addition, the plurality of wiring layers 13 of the insulated circuit board 11 are connected to the connection conductors 5 by this. 3 (d) to 3 (f), the connection conductor 5 extends from the electrode pad 1 of the semiconductor substrate 3 to the terminal electrode 15 in the opening of the insulated circuit board 11. At the position of the non-conductive resin 9, it protrudes partly outside the extension of the opening and is securely fixed and connected to the connection conductor 5. Also,
In this case, the non-conductive resin 9 does not need to be a photosensitive resin, but may be a resin having general adhesive properties. In the present embodiment, the insulated circuit board 11 may be a multilayered insulated circuit board in which a board provided with the terminal electrodes 15 and another board are stacked.

【0048】次に、本発明の実施の形態2にかかる半導
体装置の製造方法を説明する。図4は、本発明の実施の
形態2にかかる半導体装置の製造方法を説明するための
半導体基板と絶縁回路基板との接続部近傍の断面図であ
る。図中で、左側の図の中の矢印は、半導体基板3を絶
縁回路基板11に向かって押圧することを示している。
また、左右の図の中間の矢印は、プロセスが左側の状態
から右側の状態へ進むことを示している。
Next, a method for manufacturing a semiconductor device according to the second embodiment of the present invention will be described. FIG. 4 is a cross-sectional view of the vicinity of a connection portion between a semiconductor substrate and an insulated circuit board for describing a method of manufacturing a semiconductor device according to a second embodiment of the present invention. In the drawing, the arrow in the left-hand drawing indicates that the semiconductor substrate 3 is pressed toward the insulated circuit board 11.
The middle arrows in the left and right diagrams indicate that the process proceeds from the left state to the right state.

【0049】図4(a)に示すように、本発明の実施の
形態2にかかる半導体装置の製造方法の第一例では、半
導体基板3の表面に設けられた電極パッド1と、絶縁回
路基板11のスルーホール23および端子電極15とが
対応するように位置決めしたうえで、接続用導体5をス
ルーホール23内に挿入することによって、図3(a)
に示すデバイス構造を実現している。
As shown in FIG. 4A, in the first example of the method for manufacturing a semiconductor device according to the second embodiment of the present invention, the electrode pad 1 provided on the surface of the semiconductor By positioning the through-holes 11 and the terminal electrodes 15 so as to correspond to each other, and inserting the connection conductor 5 into the through-holes 23, FIG.
Has been realized.

【0050】次に、図4(b)に示すように、本実施の
形態の製造方法の第二例では、半導体基板3の表面の電
極パッド1上に接続用導体5を接合させておく。この接
続用導体5を絶縁回路基板11のスルーホール23対応
するように位置決めしたうえで、接続用導体5をスルー
ホール23内に挿入する。これにより、接続用導体5と
端子電極15を接合させるとともに、半導体基板3と絶
縁回路基板11との固定を行って、図3(a)に示すデ
バイス構造を実現している。
Next, as shown in FIG. 4B, in the second example of the manufacturing method of the present embodiment, the connection conductor 5 is bonded on the electrode pad 1 on the surface of the semiconductor substrate 3. After positioning the connection conductor 5 so as to correspond to the through hole 23 of the insulating circuit board 11, the connection conductor 5 is inserted into the through hole 23. Thus, the connection conductor 5 and the terminal electrode 15 are joined, and the semiconductor substrate 3 and the insulated circuit board 11 are fixed, thereby realizing the device structure shown in FIG.

【0051】次に、図4(c)に示すように、本実施の
形態の製造方法の第三例では、半導体基板3の表面の電
極パッド1上に接続用導体5を接合しておく。この接続
用導体5と絶縁回路基板11のスルーホール23とを位
置決めしたうえで、接続用導体5をスルーホール23内
に挿入してスルーホール23底面の端子電極15に当接
させる。これにより、接続用導体5と端子電極15との
接合を行なう。また、半導体基板3と絶縁回路基板11
との間に非導電性樹脂を充填し、半導体基板3と絶縁回
路基板11との固定を行って、図3(e)に示すデバイ
ス構造を実現している。
Next, as shown in FIG. 4C, in the third example of the manufacturing method according to the present embodiment, the connection conductor 5 is bonded on the electrode pad 1 on the surface of the semiconductor substrate 3. After positioning the connection conductor 5 and the through hole 23 of the insulating circuit board 11, the connection conductor 5 is inserted into the through hole 23 and is brought into contact with the terminal electrode 15 on the bottom surface of the through hole 23. Thereby, the connection conductor 5 and the terminal electrode 15 are joined. Further, the semiconductor substrate 3 and the insulating circuit board 11
A non-conductive resin is filled in between them, and the semiconductor substrate 3 and the insulated circuit board 11 are fixed, thereby realizing the device structure shown in FIG.

【0052】次に、図4(d)に示すように、本実施の
形態の製造方法の第四例では、半導体基板3の表面の電
極パッド1上に接続用導体5を接合させておく。一方、
絶縁回路基板11の上には非導電性樹脂9(フィルム)
を載せておく。接続用導体5を絶縁回路基板11のスル
ーホール23に対応するように位置決めしたうえで、接
続用導体5を、非導電性樹脂9のスルーホール23の位
置に当接し、加熱して押込む。これにより、接続用導体
5と端子電極15との接合を図るとともに、半導体基板
3と絶縁回路基板11との固定を行って、図3(d)に
示すデバイス構造を実現している。
Next, as shown in FIG. 4D, in the fourth example of the manufacturing method of the present embodiment, the connection conductor 5 is bonded on the electrode pad 1 on the surface of the semiconductor substrate 3. on the other hand,
Non-conductive resin 9 (film) is placed on the insulating circuit board 11
I will put. After positioning the connection conductor 5 so as to correspond to the through hole 23 of the insulated circuit board 11, the connection conductor 5 is brought into contact with the position of the through hole 23 of the non-conductive resin 9, heated and pressed. Thus, the connection between the connection conductor 5 and the terminal electrode 15 is achieved, and the semiconductor substrate 3 and the insulated circuit board 11 are fixed, thereby realizing the device structure shown in FIG.

【0053】次に、図4(e)に示すように、本実施の
形態の製造方法の第五例では、半導体基板3の表面に設
けられた電極パッド1上に接続用導体5を接合させてお
く。一方、絶縁回路基板11の上には非導電性樹脂9
(フィルム)を載せておく。接続用導体5を絶縁回路基
板11のスルーホール23に対応するように位置決めし
たうえで、接続用導体5を、非導電性樹脂9のスルーホ
ール23の位置に当接し、加熱して押込む。この場合、
接続用導体5の量を少なくしておくと、接続用導体5が
スルーホール23の全体を充填するには至らない。そこ
で、絶縁回路基板11の反対側からスルーホール23に
他の接続用導体5を挿入し、半導体基板3側の接続用導
体5と接合する。これにより、接続用導体5と電極端子
15とを接合する。また、非導電性樹脂9により、半導
体基板3と絶縁回路基板11との固定を行なう。この場
合、接続用導体5には、異なる2種類の材料を用いても
よい。
Next, as shown in FIG. 4E, in the fifth example of the manufacturing method of the present embodiment, the connection conductor 5 is bonded onto the electrode pad 1 provided on the surface of the semiconductor substrate 3. Keep it. On the other hand, the non-conductive resin 9
(Film). After positioning the connection conductor 5 so as to correspond to the through hole 23 of the insulated circuit board 11, the connection conductor 5 is brought into contact with the position of the through hole 23 of the non-conductive resin 9, heated and pressed. in this case,
If the amount of the connection conductor 5 is reduced, the connection conductor 5 will not fill the entire through hole 23. Then, another connecting conductor 5 is inserted into the through hole 23 from the opposite side of the insulated circuit board 11 and joined to the connecting conductor 5 on the semiconductor substrate 3 side. Thereby, the connection conductor 5 and the electrode terminal 15 are joined. Further, the semiconductor substrate 3 and the insulating circuit board 11 are fixed by the non-conductive resin 9. In this case, two different materials may be used for the connection conductor 5.

【0054】なお、本実施の形態の製造方法では、スル
ーホール23にあらかじめ接続用導体5を設けておく方
法も可能である。以上の方法では、非導電性樹脂9のス
ルーホール23に対応させた位置のエッチング等が省
け、比較的容易に製造できる。なお、以上の本実施の形
態で、スルーホール23の内面と接続用導体5との間隙
は、空隙であっても、非導電性樹脂が配置されていても
よい。また、その混合であってもよい。また、接続用導
体5が一部でのみスルーホール23の内面に接触してい
てもよい。接続用導体5がスルーホール23に充満して
固定化するよりも、接続用導体5に及ぼす応力を緩和で
きる。
In the manufacturing method of the present embodiment, a method in which the connecting conductor 5 is provided in the through hole 23 in advance is also possible. According to the above-described method, etching at a position corresponding to the through-hole 23 of the non-conductive resin 9 is omitted, and the non-conductive resin 9 can be manufactured relatively easily. In the above embodiment, the gap between the inner surface of the through hole 23 and the connection conductor 5 may be an air gap or a non-conductive resin may be arranged. Moreover, the mixture may be sufficient. Further, the connection conductor 5 may be in contact with the inner surface of the through hole 23 only in a part. The stress exerted on the connection conductor 5 can be reduced as compared with the case where the connection conductor 5 fills and fixes the through hole 23.

【0055】実施の形態3.以下、この発明の実施の形
態3を図面に基づいて説明する。図5(a)〜(c)
は、この発明の実施の形態3による半導体装置におけ
る、半導体基板と絶縁回路基板との接続部近傍の断面図
である。図5(a)〜(c)において、3は半導体基
板、1は半導体基板3の電極パッド、7は半導体基板3
の保護絶縁膜を示す。保護膜7は、例えばガラスコート
膜7aとポリイミド膜7bとの積層膜として形成されて
いるが、このような構成に限定されるものではない。ま
た、11は絶縁回路基板、23は絶縁回路基板11に設
けた開口(この場合スルーホール)、13は絶縁回路基
板11の開口23の近傍に配置された配線層、15は同
じく開口23の近傍に配置された絶縁回路基板11の端
子電極を示す。さらに、5aは電極パッド1に接合され
た接続用導体、5cは接続用導体5aに接合された接続
用導体、5bは接続用導体5aまたは5cと端子電極1
5とを接続する接続用導体であり、5a,5b,5cを
合わせて接続用導体5とする。なお、接続用導体5b
は、配線13を跨いで開口23近傍の端子電極15に接
続されている。また、9は半導体基板3と絶縁回路基板
11の間に充填された非導電性樹脂であり、21はスル
ーホール23を充填し接続用導体5a,5bおよび端子
電極15を封止する封止樹脂、30はこれらを含む半導
体装置を示す。
Embodiment 3 Hereinafter, a third embodiment of the present invention will be described with reference to the drawings. 5 (a) to 5 (c)
FIG. 13 is a cross-sectional view near a connection portion between a semiconductor substrate and an insulated circuit board in a semiconductor device according to a third embodiment of the present invention. 5A to 5C, 3 is a semiconductor substrate, 1 is an electrode pad of the semiconductor substrate 3, and 7 is a semiconductor substrate 3.
3 shows a protective insulating film. The protective film 7 is formed, for example, as a laminated film of a glass coat film 7a and a polyimide film 7b, but is not limited to such a configuration. Reference numeral 11 denotes an insulated circuit board; 23, an opening provided in the insulated circuit board 11 (in this case, a through hole); 2 shows the terminal electrodes of the insulated circuit board 11 arranged in FIG. Further, 5a is a connection conductor joined to the electrode pad 1, 5c is a connection conductor joined to the connection conductor 5a, 5b is a connection conductor 5a or 5c and the terminal electrode 1
5 and 5a, 5b, and 5c. The connection conductor 5b
Is connected to the terminal electrode 15 near the opening 23 over the wiring 13. Reference numeral 9 denotes a non-conductive resin filled between the semiconductor substrate 3 and the insulating circuit board 11, and reference numeral 21 denotes a sealing resin that fills the through holes 23 and seals the connection conductors 5a and 5b and the terminal electrodes 15. , 30 indicate semiconductor devices including these.

【0056】図5(a)に示すように、本実施の形態の
第一例の半導体装置30は、半導体基板3の電極パッド
1の上に接続用導体5aを接合し、絶縁回路基板11の
スルーホール23の位置に対向させている。絶縁回路基
板11は、半導体基板3を搭載する側の反対側、すなわ
ち、半導体基板3から遠い方の表面(背面)の上で、ス
ルーホール23の近辺に端子電極15を備えている。そ
して、非導電性樹脂9を半導体基板3と絶縁回路基板1
1の間に充填し、両者を固定している。そして、接続用
導体5aと端子電極15とを、スルーホール23にフレ
キシブルな接続用導体5bを通して接続し、接続用導体
5a,5bと端子電極15とを封止樹脂21で封止して
いる。これにより、電極パッド1〜接続用導体5a,5
b〜端子電極15間の接合信頼性を図ることができる。
また、接続用導体5bの長さを変えて最適化することに
より、絶縁回路基板11における配線層13の設計が容
易になる。
As shown in FIG. 5A, in the semiconductor device 30 of the first embodiment of the present embodiment, the connecting conductor 5a is joined on the electrode pad 1 of the semiconductor substrate 3, and the insulating circuit board 11 It faces the position of the through hole 23. The insulated circuit board 11 includes the terminal electrode 15 near the through hole 23 on the side opposite to the side on which the semiconductor substrate 3 is mounted, that is, on the surface (back surface) farther from the semiconductor substrate 3. Then, the non-conductive resin 9 is applied to the semiconductor substrate 3 and the insulating circuit board 1.
1 and the two are fixed. The connection conductor 5a and the terminal electrode 15 are connected to the through-hole 23 through the flexible connection conductor 5b, and the connection conductors 5a and 5b and the terminal electrode 15 are sealed with the sealing resin 21. Thereby, the electrode pads 1 to the connection conductors 5a, 5
The bonding reliability between the terminal b and the terminal electrode 15 can be improved.
Further, by optimizing the connection conductor 5b by changing the length, the design of the wiring layer 13 in the insulated circuit board 11 becomes easy.

【0057】次に、図5(b)に示すように、本実施の
形態の第二例の半導体装置30では、スルーホール23
にフレキシブルな接続用導体5bを通して、接続用導体
5aとの間に中間の接続部材5cを挿入して接続する。
その他は図5(a)と同様であるから、説明を省略す
る。
Next, as shown in FIG. 5B, in the semiconductor device 30 of the second example of the present embodiment, the through holes 23
Then, an intermediate connecting member 5c is inserted between and connected to the connecting conductor 5a through the flexible connecting conductor 5b.
The other parts are the same as those in FIG.

【0058】次に、図5(c)に示すように、本実施の
形態の第三例の半導体装置30では、図5(b)と類似
の構造であるが、半導体基板3と絶縁回路基板11の間
に充填した非導電性樹脂9と、接続用導体5a〜5c封
止する封止樹脂21とが一体に成形されている。これは
半導体基板3と絶縁回路基板11とを仮固定しておい
て、封止樹脂21を充填して半導体基板3と絶縁回路基
板11の間を固定するようにした構造である。このよう
な構造でも図2(a),(b)と同様の作用・効果が得
られる。
Next, as shown in FIG. 5C, the semiconductor device 30 of the third example of the present embodiment has a structure similar to that of FIG. The non-conductive resin 9 filled between 11 and the sealing resin 21 for sealing the connection conductors 5a to 5c are integrally formed. This is a structure in which the semiconductor substrate 3 and the insulating circuit board 11 are temporarily fixed, and the space between the semiconductor substrate 3 and the insulating circuit board 11 is fixed by filling the sealing resin 21. With such a structure, the same operation and effect as those of FIGS. 2A and 2B can be obtained.

【0059】次に、本発明の実施の形態3にかかる半導
体装置の製造方法を説明する。図6は、本発明の実施の
形態3にかかる半導体装置の製造方法を説明するための
半導体基板と絶縁回路基板との接続部近傍の断面図であ
る。図中で、左側の図の中の矢印は、半導体基板3を絶
縁回路基板11に向かって押圧することを示している。
また、左右の図の中間の矢印は、プロセスが左側の状態
から右側の状態へ進むことを示している。
Next, a method of manufacturing a semiconductor device according to the third embodiment of the present invention will be described. FIG. 6 is a cross-sectional view of the vicinity of a connection portion between a semiconductor substrate and an insulated circuit board for describing a method of manufacturing a semiconductor device according to a third embodiment of the present invention. In the drawing, the arrow in the left-hand drawing indicates that the semiconductor substrate 3 is pressed toward the insulated circuit board 11.
The middle arrows in the left and right diagrams indicate that the process proceeds from the left state to the right state.

【0060】図6(a)に示すように、本実施の形態の
半導体装置の製造方法の第一例では、まず、半導体基板
3上の電極パッド1に接続用導体5aを接合する。この
接続用導体5aが絶縁回路基板11のスルーホール23
に対応するように位置決めし、絶縁回路基板11の上に
載せた非導電性樹脂9に、半導体基板3側から接続用導
体5を挿入し貫通させるすることにより、半導体基板3
を絶縁回路基板11に搭載する。そして、フレキシブル
な接続用導体5bを接続部材5cを介して接続導体5a
に接続し、他端を端子電極15と電気的に接続する。そ
の後に接続用導体5a,5b,5cを封止樹脂21で封
止することによって,図5(b)に示すデバイス構造を
実現している。
As shown in FIG. 6A, in the first example of the method of manufacturing a semiconductor device according to the present embodiment, first, the connection conductor 5a is joined to the electrode pad 1 on the semiconductor substrate 3. The connecting conductor 5a is connected to the through-hole 23 of the insulated circuit board 11.
The connection conductor 5 is inserted from the semiconductor substrate 3 side into the non-conductive resin 9 placed on the insulated circuit board 11 and penetrated therethrough.
Is mounted on the insulated circuit board 11. Then, the flexible connection conductor 5b is connected to the connection conductor 5a via the connection member 5c.
And the other end is electrically connected to the terminal electrode 15. Thereafter, the connection conductors 5a, 5b, 5c are sealed with the sealing resin 21 to realize the device structure shown in FIG. 5B.

【0061】なお、この製造方法において、具体的に
は、絶縁回路基板11と半導体基板3とを位置合わせし
た後、絶縁回路基板11のスルーホール23内でワイヤ
状の接続用導体5bを接続導体5aにワイヤボンディン
グする方法がある。これにより図5(a)の形状のもの
が製造できる。また、ワイヤボンディングの仕方によっ
て、ボンディング部に接続部材5cのような塊状の部材
を形成すれば、接合が強固になる。さらには、絶縁回路
基板11と半導体基板3とを位置合わせした後、絶縁回
路基板11越しに接続用導体5aの上に接続用導体5c
を形成して後、絶縁回路基板11の背面から接続用導体
5bを接続用導体5cに接続するようにしてもよい。こ
のような製造方法により図5(b)の形状のものが製造
できる。
In this manufacturing method, specifically, after positioning the insulated circuit board 11 and the semiconductor substrate 3, the wire-shaped connecting conductor 5 b is connected to the connecting conductor 5 b in the through hole 23 of the insulated circuit board 11. 5a is a method of wire bonding. Thereby, the one having the shape shown in FIG. 5A can be manufactured. If a massive member such as the connection member 5c is formed in the bonding portion depending on the method of wire bonding, the bonding becomes strong. Further, after positioning the insulating circuit board 11 and the semiconductor substrate 3, the connecting conductor 5c is placed on the connecting conductor 5a over the insulating circuit board 11.
After the formation, the connection conductor 5b may be connected to the connection conductor 5c from the back of the insulated circuit board 11. With this manufacturing method, the one having the shape shown in FIG. 5B can be manufactured.

【0062】また、図6(b)に示すように、本実施の
形態の半導体装置の製造方法の第二例では、半導体基板
3上の電極パッド1に形成された接続用導体5を絶縁回
路基板11のスルーホール23に対応するように位置決
めし、半導体基板3側から接続用導体5をスルーホール
23に挿入した状態で、半導体基板3と絶縁回路基板1
1とを仮固定する。そして、フレキシブルな接続用導体
5bを、接続用部材5cを用いて、接続用導体5aに接
続し、他方の端部を端子電極15に接続する。その後に
非導電性樹脂21をスルーホール23を通して半導体基
板3と絶縁回路基板11の間に充填し、かつ接続用導体
5a,5b,5cを封止することによって、図5(c)
に示すデバイス構造を実現している。以上説明したこの
実施の形態の製造方法によれば、スルーホール23内で
パッド電極1に対してではなく、パッド電極1の上に接
合された接続用導体5aまたは5cに対してワイヤボン
ディングなどの方法により接続用導体5bを接続すれば
よいので、接続作業が容易になる。したがって、スルー
ホール23の径が小さくても接続作業が容易である。
As shown in FIG. 6B, in the second example of the method of manufacturing a semiconductor device according to the present embodiment, the connection conductor 5 formed on the electrode pad 1 on the semiconductor substrate 3 is connected to an insulating circuit. The semiconductor substrate 3 and the insulating circuit board 1 are positioned so as to correspond to the through holes 23 of the substrate 11, and the connection conductors 5 are inserted into the through holes 23 from the semiconductor substrate 3 side.
1 is temporarily fixed. Then, the flexible connection conductor 5b is connected to the connection conductor 5a using the connection member 5c, and the other end is connected to the terminal electrode 15. Thereafter, the space between the semiconductor substrate 3 and the insulated circuit board 11 is filled with the non-conductive resin 21 through the through hole 23, and the connection conductors 5a, 5b, 5c are sealed, thereby obtaining the structure shown in FIG.
Has been realized. According to the manufacturing method of this embodiment described above, wire bonding or the like is performed not on the pad electrode 1 but on the connection conductor 5a or 5c bonded on the pad electrode 1 in the through hole 23. Since the connection conductors 5b may be connected by any method, the connection work is facilitated. Therefore, the connection work is easy even if the diameter of the through hole 23 is small.

【0063】本実施の形態で、半導体基板3と絶縁回路
基板11の保持を行う手法としては、半導体基板3と絶
縁回路基板11間に非導電性樹脂9を充填する方法、あ
るいは、治具を用いる手法、または半導体基板3と絶縁
回路基板11の密着力を用いる手法、例えば半導体基板
3に形成された突起物を用いる手法等を用いることがで
きる。半導体基板3に形成された突起物を用いる手法で
は、多くの場合、半導体基板3の電極パッド1上に形成
された接続用導体5とスルーホール23との接触を用い
る。
In the present embodiment, as a method for holding the semiconductor substrate 3 and the insulating circuit board 11, a method of filling the non-conductive resin 9 between the semiconductor substrate 3 and the insulating circuit board 11 or a jig is used. For example, a method using the adhesive force between the semiconductor substrate 3 and the insulating circuit substrate 11, such as a method using a protrusion formed on the semiconductor substrate 3, can be used. In the method using the protrusions formed on the semiconductor substrate 3, in many cases, the contact between the connection conductor 5 formed on the electrode pad 1 of the semiconductor substrate 3 and the through hole 23 is used.

【0064】実施の形態4.以下、この発明の実施の形
態4を図面に基づいて説明する。図7(a)〜(d)
は、この発明の実施の形態4による半導体装置におけ
る、絶縁回路基板と接続用導体との関係を示す断面図で
ある。図7(a)〜(d)は、絶縁回路基板11に平行
な面で切ったスルーホール23近傍の断面図である。図
7(a),(b)はスルーホール23と接続用導体5の
接触有無を示している。図7(c),(d)はスルーホ
ール23の形状と接続用導体5の大きさとの関係を示し
ている。図7(a)〜(d)において、5は接続用導
体、11は絶縁回路基板、23はスルーホール、24は
スルーホール23と接続用導体5との間隙またはその間
隙に設置された非導電性樹脂を示している。
Embodiment 4 Hereinafter, a fourth embodiment of the present invention will be described with reference to the drawings. FIGS. 7A to 7D
FIG. 13 is a sectional view showing a relationship between an insulating circuit board and a connecting conductor in a semiconductor device according to a fourth embodiment of the present invention. FIGS. 7A to 7D are cross-sectional views of the vicinity of the through hole 23 taken along a plane parallel to the insulated circuit board 11. FIGS. 7A and 7B show the presence or absence of contact between the through hole 23 and the connection conductor 5. FIGS. 7C and 7D show the relationship between the shape of the through hole 23 and the size of the connection conductor 5. 7A to 7D, reference numeral 5 denotes a connection conductor, 11 denotes an insulated circuit board, 23 denotes a through hole, and 24 denotes a gap between the through hole 23 and the connection conductor 5 or a non-conductive member provided in the gap. 2 shows a conductive resin.

【0065】図7(a)に示すように、本実施の形態の
第一例では、接続用導体5がスルーホール23の内面に
部分的に、具体的には4点で、接している。このように
接触部分が存在する場合、半導体基板3と絶縁回路基板
11の工程内での保持を、接続用導体5と絶縁回路基板
11の接触を用いて行なうことができる。
As shown in FIG. 7A, in the first example of the present embodiment, the connecting conductor 5 is partially in contact with the inner surface of the through hole 23, specifically, at four points. When the contact portion exists as described above, the semiconductor substrate 3 and the insulating circuit board 11 can be held in the process by using the contact between the connection conductor 5 and the insulating circuit board 11.

【0066】次に、図7(b)に示すように、本実施の
形態の第二例では、接続用導体5の径がスルーホール2
3の径より小さく、接続用導体5はスルーホール23の
内面に接していない。このように接触部分が存在しない
場合、半導体基板3と絶縁回路基板11の工程内での保
持を、両者間の突起部分などを用いた密着力または治具
による固定手法を用いて行なう。この例のように、接続
用導体5がスルーホール23と接触していない場合に
は、接続用導体5がスルーホール23による拘束力を受
けず、応力集中点をなくすことができる利点がある。な
お、スルーホール23と接続用導体5の間隙は、空隙で
あってもよく、また、非導電性樹脂が充填されていても
よい。弾力性がある方が、接続用導体5に応力がかかる
のを抑制できる。
Next, as shown in FIG. 7B, in the second example of this embodiment, the diameter of the connecting conductor 5 is
3, the connecting conductor 5 is not in contact with the inner surface of the through hole 23. When there is no contact portion as described above, the semiconductor substrate 3 and the insulating circuit board 11 are held in the process by using an adhesion force using a projection portion or the like between the two or a fixing method using a jig. As in this example, when the connecting conductor 5 is not in contact with the through-hole 23, the connecting conductor 5 does not receive the binding force of the through-hole 23, and there is an advantage that the stress concentration point can be eliminated. Note that the gap between the through hole 23 and the connection conductor 5 may be an air gap or may be filled with a non-conductive resin. The elasticity can prevent the connection conductor 5 from being stressed.

【0067】次に、図7(c)に示すように、本実施の
形態の第三例では、接続用導体5のピッチが広い方向に
スルーホール23の形状を長くしている。スルーホール
23の平面形状は接続用導体5のごく近傍の拘束力を決
定する。接続用導体5がスルーホール23内の端子電極
15に濡れ広がる場合、接合面積を大きく取るためにピ
ッチが広い方向にスルーホール23の面積をある程度大
きく取るようにする。また、スルーホール23を長くす
る方向は、接続用導体5にかかる熱応力を緩和する方向
にとることもできる。接続用導体5にかかる応力は、こ
の例のように、接続用導体5がスルーホール23の内面
に接触せず、封止樹脂21に接しているほうが緩和でき
る。
Next, as shown in FIG. 7C, in the third example of the present embodiment, the shape of the through hole 23 is elongated in the direction in which the pitch of the connecting conductors 5 is wide. The planar shape of the through hole 23 determines the restraining force in the immediate vicinity of the connection conductor 5. When the connection conductor 5 spreads over the terminal electrode 15 in the through hole 23, the area of the through hole 23 is increased to some extent in the direction in which the pitch is wide in order to increase the bonding area. In addition, the direction in which the through hole 23 is lengthened may be a direction in which the thermal stress applied to the connection conductor 5 is reduced. As in this example, the stress applied to the connection conductor 5 can be reduced when the connection conductor 5 does not contact the inner surface of the through hole 23 but contacts the sealing resin 21.

【0068】次に、図7(d)に示すように、本実施の
形態の第四例では、スルーホール23の形状を長くし
て、2個の接続用導体5を一つのスルーホール23の中
に通している。このように、接続用導体5のピッチが狭
い時等には、2つ以上の接続用導体5を1つのスルーホ
ール23を通して接続するようにしてもよい。これによ
り、スルーホール23を孤立した電極パッド1にでも、
あるいは近接して複数ある電極パッド1にでも柔軟に対
応できる形状とすることができる。以上の例では、スル
ーホール23の断面形状が円形と長方形の場合を示した
が、これはその他に、必要に応じて正方形、楕円形など
所望の形状に選択することができる。以上、本実施の形
態で説明したスルーホール23と接続用導体5との関係
は、実施の形態1〜3の半導体装置に、必要によりいず
れの関係も適用できるものである。
Next, as shown in FIG. 7D, in the fourth example of the present embodiment, the shape of the through-hole 23 is elongated so that two connection conductors 5 are connected to one through-hole 23. Through it. Thus, when the pitch of the connecting conductors 5 is narrow, two or more connecting conductors 5 may be connected through one through hole 23. Thereby, even if the through hole 23 is formed in the isolated electrode pad 1,
Alternatively, a shape that can flexibly cope with a plurality of electrode pads 1 in close proximity can be used. In the above example, the case where the cross-sectional shape of the through-hole 23 is a circle and a rectangle is shown. However, the cross-sectional shape can be selected to a desired shape such as a square or an ellipse as needed. As described above, the relationship between the through hole 23 and the connection conductor 5 described in the present embodiment can be applied to the semiconductor devices of the first to third embodiments as necessary.

【0069】なお、本発明が上記各実施の形態に限定さ
れず、本発明の技術思想の範囲内において、各実施の形
態は適宜変更され得ることは明らかである。また上記構
成部材の数、位置、形状等は上記実施の形態に限定され
ず、本発明を実施する上で好適な数、位置、形状等にす
ることができる。
It should be noted that the present invention is not limited to the above embodiments, and it is clear that each embodiment can be appropriately changed within the scope of the technical idea of the present invention. Further, the number, position, shape, and the like of the constituent members are not limited to the above-described embodiment, and can be set to numbers, positions, shapes, and the like suitable for carrying out the present invention.

【0070】[0070]

【発明の効果】本発明は以上のように構成されており、
絶縁回路基板11に半導体基板3を搭載するとき、絶縁
回路基板11の半導体基板3の搭載側とは反対側の表面
に形成された端子電極に、スルーホール23を通して接
続用導体5を接続する。これにより、スルーホールを利
用して接続用導体の高さを増やすことができる。また、
スルーホールを利用するので、接続用導体の応力の増加
を回避できる。また、スルーホール壁面を接合エリアと
することによって半導体基板と絶縁回路基板の接合強度
を増加できる。その結果、絶縁回路基板に対する半導体
基板上の電極パッドの接続信頼性を向上できる。また、
半導体デバイスの高集積化に伴う電極パッドの狭ピッチ
化に対しても絶縁回路基板に対する半導体基板上の電極
パッドの接続信頼性を確保できるようになる。
The present invention is configured as described above.
When the semiconductor substrate 3 is mounted on the insulated circuit board 11, the connection conductor 5 is connected through a through hole 23 to a terminal electrode formed on the surface of the insulated circuit board 11 opposite to the side on which the semiconductor substrate 3 is mounted. Thereby, the height of the connection conductor can be increased by utilizing the through hole. Also,
Since the through holes are used, an increase in stress of the connecting conductor can be avoided. In addition, by setting the wall surface of the through hole as the bonding area, the bonding strength between the semiconductor substrate and the insulating circuit substrate can be increased. As a result, the connection reliability of the electrode pads on the semiconductor substrate to the insulated circuit board can be improved. Also,
Even when the pitch of the electrode pads is reduced with the increase in the degree of integration of the semiconductor device, the connection reliability of the electrode pads on the semiconductor substrate with respect to the insulating circuit substrate can be ensured.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明の実施の形態1にかかる半導体装置に
おける、半導体基板と絶縁回路基板との接続部近傍の断
面図。
FIG. 1 is a sectional view of the vicinity of a connection portion between a semiconductor substrate and an insulated circuit board in a semiconductor device according to a first embodiment of the present invention;

【図2】 本発明の実施の形態1にかかる半導体装置の
製造方法を説明するための半導体基板と絶縁回路基板と
の接続部近傍の断面図。
FIG. 2 is a cross-sectional view of the vicinity of a connection portion between the semiconductor substrate and the insulated circuit board for explaining the method of manufacturing the semiconductor device according to the first embodiment of the present invention;

【図3】 本発明の実施の形態2にかかる半導体装置に
おける、半導体基板と絶縁回路基板との接続部近傍の断
面図。
FIG. 3 is a cross-sectional view of the vicinity of a connection portion between a semiconductor substrate and an insulated circuit board in a semiconductor device according to a second embodiment of the present invention;

【図4】 本発明の実施の形態2にかかる半導体装置の
製造方法を説明するための半導体基板と絶縁回路基板と
の接続部近傍の断面図。
FIG. 4 is a sectional view of the vicinity of a connection portion between a semiconductor substrate and an insulated circuit board for describing a method of manufacturing a semiconductor device according to a second embodiment of the present invention;

【図5】 本発明の実施の形態3にかかる半導体装置に
おける、半導体基板と絶縁回路基板との接続部近傍の断
面図。
FIG. 5 is a sectional view of the vicinity of a connection portion between a semiconductor substrate and an insulated circuit board in a semiconductor device according to a third embodiment of the present invention;

【図6】 本発明の実施の形態3にかかる半導体装置の
製造方法を説明するための半導体基板と絶縁回路基板と
の接続部近傍の断面図。
FIG. 6 is a sectional view of the vicinity of a connection portion between a semiconductor substrate and an insulated circuit board for describing a method of manufacturing a semiconductor device according to a third embodiment of the present invention.

【図7】 本発明の実施の形態4にかかる半導体装置の
絶縁回路基板に平行な面で切ったスルーホール近傍の上
面図。
FIG. 7 is a top view of the vicinity of a through hole cut by a plane parallel to the insulated circuit board of the semiconductor device according to the fourth embodiment of the present invention;

【図8】 半導体基板を絶縁回路基板上に実装した従来
の半導体装置における半導体基板と絶縁回路基板との接
続部近傍の断面図。
FIG. 8 is a sectional view of the vicinity of a connection portion between the semiconductor substrate and the insulating circuit board in a conventional semiconductor device in which the semiconductor substrate is mounted on the insulating circuit board.

【符号の説明】[Explanation of symbols]

1 電極パッド、 3 半導体基板、 5,5a,5
b,5c 接続用導体、7 保護絶縁膜、 9 非導電
性樹脂、 11 絶縁回路基板、 13 配線層、 1
5 端子電極、 17 外部端子用電極、 19 外部
端子、 21封止樹脂、 23 開口(スルーホールま
たはビアホール)、 25 接続用下地金属膜、 30
半導体装置、 31 バンプ(共晶ハンダ)。
1 electrode pad, 3 semiconductor substrate, 5, 5a, 5
b, 5c connection conductor, 7 protective insulating film, 9 non-conductive resin, 11 insulated circuit board, 13 wiring layer, 1
5 terminal electrode, 17 external terminal electrode, 19 external terminal, 21 sealing resin, 23 opening (through hole or via hole), 25 base metal film for connection, 30
Semiconductor device, 31 bump (eutectic solder).

Claims (21)

【特許請求の範囲】[Claims] 【請求項1】 電極パッドが形成された半導体基板と、 主面と背面とを有し、主面が前記半導体基板の電極パッ
ドに対向して配置され、前記電極パッドに対応する位置
で、主面と背面との間、または背面に端子電極が形成さ
れ、前記主面から前記端子電極に至る開口が形成された
絶縁回路基板と、 前記開口内を通り、前記半導体基板の電極パッドと前記
絶縁回路基板の端子電極との間を接続する接続用導体
と、を備えたことを特徴とする半導体装置。
A semiconductor substrate on which an electrode pad is formed, a main surface and a back surface, wherein the main surface is arranged to face the electrode pad of the semiconductor substrate, and the main surface is located at a position corresponding to the electrode pad. An insulated circuit board having a terminal electrode formed between the surface and the back surface or on the back surface, and an opening extending from the main surface to the terminal electrode; and an electrode pad of the semiconductor substrate passing through the opening and the insulating substrate. A connection conductor for connecting a terminal electrode of a circuit board to the semiconductor device.
【請求項2】 電極パッドが形成された半導体基板と、 主面と背面とを有し、主面が前記半導体基板の電極パッ
ドに対向して配置され、前記電極パッドに対応する位置
に開口が形成され、この開口の内壁面に端子電極が形成
された絶縁回路基板と、 前記開口内を通り、前記半導体基板の電極パッドと前記
絶縁回路基板の端子電極との間を接続する接続用導体
と、を備えたことを特徴とする半導体装置。
2. A semiconductor substrate having an electrode pad formed thereon, a main surface and a back surface, wherein the main surface is arranged to face the electrode pad of the semiconductor substrate, and an opening is formed at a position corresponding to the electrode pad. An insulating circuit board formed with a terminal electrode formed on an inner wall surface of the opening; and a connection conductor passing through the opening and connecting between an electrode pad of the semiconductor substrate and a terminal electrode of the insulating circuit board. A semiconductor device comprising:
【請求項3】 電極パッドが形成された半導体基板と、 主面と背面とを有し、主面が前記半導体基板の電極パッ
ドに対向して配置され、前記電極パッドに対応する位置
に開口が形成され、主面と背面との間の中間の平面で、
または背面の平面で、前記開口に接して前記開口の周り
に端子電極が形成された絶縁回路基板と、 前記開口内を通り、前記半導体基板の電極パッドと前記
絶縁回路基板の端子電極との間を接続する接続用導体
と、を備えたことを特徴とする半導体装置。
3. A semiconductor substrate having an electrode pad formed thereon, a main surface and a back surface, wherein the main surface is disposed to face the electrode pad of the semiconductor substrate, and an opening is formed at a position corresponding to the electrode pad. Formed, at a plane intermediate between the main surface and the back surface,
Or an insulated circuit board in which a terminal electrode is formed around the opening in contact with the opening on a back surface, and between the electrode pad of the semiconductor substrate and the terminal electrode of the insulated circuit board passing through the opening. And a connection conductor for connecting the semiconductor device.
【請求項4】 電極パッドが形成された半導体基板と、 主面と背面とを有し、主面が前記半導体基板の電極パッ
ドに対向して配置され、前記電極パッドに対応する位置
に開口が形成され、前記背面の前記開口の近辺に端子電
極が形成された絶縁回路基板と、 前記開口内を通って、前記半導体基板の電極パッドと前
記絶縁回路基板の端子電極との間を接続する接続用導体
と、を備えたことを特徴とする半導体装置。
4. A semiconductor substrate having an electrode pad formed thereon, a main surface and a back surface, wherein the main surface is arranged to face the electrode pad of the semiconductor substrate, and an opening is formed at a position corresponding to the electrode pad. An insulated circuit board formed with a terminal electrode near the opening on the back surface; and a connection passing through the opening to connect between an electrode pad of the semiconductor substrate and a terminal electrode of the insulated circuit board. And a conductor for use in the semiconductor device.
【請求項5】 前記絶縁回路基板が、主面、背面、また
は主面と背面との中間層において、合わせて2層以上の
配線層を備えたことを特徴とする請求項1〜4のいずれ
かに記載の半導体装置。
5. The insulated circuit board according to claim 1, further comprising two or more wiring layers in a main surface, a back surface, or an intermediate layer between the main surface and the back surface. 13. A semiconductor device according to claim 1.
【請求項6】 前記主面または中間層の2層以上の配線
層が、前記開口部において前記接続用導体に電気的に接
続されたことを特徴とする請求項5に記載の半導体装
置。
6. The semiconductor device according to claim 5, wherein two or more wiring layers of the main surface or the intermediate layer are electrically connected to the connection conductor at the opening.
【請求項7】 前記接続用導体が、同一の材質の連続体
により形成されたことを特徴とする請求項1〜4のいず
れかに記載の半導体装置。
7. The semiconductor device according to claim 1, wherein said connection conductor is formed of a continuum of the same material.
【請求項8】 前記接続用導体が、2種以上の材質を積
層して形成されたことを特徴とする請求項1〜4のいず
れかに記載の半導体装置。
8. The semiconductor device according to claim 1, wherein said connection conductor is formed by laminating two or more kinds of materials.
【請求項9】 前記接続用導体が、前記半導体基板の電
極パッドに接合された塊状の第一の導体部分と、この第
一の導電部分から前記絶縁回路基板の端子電極に至る線
状の第二の導体部分とからなることを特徴とする請求項
4に記載の半導体装置。
9. The semiconductor device according to claim 1, wherein the connection conductor is a lump-shaped first conductor portion bonded to an electrode pad of the semiconductor substrate, and a linear first conductor portion extending from the first conductive portion to a terminal electrode of the insulated circuit board. 5. The semiconductor device according to claim 4, comprising two conductor portions.
【請求項10】 前記絶縁回路基板の背面側から前記接
続用導体を封止する封止樹脂を備えたことを特徴とする
請求項4に記載の半導体装置。
10. The semiconductor device according to claim 4, further comprising a sealing resin for sealing the connection conductor from the back side of the insulated circuit board.
【請求項11】 前記開口は、その断面形状が円形、楕
円形、ほぼ四角形を含む所望の形状に形成されたことを
特徴とする請求項1〜4のいずれかに記載の半導体装
置。
11. The semiconductor device according to claim 1, wherein said opening has a desired cross-sectional shape including a circle, an ellipse, and a substantially quadrangle.
【請求項12】 前記接続用導体は、前記開口の内面に
少なくとも一部が接するように形成されるか、もしく
は、接しないように形成されたことを特徴とする請求項
1〜4のいずれかに記載の半導体装置。
12. The connection conductor according to claim 1, wherein the connection conductor is formed so as to be at least partially in contact with an inner surface of the opening, or is formed so as not to be in contact with the inner surface of the opening. 3. The semiconductor device according to claim 1.
【請求項13】 前記開口の前記接続用導体との間隙
は、空隙であるかまたは非導電性樹脂が設置されたこと
を特徴とする請求項12に記載の半導体装置。
13. The semiconductor device according to claim 12, wherein a gap between the opening and the connection conductor is a gap or a non-conductive resin is provided.
【請求項14】 前記半導体基板と前記絶縁回路基板と
の間に非導電性樹脂が設置されたことを特徴とする請求
項1〜4のいずれかに記載の半導体装置。
14. The semiconductor device according to claim 1, wherein a non-conductive resin is provided between said semiconductor substrate and said insulated circuit board.
【請求項15】 前記非導電性樹脂により前記半導体基
板と前記絶縁回路基板とが固着されたことを特徴とする
請求項1〜4のいずれかに記載の半導体装置。
15. The semiconductor device according to claim 1, wherein said semiconductor substrate and said insulated circuit board are fixed by said non-conductive resin.
【請求項16】 主面と背面とを有する絶縁回路基板
に、主面側から、背面または主面と背面との間に配置さ
れた端子電極に達する開口を形成する工程と、 電極パッドが形成された半導体基板を前記電極パッドと
前記開口とが対応するようにして、前記半導体基板を前
記絶縁回路基板に搭載する工程と、 前記電極パッドと前記端子電極とを前記開口を通る接続
用導体で接続する工程と、を含むことを特徴とする半導
体装置の製造方法。
16. A step of forming an opening from a main surface side to a rear surface or a terminal electrode disposed between the main surface and the rear surface in an insulated circuit board having a main surface and a back surface, and forming an electrode pad. Mounting the semiconductor substrate on the insulated circuit board such that the electrode pad and the opening correspond to each other, and connecting the electrode pad and the terminal electrode with a connection conductor passing through the opening. Connecting the semiconductor device to the semiconductor device.
【請求項17】 請求項16に記載の方法において、前
記接続用導体を予め前記半導体基板の電極パッドの上に
形成する工程と、 前記非導電性の樹脂を予め前記絶縁回路基板上に設置す
る工程と、を含むことを特徴とする半導体装置の製造方
法。
17. The method according to claim 16, wherein the connecting conductor is previously formed on an electrode pad of the semiconductor substrate, and the non-conductive resin is previously provided on the insulating circuit board. And a method of manufacturing a semiconductor device.
【請求項18】 請求項16に記載の方法において、前
記接続用導体の一部を予め前記半導体基板の電極パッド
の上に形成するとともに、前記接続用導体の他の一部を
予め前記絶縁回路基板の開口内に形成する工程と、 前記非導電性の樹脂を予め前記絶縁回路基板上に設置す
る工程と、を含むことを特徴とする半導体装置の製造方
法。
18. The method according to claim 16, wherein a part of the connection conductor is previously formed on an electrode pad of the semiconductor substrate, and another part of the connection conductor is previously formed in the insulating circuit. A method for manufacturing a semiconductor device, comprising: a step of forming the non-conductive resin in an opening of a substrate; and a step of previously installing the non-conductive resin on the insulated circuit board.
【請求項19】 半導体基板の電極パッド上に接続用導
体を形成する工程と、 主面と背面とを有し、背面に端子電極を有する絶縁回路
基板に開口を設ける工程と、 前記電極パッド上の接続用導体が前記絶縁回路基板の主
面側の前記開口内に位置するようにして前記半導体基板
を前記絶縁回路基板に搭載する工程と、 前記接続用導体と前記端子電極とを前記開口を介して電
気的に接続する工程と、 前記絶縁回路基板の背面から前記接続用導体と前記端子
電極とを樹脂封止する工程と、を含むことを特徴とする
半導体装置の製造方法。
19. A step of forming a connection conductor on an electrode pad of a semiconductor substrate, a step of providing an opening in an insulated circuit board having a main surface and a back surface and having a terminal electrode on the back surface, Mounting the semiconductor substrate on the insulated circuit board such that the connection conductor is located in the opening on the main surface side of the insulated circuit board; and connecting the connection conductor and the terminal electrode to the opening. A method of manufacturing a semiconductor device, comprising the steps of: electrically connecting the terminal and the terminal electrode via the back surface of the insulated circuit board;
【請求項20】 請求項16または19に記載の方法に
おいて、前記電極パッド上の接続用導体が前記絶縁回路
基板の開口の内壁に接触して固定されるように前記半導
体基板を前記絶縁回路基板に搭載することを特徴とする
半導体装置の製造方法。
20. The insulating circuit board according to claim 16, wherein the connecting substrate on the electrode pad is fixed in contact with an inner wall of an opening of the insulating circuit board. A method of manufacturing a semiconductor device, wherein the method is mounted on a semiconductor device.
【請求項21】 請求項16または19に記載の方法に
おいて、前記電極パッド上の接続用導体が前記絶縁回路
基板の開口の内壁に接触しないように前記半導体基板を
前記絶縁回路基板に搭載することを特徴とする半導体装
置の製造方法。
21. The method according to claim 16, wherein the semiconductor substrate is mounted on the insulated circuit board such that a connection conductor on the electrode pad does not contact an inner wall of an opening of the insulated circuit board. A method for manufacturing a semiconductor device, comprising:
JP2000279987A 2000-02-08 2000-09-14 Semiconductor device and its manufacturing method Pending JP2001298043A (en)

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